Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_dv_base_reg_0/dv_base_lockable_field_cov.sv

3 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.init 100.00 1 100 1 64 64
lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.renew_scr_key 100.00 1 100 1 64 64
lockable_field_cov_of_sram_ctrl_regs_reg_block.exec.en 100.00 1 100 1 64 64




Group Instance : lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.init
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.init

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.init
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.renew_scr_key
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.renew_scr_key

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.renew_scr_key
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_sram_ctrl_regs_reg_block.exec.en
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.exec.en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.exec.en
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 968 1 T17 9 T18 5 T59 6
auto[1] 168 1 T17 5 T18 2 T7 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 962 1 T17 11 T18 3 T59 6
auto[1] 174 1 T17 3 T18 4 T7 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 506 1 T104 2 T66 8 T106 1
auto[1] 577 1 T66 9 T106 7 T134 64

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%