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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.06 99.81 96.99 100.00 100.00 98.57 99.70 98.33


Total test records in report: 1019
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T307 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.596058492 May 07 03:35:46 PM PDT 24 May 07 03:37:09 PM PDT 24 530754300 ps
T308 /workspace/coverage/default/42.sram_ctrl_multiple_keys.2296633252 May 07 03:36:16 PM PDT 24 May 07 03:52:00 PM PDT 24 20008493112 ps
T309 /workspace/coverage/default/40.sram_ctrl_max_throughput.1744139519 May 07 03:36:02 PM PDT 24 May 07 03:37:29 PM PDT 24 511370962 ps
T310 /workspace/coverage/default/7.sram_ctrl_bijection.631749738 May 07 03:32:57 PM PDT 24 May 07 03:33:53 PM PDT 24 1097873357 ps
T311 /workspace/coverage/default/10.sram_ctrl_multiple_keys.4113918279 May 07 03:33:05 PM PDT 24 May 07 03:39:47 PM PDT 24 13243682749 ps
T312 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2392164416 May 07 03:36:24 PM PDT 24 May 07 03:36:29 PM PDT 24 237292133 ps
T313 /workspace/coverage/default/46.sram_ctrl_partial_access.1678801761 May 07 03:36:45 PM PDT 24 May 07 03:36:52 PM PDT 24 110228144 ps
T314 /workspace/coverage/default/17.sram_ctrl_smoke.4250339681 May 07 03:33:40 PM PDT 24 May 07 03:33:50 PM PDT 24 607114512 ps
T315 /workspace/coverage/default/5.sram_ctrl_lc_escalation.2983929230 May 07 03:32:51 PM PDT 24 May 07 03:32:53 PM PDT 24 151434856 ps
T316 /workspace/coverage/default/14.sram_ctrl_lc_escalation.692401538 May 07 03:33:22 PM PDT 24 May 07 03:33:32 PM PDT 24 737187615 ps
T317 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.3948118474 May 07 03:35:40 PM PDT 24 May 07 03:36:49 PM PDT 24 843153253 ps
T318 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3649851890 May 07 03:36:53 PM PDT 24 May 07 03:40:27 PM PDT 24 9434638425 ps
T319 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3439612705 May 07 03:33:13 PM PDT 24 May 07 03:37:02 PM PDT 24 11979511357 ps
T320 /workspace/coverage/default/26.sram_ctrl_regwen.4173874685 May 07 03:34:27 PM PDT 24 May 07 03:37:32 PM PDT 24 1710074537 ps
T321 /workspace/coverage/default/36.sram_ctrl_executable.971268247 May 07 03:35:31 PM PDT 24 May 07 03:40:16 PM PDT 24 15402892916 ps
T322 /workspace/coverage/default/3.sram_ctrl_mem_walk.3942795143 May 07 03:32:51 PM PDT 24 May 07 03:33:00 PM PDT 24 277797846 ps
T323 /workspace/coverage/default/8.sram_ctrl_stress_all.1507627750 May 07 03:33:01 PM PDT 24 May 07 04:40:33 PM PDT 24 122386599701 ps
T324 /workspace/coverage/default/24.sram_ctrl_ram_cfg.2273907114 May 07 03:34:19 PM PDT 24 May 07 03:34:21 PM PDT 24 119669417 ps
T325 /workspace/coverage/default/49.sram_ctrl_max_throughput.2604753079 May 07 03:37:08 PM PDT 24 May 07 03:38:34 PM PDT 24 432383973 ps
T326 /workspace/coverage/default/9.sram_ctrl_partial_access.1673057128 May 07 03:33:01 PM PDT 24 May 07 03:33:21 PM PDT 24 1006916417 ps
T327 /workspace/coverage/default/6.sram_ctrl_max_throughput.1188574228 May 07 03:32:49 PM PDT 24 May 07 03:33:03 PM PDT 24 1231808071 ps
T328 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1523925667 May 07 03:33:02 PM PDT 24 May 07 03:33:10 PM PDT 24 199554145 ps
T329 /workspace/coverage/default/26.sram_ctrl_mem_walk.3683085131 May 07 03:34:27 PM PDT 24 May 07 03:34:38 PM PDT 24 463541364 ps
T330 /workspace/coverage/default/15.sram_ctrl_lc_escalation.2087752698 May 07 03:33:29 PM PDT 24 May 07 03:33:33 PM PDT 24 832700408 ps
T331 /workspace/coverage/default/43.sram_ctrl_ram_cfg.1244749353 May 07 03:36:24 PM PDT 24 May 07 03:36:26 PM PDT 24 73169909 ps
T332 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1605313158 May 07 03:32:57 PM PDT 24 May 07 03:33:02 PM PDT 24 74908951 ps
T333 /workspace/coverage/default/36.sram_ctrl_regwen.1220957564 May 07 03:35:30 PM PDT 24 May 07 03:43:53 PM PDT 24 3649155314 ps
T334 /workspace/coverage/default/26.sram_ctrl_partial_access.2850648404 May 07 03:34:32 PM PDT 24 May 07 03:34:48 PM PDT 24 596844498 ps
T335 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.2334923652 May 07 03:34:23 PM PDT 24 May 07 03:34:29 PM PDT 24 125848755 ps
T336 /workspace/coverage/default/43.sram_ctrl_regwen.2995927492 May 07 03:36:24 PM PDT 24 May 07 03:56:02 PM PDT 24 45052141740 ps
T337 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.1469561569 May 07 03:33:38 PM PDT 24 May 07 03:39:45 PM PDT 24 5287166533 ps
T338 /workspace/coverage/default/47.sram_ctrl_regwen.10916129 May 07 03:36:58 PM PDT 24 May 07 03:48:54 PM PDT 24 34015203506 ps
T339 /workspace/coverage/default/13.sram_ctrl_regwen.4239051029 May 07 03:33:15 PM PDT 24 May 07 03:33:39 PM PDT 24 681355011 ps
T340 /workspace/coverage/default/44.sram_ctrl_max_throughput.1822197696 May 07 03:36:29 PM PDT 24 May 07 03:38:26 PM PDT 24 1164957775 ps
T341 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.325251077 May 07 03:34:35 PM PDT 24 May 07 03:35:27 PM PDT 24 248606804 ps
T342 /workspace/coverage/default/38.sram_ctrl_stress_all.2074534986 May 07 03:35:52 PM PDT 24 May 07 05:03:39 PM PDT 24 49333160678 ps
T343 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.3008541745 May 07 03:32:43 PM PDT 24 May 07 03:33:19 PM PDT 24 1040054549 ps
T344 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.1101818015 May 07 03:33:53 PM PDT 24 May 07 03:34:00 PM PDT 24 159316307 ps
T345 /workspace/coverage/default/26.sram_ctrl_max_throughput.1383016723 May 07 03:34:31 PM PDT 24 May 07 03:36:19 PM PDT 24 560051707 ps
T346 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2790567016 May 07 03:35:20 PM PDT 24 May 07 03:35:26 PM PDT 24 1090141419 ps
T347 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.3500050541 May 07 03:35:18 PM PDT 24 May 07 03:37:35 PM PDT 24 1318905863 ps
T348 /workspace/coverage/default/23.sram_ctrl_bijection.1008955443 May 07 03:34:07 PM PDT 24 May 07 03:34:54 PM PDT 24 11223743946 ps
T349 /workspace/coverage/default/11.sram_ctrl_mem_walk.117204386 May 07 03:33:10 PM PDT 24 May 07 03:33:20 PM PDT 24 521102385 ps
T350 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.44517367 May 07 03:36:12 PM PDT 24 May 07 03:51:33 PM PDT 24 19950313316 ps
T351 /workspace/coverage/default/33.sram_ctrl_executable.222039970 May 07 03:35:14 PM PDT 24 May 07 03:52:38 PM PDT 24 26786716627 ps
T352 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.2055745439 May 07 03:33:17 PM PDT 24 May 07 03:33:20 PM PDT 24 169165269 ps
T353 /workspace/coverage/default/36.sram_ctrl_partial_access.3098627965 May 07 03:35:30 PM PDT 24 May 07 03:35:39 PM PDT 24 613581730 ps
T354 /workspace/coverage/default/1.sram_ctrl_mem_walk.3646665518 May 07 03:32:33 PM PDT 24 May 07 03:32:43 PM PDT 24 8711597593 ps
T355 /workspace/coverage/default/46.sram_ctrl_smoke.2653975122 May 07 03:36:41 PM PDT 24 May 07 03:36:51 PM PDT 24 971880535 ps
T356 /workspace/coverage/default/0.sram_ctrl_smoke.4039145403 May 07 03:32:29 PM PDT 24 May 07 03:34:09 PM PDT 24 2987138440 ps
T357 /workspace/coverage/default/12.sram_ctrl_lc_escalation.746875100 May 07 03:33:14 PM PDT 24 May 07 03:33:21 PM PDT 24 952034359 ps
T358 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.3717653669 May 07 03:35:23 PM PDT 24 May 07 03:35:28 PM PDT 24 533064067 ps
T359 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.4172077203 May 07 03:35:23 PM PDT 24 May 07 03:38:10 PM PDT 24 246406120 ps
T360 /workspace/coverage/default/27.sram_ctrl_lc_escalation.957057485 May 07 03:34:34 PM PDT 24 May 07 03:34:38 PM PDT 24 351965013 ps
T361 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.3765242059 May 07 03:34:59 PM PDT 24 May 07 03:39:22 PM PDT 24 51398101575 ps
T362 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.671375004 May 07 03:32:44 PM PDT 24 May 07 03:32:50 PM PDT 24 586084194 ps
T363 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.444860752 May 07 03:36:12 PM PDT 24 May 07 03:38:27 PM PDT 24 5614604921 ps
T364 /workspace/coverage/default/20.sram_ctrl_bijection.1159634086 May 07 03:33:54 PM PDT 24 May 07 03:34:43 PM PDT 24 3030271373 ps
T365 /workspace/coverage/default/43.sram_ctrl_max_throughput.3570744614 May 07 03:36:25 PM PDT 24 May 07 03:38:28 PM PDT 24 154508434 ps
T366 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.1265782346 May 07 03:33:12 PM PDT 24 May 07 03:33:19 PM PDT 24 174763661 ps
T367 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3698721892 May 07 03:36:39 PM PDT 24 May 07 03:46:26 PM PDT 24 14173057517 ps
T368 /workspace/coverage/default/41.sram_ctrl_mem_walk.3018771767 May 07 03:36:13 PM PDT 24 May 07 03:36:18 PM PDT 24 231140416 ps
T369 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.1353112686 May 07 03:32:36 PM PDT 24 May 07 03:38:22 PM PDT 24 3785149127 ps
T370 /workspace/coverage/default/23.sram_ctrl_mem_walk.1394888672 May 07 03:34:18 PM PDT 24 May 07 03:34:28 PM PDT 24 1302075250 ps
T371 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.3439796562 May 07 03:33:46 PM PDT 24 May 07 03:33:51 PM PDT 24 229652089 ps
T372 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3192049287 May 07 03:34:46 PM PDT 24 May 07 03:35:00 PM PDT 24 1452339794 ps
T373 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.1491276169 May 07 03:33:38 PM PDT 24 May 07 03:33:42 PM PDT 24 177415871 ps
T374 /workspace/coverage/default/3.sram_ctrl_multiple_keys.1167468904 May 07 03:32:40 PM PDT 24 May 07 03:52:20 PM PDT 24 8504329395 ps
T375 /workspace/coverage/default/49.sram_ctrl_smoke.1532949329 May 07 03:37:02 PM PDT 24 May 07 03:37:20 PM PDT 24 5096883175 ps
T376 /workspace/coverage/default/20.sram_ctrl_partial_access.2583129677 May 07 03:33:53 PM PDT 24 May 07 03:34:27 PM PDT 24 1659176049 ps
T377 /workspace/coverage/default/21.sram_ctrl_ram_cfg.3743878067 May 07 03:34:07 PM PDT 24 May 07 03:34:09 PM PDT 24 50728535 ps
T21 /workspace/coverage/default/0.sram_ctrl_sec_cm.3042099232 May 07 03:32:32 PM PDT 24 May 07 03:32:37 PM PDT 24 781852619 ps
T378 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1401362863 May 07 03:34:04 PM PDT 24 May 07 03:39:01 PM PDT 24 11831603812 ps
T379 /workspace/coverage/default/34.sram_ctrl_regwen.1247008739 May 07 03:35:19 PM PDT 24 May 07 03:36:11 PM PDT 24 2534782269 ps
T380 /workspace/coverage/default/27.sram_ctrl_smoke.916899544 May 07 03:34:28 PM PDT 24 May 07 03:35:52 PM PDT 24 2175438827 ps
T381 /workspace/coverage/default/11.sram_ctrl_regwen.738553216 May 07 03:33:07 PM PDT 24 May 07 03:53:25 PM PDT 24 2017953883 ps
T382 /workspace/coverage/default/39.sram_ctrl_bijection.1936148099 May 07 03:35:51 PM PDT 24 May 07 03:36:29 PM PDT 24 1979622930 ps
T383 /workspace/coverage/default/40.sram_ctrl_ram_cfg.1008602664 May 07 03:36:06 PM PDT 24 May 07 03:36:08 PM PDT 24 74166840 ps
T384 /workspace/coverage/default/35.sram_ctrl_regwen.176225266 May 07 03:35:23 PM PDT 24 May 07 03:39:08 PM PDT 24 10678280475 ps
T385 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.507018701 May 07 03:36:10 PM PDT 24 May 07 03:36:16 PM PDT 24 307688545 ps
T386 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2454336144 May 07 03:32:46 PM PDT 24 May 07 03:37:38 PM PDT 24 4261602883 ps
T387 /workspace/coverage/default/15.sram_ctrl_executable.979645863 May 07 03:33:30 PM PDT 24 May 07 03:48:42 PM PDT 24 11933538749 ps
T388 /workspace/coverage/default/5.sram_ctrl_smoke.682159426 May 07 03:32:50 PM PDT 24 May 07 03:32:56 PM PDT 24 870425154 ps
T389 /workspace/coverage/default/29.sram_ctrl_partial_access.2717544467 May 07 03:34:47 PM PDT 24 May 07 03:36:04 PM PDT 24 6964347789 ps
T390 /workspace/coverage/default/41.sram_ctrl_max_throughput.3255323313 May 07 03:36:13 PM PDT 24 May 07 03:36:57 PM PDT 24 92247980 ps
T391 /workspace/coverage/default/18.sram_ctrl_ram_cfg.4182238285 May 07 03:33:47 PM PDT 24 May 07 03:33:49 PM PDT 24 46267645 ps
T392 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1692815935 May 07 03:33:49 PM PDT 24 May 07 03:33:56 PM PDT 24 279903583 ps
T393 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.1013614150 May 07 03:33:16 PM PDT 24 May 07 03:37:23 PM PDT 24 5793130968 ps
T394 /workspace/coverage/default/9.sram_ctrl_mem_walk.4197287447 May 07 03:33:04 PM PDT 24 May 07 03:33:14 PM PDT 24 516120969 ps
T395 /workspace/coverage/default/48.sram_ctrl_multiple_keys.1022833324 May 07 03:37:05 PM PDT 24 May 07 03:44:16 PM PDT 24 2340206822 ps
T396 /workspace/coverage/default/3.sram_ctrl_max_throughput.63826236 May 07 03:32:39 PM PDT 24 May 07 03:32:45 PM PDT 24 54373442 ps
T397 /workspace/coverage/default/19.sram_ctrl_multiple_keys.2470272204 May 07 03:33:46 PM PDT 24 May 07 03:51:00 PM PDT 24 2872675104 ps
T398 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1883740810 May 07 03:36:14 PM PDT 24 May 07 03:39:19 PM PDT 24 13512826361 ps
T110 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.241443983 May 07 03:34:47 PM PDT 24 May 07 03:35:49 PM PDT 24 1334950947 ps
T399 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.3433852516 May 07 03:32:40 PM PDT 24 May 07 03:42:42 PM PDT 24 2730978756 ps
T400 /workspace/coverage/default/42.sram_ctrl_lc_escalation.2292543177 May 07 03:36:20 PM PDT 24 May 07 03:36:28 PM PDT 24 1075454062 ps
T401 /workspace/coverage/default/21.sram_ctrl_bijection.846440350 May 07 03:33:59 PM PDT 24 May 07 03:34:21 PM PDT 24 1319636334 ps
T402 /workspace/coverage/default/25.sram_ctrl_ram_cfg.1317470369 May 07 03:34:23 PM PDT 24 May 07 03:34:25 PM PDT 24 160773831 ps
T403 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.1954706393 May 07 03:33:39 PM PDT 24 May 07 03:33:45 PM PDT 24 576649738 ps
T404 /workspace/coverage/default/41.sram_ctrl_regwen.3056679848 May 07 03:36:17 PM PDT 24 May 07 03:44:09 PM PDT 24 41299373784 ps
T405 /workspace/coverage/default/31.sram_ctrl_partial_access.2688281245 May 07 03:34:58 PM PDT 24 May 07 03:37:36 PM PDT 24 1415220519 ps
T406 /workspace/coverage/default/7.sram_ctrl_executable.2602818418 May 07 03:32:59 PM PDT 24 May 07 03:52:45 PM PDT 24 19025510790 ps
T407 /workspace/coverage/default/22.sram_ctrl_max_throughput.663631826 May 07 03:34:05 PM PDT 24 May 07 03:35:49 PM PDT 24 138316432 ps
T408 /workspace/coverage/default/22.sram_ctrl_alert_test.4213872053 May 07 03:34:09 PM PDT 24 May 07 03:34:11 PM PDT 24 17801116 ps
T409 /workspace/coverage/default/42.sram_ctrl_stress_all.1920381849 May 07 03:36:19 PM PDT 24 May 07 04:16:58 PM PDT 24 6230353259 ps
T410 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1362812452 May 07 03:32:35 PM PDT 24 May 07 03:35:32 PM PDT 24 1877464455 ps
T411 /workspace/coverage/default/46.sram_ctrl_alert_test.2869759302 May 07 03:36:55 PM PDT 24 May 07 03:36:56 PM PDT 24 13772516 ps
T412 /workspace/coverage/default/40.sram_ctrl_executable.2892271873 May 07 03:36:10 PM PDT 24 May 07 03:51:16 PM PDT 24 22957809412 ps
T413 /workspace/coverage/default/9.sram_ctrl_smoke.2512692587 May 07 03:33:02 PM PDT 24 May 07 03:33:17 PM PDT 24 1179010976 ps
T414 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.811639128 May 07 03:36:42 PM PDT 24 May 07 03:37:36 PM PDT 24 2006727259 ps
T415 /workspace/coverage/default/35.sram_ctrl_bijection.3570085412 May 07 03:35:23 PM PDT 24 May 07 03:36:04 PM PDT 24 1355094072 ps
T416 /workspace/coverage/default/46.sram_ctrl_ram_cfg.1424214858 May 07 03:36:53 PM PDT 24 May 07 03:36:55 PM PDT 24 88711098 ps
T417 /workspace/coverage/default/31.sram_ctrl_lc_escalation.1989975221 May 07 03:35:00 PM PDT 24 May 07 03:35:06 PM PDT 24 4106839479 ps
T418 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1826908334 May 07 03:34:07 PM PDT 24 May 07 03:35:01 PM PDT 24 134503591 ps
T419 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1868024954 May 07 03:33:30 PM PDT 24 May 07 03:34:18 PM PDT 24 483163352 ps
T420 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3739987665 May 07 03:35:12 PM PDT 24 May 07 03:35:17 PM PDT 24 1553322273 ps
T421 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.3207725837 May 07 03:32:46 PM PDT 24 May 07 03:35:34 PM PDT 24 3796642528 ps
T422 /workspace/coverage/default/7.sram_ctrl_regwen.3336932731 May 07 03:32:58 PM PDT 24 May 07 03:39:20 PM PDT 24 1232254991 ps
T423 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.779721790 May 07 03:36:31 PM PDT 24 May 07 03:38:11 PM PDT 24 521923896 ps
T424 /workspace/coverage/default/11.sram_ctrl_max_throughput.4089334556 May 07 03:33:07 PM PDT 24 May 07 03:33:21 PM PDT 24 68768258 ps
T425 /workspace/coverage/default/25.sram_ctrl_lc_escalation.100353650 May 07 03:34:22 PM PDT 24 May 07 03:34:25 PM PDT 24 339227557 ps
T426 /workspace/coverage/default/1.sram_ctrl_multiple_keys.2713951067 May 07 03:32:34 PM PDT 24 May 07 03:51:33 PM PDT 24 12811347468 ps
T427 /workspace/coverage/default/22.sram_ctrl_regwen.300334172 May 07 03:34:03 PM PDT 24 May 07 03:53:49 PM PDT 24 50960216055 ps
T428 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.360483825 May 07 03:35:34 PM PDT 24 May 07 03:38:00 PM PDT 24 8717101425 ps
T429 /workspace/coverage/default/42.sram_ctrl_executable.4066460979 May 07 03:36:20 PM PDT 24 May 07 03:37:56 PM PDT 24 3395739336 ps
T430 /workspace/coverage/default/43.sram_ctrl_executable.484986996 May 07 03:36:24 PM PDT 24 May 07 03:49:18 PM PDT 24 29119970027 ps
T431 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3556947692 May 07 03:32:29 PM PDT 24 May 07 03:33:11 PM PDT 24 442197597 ps
T432 /workspace/coverage/default/30.sram_ctrl_multiple_keys.1042045155 May 07 03:34:52 PM PDT 24 May 07 03:55:31 PM PDT 24 57460332463 ps
T433 /workspace/coverage/default/1.sram_ctrl_stress_all.3715781247 May 07 03:32:36 PM PDT 24 May 07 03:38:03 PM PDT 24 12254480094 ps
T434 /workspace/coverage/default/32.sram_ctrl_partial_access.3480101884 May 07 03:34:59 PM PDT 24 May 07 03:35:12 PM PDT 24 756997461 ps
T435 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.3978437561 May 07 03:33:25 PM PDT 24 May 07 03:33:29 PM PDT 24 87966894 ps
T436 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.151323363 May 07 03:33:08 PM PDT 24 May 07 03:38:47 PM PDT 24 2039824402 ps
T437 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1511062201 May 07 03:34:34 PM PDT 24 May 07 03:37:36 PM PDT 24 4829283684 ps
T438 /workspace/coverage/default/24.sram_ctrl_max_throughput.1961757222 May 07 03:34:15 PM PDT 24 May 07 03:34:54 PM PDT 24 476378063 ps
T439 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.4071692018 May 07 03:36:59 PM PDT 24 May 07 03:37:03 PM PDT 24 190578907 ps
T440 /workspace/coverage/default/49.sram_ctrl_alert_test.52288374 May 07 03:37:15 PM PDT 24 May 07 03:37:17 PM PDT 24 16177181 ps
T441 /workspace/coverage/default/24.sram_ctrl_smoke.3836081191 May 07 03:34:14 PM PDT 24 May 07 03:35:40 PM PDT 24 2564319893 ps
T442 /workspace/coverage/default/8.sram_ctrl_ram_cfg.2997228044 May 07 03:33:02 PM PDT 24 May 07 03:33:04 PM PDT 24 46439742 ps
T443 /workspace/coverage/default/28.sram_ctrl_mem_walk.1183005941 May 07 03:34:45 PM PDT 24 May 07 03:34:54 PM PDT 24 454791406 ps
T444 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.442332280 May 07 03:36:24 PM PDT 24 May 07 03:37:00 PM PDT 24 296883819 ps
T445 /workspace/coverage/default/4.sram_ctrl_lc_escalation.4265338278 May 07 03:32:47 PM PDT 24 May 07 03:32:56 PM PDT 24 755779810 ps
T446 /workspace/coverage/default/5.sram_ctrl_multiple_keys.787591239 May 07 03:32:49 PM PDT 24 May 07 03:39:29 PM PDT 24 56013817897 ps
T447 /workspace/coverage/default/21.sram_ctrl_executable.2879206272 May 07 03:34:01 PM PDT 24 May 07 03:49:42 PM PDT 24 34303812362 ps
T448 /workspace/coverage/default/5.sram_ctrl_alert_test.3159790936 May 07 03:32:48 PM PDT 24 May 07 03:32:49 PM PDT 24 17940690 ps
T449 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1772590598 May 07 03:35:34 PM PDT 24 May 07 03:36:05 PM PDT 24 110098720 ps
T450 /workspace/coverage/default/34.sram_ctrl_mem_walk.1459512042 May 07 03:35:17 PM PDT 24 May 07 03:35:29 PM PDT 24 2913657617 ps
T451 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.1476371593 May 07 03:34:30 PM PDT 24 May 07 03:37:14 PM PDT 24 1787935580 ps
T452 /workspace/coverage/default/49.sram_ctrl_mem_walk.3078524139 May 07 03:37:12 PM PDT 24 May 07 03:37:23 PM PDT 24 677644155 ps
T453 /workspace/coverage/default/17.sram_ctrl_mem_walk.2092947293 May 07 03:33:38 PM PDT 24 May 07 03:33:49 PM PDT 24 688836487 ps
T454 /workspace/coverage/default/3.sram_ctrl_smoke.896423536 May 07 03:32:39 PM PDT 24 May 07 03:32:53 PM PDT 24 3520487434 ps
T455 /workspace/coverage/default/1.sram_ctrl_partial_access.2994734861 May 07 03:32:34 PM PDT 24 May 07 03:33:22 PM PDT 24 973692085 ps
T456 /workspace/coverage/default/44.sram_ctrl_lc_escalation.57323375 May 07 03:36:28 PM PDT 24 May 07 03:36:34 PM PDT 24 1822675032 ps
T457 /workspace/coverage/default/3.sram_ctrl_executable.3073146878 May 07 03:32:39 PM PDT 24 May 07 03:45:59 PM PDT 24 6661908558 ps
T458 /workspace/coverage/default/49.sram_ctrl_regwen.1911807828 May 07 03:37:13 PM PDT 24 May 07 03:47:46 PM PDT 24 27228656237 ps
T459 /workspace/coverage/default/12.sram_ctrl_stress_all.632636507 May 07 03:33:13 PM PDT 24 May 07 03:56:25 PM PDT 24 95464184131 ps
T460 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.8007232 May 07 03:35:14 PM PDT 24 May 07 03:49:39 PM PDT 24 22724793282 ps
T461 /workspace/coverage/default/5.sram_ctrl_stress_all.3378757615 May 07 03:32:47 PM PDT 24 May 07 04:30:57 PM PDT 24 148756898729 ps
T462 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.2090996877 May 07 03:34:46 PM PDT 24 May 07 03:41:33 PM PDT 24 25461315532 ps
T463 /workspace/coverage/default/20.sram_ctrl_smoke.2575176103 May 07 03:33:54 PM PDT 24 May 07 03:33:57 PM PDT 24 64040609 ps
T464 /workspace/coverage/default/38.sram_ctrl_lc_escalation.416771751 May 07 03:35:45 PM PDT 24 May 07 03:35:51 PM PDT 24 464240152 ps
T465 /workspace/coverage/default/36.sram_ctrl_smoke.1510462285 May 07 03:35:30 PM PDT 24 May 07 03:36:24 PM PDT 24 1712395009 ps
T466 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.423495198 May 07 03:36:12 PM PDT 24 May 07 03:36:17 PM PDT 24 231195570 ps
T467 /workspace/coverage/default/17.sram_ctrl_stress_all.2001598170 May 07 03:33:38 PM PDT 24 May 07 04:38:51 PM PDT 24 9090863211 ps
T468 /workspace/coverage/default/20.sram_ctrl_lc_escalation.1533226201 May 07 03:34:04 PM PDT 24 May 07 03:34:10 PM PDT 24 1444661352 ps
T469 /workspace/coverage/default/13.sram_ctrl_stress_all.828192193 May 07 03:33:18 PM PDT 24 May 07 04:25:56 PM PDT 24 44966257828 ps
T470 /workspace/coverage/default/20.sram_ctrl_alert_test.289278797 May 07 03:34:04 PM PDT 24 May 07 03:34:05 PM PDT 24 13260267 ps
T471 /workspace/coverage/default/7.sram_ctrl_max_throughput.2725188424 May 07 03:32:57 PM PDT 24 May 07 03:33:00 PM PDT 24 128999095 ps
T472 /workspace/coverage/default/34.sram_ctrl_executable.3923532689 May 07 03:35:18 PM PDT 24 May 07 03:36:00 PM PDT 24 740058370 ps
T473 /workspace/coverage/default/43.sram_ctrl_mem_walk.4085547520 May 07 03:36:25 PM PDT 24 May 07 03:36:30 PM PDT 24 75035904 ps
T474 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.2972671798 May 07 03:34:56 PM PDT 24 May 07 03:35:01 PM PDT 24 220789489 ps
T475 /workspace/coverage/default/29.sram_ctrl_max_throughput.1636134461 May 07 03:34:45 PM PDT 24 May 07 03:35:45 PM PDT 24 114205910 ps
T476 /workspace/coverage/default/48.sram_ctrl_ram_cfg.497041775 May 07 03:37:06 PM PDT 24 May 07 03:37:08 PM PDT 24 29364968 ps
T477 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2148963174 May 07 03:36:22 PM PDT 24 May 07 03:39:59 PM PDT 24 9317009080 ps
T478 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.2332306489 May 07 03:32:48 PM PDT 24 May 07 03:55:59 PM PDT 24 6541144495 ps
T479 /workspace/coverage/default/3.sram_ctrl_ram_cfg.587142713 May 07 03:32:43 PM PDT 24 May 07 03:32:44 PM PDT 24 53060905 ps
T480 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.253918269 May 07 03:35:35 PM PDT 24 May 07 03:37:54 PM PDT 24 1694305445 ps
T481 /workspace/coverage/default/2.sram_ctrl_executable.3021103234 May 07 03:32:38 PM PDT 24 May 07 03:51:43 PM PDT 24 2732045977 ps
T482 /workspace/coverage/default/15.sram_ctrl_partial_access.3068073557 May 07 03:33:28 PM PDT 24 May 07 03:33:30 PM PDT 24 39883260 ps
T483 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.2730902815 May 07 03:33:48 PM PDT 24 May 07 03:42:24 PM PDT 24 3111005015 ps
T484 /workspace/coverage/default/20.sram_ctrl_stress_all.226685923 May 07 03:33:53 PM PDT 24 May 07 03:42:57 PM PDT 24 42165647947 ps
T485 /workspace/coverage/default/30.sram_ctrl_max_throughput.3382383094 May 07 03:34:49 PM PDT 24 May 07 03:35:18 PM PDT 24 349703895 ps
T486 /workspace/coverage/default/32.sram_ctrl_regwen.3830474785 May 07 03:35:08 PM PDT 24 May 07 03:55:52 PM PDT 24 20653047638 ps
T487 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.793162389 May 07 03:32:59 PM PDT 24 May 07 03:38:51 PM PDT 24 20624138458 ps
T488 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3534626993 May 07 03:32:30 PM PDT 24 May 07 03:41:16 PM PDT 24 251017406614 ps
T489 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.1857022041 May 07 03:34:03 PM PDT 24 May 07 03:39:17 PM PDT 24 8831880016 ps
T490 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1417919044 May 07 03:35:17 PM PDT 24 May 07 03:40:32 PM PDT 24 48976473053 ps
T491 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1001036054 May 07 03:34:27 PM PDT 24 May 07 03:36:41 PM PDT 24 1910888380 ps
T492 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.535611727 May 07 03:34:28 PM PDT 24 May 07 03:34:51 PM PDT 24 349005915 ps
T493 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1745215837 May 07 03:34:07 PM PDT 24 May 07 03:43:55 PM PDT 24 17530921975 ps
T494 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1354918287 May 07 03:34:18 PM PDT 24 May 07 03:36:36 PM PDT 24 1617890087 ps
T495 /workspace/coverage/default/39.sram_ctrl_executable.2792994752 May 07 03:35:57 PM PDT 24 May 07 03:43:59 PM PDT 24 2514864895 ps
T496 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2929916156 May 07 03:34:22 PM PDT 24 May 07 03:36:31 PM PDT 24 2846704433 ps
T497 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.634559074 May 07 03:34:08 PM PDT 24 May 07 03:37:20 PM PDT 24 12007443518 ps
T87 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.3294497230 May 07 03:34:27 PM PDT 24 May 07 03:34:33 PM PDT 24 176712302 ps
T498 /workspace/coverage/default/2.sram_ctrl_lc_escalation.3022833554 May 07 03:32:39 PM PDT 24 May 07 03:32:42 PM PDT 24 159566070 ps
T499 /workspace/coverage/default/33.sram_ctrl_stress_all.3658428796 May 07 03:35:13 PM PDT 24 May 07 03:55:30 PM PDT 24 10641022356 ps
T500 /workspace/coverage/default/47.sram_ctrl_alert_test.4831816 May 07 03:36:57 PM PDT 24 May 07 03:36:58 PM PDT 24 13734273 ps
T501 /workspace/coverage/default/41.sram_ctrl_lc_escalation.2782338407 May 07 03:36:11 PM PDT 24 May 07 03:36:16 PM PDT 24 412992434 ps
T502 /workspace/coverage/default/38.sram_ctrl_partial_access.4206498382 May 07 03:35:45 PM PDT 24 May 07 03:35:47 PM PDT 24 68058994 ps
T503 /workspace/coverage/default/32.sram_ctrl_bijection.3481421893 May 07 03:35:02 PM PDT 24 May 07 03:36:18 PM PDT 24 15014679032 ps
T504 /workspace/coverage/default/34.sram_ctrl_alert_test.1247661703 May 07 03:35:17 PM PDT 24 May 07 03:35:20 PM PDT 24 25850016 ps
T505 /workspace/coverage/default/23.sram_ctrl_max_throughput.2745988385 May 07 03:34:07 PM PDT 24 May 07 03:34:09 PM PDT 24 147659811 ps
T506 /workspace/coverage/default/47.sram_ctrl_ram_cfg.577821770 May 07 03:36:58 PM PDT 24 May 07 03:37:00 PM PDT 24 60156882 ps
T507 /workspace/coverage/default/5.sram_ctrl_mem_walk.2488658232 May 07 03:32:50 PM PDT 24 May 07 03:32:56 PM PDT 24 345716989 ps
T508 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1153946798 May 07 03:35:58 PM PDT 24 May 07 03:52:37 PM PDT 24 15440411801 ps
T509 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1761526164 May 07 03:36:48 PM PDT 24 May 07 03:41:25 PM PDT 24 7361202578 ps
T510 /workspace/coverage/default/18.sram_ctrl_smoke.902156137 May 07 03:33:44 PM PDT 24 May 07 03:33:53 PM PDT 24 145757107 ps
T511 /workspace/coverage/default/14.sram_ctrl_max_throughput.641894404 May 07 03:33:26 PM PDT 24 May 07 03:34:11 PM PDT 24 208247510 ps
T512 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.875397701 May 07 03:33:53 PM PDT 24 May 07 03:35:14 PM PDT 24 517932499 ps
T513 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3112242406 May 07 03:34:38 PM PDT 24 May 07 03:42:00 PM PDT 24 129654220406 ps
T514 /workspace/coverage/default/1.sram_ctrl_max_throughput.42943555 May 07 03:32:36 PM PDT 24 May 07 03:32:38 PM PDT 24 119751588 ps
T515 /workspace/coverage/default/9.sram_ctrl_ram_cfg.1486534987 May 07 03:33:03 PM PDT 24 May 07 03:33:05 PM PDT 24 29288128 ps
T516 /workspace/coverage/default/22.sram_ctrl_mem_walk.780991146 May 07 03:34:07 PM PDT 24 May 07 03:34:12 PM PDT 24 74466001 ps
T517 /workspace/coverage/default/19.sram_ctrl_bijection.2250534152 May 07 03:33:47 PM PDT 24 May 07 03:34:36 PM PDT 24 1588012549 ps
T518 /workspace/coverage/default/24.sram_ctrl_alert_test.2613486982 May 07 03:34:21 PM PDT 24 May 07 03:34:22 PM PDT 24 22003754 ps
T519 /workspace/coverage/default/2.sram_ctrl_bijection.1585623466 May 07 03:32:37 PM PDT 24 May 07 03:33:28 PM PDT 24 4845042508 ps
T22 /workspace/coverage/default/4.sram_ctrl_sec_cm.1709330716 May 07 03:32:49 PM PDT 24 May 07 03:32:53 PM PDT 24 448223542 ps
T520 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3719319394 May 07 03:33:43 PM PDT 24 May 07 03:36:05 PM PDT 24 20252062666 ps
T521 /workspace/coverage/default/21.sram_ctrl_regwen.3846924262 May 07 03:34:08 PM PDT 24 May 07 03:36:35 PM PDT 24 2223864069 ps
T522 /workspace/coverage/default/33.sram_ctrl_multiple_keys.3358060461 May 07 03:35:12 PM PDT 24 May 07 03:40:58 PM PDT 24 29166144593 ps
T523 /workspace/coverage/default/36.sram_ctrl_alert_test.455309598 May 07 03:35:36 PM PDT 24 May 07 03:35:37 PM PDT 24 10926015 ps
T524 /workspace/coverage/default/8.sram_ctrl_alert_test.1673509177 May 07 03:33:01 PM PDT 24 May 07 03:33:03 PM PDT 24 17409673 ps
T525 /workspace/coverage/default/26.sram_ctrl_multiple_keys.186000586 May 07 03:34:28 PM PDT 24 May 07 04:07:04 PM PDT 24 20134698123 ps
T526 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1487955945 May 07 03:36:47 PM PDT 24 May 07 03:37:28 PM PDT 24 218263598 ps
T527 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3308745363 May 07 03:36:19 PM PDT 24 May 07 03:36:23 PM PDT 24 196654942 ps
T528 /workspace/coverage/default/32.sram_ctrl_stress_all.2627797860 May 07 03:35:08 PM PDT 24 May 07 04:36:24 PM PDT 24 13329630166 ps
T529 /workspace/coverage/default/45.sram_ctrl_smoke.2279999924 May 07 03:36:41 PM PDT 24 May 07 03:36:55 PM PDT 24 908684611 ps
T530 /workspace/coverage/default/48.sram_ctrl_lc_escalation.4051332809 May 07 03:37:05 PM PDT 24 May 07 03:37:12 PM PDT 24 437949112 ps
T531 /workspace/coverage/default/8.sram_ctrl_bijection.3337367689 May 07 03:33:01 PM PDT 24 May 07 03:33:51 PM PDT 24 10509006110 ps
T532 /workspace/coverage/default/22.sram_ctrl_stress_all.4032472629 May 07 03:34:08 PM PDT 24 May 07 03:55:54 PM PDT 24 75273507530 ps
T533 /workspace/coverage/default/6.sram_ctrl_stress_all.3642321165 May 07 03:32:57 PM PDT 24 May 07 03:54:36 PM PDT 24 79298415323 ps
T534 /workspace/coverage/default/25.sram_ctrl_alert_test.2102736193 May 07 03:34:29 PM PDT 24 May 07 03:34:30 PM PDT 24 19280651 ps
T535 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.143090488 May 07 03:34:59 PM PDT 24 May 07 03:35:02 PM PDT 24 87507238 ps
T536 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.2904440277 May 07 03:34:34 PM PDT 24 May 07 03:57:52 PM PDT 24 5792782764 ps
T537 /workspace/coverage/default/9.sram_ctrl_multiple_keys.1933756006 May 07 03:33:02 PM PDT 24 May 07 03:53:19 PM PDT 24 59621804033 ps
T538 /workspace/coverage/default/31.sram_ctrl_multiple_keys.1366283128 May 07 03:34:54 PM PDT 24 May 07 03:47:16 PM PDT 24 4335806937 ps
T539 /workspace/coverage/default/25.sram_ctrl_executable.3478348265 May 07 03:34:25 PM PDT 24 May 07 03:48:24 PM PDT 24 59656002076 ps
T540 /workspace/coverage/default/2.sram_ctrl_ram_cfg.4111726354 May 07 03:32:40 PM PDT 24 May 07 03:32:42 PM PDT 24 138416911 ps
T541 /workspace/coverage/default/8.sram_ctrl_lc_escalation.3079981393 May 07 03:33:01 PM PDT 24 May 07 03:33:04 PM PDT 24 92653497 ps
T542 /workspace/coverage/default/40.sram_ctrl_partial_access.1348919731 May 07 03:36:02 PM PDT 24 May 07 03:37:35 PM PDT 24 884386585 ps
T543 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.709092244 May 07 03:36:24 PM PDT 24 May 07 03:41:26 PM PDT 24 116113928170 ps
T544 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3382117866 May 07 03:32:42 PM PDT 24 May 07 03:36:18 PM PDT 24 5933149059 ps
T545 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.3039021649 May 07 03:33:50 PM PDT 24 May 07 03:35:57 PM PDT 24 150164242 ps
T546 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.871450744 May 07 03:33:06 PM PDT 24 May 07 03:44:41 PM PDT 24 3367762387 ps
T547 /workspace/coverage/default/6.sram_ctrl_regwen.4259727173 May 07 03:32:57 PM PDT 24 May 07 03:43:15 PM PDT 24 6020302859 ps
T548 /workspace/coverage/default/27.sram_ctrl_executable.665150637 May 07 03:34:34 PM PDT 24 May 07 03:50:14 PM PDT 24 13001524453 ps
T549 /workspace/coverage/default/41.sram_ctrl_bijection.213307430 May 07 03:36:06 PM PDT 24 May 07 03:37:04 PM PDT 24 5220324049 ps
T550 /workspace/coverage/default/6.sram_ctrl_alert_test.1034163071 May 07 03:32:59 PM PDT 24 May 07 03:33:01 PM PDT 24 15822533 ps
T551 /workspace/coverage/default/1.sram_ctrl_ram_cfg.194910913 May 07 03:32:34 PM PDT 24 May 07 03:32:36 PM PDT 24 91099204 ps
T552 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.2604115667 May 07 03:36:19 PM PDT 24 May 07 03:36:24 PM PDT 24 303565779 ps
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