Unified Coverage Report

Total Coverage Summary

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	GROUP
99.08	99.81	96.99	100.00	100.00	98.57	99.70	98.52

Total tests in report: 1027

Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE		LINE		COND		TOGGLE		FSM		BRANCH		ASSERT		GROUP
TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	TOTAL	INCR	NAME
79.13	79.13	96.69	96.69	74.42	74.42	78.86	78.86	71.43	71.43	90.20	90.20	94.45	94.45	47.87	47.87	/workspace/coverage/default/13.sram_ctrl_executable.3863424962
86.57	7.44	98.64	1.95	81.17	6.75	80.83	1.97	100.00	28.57	95.68	5.48	94.75	0.30	54.92	7.05	/workspace/coverage/default/14.sram_ctrl_stress_all.2161795958
92.70	6.13	99.03	0.39	86.49	5.32	82.62	1.79	100.00	0.00	96.54	0.86	96.10	1.35	88.13	33.21	/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.509466028
95.90	3.20	99.32	0.29	90.78	4.29	98.14	15.52	100.00	0.00	96.83	0.29	97.15	1.05	89.05	0.93	/workspace/coverage/default/17.sram_ctrl_access_during_key_req.509846086
96.87	0.97	99.71	0.39	92.99	2.21	99.07	0.93	100.00	0.00	98.56	1.73	97.75	0.60	89.98	0.93	/workspace/coverage/default/0.sram_ctrl_sec_cm.3047145007
97.66	0.80	99.71	0.00	93.38	0.39	99.07	0.00	100.00	0.00	98.56	0.00	97.75	0.00	95.18	5.19	/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2291024640
97.96	0.29	99.71	0.00	93.64	0.26	99.14	0.07	100.00	0.00	98.56	0.00	99.10	1.35	95.55	0.37	/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.249149365
98.20	0.25	99.71	0.00	93.64	0.00	99.14	0.00	100.00	0.00	98.85	0.29	99.25	0.15	96.85	1.30	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1003840873
98.32	0.12	99.81	0.10	93.64	0.00	99.86	0.72	100.00	0.00	98.85	0.00	99.25	0.00	96.85	0.00	/workspace/coverage/default/1.sram_ctrl_ram_cfg.3824746570
98.39	0.07	99.81	0.00	93.64	0.00	99.93	0.07	100.00	0.00	98.85	0.00	99.70	0.45	96.85	0.00	/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1595891535
98.47	0.07	99.81	0.00	93.77	0.13	99.93	0.00	100.00	0.00	98.85	0.00	99.70	0.00	97.22	0.37	/workspace/coverage/default/37.sram_ctrl_regwen.4189988132
98.53	0.07	99.81	0.00	94.16	0.39	100.00	0.07	100.00	0.00	98.85	0.00	99.70	0.00	97.22	0.00	/workspace/coverage/default/1.sram_ctrl_alert_test.1762708198
98.59	0.05	99.81	0.00	94.16	0.00	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	97.59	0.37	/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1588831932
98.64	0.05	99.81	0.00	94.16	0.00	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	97.96	0.37	/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3668237560
98.66	0.03	99.81	0.00	94.16	0.00	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.14	0.19	/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1689762857
98.69	0.03	99.81	0.00	94.16	0.00	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.33	0.19	/workspace/coverage/default/1.sram_ctrl_lc_escalation.3494853022
98.72	0.03	99.81	0.00	94.16	0.00	100.00	0.00	100.00	0.00	98.85	0.00	99.70	0.00	98.52	0.19	/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2427442713

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.963966715
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3462910305
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2811697429
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2092146349
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3271930827
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3740533137
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2764198881
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.668289435
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1535449435
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3870695348
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.72050976
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1040022860
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2096798932
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.375772046
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2089168874
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.4142207818
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2455263715
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1058655043
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1123692633
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3495120861
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1586958634
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1595079917
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2654715882
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2805404063
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1256732307
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1838089496
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1244394381
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3308160176
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.350501790
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.421477450
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3333421477
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1088224376
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1778900874
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3990040646
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3048757210
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1446632751
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.331856805
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2037543616
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1617188559
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1992827662
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.887484562
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2842463952
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3304245429
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1756621124
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3066911020
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4033310235
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1633341490
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.51982986
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.750354182
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.99494783
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.933765024
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2695934510
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.235293983
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2584721947
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2664894792
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.934582067
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1807560501
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2055686804
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2906246785
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1943986150
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3704722183
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3813386473
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2747807335
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2112076107
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1403940901
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1850718018
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1118703168
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2119093921
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1953269965
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4224616270
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.863807526
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.936120987
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1957133312
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2900679729
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.4169578927
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1600644501
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3229394662
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2406726544
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.478208384
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2317145970
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3466254112
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2975048232
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3361664798
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3710852421
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.512268665
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1000924549
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.624300514
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.986877077
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2392528131
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.750807626
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1001762996
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2700495497
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.444576008
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3293065824
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3701127473
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3924583213
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4098666734
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2083120700
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.4241535337
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.131574904
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1170811423
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.631404262
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1972709976
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.38476781
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3406169470
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1715199891
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.210036025
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.426553590
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2106403494
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1847155379
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3518627773
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2239613128
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2542641666
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1828615220
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.565054007
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.286710507
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3262191890
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1639749837
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1312316489
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3297556474
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2179877394
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.849545372
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2821199740
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1919999387
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3605898680
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3197397052
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.511810382
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1608471414
/workspace/coverage/default/0.sram_ctrl_alert_test.474018762
/workspace/coverage/default/0.sram_ctrl_bijection.3266354535
/workspace/coverage/default/0.sram_ctrl_executable.3795989297
/workspace/coverage/default/0.sram_ctrl_lc_escalation.131705418
/workspace/coverage/default/0.sram_ctrl_max_throughput.1299924541
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3929434829
/workspace/coverage/default/0.sram_ctrl_mem_walk.4090118497
/workspace/coverage/default/0.sram_ctrl_multiple_keys.699632273
/workspace/coverage/default/0.sram_ctrl_partial_access.1161953512
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2896827304
/workspace/coverage/default/0.sram_ctrl_ram_cfg.4009856948
/workspace/coverage/default/0.sram_ctrl_regwen.1802066290
/workspace/coverage/default/0.sram_ctrl_smoke.3335258660
/workspace/coverage/default/0.sram_ctrl_stress_all.3836605524
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4121798343
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.404086013
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2838476917
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4223639343
/workspace/coverage/default/1.sram_ctrl_bijection.2371065897
/workspace/coverage/default/1.sram_ctrl_executable.3699364807
/workspace/coverage/default/1.sram_ctrl_max_throughput.3904279611
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3353487687
/workspace/coverage/default/1.sram_ctrl_mem_walk.2312180936
/workspace/coverage/default/1.sram_ctrl_multiple_keys.963258490
/workspace/coverage/default/1.sram_ctrl_partial_access.2773031508
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1823625999
/workspace/coverage/default/1.sram_ctrl_regwen.2408856811
/workspace/coverage/default/1.sram_ctrl_sec_cm.3070193300
/workspace/coverage/default/1.sram_ctrl_smoke.1236780557
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1763619321
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.600663230
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2642278132
/workspace/coverage/default/10.sram_ctrl_alert_test.632423010
/workspace/coverage/default/10.sram_ctrl_bijection.3536717548
/workspace/coverage/default/10.sram_ctrl_executable.4288362191
/workspace/coverage/default/10.sram_ctrl_lc_escalation.538172876
/workspace/coverage/default/10.sram_ctrl_max_throughput.2197216604
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3202350104
/workspace/coverage/default/10.sram_ctrl_mem_walk.999203881
/workspace/coverage/default/10.sram_ctrl_multiple_keys.969743861
/workspace/coverage/default/10.sram_ctrl_partial_access.2629134553
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1698801296
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2185754299
/workspace/coverage/default/10.sram_ctrl_regwen.2884283386
/workspace/coverage/default/10.sram_ctrl_smoke.1824787994
/workspace/coverage/default/10.sram_ctrl_stress_all.82037483
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.2991901662
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4250255881
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.473657318
/workspace/coverage/default/11.sram_ctrl_alert_test.1523368834
/workspace/coverage/default/11.sram_ctrl_bijection.3961970203
/workspace/coverage/default/11.sram_ctrl_executable.423778383
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3275728931
/workspace/coverage/default/11.sram_ctrl_max_throughput.1159236286
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1072275266
/workspace/coverage/default/11.sram_ctrl_mem_walk.2775233026
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2052535399
/workspace/coverage/default/11.sram_ctrl_partial_access.2063714506
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4246187582
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2288832063
/workspace/coverage/default/11.sram_ctrl_regwen.1810593871
/workspace/coverage/default/11.sram_ctrl_smoke.1116536488
/workspace/coverage/default/11.sram_ctrl_stress_all.2347327431
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2314360348
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3498248681
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3987113305
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1979071603
/workspace/coverage/default/12.sram_ctrl_alert_test.3971868267
/workspace/coverage/default/12.sram_ctrl_bijection.2355663411
/workspace/coverage/default/12.sram_ctrl_executable.4101831476
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1334088170
/workspace/coverage/default/12.sram_ctrl_max_throughput.3500090820
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2779964229
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/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3422890982
/workspace/coverage/default/43.sram_ctrl_alert_test.2433135746
/workspace/coverage/default/43.sram_ctrl_bijection.969643145
/workspace/coverage/default/43.sram_ctrl_executable.2977682852
/workspace/coverage/default/43.sram_ctrl_lc_escalation.2415522239
/workspace/coverage/default/43.sram_ctrl_max_throughput.2535710197
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.354762564
/workspace/coverage/default/43.sram_ctrl_mem_walk.2917772681
/workspace/coverage/default/43.sram_ctrl_multiple_keys.1722304229
/workspace/coverage/default/43.sram_ctrl_partial_access.960750542
/workspace/coverage/default/43.sram_ctrl_ram_cfg.3045859911
/workspace/coverage/default/43.sram_ctrl_regwen.878439710
/workspace/coverage/default/43.sram_ctrl_smoke.3162377182
/workspace/coverage/default/43.sram_ctrl_stress_all.1587015376
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1166223165
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1027424119
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4213289226
/workspace/coverage/default/44.sram_ctrl_alert_test.1922119049
/workspace/coverage/default/44.sram_ctrl_bijection.1479010855
/workspace/coverage/default/44.sram_ctrl_executable.1958321528
/workspace/coverage/default/44.sram_ctrl_lc_escalation.4086115987
/workspace/coverage/default/44.sram_ctrl_max_throughput.2293263318
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2117118502
/workspace/coverage/default/44.sram_ctrl_mem_walk.1254460731
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2118677362
/workspace/coverage/default/44.sram_ctrl_partial_access.4211520771
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2114807593
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3119048271
/workspace/coverage/default/44.sram_ctrl_regwen.2699538589
/workspace/coverage/default/44.sram_ctrl_smoke.2202208305
/workspace/coverage/default/44.sram_ctrl_stress_all.738871706
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3157348550
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2512567959
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2502833255
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.438314690
/workspace/coverage/default/45.sram_ctrl_alert_test.83178893
/workspace/coverage/default/45.sram_ctrl_bijection.3438089887
/workspace/coverage/default/45.sram_ctrl_executable.1506254739
/workspace/coverage/default/45.sram_ctrl_lc_escalation.400848099
/workspace/coverage/default/45.sram_ctrl_max_throughput.684755458
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.20035
/workspace/coverage/default/45.sram_ctrl_mem_walk.1128998202
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1939678076
/workspace/coverage/default/45.sram_ctrl_partial_access.1182583630
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.817659827
/workspace/coverage/default/45.sram_ctrl_ram_cfg.849140137
/workspace/coverage/default/45.sram_ctrl_regwen.4271256505
/workspace/coverage/default/45.sram_ctrl_smoke.201267829
/workspace/coverage/default/45.sram_ctrl_stress_all.2216762522
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.342017745
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.245500555
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2691958335
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2842343093
/workspace/coverage/default/46.sram_ctrl_alert_test.2769987397
/workspace/coverage/default/46.sram_ctrl_bijection.1569986269
/workspace/coverage/default/46.sram_ctrl_executable.2413015329
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1946186279
/workspace/coverage/default/46.sram_ctrl_max_throughput.1401184200
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2921544827
/workspace/coverage/default/46.sram_ctrl_mem_walk.3063173141
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2598515774
/workspace/coverage/default/46.sram_ctrl_partial_access.1803753843
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.317708178
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2880400412
/workspace/coverage/default/46.sram_ctrl_regwen.584595411
/workspace/coverage/default/46.sram_ctrl_smoke.3355515173
/workspace/coverage/default/46.sram_ctrl_stress_all.2689674134
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1845642574
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2298402702
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2301407825
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3250054928
/workspace/coverage/default/47.sram_ctrl_alert_test.4240150826
/workspace/coverage/default/47.sram_ctrl_bijection.1861278271
/workspace/coverage/default/47.sram_ctrl_executable.3119207223
/workspace/coverage/default/47.sram_ctrl_lc_escalation.326280981
/workspace/coverage/default/47.sram_ctrl_max_throughput.3904965682
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1684556180
/workspace/coverage/default/47.sram_ctrl_mem_walk.4285374988
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2997908185
/workspace/coverage/default/47.sram_ctrl_partial_access.73583224
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2548692496
/workspace/coverage/default/47.sram_ctrl_ram_cfg.354196525
/workspace/coverage/default/47.sram_ctrl_regwen.2540171057
/workspace/coverage/default/47.sram_ctrl_smoke.2598971563
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.102152604
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3676583304
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.939982553
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.718951582
/workspace/coverage/default/48.sram_ctrl_alert_test.4082681856
/workspace/coverage/default/48.sram_ctrl_bijection.2568750028
/workspace/coverage/default/48.sram_ctrl_executable.1964208118
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2512637777
/workspace/coverage/default/48.sram_ctrl_max_throughput.1599367478
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4288233110
/workspace/coverage/default/48.sram_ctrl_mem_walk.3741320955
/workspace/coverage/default/48.sram_ctrl_multiple_keys.710263151
/workspace/coverage/default/48.sram_ctrl_partial_access.1978220289
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.559269889
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2221231889
/workspace/coverage/default/48.sram_ctrl_regwen.662185882
/workspace/coverage/default/48.sram_ctrl_smoke.3593479349
/workspace/coverage/default/48.sram_ctrl_stress_all.2827595995
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1758178083
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1026539844
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3649169787
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3701829149
/workspace/coverage/default/49.sram_ctrl_alert_test.3548525526
/workspace/coverage/default/49.sram_ctrl_bijection.1549430654
/workspace/coverage/default/49.sram_ctrl_executable.3973786412
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2218543745
/workspace/coverage/default/49.sram_ctrl_max_throughput.480220615
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.542990030
/workspace/coverage/default/49.sram_ctrl_mem_walk.3880027849
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1374299748
/workspace/coverage/default/49.sram_ctrl_partial_access.2278033429
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1189498969
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4108611905
/workspace/coverage/default/49.sram_ctrl_regwen.946945527
/workspace/coverage/default/49.sram_ctrl_smoke.485445425
/workspace/coverage/default/49.sram_ctrl_stress_all.2029336837
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1998589437
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2662057445
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.883698996
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4035993330
/workspace/coverage/default/5.sram_ctrl_alert_test.427403795
/workspace/coverage/default/5.sram_ctrl_bijection.796176366
/workspace/coverage/default/5.sram_ctrl_executable.3440147230
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1815211246
/workspace/coverage/default/5.sram_ctrl_max_throughput.1515773451
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1954627006
/workspace/coverage/default/5.sram_ctrl_mem_walk.701124122
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3141370245
/workspace/coverage/default/5.sram_ctrl_partial_access.2364255125
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3417317896
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1006310456
/workspace/coverage/default/5.sram_ctrl_regwen.1713499977
/workspace/coverage/default/5.sram_ctrl_smoke.1544299252
/workspace/coverage/default/5.sram_ctrl_stress_all.123569861
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1197777881
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.4192582146
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1742883614
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.675771080
/workspace/coverage/default/6.sram_ctrl_alert_test.2540317377
/workspace/coverage/default/6.sram_ctrl_bijection.3800324565
/workspace/coverage/default/6.sram_ctrl_executable.352408061
/workspace/coverage/default/6.sram_ctrl_lc_escalation.171171058
/workspace/coverage/default/6.sram_ctrl_max_throughput.4260587127
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.492770525
/workspace/coverage/default/6.sram_ctrl_mem_walk.1218752212
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3498013499
/workspace/coverage/default/6.sram_ctrl_partial_access.3274348550
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1846510707
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2681517693
/workspace/coverage/default/6.sram_ctrl_regwen.3895437757
/workspace/coverage/default/6.sram_ctrl_smoke.680155478
/workspace/coverage/default/6.sram_ctrl_stress_all.793949920
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3683466475
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.3108793607
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3987579525
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1703242148
/workspace/coverage/default/7.sram_ctrl_alert_test.3907508741
/workspace/coverage/default/7.sram_ctrl_bijection.3065104008
/workspace/coverage/default/7.sram_ctrl_executable.2717058016
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2730391554
/workspace/coverage/default/7.sram_ctrl_max_throughput.1727409386
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3149622123
/workspace/coverage/default/7.sram_ctrl_mem_walk.2191555497
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3003065191
/workspace/coverage/default/7.sram_ctrl_partial_access.3501155952
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3226019373
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2449815770
/workspace/coverage/default/7.sram_ctrl_regwen.30463137
/workspace/coverage/default/7.sram_ctrl_smoke.2967272814
/workspace/coverage/default/7.sram_ctrl_stress_all.2290855769
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.385185122
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1119267648
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1456436088
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1613199771
/workspace/coverage/default/8.sram_ctrl_alert_test.1972220360
/workspace/coverage/default/8.sram_ctrl_bijection.3000619205
/workspace/coverage/default/8.sram_ctrl_executable.3709376326
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2362985220
/workspace/coverage/default/8.sram_ctrl_max_throughput.3427900834
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3838399881
/workspace/coverage/default/8.sram_ctrl_mem_walk.3266514148
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2648380507
/workspace/coverage/default/8.sram_ctrl_partial_access.1654135921
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.646846380
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1693014797
/workspace/coverage/default/8.sram_ctrl_regwen.1366171635
/workspace/coverage/default/8.sram_ctrl_smoke.3259633654
/workspace/coverage/default/8.sram_ctrl_stress_all.4214428255
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1481584592
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1508919382
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3298719457
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.261320975
/workspace/coverage/default/9.sram_ctrl_alert_test.3095855298
/workspace/coverage/default/9.sram_ctrl_bijection.3026387804
/workspace/coverage/default/9.sram_ctrl_executable.3155542659
/workspace/coverage/default/9.sram_ctrl_lc_escalation.904783216
/workspace/coverage/default/9.sram_ctrl_max_throughput.448199340
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3782958508
/workspace/coverage/default/9.sram_ctrl_mem_walk.3213748486
/workspace/coverage/default/9.sram_ctrl_multiple_keys.215047161
/workspace/coverage/default/9.sram_ctrl_partial_access.3138532451
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.775935541
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3317172943
/workspace/coverage/default/9.sram_ctrl_regwen.1686860782
/workspace/coverage/default/9.sram_ctrl_smoke.1139831396
/workspace/coverage/default/9.sram_ctrl_stress_all.254824841
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4163879451
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.535332421
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1027454310

Total test records in report: 1027

TEST NO	TEST LOCATION	STARTED	FINISHED	SIMULATION TIME
T1	/workspace/coverage/default/9.sram_ctrl_max_throughput.448199340	May 19 02:05:51 PM PDT 24	May 19 02:05:55 PM PDT 24	84985314 ps
T2	/workspace/coverage/default/28.sram_ctrl_stress_pipeline.1823661029	May 19 02:06:43 PM PDT 24	May 19 02:14:01 PM PDT 24	29593886467 ps
T3	/workspace/coverage/default/33.sram_ctrl_stress_pipeline.1170930064	May 19 02:07:23 PM PDT 24	May 19 02:09:34 PM PDT 24	11443118668 ps
T4	/workspace/coverage/default/12.sram_ctrl_multiple_keys.415028181	May 19 02:05:27 PM PDT 24	May 19 02:14:34 PM PDT 24	14110062956 ps
T5	/workspace/coverage/default/13.sram_ctrl_executable.3863424962	May 19 02:05:50 PM PDT 24	May 19 02:20:04 PM PDT 24	55436641082 ps
T6	/workspace/coverage/default/35.sram_ctrl_smoke.516243765	May 19 02:07:48 PM PDT 24	May 19 02:08:50 PM PDT 24	535962730 ps
T10	/workspace/coverage/default/15.sram_ctrl_partial_access.2476123946	May 19 02:05:43 PM PDT 24	May 19 02:07:21 PM PDT 24	669475760 ps
T11	/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2301407825	May 19 02:10:58 PM PDT 24	May 19 02:11:21 PM PDT 24	531944316 ps
T12	/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.493808790	May 19 02:06:45 PM PDT 24	May 19 02:10:29 PM PDT 24	6076222501 ps
T13	/workspace/coverage/default/17.sram_ctrl_access_during_key_req.509846086	May 19 02:06:05 PM PDT 24	May 19 02:19:16 PM PDT 24	3922702226 ps
T15	/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.4022721768	May 19 02:06:04 PM PDT 24	May 19 02:08:20 PM PDT 24	551732770 ps
T21	/workspace/coverage/default/7.sram_ctrl_alert_test.3907508741	May 19 02:05:33 PM PDT 24	May 19 02:05:39 PM PDT 24	65846992 ps
T22	/workspace/coverage/default/28.sram_ctrl_alert_test.2384471497	May 19 02:06:55 PM PDT 24	May 19 02:06:57 PM PDT 24	18350783 ps
T84	/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1716165095	May 19 02:05:30 PM PDT 24	May 19 02:05:53 PM PDT 24	112064224 ps
T14	/workspace/coverage/default/40.sram_ctrl_mem_partial_access.149281552	May 19 02:09:02 PM PDT 24	May 19 02:09:05 PM PDT 24	359549169 ps
T85	/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3818861162	May 19 02:09:16 PM PDT 24	May 19 02:10:04 PM PDT 24	495651913 ps
T16	/workspace/coverage/default/18.sram_ctrl_executable.4088459374	May 19 02:05:56 PM PDT 24	May 19 02:21:36 PM PDT 24	11574824566 ps
T86	/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1789884567	May 19 02:05:27 PM PDT 24	May 19 02:12:52 PM PDT 24	83221347052 ps
T24	/workspace/coverage/default/40.sram_ctrl_bijection.2258156455	May 19 02:08:55 PM PDT 24	May 19 02:09:13 PM PDT 24	958060741 ps
T17	/workspace/coverage/default/18.sram_ctrl_regwen.1240251689	May 19 02:06:01 PM PDT 24	May 19 02:20:30 PM PDT 24	64598474650 ps
T66	/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2427442713	May 19 02:05:43 PM PDT 24	May 19 02:09:23 PM PDT 24	9067820817 ps
T25	/workspace/coverage/default/38.sram_ctrl_regwen.3390108	May 19 02:08:40 PM PDT 24	May 19 02:15:26 PM PDT 24	13755969743 ps
T67	/workspace/coverage/default/41.sram_ctrl_multiple_keys.199109644	May 19 02:09:11 PM PDT 24	May 19 02:26:57 PM PDT 24	4679868502 ps
T68	/workspace/coverage/default/20.sram_ctrl_max_throughput.1345378685	May 19 02:06:11 PM PDT 24	May 19 02:08:17 PM PDT 24	151307355 ps
T23	/workspace/coverage/default/32.sram_ctrl_alert_test.3190462070	May 19 02:07:20 PM PDT 24	May 19 02:07:22 PM PDT 24	29500651 ps
T69	/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.939982553	May 19 02:11:12 PM PDT 24	May 19 02:13:47 PM PDT 24	154882971 ps
T70	/workspace/coverage/default/35.sram_ctrl_stress_pipeline.2598321316	May 19 02:07:48 PM PDT 24	May 19 02:11:55 PM PDT 24	4897352549 ps
T71	/workspace/coverage/default/41.sram_ctrl_mem_partial_access.1064237950	May 19 02:09:23 PM PDT 24	May 19 02:09:29 PM PDT 24	173021400 ps
T72	/workspace/coverage/default/27.sram_ctrl_mem_walk.1710896110	May 19 02:06:44 PM PDT 24	May 19 02:06:53 PM PDT 24	274353043 ps
T102	/workspace/coverage/default/16.sram_ctrl_stress_pipeline.2400720720	May 19 02:06:01 PM PDT 24	May 19 02:08:53 PM PDT 24	9907664514 ps
T7	/workspace/coverage/default/46.sram_ctrl_lc_escalation.1946186279	May 19 02:10:56 PM PDT 24	May 19 02:11:00 PM PDT 24	446153166 ps
T143	/workspace/coverage/default/17.sram_ctrl_smoke.3844489443	May 19 02:05:46 PM PDT 24	May 19 02:05:57 PM PDT 24	735082848 ps
T146	/workspace/coverage/default/46.sram_ctrl_bijection.1569986269	May 19 02:10:53 PM PDT 24	May 19 02:11:55 PM PDT 24	3845782453 ps
T147	/workspace/coverage/default/12.sram_ctrl_alert_test.3971868267	May 19 02:05:53 PM PDT 24	May 19 02:05:55 PM PDT 24	19403584 ps
T49	/workspace/coverage/default/37.sram_ctrl_executable.1667846267	May 19 02:08:18 PM PDT 24	May 19 02:36:02 PM PDT 24	75377894358 ps
T148	/workspace/coverage/default/6.sram_ctrl_mem_walk.1218752212	May 19 02:05:24 PM PDT 24	May 19 02:05:35 PM PDT 24	684046533 ps
T26	/workspace/coverage/default/3.sram_ctrl_regwen.1956123328	May 19 02:05:26 PM PDT 24	May 19 02:23:11 PM PDT 24	9659991982 ps
T83	/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1003840873	May 19 02:09:56 PM PDT 24	May 19 02:13:33 PM PDT 24	38181328654 ps
T149	/workspace/coverage/default/49.sram_ctrl_max_throughput.480220615	May 19 02:11:59 PM PDT 24	May 19 02:12:05 PM PDT 24	58501514 ps
T139	/workspace/coverage/default/6.sram_ctrl_multiple_keys.3498013499	May 19 02:05:25 PM PDT 24	May 19 02:26:20 PM PDT 24	10373857579 ps
T103	/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1716229693	May 19 02:05:30 PM PDT 24	May 19 02:11:46 PM PDT 24	3950243394 ps
T33	/workspace/coverage/default/47.sram_ctrl_ram_cfg.354196525	May 19 02:11:19 PM PDT 24	May 19 02:11:20 PM PDT 24	85787134 ps
T64	/workspace/coverage/default/21.sram_ctrl_regwen.446213646	May 19 02:06:06 PM PDT 24	May 19 02:49:57 PM PDT 24	7205767387 ps
T104	/workspace/coverage/default/30.sram_ctrl_stress_pipeline.141069797	May 19 02:07:02 PM PDT 24	May 19 02:10:24 PM PDT 24	8790869933 ps
T150	/workspace/coverage/default/48.sram_ctrl_multiple_keys.710263151	May 19 02:11:26 PM PDT 24	May 19 02:22:57 PM PDT 24	11005272119 ps
T50	/workspace/coverage/default/11.sram_ctrl_executable.423778383	May 19 02:05:53 PM PDT 24	May 19 02:13:14 PM PDT 24	24696353584 ps
T65	/workspace/coverage/default/15.sram_ctrl_regwen.2514393710	May 19 02:05:47 PM PDT 24	May 19 02:09:59 PM PDT 24	7081457839 ps
T145	/workspace/coverage/default/19.sram_ctrl_max_throughput.2389449950	May 19 02:06:05 PM PDT 24	May 19 02:06:15 PM PDT 24	121337757 ps
T29	/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.509466028	May 19 02:05:25 PM PDT 24	May 19 02:17:49 PM PDT 24	1880819362 ps
T47	/workspace/coverage/default/34.sram_ctrl_access_during_key_req.3801191887	May 19 02:07:49 PM PDT 24	May 19 02:31:48 PM PDT 24	20068126978 ps
T30	/workspace/coverage/default/13.sram_ctrl_stress_all.2457005883	May 19 02:05:59 PM PDT 24	May 19 03:02:40 PM PDT 24	37238233429 ps
T58	/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3297516383	May 19 02:05:20 PM PDT 24	May 19 02:13:02 PM PDT 24	18372414795 ps
T59	/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2662057445	May 19 02:11:56 PM PDT 24	May 19 02:16:59 PM PDT 24	27893015812 ps
T60	/workspace/coverage/default/26.sram_ctrl_executable.1455779548	May 19 02:06:34 PM PDT 24	May 19 02:23:29 PM PDT 24	9683281179 ps
T61	/workspace/coverage/default/46.sram_ctrl_regwen.584595411	May 19 02:11:01 PM PDT 24	May 19 02:18:19 PM PDT 24	28674924731 ps
T27	/workspace/coverage/default/6.sram_ctrl_regwen.3895437757	May 19 02:05:18 PM PDT 24	May 19 02:20:44 PM PDT 24	42603377905 ps
T62	/workspace/coverage/default/49.sram_ctrl_multiple_keys.1374299748	May 19 02:11:55 PM PDT 24	May 19 02:36:44 PM PDT 24	25414432745 ps
T63	/workspace/coverage/default/3.sram_ctrl_multiple_keys.1022495747	May 19 02:05:19 PM PDT 24	May 19 02:20:13 PM PDT 24	24989305735 ps
T8	/workspace/coverage/default/14.sram_ctrl_stress_all.2161795958	May 19 02:05:31 PM PDT 24	May 19 02:55:42 PM PDT 24	60733965068 ps
T9	/workspace/coverage/default/45.sram_ctrl_lc_escalation.400848099	May 19 02:10:33 PM PDT 24	May 19 02:10:36 PM PDT 24	341036505 ps
T31	/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2465413540	May 19 02:05:36 PM PDT 24	May 19 02:20:33 PM PDT 24	29414197156 ps
T151	/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1378096678	May 19 02:05:29 PM PDT 24	May 19 02:07:42 PM PDT 24	1382360145 ps
T152	/workspace/coverage/default/20.sram_ctrl_mem_walk.694009993	May 19 02:06:05 PM PDT 24	May 19 02:06:13 PM PDT 24	73733801 ps
T153	/workspace/coverage/default/19.sram_ctrl_stress_pipeline.3662480829	May 19 02:06:13 PM PDT 24	May 19 02:10:32 PM PDT 24	9089859604 ps
T154	/workspace/coverage/default/19.sram_ctrl_regwen.1714726302	May 19 02:06:22 PM PDT 24	May 19 02:12:38 PM PDT 24	19139255033 ps
T155	/workspace/coverage/default/5.sram_ctrl_mem_walk.701124122	May 19 02:05:25 PM PDT 24	May 19 02:05:36 PM PDT 24	571697785 ps
T48	/workspace/coverage/default/26.sram_ctrl_access_during_key_req.4250126041	May 19 02:06:30 PM PDT 24	May 19 02:09:48 PM PDT 24	467883792 ps
T156	/workspace/coverage/default/47.sram_ctrl_bijection.1861278271	May 19 02:11:12 PM PDT 24	May 19 02:11:57 PM PDT 24	37757943162 ps
T28	/workspace/coverage/default/8.sram_ctrl_lc_escalation.2362985220	May 19 02:05:32 PM PDT 24	May 19 02:05:43 PM PDT 24	1458049355 ps
T157	/workspace/coverage/default/4.sram_ctrl_stress_pipeline.813529028	May 19 02:05:29 PM PDT 24	May 19 02:09:40 PM PDT 24	10152690858 ps
T140	/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2114807593	May 19 02:10:12 PM PDT 24	May 19 02:18:06 PM PDT 24	36366674805 ps
T158	/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3591194291	May 19 02:09:00 PM PDT 24	May 19 02:13:18 PM PDT 24	20644112055 ps
T137	/workspace/coverage/default/46.sram_ctrl_stress_all.2689674134	May 19 02:11:09 PM PDT 24	May 19 03:11:00 PM PDT 24	33938582321 ps
T159	/workspace/coverage/default/2.sram_ctrl_partial_access.1694174754	May 19 02:05:31 PM PDT 24	May 19 02:05:41 PM PDT 24	104995922 ps
T160	/workspace/coverage/default/1.sram_ctrl_alert_test.1762708198	May 19 02:05:13 PM PDT 24	May 19 02:05:15 PM PDT 24	19533168 ps
T161	/workspace/coverage/default/26.sram_ctrl_bijection.1102489053	May 19 02:06:29 PM PDT 24	May 19 02:07:12 PM PDT 24	9581591943 ps
T92	/workspace/coverage/default/9.sram_ctrl_access_during_key_req.261320975	May 19 02:05:39 PM PDT 24	May 19 02:14:35 PM PDT 24	3895223114 ps
T93	/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1613199771	May 19 02:05:28 PM PDT 24	May 19 02:16:27 PM PDT 24	9548814881 ps
T162	/workspace/coverage/default/17.sram_ctrl_multiple_keys.739825658	May 19 02:05:50 PM PDT 24	May 19 02:11:24 PM PDT 24	2872263552 ps
T163	/workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1558174178	May 19 02:06:01 PM PDT 24	May 19 02:11:53 PM PDT 24	22564317542 ps
T164	/workspace/coverage/default/25.sram_ctrl_stress_pipeline.855247502	May 19 02:06:28 PM PDT 24	May 19 02:08:43 PM PDT 24	1650262255 ps
T34	/workspace/coverage/default/27.sram_ctrl_ram_cfg.1230581904	May 19 02:06:44 PM PDT 24	May 19 02:06:45 PM PDT 24	119293951 ps
T165	/workspace/coverage/default/17.sram_ctrl_mem_walk.2809302338	May 19 02:05:55 PM PDT 24	May 19 02:06:04 PM PDT 24	2590235593 ps
T166	/workspace/coverage/default/14.sram_ctrl_max_throughput.1399111317	May 19 02:05:35 PM PDT 24	May 19 02:05:41 PM PDT 24	142808302 ps
T18	/workspace/coverage/default/0.sram_ctrl_sec_cm.3047145007	May 19 02:05:27 PM PDT 24	May 19 02:05:32 PM PDT 24	114413700 ps
T38	/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4223639343	May 19 02:05:10 PM PDT 24	May 19 02:34:00 PM PDT 24	9977933958 ps
T39	/workspace/coverage/default/34.sram_ctrl_alert_test.1994641337	May 19 02:07:48 PM PDT 24	May 19 02:07:51 PM PDT 24	30065701 ps
T40	/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1608471414	May 19 02:05:19 PM PDT 24	May 19 02:14:51 PM PDT 24	3819844782 ps
T41	/workspace/coverage/default/23.sram_ctrl_access_during_key_req.1890710249	May 19 02:06:27 PM PDT 24	May 19 02:24:25 PM PDT 24	2136319162 ps
T42	/workspace/coverage/default/1.sram_ctrl_smoke.1236780557	May 19 02:05:12 PM PDT 24	May 19 02:05:28 PM PDT 24	987601951 ps
T43	/workspace/coverage/default/15.sram_ctrl_lc_escalation.4080816990	May 19 02:05:55 PM PDT 24	May 19 02:06:00 PM PDT 24	285617343 ps
T44	/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.424530283	May 19 02:05:50 PM PDT 24	May 19 02:11:08 PM PDT 24	12280865859 ps
T45	/workspace/coverage/default/17.sram_ctrl_executable.3402966096	May 19 02:05:59 PM PDT 24	May 19 02:15:46 PM PDT 24	2008322878 ps
T46	/workspace/coverage/default/4.sram_ctrl_access_during_key_req.2437202107	May 19 02:05:41 PM PDT 24	May 19 02:20:35 PM PDT 24	2391156390 ps
T138	/workspace/coverage/default/3.sram_ctrl_stress_all.1095581178	May 19 02:05:24 PM PDT 24	May 19 02:25:10 PM PDT 24	39229929034 ps
T167	/workspace/coverage/default/25.sram_ctrl_multiple_keys.4104788390	May 19 02:06:23 PM PDT 24	May 19 02:23:14 PM PDT 24	33964827580 ps
T168	/workspace/coverage/default/34.sram_ctrl_max_throughput.2727352866	May 19 02:07:39 PM PDT 24	May 19 02:07:41 PM PDT 24	171231665 ps
T169	/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3716559553	May 19 02:05:38 PM PDT 24	May 19 02:09:41 PM PDT 24	6512817502 ps
T32	/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.3673257291	May 19 02:05:59 PM PDT 24	May 19 02:06:40 PM PDT 24	1399632580 ps
T35	/workspace/coverage/default/33.sram_ctrl_ram_cfg.3499418575	May 19 02:07:34 PM PDT 24	May 19 02:07:35 PM PDT 24	27917036 ps
T115	/workspace/coverage/default/19.sram_ctrl_lc_escalation.3510314032	May 19 02:06:00 PM PDT 24	May 19 02:06:12 PM PDT 24	9325223409 ps
T116	/workspace/coverage/default/18.sram_ctrl_mem_walk.3167930359	May 19 02:05:59 PM PDT 24	May 19 02:06:06 PM PDT 24	1313661087 ps
T117	/workspace/coverage/default/43.sram_ctrl_regwen.878439710	May 19 02:10:00 PM PDT 24	May 19 02:15:03 PM PDT 24	6483051378 ps
T118	/workspace/coverage/default/39.sram_ctrl_max_throughput.1734814062	May 19 02:08:44 PM PDT 24	May 19 02:10:15 PM PDT 24	492319664 ps
T119	/workspace/coverage/default/15.sram_ctrl_ram_cfg.276564982	May 19 02:05:43 PM PDT 24	May 19 02:05:44 PM PDT 24	133505043 ps
T120	/workspace/coverage/default/34.sram_ctrl_mem_partial_access.1722851564	May 19 02:07:49 PM PDT 24	May 19 02:07:54 PM PDT 24	100051346 ps
T121	/workspace/coverage/default/16.sram_ctrl_lc_escalation.4181035287	May 19 02:05:55 PM PDT 24	May 19 02:06:00 PM PDT 24	682375670 ps
T122	/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.3432474031	May 19 02:06:51 PM PDT 24	May 19 02:09:36 PM PDT 24	10008399612 ps
T144	/workspace/coverage/default/47.sram_ctrl_regwen.2540171057	May 19 02:11:16 PM PDT 24	May 19 02:25:35 PM PDT 24	19788085495 ps
T170	/workspace/coverage/default/38.sram_ctrl_smoke.2917386225	May 19 02:08:33 PM PDT 24	May 19 02:08:42 PM PDT 24	1269930865 ps
T171	/workspace/coverage/default/18.sram_ctrl_stress_pipeline.2302971064	May 19 02:05:54 PM PDT 24	May 19 02:09:34 PM PDT 24	4972881625 ps
T142	/workspace/coverage/default/24.sram_ctrl_regwen.4203030477	May 19 02:06:17 PM PDT 24	May 19 02:12:31 PM PDT 24	5728676918 ps
T172	/workspace/coverage/default/48.sram_ctrl_mem_partial_access.4288233110	May 19 02:11:50 PM PDT 24	May 19 02:11:56 PM PDT 24	313184670 ps
T173	/workspace/coverage/default/42.sram_ctrl_regwen.1430975132	May 19 02:09:37 PM PDT 24	May 19 02:13:17 PM PDT 24	6105761363 ps
T174	/workspace/coverage/default/15.sram_ctrl_access_during_key_req.2166893733	May 19 02:05:46 PM PDT 24	May 19 02:16:23 PM PDT 24	1906243796 ps
T175	/workspace/coverage/default/3.sram_ctrl_smoke.554219127	May 19 02:05:22 PM PDT 24	May 19 02:06:03 PM PDT 24	404126838 ps
T176	/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3838399881	May 19 02:06:01 PM PDT 24	May 19 02:06:08 PM PDT 24	968458998 ps
T177	/workspace/coverage/default/36.sram_ctrl_alert_test.974980779	May 19 02:08:08 PM PDT 24	May 19 02:08:09 PM PDT 24	77919708 ps
T178	/workspace/coverage/default/25.sram_ctrl_executable.398134200	May 19 02:06:28 PM PDT 24	May 19 02:09:29 PM PDT 24	4534452218 ps
T141	/workspace/coverage/default/1.sram_ctrl_lc_escalation.3494853022	May 19 02:05:12 PM PDT 24	May 19 02:05:25 PM PDT 24	985780446 ps
T179	/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2614484323	May 19 02:05:39 PM PDT 24	May 19 02:05:51 PM PDT 24	75654315 ps
T94	/workspace/coverage/default/30.sram_ctrl_mem_partial_access.337526648	May 19 02:07:03 PM PDT 24	May 19 02:07:08 PM PDT 24	117849761 ps
T180	/workspace/coverage/default/41.sram_ctrl_max_throughput.1926463531	May 19 02:09:17 PM PDT 24	May 19 02:11:51 PM PDT 24	403437159 ps
T181	/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3987579525	May 19 02:05:31 PM PDT 24	May 19 02:07:29 PM PDT 24	626606358 ps
T182	/workspace/coverage/default/40.sram_ctrl_alert_test.2014001007	May 19 02:09:11 PM PDT 24	May 19 02:09:13 PM PDT 24	13469159 ps
T183	/workspace/coverage/default/38.sram_ctrl_mem_walk.1227226797	May 19 02:08:42 PM PDT 24	May 19 02:08:51 PM PDT 24	553061181 ps
T19	/workspace/coverage/default/3.sram_ctrl_sec_cm.1312496528	May 19 02:05:25 PM PDT 24	May 19 02:05:30 PM PDT 24	1137781419 ps
T184	/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2665514191	May 19 02:08:13 PM PDT 24	May 19 02:12:17 PM PDT 24	3699209796 ps
T185	/workspace/coverage/default/24.sram_ctrl_ram_cfg.1417338719	May 19 02:06:30 PM PDT 24	May 19 02:06:32 PM PDT 24	30612554 ps
T136	/workspace/coverage/default/27.sram_ctrl_executable.3390434922	May 19 02:06:35 PM PDT 24	May 19 02:22:26 PM PDT 24	8760225502 ps
T51	/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3500102947	May 19 02:06:54 PM PDT 24	May 19 02:07:09 PM PDT 24	3782276987 ps
T186	/workspace/coverage/default/29.sram_ctrl_partial_access.169572152	May 19 02:06:48 PM PDT 24	May 19 02:07:18 PM PDT 24	460109133 ps
T187	/workspace/coverage/default/5.sram_ctrl_alert_test.427403795	May 19 02:05:31 PM PDT 24	May 19 02:05:38 PM PDT 24	35787248 ps
T188	/workspace/coverage/default/12.sram_ctrl_stress_all.2617401788	May 19 02:06:03 PM PDT 24	May 19 02:28:14 PM PDT 24	10860581223 ps
T189	/workspace/coverage/default/28.sram_ctrl_smoke.1756097737	May 19 02:06:42 PM PDT 24	May 19 02:07:17 PM PDT 24	1118293237 ps
T190	/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2512567959	May 19 02:10:09 PM PDT 24	May 19 02:14:49 PM PDT 24	5694831621 ps
T191	/workspace/coverage/default/45.sram_ctrl_access_during_key_req.438314690	May 19 02:10:35 PM PDT 24	May 19 02:23:59 PM PDT 24	2931866390 ps
T192	/workspace/coverage/default/44.sram_ctrl_ram_cfg.3119048271	May 19 02:10:19 PM PDT 24	May 19 02:10:20 PM PDT 24	28101061 ps
T193	/workspace/coverage/default/39.sram_ctrl_bijection.4177207869	May 19 02:08:47 PM PDT 24	May 19 02:09:21 PM PDT 24	1192096416 ps
T194	/workspace/coverage/default/39.sram_ctrl_multiple_keys.2953306979	May 19 02:08:40 PM PDT 24	May 19 02:25:19 PM PDT 24	103090381659 ps
T195	/workspace/coverage/default/44.sram_ctrl_mem_walk.1254460731	May 19 02:10:21 PM PDT 24	May 19 02:10:26 PM PDT 24	251910374 ps
T196	/workspace/coverage/default/37.sram_ctrl_regwen.4189988132	May 19 02:08:17 PM PDT 24	May 19 02:36:01 PM PDT 24	3545368022 ps
T197	/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1236750334	May 19 02:06:13 PM PDT 24	May 19 02:06:33 PM PDT 24	161592050 ps
T198	/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3987113305	May 19 02:05:47 PM PDT 24	May 19 02:06:58 PM PDT 24	816244423 ps
T199	/workspace/coverage/default/6.sram_ctrl_bijection.3800324565	May 19 02:05:26 PM PDT 24	May 19 02:06:29 PM PDT 24	1085256672 ps
T200	/workspace/coverage/default/20.sram_ctrl_mem_partial_access.2366493612	May 19 02:06:02 PM PDT 24	May 19 02:06:07 PM PDT 24	98034576 ps
T201	/workspace/coverage/default/38.sram_ctrl_mem_partial_access.2918399847	May 19 02:08:35 PM PDT 24	May 19 02:08:40 PM PDT 24	157549077 ps
T52	/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1998589437	May 19 02:12:14 PM PDT 24	May 19 02:13:39 PM PDT 24	2067590365 ps
T202	/workspace/coverage/default/11.sram_ctrl_multiple_keys.2052535399	May 19 02:06:04 PM PDT 24	May 19 02:28:38 PM PDT 24	26746622225 ps
T203	/workspace/coverage/default/39.sram_ctrl_access_during_key_req.1730807819	May 19 02:08:50 PM PDT 24	May 19 02:22:01 PM PDT 24	2912502915 ps
T204	/workspace/coverage/default/27.sram_ctrl_partial_access.3289510702	May 19 02:06:38 PM PDT 24	May 19 02:06:58 PM PDT 24	1007781252 ps
T205	/workspace/coverage/default/1.sram_ctrl_ram_cfg.3824746570	May 19 02:05:17 PM PDT 24	May 19 02:05:19 PM PDT 24	43370003 ps
T206	/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1166223165	May 19 02:09:55 PM PDT 24	May 19 02:12:04 PM PDT 24	6421188570 ps
T207	/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.559269889	May 19 02:11:38 PM PDT 24	May 19 02:16:35 PM PDT 24	27749141403 ps
T53	/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.1595891535	May 19 02:06:44 PM PDT 24	May 19 02:06:51 PM PDT 24	314948518 ps
T208	/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.775935541	May 19 02:05:35 PM PDT 24	May 19 02:10:34 PM PDT 24	48148199570 ps
T209	/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3353487687	May 19 02:05:14 PM PDT 24	May 19 02:05:20 PM PDT 24	928259350 ps
T210	/workspace/coverage/default/27.sram_ctrl_stress_pipeline.320472725	May 19 02:06:31 PM PDT 24	May 19 02:09:57 PM PDT 24	7462818756 ps
T211	/workspace/coverage/default/15.sram_ctrl_bijection.1031352386	May 19 02:05:50 PM PDT 24	May 19 02:06:35 PM PDT 24	4342079327 ps
T212	/workspace/coverage/default/49.sram_ctrl_mem_partial_access.542990030	May 19 02:12:15 PM PDT 24	May 19 02:12:19 PM PDT 24	192085051 ps
T213	/workspace/coverage/default/30.sram_ctrl_mem_walk.1671483903	May 19 02:07:01 PM PDT 24	May 19 02:07:08 PM PDT 24	344762060 ps
T214	/workspace/coverage/default/13.sram_ctrl_max_throughput.2245190782	May 19 02:05:38 PM PDT 24	May 19 02:05:55 PM PDT 24	75130199 ps
T215	/workspace/coverage/default/5.sram_ctrl_regwen.1713499977	May 19 02:05:30 PM PDT 24	May 19 02:19:51 PM PDT 24	32459079015 ps
T216	/workspace/coverage/default/22.sram_ctrl_stress_all.2004370011	May 19 02:06:18 PM PDT 24	May 19 02:59:41 PM PDT 24	465870145118 ps
T217	/workspace/coverage/default/42.sram_ctrl_executable.1340515649	May 19 02:09:37 PM PDT 24	May 19 02:26:22 PM PDT 24	19700522687 ps
T218	/workspace/coverage/default/43.sram_ctrl_access_during_key_req.3422890982	May 19 02:10:00 PM PDT 24	May 19 02:20:07 PM PDT 24	6388924092 ps
T219	/workspace/coverage/default/2.sram_ctrl_alert_test.281677366	May 19 02:05:15 PM PDT 24	May 19 02:05:16 PM PDT 24	12945763 ps
T220	/workspace/coverage/default/21.sram_ctrl_executable.1425136182	May 19 02:06:12 PM PDT 24	May 19 02:31:09 PM PDT 24	43128600499 ps
T221	/workspace/coverage/default/31.sram_ctrl_access_during_key_req.2516781705	May 19 02:07:09 PM PDT 24	May 19 02:09:04 PM PDT 24	4073131084 ps
T222	/workspace/coverage/default/4.sram_ctrl_ram_cfg.2025818903	May 19 02:05:28 PM PDT 24	May 19 02:05:33 PM PDT 24	89995676 ps
T223	/workspace/coverage/default/37.sram_ctrl_stress_all.975748153	May 19 02:08:34 PM PDT 24	May 19 02:46:57 PM PDT 24	33168856153 ps
T224	/workspace/coverage/default/26.sram_ctrl_stress_pipeline.3257106681	May 19 02:06:32 PM PDT 24	May 19 02:10:34 PM PDT 24	2832984455 ps
T225	/workspace/coverage/default/42.sram_ctrl_stress_all.2278964581	May 19 02:09:45 PM PDT 24	May 19 03:07:20 PM PDT 24	30229792512 ps
T226	/workspace/coverage/default/14.sram_ctrl_ram_cfg.3795091643	May 19 02:05:56 PM PDT 24	May 19 02:05:58 PM PDT 24	89816243 ps
T54	/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3157348550	May 19 02:10:24 PM PDT 24	May 19 02:12:43 PM PDT 24	1365929932 ps
T227	/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1859627916	May 19 02:07:27 PM PDT 24	May 19 02:08:46 PM PDT 24	261492929 ps
T228	/workspace/coverage/default/49.sram_ctrl_bijection.1549430654	May 19 02:11:56 PM PDT 24	May 19 02:12:17 PM PDT 24	1146911883 ps
T229	/workspace/coverage/default/3.sram_ctrl_partial_access.482291112	May 19 02:05:28 PM PDT 24	May 19 02:05:35 PM PDT 24	423165864 ps
T230	/workspace/coverage/default/33.sram_ctrl_stress_all.2278232784	May 19 02:07:35 PM PDT 24	May 19 02:29:45 PM PDT 24	5954738107 ps
T231	/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1954627006	May 19 02:05:31 PM PDT 24	May 19 02:05:41 PM PDT 24	72189897 ps
T232	/workspace/coverage/default/38.sram_ctrl_bijection.2981203929	May 19 02:08:26 PM PDT 24	May 19 02:09:13 PM PDT 24	1440346186 ps
T233	/workspace/coverage/default/41.sram_ctrl_stress_all.3952761679	May 19 02:09:27 PM PDT 24	May 19 02:29:29 PM PDT 24	85298552731 ps
T234	/workspace/coverage/default/2.sram_ctrl_stress_pipeline.3140535896	May 19 02:05:20 PM PDT 24	May 19 02:11:13 PM PDT 24	14901164381 ps
T235	/workspace/coverage/default/25.sram_ctrl_mem_walk.1379135727	May 19 02:06:28 PM PDT 24	May 19 02:06:39 PM PDT 24	456220630 ps
T236	/workspace/coverage/default/10.sram_ctrl_partial_access.2629134553	May 19 02:06:01 PM PDT 24	May 19 02:08:04 PM PDT 24	793338527 ps
T237	/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3228935735	May 19 02:06:15 PM PDT 24	May 19 02:14:20 PM PDT 24	47665415263 ps
T238	/workspace/coverage/default/18.sram_ctrl_lc_escalation.772456507	May 19 02:06:05 PM PDT 24	May 19 02:06:13 PM PDT 24	1354320366 ps
T239	/workspace/coverage/default/9.sram_ctrl_stress_all.254824841	May 19 02:05:31 PM PDT 24	May 19 02:58:18 PM PDT 24	16283850192 ps
T240	/workspace/coverage/default/27.sram_ctrl_smoke.3076533633	May 19 02:06:34 PM PDT 24	May 19 02:06:49 PM PDT 24	228870768 ps
T241	/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1119267648	May 19 02:05:36 PM PDT 24	May 19 02:08:01 PM PDT 24	7438133480 ps
T242	/workspace/coverage/default/16.sram_ctrl_regwen.1146695579	May 19 02:05:54 PM PDT 24	May 19 02:15:35 PM PDT 24	7128824796 ps
T243	/workspace/coverage/default/35.sram_ctrl_mem_partial_access.1196672382	May 19 02:07:54 PM PDT 24	May 19 02:07:59 PM PDT 24	63459823 ps
T244	/workspace/coverage/default/21.sram_ctrl_multiple_keys.3936955697	May 19 02:06:12 PM PDT 24	May 19 02:10:12 PM PDT 24	17538970053 ps
T245	/workspace/coverage/default/28.sram_ctrl_max_throughput.2394527397	May 19 02:06:43 PM PDT 24	May 19 02:08:43 PM PDT 24	139287917 ps
T246	/workspace/coverage/default/19.sram_ctrl_partial_access.2351580140	May 19 02:06:05 PM PDT 24	May 19 02:06:41 PM PDT 24	4135348152 ps
T247	/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2299352588	May 19 02:09:01 PM PDT 24	May 19 02:09:45 PM PDT 24	209270530 ps
T55	/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2280530005	May 19 02:09:25 PM PDT 24	May 19 02:10:25 PM PDT 24	1715775219 ps
T248	/workspace/coverage/default/46.sram_ctrl_mem_walk.3063173141	May 19 02:12:03 PM PDT 24	May 19 02:12:09 PM PDT 24	1214979770 ps
T249	/workspace/coverage/default/19.sram_ctrl_alert_test.2594838388	May 19 02:06:12 PM PDT 24	May 19 02:06:15 PM PDT 24	52645814 ps
T250	/workspace/coverage/default/49.sram_ctrl_stress_all.2029336837	May 19 02:12:13 PM PDT 24	May 19 03:07:22 PM PDT 24	48147209951 ps
T251	/workspace/coverage/default/14.sram_ctrl_partial_access.3719155781	May 19 02:05:36 PM PDT 24	May 19 02:05:59 PM PDT 24	1024956489 ps
T252	/workspace/coverage/default/5.sram_ctrl_lc_escalation.1815211246	May 19 02:05:24 PM PDT 24	May 19 02:05:27 PM PDT 24	355800208 ps
T253	/workspace/coverage/default/22.sram_ctrl_alert_test.3233575927	May 19 02:06:12 PM PDT 24	May 19 02:06:15 PM PDT 24	37068284 ps
T254	/workspace/coverage/default/21.sram_ctrl_max_throughput.198232376	May 19 02:06:10 PM PDT 24	May 19 02:07:15 PM PDT 24	115196232 ps
T255	/workspace/coverage/default/40.sram_ctrl_ram_cfg.2143510256	May 19 02:09:02 PM PDT 24	May 19 02:09:03 PM PDT 24	158734799 ps
T256	/workspace/coverage/default/33.sram_ctrl_alert_test.2484421802	May 19 02:07:46 PM PDT 24	May 19 02:07:48 PM PDT 24	15571391 ps
T257	/workspace/coverage/default/47.sram_ctrl_lc_escalation.326280981	May 19 02:11:19 PM PDT 24	May 19 02:11:21 PM PDT 24	742879253 ps
T258	/workspace/coverage/default/34.sram_ctrl_mem_walk.365251607	May 19 02:07:49 PM PDT 24	May 19 02:08:00 PM PDT 24	466520609 ps
T56	/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.462576524	May 19 02:08:54 PM PDT 24	May 19 02:10:44 PM PDT 24	1868162915 ps
T259	/workspace/coverage/default/27.sram_ctrl_bijection.195210456	May 19 02:06:36 PM PDT 24	May 19 02:07:21 PM PDT 24	8419218854 ps
T260	/workspace/coverage/default/48.sram_ctrl_access_during_key_req.718951582	May 19 02:11:41 PM PDT 24	May 19 02:27:39 PM PDT 24	12867505778 ps
T261	/workspace/coverage/default/40.sram_ctrl_lc_escalation.3208391191	May 19 02:08:59 PM PDT 24	May 19 02:09:06 PM PDT 24	721999998 ps
T262	/workspace/coverage/default/26.sram_ctrl_mem_partial_access.2153330502	May 19 02:06:33 PM PDT 24	May 19 02:06:37 PM PDT 24	214323119 ps
T263	/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2779964229	May 19 02:05:52 PM PDT 24	May 19 02:05:59 PM PDT 24	601480276 ps
T264	/workspace/coverage/default/29.sram_ctrl_stress_pipeline.1733258527	May 19 02:06:55 PM PDT 24	May 19 02:09:03 PM PDT 24	5406392341 ps
T265	/workspace/coverage/default/29.sram_ctrl_smoke.631313502	May 19 02:06:50 PM PDT 24	May 19 02:06:53 PM PDT 24	138291162 ps
T266	/workspace/coverage/default/6.sram_ctrl_lc_escalation.171171058	May 19 02:05:26 PM PDT 24	May 19 02:05:34 PM PDT 24	525838704 ps
T267	/workspace/coverage/default/17.sram_ctrl_bijection.2499591178	May 19 02:05:57 PM PDT 24	May 19 02:06:37 PM PDT 24	6973895438 ps
T268	/workspace/coverage/default/7.sram_ctrl_stress_all.2290855769	May 19 02:05:31 PM PDT 24	May 19 03:29:40 PM PDT 24	45182385997 ps
T269	/workspace/coverage/default/4.sram_ctrl_smoke.1970757442	May 19 02:05:23 PM PDT 24	May 19 02:07:26 PM PDT 24	276527291 ps
T270	/workspace/coverage/default/43.sram_ctrl_alert_test.2433135746	May 19 02:10:04 PM PDT 24	May 19 02:10:06 PM PDT 24	13698388 ps
T271	/workspace/coverage/default/41.sram_ctrl_ram_cfg.903006532	May 19 02:09:25 PM PDT 24	May 19 02:09:27 PM PDT 24	48085249 ps
T272	/workspace/coverage/default/35.sram_ctrl_stress_all.1123062207	May 19 02:07:53 PM PDT 24	May 19 03:03:03 PM PDT 24	156394618374 ps
T273	/workspace/coverage/default/33.sram_ctrl_lc_escalation.4273730494	May 19 02:07:25 PM PDT 24	May 19 02:07:27 PM PDT 24	274285301 ps
T274	/workspace/coverage/default/39.sram_ctrl_alert_test.62491295	May 19 02:08:56 PM PDT 24	May 19 02:08:57 PM PDT 24	17168576 ps
T275	/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.894739503	May 19 02:06:00 PM PDT 24	May 19 02:08:16 PM PDT 24	1444007250 ps
T276	/workspace/coverage/default/29.sram_ctrl_stress_all.492723390	May 19 02:06:52 PM PDT 24	May 19 03:06:08 PM PDT 24	12110238882 ps
T277	/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4213289226	May 19 02:10:15 PM PDT 24	May 19 02:29:17 PM PDT 24	10751374954 ps
T278	/workspace/coverage/default/23.sram_ctrl_executable.521408542	May 19 02:06:26 PM PDT 24	May 19 02:35:35 PM PDT 24	92987822960 ps
T279	/workspace/coverage/default/24.sram_ctrl_mem_walk.1240293445	May 19 02:06:26 PM PDT 24	May 19 02:06:36 PM PDT 24	134569641 ps
T280	/workspace/coverage/default/39.sram_ctrl_partial_access.1516942500	May 19 02:08:44 PM PDT 24	May 19 02:08:53 PM PDT 24	1921150591 ps
T281	/workspace/coverage/default/43.sram_ctrl_stress_all.1587015376	May 19 02:10:04 PM PDT 24	May 19 04:11:20 PM PDT 24	316515808328 ps
T282	/workspace/coverage/default/30.sram_ctrl_ram_cfg.956634323	May 19 02:06:59 PM PDT 24	May 19 02:07:01 PM PDT 24	76640325 ps
T283	/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3226019373	May 19 02:05:28 PM PDT 24	May 19 02:13:25 PM PDT 24	37336233085 ps
T284	/workspace/coverage/default/33.sram_ctrl_max_throughput.2010181719	May 19 02:07:28 PM PDT 24	May 19 02:07:36 PM PDT 24	159652591 ps
T285	/workspace/coverage/default/14.sram_ctrl_regwen.2074507584	May 19 02:05:44 PM PDT 24	May 19 02:09:40 PM PDT 24	12242696220 ps
T286	/workspace/coverage/default/31.sram_ctrl_multiple_keys.2980667829	May 19 02:07:04 PM PDT 24	May 19 02:28:22 PM PDT 24	14940699914 ps
T287	/workspace/coverage/default/31.sram_ctrl_alert_test.2490162319	May 19 02:07:12 PM PDT 24	May 19 02:07:13 PM PDT 24	37375070 ps
T288	/workspace/coverage/default/23.sram_ctrl_stress_pipeline.1596368223	May 19 02:06:23 PM PDT 24	May 19 02:08:29 PM PDT 24	1435098429 ps
T289	/workspace/coverage/default/28.sram_ctrl_executable.83697328	May 19 02:06:47 PM PDT 24	May 19 02:21:50 PM PDT 24	10138399125 ps
T290	/workspace/coverage/default/49.sram_ctrl_ram_cfg.4108611905	May 19 02:12:08 PM PDT 24	May 19 02:12:10 PM PDT 24	91028547 ps
T291	/workspace/coverage/default/4.sram_ctrl_multiple_keys.3498404311	May 19 02:05:31 PM PDT 24	May 19 02:22:27 PM PDT 24	35847293837 ps
T57	/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.2041348849	May 19 02:05:28 PM PDT 24	May 19 02:06:52 PM PDT 24	2024463131 ps
T292	/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2921544827	May 19 02:11:03 PM PDT 24	May 19 02:11:06 PM PDT 24	161680176 ps
T293	/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.4064605392	May 19 02:08:42 PM PDT 24	May 19 02:12:24 PM PDT 24	1766683988 ps
T294	/workspace/coverage/default/15.sram_ctrl_executable.834344198	May 19 02:05:53 PM PDT 24	May 19 02:22:57 PM PDT 24	36280414983 ps
T295	/workspace/coverage/default/21.sram_ctrl_partial_access.3415244346	May 19 02:06:11 PM PDT 24	May 19 02:06:24 PM PDT 24	1917849821 ps
T296	/workspace/coverage/default/48.sram_ctrl_max_throughput.1599367478	May 19 02:11:41 PM PDT 24	May 19 02:12:43 PM PDT 24	112837356 ps
T297	/workspace/coverage/default/16.sram_ctrl_smoke.2321273919	May 19 02:05:42 PM PDT 24	May 19 02:05:46 PM PDT 24	96616086 ps
T298	/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1189498969	May 19 02:11:59 PM PDT 24	May 19 02:18:29 PM PDT 24	21281640653 ps