Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.06 99.81 96.99 100.00 100.00 98.57 99.70 98.33


Total tests in report: 1023
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
81.46 81.46 96.69 96.69 77.14 77.14 92.53 92.53 71.43 71.43 88.47 88.47 94.45 94.45 49.54 49.54 /workspace/coverage/default/12.sram_ctrl_executable.425263317
88.73 7.26 98.54 1.85 81.17 4.03 93.42 0.89 100.00 28.57 92.51 4.03 94.60 0.15 60.85 11.32 /workspace/coverage/default/29.sram_ctrl_stress_all.796840342
94.17 5.44 98.93 0.39 89.09 7.92 95.78 2.36 100.00 0.00 95.97 3.46 96.10 1.50 83.30 22.45 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2800564530
95.17 1.00 99.12 0.19 90.00 0.91 95.99 0.21 100.00 0.00 96.83 0.86 96.10 0.00 88.13 4.82 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2141297736
95.79 0.62 99.32 0.19 91.95 1.95 96.35 0.36 100.00 0.00 97.69 0.86 96.70 0.60 88.50 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.3491808396
96.39 0.60 99.61 0.29 92.08 0.13 96.35 0.00 100.00 0.00 97.98 0.29 96.85 0.15 91.84 3.34 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.463851363
96.89 0.50 99.71 0.10 92.34 0.26 98.00 1.65 100.00 0.00 98.56 0.58 96.85 0.00 92.76 0.93 /workspace/coverage/default/16.sram_ctrl_lc_escalation.1089835070
97.32 0.44 99.71 0.00 92.99 0.65 98.00 0.00 100.00 0.00 98.85 0.29 97.30 0.45 94.43 1.67 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.271935670
97.56 0.24 99.71 0.00 92.99 0.00 98.00 0.00 100.00 0.00 98.85 0.00 97.30 0.00 96.10 1.67 /workspace/coverage/default/33.sram_ctrl_regwen.939906893
97.78 0.22 99.71 0.00 93.38 0.39 98.57 0.57 100.00 0.00 98.85 0.00 97.30 0.00 96.66 0.56 /workspace/coverage/default/49.sram_ctrl_alert_test.2497270842
97.98 0.20 99.71 0.00 93.38 0.00 98.64 0.07 100.00 0.00 98.85 0.00 98.65 1.35 96.66 0.00 /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1800282942
98.18 0.20 99.71 0.00 93.51 0.13 98.86 0.21 100.00 0.00 98.85 0.00 99.70 1.05 96.66 0.00 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.582295887
98.32 0.13 99.81 0.10 93.64 0.13 99.57 0.72 100.00 0.00 98.85 0.00 99.70 0.00 96.66 0.00 /workspace/coverage/default/41.sram_ctrl_ram_cfg.1037270311
98.45 0.13 99.81 0.00 93.64 0.00 99.57 0.00 100.00 0.00 98.85 0.00 99.70 0.00 97.59 0.93 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2229236044
98.52 0.07 99.81 0.00 93.77 0.13 99.71 0.14 100.00 0.00 98.85 0.00 99.70 0.00 97.77 0.19 /workspace/coverage/default/27.sram_ctrl_regwen.2524052430
98.57 0.06 99.81 0.00 94.16 0.39 99.71 0.00 100.00 0.00 98.85 0.00 99.70 0.00 97.77 0.00 /workspace/coverage/default/15.sram_ctrl_lc_escalation.1080124581
98.61 0.04 99.81 0.00 94.16 0.00 99.96 0.25 100.00 0.00 98.85 0.00 99.70 0.00 97.77 0.00 /workspace/coverage/default/26.sram_ctrl_stress_all.2056657194
98.63 0.03 99.81 0.00 94.16 0.00 99.96 0.00 100.00 0.00 98.85 0.00 99.70 0.00 97.96 0.19 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.574361448
98.66 0.03 99.81 0.00 94.16 0.00 99.96 0.00 100.00 0.00 98.85 0.00 99.70 0.00 98.14 0.19 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3159978442
98.69 0.03 99.81 0.00 94.16 0.00 99.96 0.00 100.00 0.00 98.85 0.00 99.70 0.00 98.33 0.19 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1108421188
98.69 0.01 99.81 0.00 94.16 0.00 100.00 0.04 100.00 0.00 98.85 0.00 99.70 0.00 98.33 0.00 /workspace/coverage/default/0.sram_ctrl_partial_access.1507989476

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1207281556
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1222605875
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2360663443
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2143749185
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1546540461
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.966662789
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2634372095
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3680114893
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2243088572
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3876137504
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2974762575
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2083084589
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2660633145
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3920108360
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.963193657
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3991369350
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2696653868
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.846213746
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1066244757
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.726087229
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3046851440
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.4285827727
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1704951033
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.332320982
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3313831749
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.409542851
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3705974043
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.879900983
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.4006573088
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2856131560
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2677692842
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.4179263193
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1439410431
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.4173841292
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2156514595
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1958004775
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3321982369
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3380169217
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1189615268
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2386663284
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2985824094
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4225366428
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.948191369
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3504458714
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1848881770
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2429992073
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2681296136
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1153709124
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.640867322
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.637754082
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1103389673
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3301087200
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.584798282
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3713677388
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1159150487
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1969017991
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3944469824
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1113681388
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.818298110
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2535818106
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2260921956
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.460530136
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.754900594
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3092647632
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2354749827
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2855101185
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.905717641
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3269843983
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4093286801
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2019511131
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1784715608
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.897578815
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1922131554
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.750927217
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2045515377
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1762214482
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3082756062
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3500095251
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.377668763
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3549105961
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3569180555
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.920067752
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.4210277226
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.460060773
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.279193609
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1549673637
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2670498611
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.121498578
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.309147334
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.685296551
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3982297281
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2120976034
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1008578846
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1216824959
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.55048689
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.655918295
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.150234587
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.536845786
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.57553940
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1159782516
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.87186529
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1320617274
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3782575030
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1861938240
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2604562418
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.552080341
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1009169306
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1982488899
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1713223381
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1314984417
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1222952953
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2221276609
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3167727722
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1297341943
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.4032557180
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.4265755556
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1479547037
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3751523353
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1622378503
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.4002288077
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3711702404
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.519281238
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.462373936
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3234378123
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.113659214
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.707862481
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.4250357637
/workspace/coverage/default/0.sram_ctrl_alert_test.3815483071
/workspace/coverage/default/0.sram_ctrl_bijection.1585938038
/workspace/coverage/default/0.sram_ctrl_executable.3139893108
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1631708147
/workspace/coverage/default/0.sram_ctrl_max_throughput.1380543997
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.534396119
/workspace/coverage/default/0.sram_ctrl_mem_walk.1526569441
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3070163749
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2979534987
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3135921333
/workspace/coverage/default/0.sram_ctrl_regwen.3422603630
/workspace/coverage/default/0.sram_ctrl_smoke.2121868895
/workspace/coverage/default/0.sram_ctrl_stress_all.1125916960
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3131743355
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2002479629
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4117631364
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.82220494
/workspace/coverage/default/1.sram_ctrl_alert_test.2970949784
/workspace/coverage/default/1.sram_ctrl_bijection.110827333
/workspace/coverage/default/1.sram_ctrl_executable.1479813899
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2327037527
/workspace/coverage/default/1.sram_ctrl_max_throughput.328734014
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1472031338
/workspace/coverage/default/1.sram_ctrl_mem_walk.4014673935
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4133465097
/workspace/coverage/default/1.sram_ctrl_partial_access.487572099
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1450267372
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3394705145
/workspace/coverage/default/1.sram_ctrl_regwen.3901985734
/workspace/coverage/default/1.sram_ctrl_sec_cm.224248431
/workspace/coverage/default/1.sram_ctrl_smoke.1393155744
/workspace/coverage/default/1.sram_ctrl_stress_all.1571287696
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1727199674
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3633216203
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2201167719
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3971483690
/workspace/coverage/default/10.sram_ctrl_alert_test.3543976466
/workspace/coverage/default/10.sram_ctrl_bijection.3549627308
/workspace/coverage/default/10.sram_ctrl_executable.2451128724
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1244142396
/workspace/coverage/default/10.sram_ctrl_max_throughput.685942010
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.728886980
/workspace/coverage/default/10.sram_ctrl_mem_walk.341916122
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1119302600
/workspace/coverage/default/10.sram_ctrl_partial_access.864439290
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1603571091
/workspace/coverage/default/10.sram_ctrl_ram_cfg.635408152
/workspace/coverage/default/10.sram_ctrl_regwen.3507201818
/workspace/coverage/default/10.sram_ctrl_smoke.3919522213
/workspace/coverage/default/10.sram_ctrl_stress_all.798441845
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3134370111
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2856573537
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1088258056
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3191465836
/workspace/coverage/default/11.sram_ctrl_alert_test.1206701596
/workspace/coverage/default/11.sram_ctrl_bijection.1563103591
/workspace/coverage/default/11.sram_ctrl_executable.239584033
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3359203006
/workspace/coverage/default/11.sram_ctrl_max_throughput.357715475
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3964289817
/workspace/coverage/default/11.sram_ctrl_mem_walk.2023075279
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2995925995
/workspace/coverage/default/11.sram_ctrl_partial_access.1351667171
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.109833942
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3307193546
/workspace/coverage/default/11.sram_ctrl_regwen.606065665
/workspace/coverage/default/11.sram_ctrl_smoke.1745867193
/workspace/coverage/default/11.sram_ctrl_stress_all.3188897380
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1469642351
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1861464483
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1725565878
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3241434711
/workspace/coverage/default/12.sram_ctrl_alert_test.2052787528
/workspace/coverage/default/12.sram_ctrl_bijection.2839774340
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/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2149087212
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1124686528
/workspace/coverage/default/43.sram_ctrl_regwen.644288547
/workspace/coverage/default/43.sram_ctrl_smoke.2640544526
/workspace/coverage/default/43.sram_ctrl_stress_all.3849789145
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1337215368
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3195075424
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3149682884
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2063596370
/workspace/coverage/default/44.sram_ctrl_alert_test.584447163
/workspace/coverage/default/44.sram_ctrl_bijection.2861377289
/workspace/coverage/default/44.sram_ctrl_executable.1356898810
/workspace/coverage/default/44.sram_ctrl_lc_escalation.816991267
/workspace/coverage/default/44.sram_ctrl_max_throughput.1596898168
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2233955795
/workspace/coverage/default/44.sram_ctrl_mem_walk.1365849909
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2708004167
/workspace/coverage/default/44.sram_ctrl_partial_access.3493864853
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.4251657104
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2985718796
/workspace/coverage/default/44.sram_ctrl_regwen.2006169218
/workspace/coverage/default/44.sram_ctrl_smoke.3578015207
/workspace/coverage/default/44.sram_ctrl_stress_all.3838671502
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1188959807
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2554091503
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2333225005
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.143542768
/workspace/coverage/default/45.sram_ctrl_alert_test.2835798664
/workspace/coverage/default/45.sram_ctrl_bijection.3937552592
/workspace/coverage/default/45.sram_ctrl_executable.1700889513
/workspace/coverage/default/45.sram_ctrl_lc_escalation.4005522921
/workspace/coverage/default/45.sram_ctrl_max_throughput.2892458420
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.529202034
/workspace/coverage/default/45.sram_ctrl_mem_walk.3490349144
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3590664424
/workspace/coverage/default/45.sram_ctrl_partial_access.1172069086
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2154971299
/workspace/coverage/default/45.sram_ctrl_ram_cfg.769355854
/workspace/coverage/default/45.sram_ctrl_regwen.2812760976
/workspace/coverage/default/45.sram_ctrl_smoke.1115514766
/workspace/coverage/default/45.sram_ctrl_stress_all.2097659090
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3053246873
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3111062909
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1941478935
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3016955194
/workspace/coverage/default/46.sram_ctrl_alert_test.1971220246
/workspace/coverage/default/46.sram_ctrl_bijection.162889549
/workspace/coverage/default/46.sram_ctrl_executable.2830263749
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3097361395
/workspace/coverage/default/46.sram_ctrl_max_throughput.1642871568
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.106640094
/workspace/coverage/default/46.sram_ctrl_mem_walk.289028297
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2147852132
/workspace/coverage/default/46.sram_ctrl_partial_access.4048755476
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3146516716
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3520738094
/workspace/coverage/default/46.sram_ctrl_regwen.3305758754
/workspace/coverage/default/46.sram_ctrl_smoke.104209963
/workspace/coverage/default/46.sram_ctrl_stress_all.2962084587
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3758586674
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.37347825
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3802323779
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1624189610
/workspace/coverage/default/47.sram_ctrl_alert_test.2367644731
/workspace/coverage/default/47.sram_ctrl_bijection.3853434610
/workspace/coverage/default/47.sram_ctrl_executable.1800383993
/workspace/coverage/default/47.sram_ctrl_lc_escalation.261201766
/workspace/coverage/default/47.sram_ctrl_max_throughput.936983130
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3997681668
/workspace/coverage/default/47.sram_ctrl_mem_walk.281550603
/workspace/coverage/default/47.sram_ctrl_multiple_keys.530605733
/workspace/coverage/default/47.sram_ctrl_partial_access.4098259988
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2508989755
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3500998975
/workspace/coverage/default/47.sram_ctrl_regwen.1680556527
/workspace/coverage/default/47.sram_ctrl_smoke.3436295514
/workspace/coverage/default/47.sram_ctrl_stress_all.3184866945
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1070511662
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.991957840
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2838766380
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3631280909
/workspace/coverage/default/48.sram_ctrl_alert_test.2334891593
/workspace/coverage/default/48.sram_ctrl_bijection.283455555
/workspace/coverage/default/48.sram_ctrl_executable.685783148
/workspace/coverage/default/48.sram_ctrl_lc_escalation.594915196
/workspace/coverage/default/48.sram_ctrl_max_throughput.87832845
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.821148235
/workspace/coverage/default/48.sram_ctrl_mem_walk.1518014465
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4239549834
/workspace/coverage/default/48.sram_ctrl_partial_access.20869325
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.483716056
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3339425264
/workspace/coverage/default/48.sram_ctrl_regwen.1420204732
/workspace/coverage/default/48.sram_ctrl_smoke.863060554
/workspace/coverage/default/48.sram_ctrl_stress_all.250603164
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3523429682
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.839117614
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1119701627
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1824662991
/workspace/coverage/default/49.sram_ctrl_bijection.4236202703
/workspace/coverage/default/49.sram_ctrl_executable.404543718
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2903957670
/workspace/coverage/default/49.sram_ctrl_max_throughput.708362180
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3231826641
/workspace/coverage/default/49.sram_ctrl_mem_walk.2518239596
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1120341899
/workspace/coverage/default/49.sram_ctrl_partial_access.3955106423
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1677957930
/workspace/coverage/default/49.sram_ctrl_ram_cfg.630690621
/workspace/coverage/default/49.sram_ctrl_regwen.2077676553
/workspace/coverage/default/49.sram_ctrl_smoke.2351586722
/workspace/coverage/default/49.sram_ctrl_stress_all.3593422802
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2347167076
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1920879721
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4120743658
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.433731962
/workspace/coverage/default/5.sram_ctrl_alert_test.3276213509
/workspace/coverage/default/5.sram_ctrl_bijection.3100966765
/workspace/coverage/default/5.sram_ctrl_executable.3375177525
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2450050774
/workspace/coverage/default/5.sram_ctrl_max_throughput.3634990978
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1583168013
/workspace/coverage/default/5.sram_ctrl_mem_walk.463405875
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4283098840
/workspace/coverage/default/5.sram_ctrl_partial_access.4291272359
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1885553891
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1624618713
/workspace/coverage/default/5.sram_ctrl_regwen.1076802260
/workspace/coverage/default/5.sram_ctrl_smoke.2724589919
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3017679798
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2133967875
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3904662923
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.537719758
/workspace/coverage/default/6.sram_ctrl_alert_test.3450333277
/workspace/coverage/default/6.sram_ctrl_bijection.3781991438
/workspace/coverage/default/6.sram_ctrl_executable.3649746517
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2772972119
/workspace/coverage/default/6.sram_ctrl_max_throughput.2086330704
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1129919373
/workspace/coverage/default/6.sram_ctrl_mem_walk.3050749630
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3143770243
/workspace/coverage/default/6.sram_ctrl_partial_access.1102054068
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1253572433
/workspace/coverage/default/6.sram_ctrl_ram_cfg.734260827
/workspace/coverage/default/6.sram_ctrl_regwen.382417819
/workspace/coverage/default/6.sram_ctrl_smoke.3940382053
/workspace/coverage/default/6.sram_ctrl_stress_all.1692920398
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1601645715
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.933146976
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1098536698
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3434567588
/workspace/coverage/default/7.sram_ctrl_alert_test.1810003959
/workspace/coverage/default/7.sram_ctrl_bijection.2413802910
/workspace/coverage/default/7.sram_ctrl_executable.1486212694
/workspace/coverage/default/7.sram_ctrl_lc_escalation.833792732
/workspace/coverage/default/7.sram_ctrl_max_throughput.89593130
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2258586569
/workspace/coverage/default/7.sram_ctrl_mem_walk.720575369
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3995814039
/workspace/coverage/default/7.sram_ctrl_partial_access.1891053802
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.626355244
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2253338417
/workspace/coverage/default/7.sram_ctrl_regwen.1378515072
/workspace/coverage/default/7.sram_ctrl_smoke.770690080
/workspace/coverage/default/7.sram_ctrl_stress_all.749123874
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.865865183
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2975568150
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3649941370
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.884306676
/workspace/coverage/default/8.sram_ctrl_alert_test.904993149
/workspace/coverage/default/8.sram_ctrl_bijection.4146733766
/workspace/coverage/default/8.sram_ctrl_executable.776352678
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1972088690
/workspace/coverage/default/8.sram_ctrl_max_throughput.54397239
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2960232356
/workspace/coverage/default/8.sram_ctrl_mem_walk.3436733880
/workspace/coverage/default/8.sram_ctrl_multiple_keys.871755581
/workspace/coverage/default/8.sram_ctrl_partial_access.1363074939
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1145401597
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2349227019
/workspace/coverage/default/8.sram_ctrl_regwen.3309955989
/workspace/coverage/default/8.sram_ctrl_smoke.3614760584
/workspace/coverage/default/8.sram_ctrl_stress_all.2484777993
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.517484792
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2017781562
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3973958529
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2095384615
/workspace/coverage/default/9.sram_ctrl_alert_test.3711080817
/workspace/coverage/default/9.sram_ctrl_bijection.323976776
/workspace/coverage/default/9.sram_ctrl_executable.2250386392
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1686861268
/workspace/coverage/default/9.sram_ctrl_max_throughput.4144376135
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3086176381
/workspace/coverage/default/9.sram_ctrl_mem_walk.1356705326
/workspace/coverage/default/9.sram_ctrl_multiple_keys.4096456847
/workspace/coverage/default/9.sram_ctrl_partial_access.2998441517
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3057168773
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3795659443
/workspace/coverage/default/9.sram_ctrl_regwen.2369664166
/workspace/coverage/default/9.sram_ctrl_smoke.120921787
/workspace/coverage/default/9.sram_ctrl_stress_all.1086037271
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3862991465
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2480545696
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1161286825



Total test records in report: 1023
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/7.sram_ctrl_smoke.770690080 May 23 12:49:48 PM PDT 24 May 23 12:51:04 PM PDT 24 117342606 ps
T2 /workspace/coverage/default/26.sram_ctrl_executable.1832440026 May 23 12:51:23 PM PDT 24 May 23 12:59:09 PM PDT 24 12223938151 ps
T3 /workspace/coverage/default/7.sram_ctrl_ram_cfg.2253338417 May 23 12:49:59 PM PDT 24 May 23 12:50:00 PM PDT 24 49928672 ps
T4 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1731271677 May 23 12:52:50 PM PDT 24 May 23 12:52:56 PM PDT 24 72439691 ps
T5 /workspace/coverage/default/12.sram_ctrl_executable.425263317 May 23 12:50:15 PM PDT 24 May 23 01:14:47 PM PDT 24 26712664767 ps
T10 /workspace/coverage/default/49.sram_ctrl_bijection.4236202703 May 23 12:53:36 PM PDT 24 May 23 12:54:35 PM PDT 24 4757471518 ps
T6 /workspace/coverage/default/26.sram_ctrl_mem_walk.3033155364 May 23 12:51:22 PM PDT 24 May 23 12:51:36 PM PDT 24 9281208640 ps
T11 /workspace/coverage/default/41.sram_ctrl_ram_cfg.1037270311 May 23 12:52:36 PM PDT 24 May 23 12:52:38 PM PDT 24 90027082 ps
T12 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.2137047282 May 23 12:51:21 PM PDT 24 May 23 12:56:03 PM PDT 24 3118738724 ps
T13 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.839117614 May 23 12:53:18 PM PDT 24 May 23 12:55:40 PM PDT 24 5959964193 ps
T16 /workspace/coverage/default/20.sram_ctrl_regwen.4107881784 May 23 12:50:40 PM PDT 24 May 23 01:27:11 PM PDT 24 68906373507 ps
T14 /workspace/coverage/default/5.sram_ctrl_executable.3375177525 May 23 12:49:40 PM PDT 24 May 23 12:58:56 PM PDT 24 8552923148 ps
T17 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1253572433 May 23 12:49:46 PM PDT 24 May 23 12:56:13 PM PDT 24 5903669741 ps
T18 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.2436639335 May 23 12:50:39 PM PDT 24 May 23 01:08:22 PM PDT 24 22007843666 ps
T25 /workspace/coverage/default/2.sram_ctrl_bijection.1716395340 May 23 12:49:37 PM PDT 24 May 23 12:50:24 PM PDT 24 1564930381 ps
T33 /workspace/coverage/default/15.sram_ctrl_ram_cfg.3115195214 May 23 12:50:27 PM PDT 24 May 23 12:50:31 PM PDT 24 241637932 ps
T66 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3088246755 May 23 12:52:39 PM PDT 24 May 23 12:59:33 PM PDT 24 133510104497 ps
T15 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.463851363 May 23 12:51:33 PM PDT 24 May 23 12:57:17 PM PDT 24 76465758860 ps
T67 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.236633261 May 23 12:50:29 PM PDT 24 May 23 12:50:36 PM PDT 24 66526105 ps
T68 /workspace/coverage/default/14.sram_ctrl_mem_walk.2791248085 May 23 12:50:25 PM PDT 24 May 23 12:50:35 PM PDT 24 450411490 ps
T142 /workspace/coverage/default/0.sram_ctrl_partial_access.1507989476 May 23 12:49:32 PM PDT 24 May 23 12:49:59 PM PDT 24 326300413 ps
T100 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2245625777 May 23 12:50:38 PM PDT 24 May 23 12:52:26 PM PDT 24 305009242 ps
T45 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.4250357637 May 23 12:49:29 PM PDT 24 May 23 01:07:13 PM PDT 24 4380808518 ps
T150 /workspace/coverage/default/27.sram_ctrl_mem_walk.1817727684 May 23 12:51:21 PM PDT 24 May 23 12:51:29 PM PDT 24 1012675528 ps
T31 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.2800564530 May 23 12:51:33 PM PDT 24 May 23 12:51:46 PM PDT 24 1237542441 ps
T47 /workspace/coverage/default/19.sram_ctrl_executable.1030280737 May 23 12:50:30 PM PDT 24 May 23 01:13:46 PM PDT 24 43623680571 ps
T55 /workspace/coverage/default/19.sram_ctrl_ram_cfg.2737508884 May 23 12:50:29 PM PDT 24 May 23 12:50:33 PM PDT 24 86863267 ps
T7 /workspace/coverage/default/16.sram_ctrl_lc_escalation.1089835070 May 23 12:50:29 PM PDT 24 May 23 12:50:41 PM PDT 24 785015409 ps
T56 /workspace/coverage/default/47.sram_ctrl_mem_walk.281550603 May 23 12:53:21 PM PDT 24 May 23 12:53:32 PM PDT 24 275970669 ps
T57 /workspace/coverage/default/32.sram_ctrl_smoke.99934268 May 23 12:51:34 PM PDT 24 May 23 12:52:14 PM PDT 24 461877974 ps
T58 /workspace/coverage/default/39.sram_ctrl_mem_walk.3852149651 May 23 12:52:25 PM PDT 24 May 23 12:52:37 PM PDT 24 2706476321 ps
T22 /workspace/coverage/default/18.sram_ctrl_alert_test.3622562178 May 23 12:50:28 PM PDT 24 May 23 12:50:31 PM PDT 24 23505002 ps
T59 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.4291152296 May 23 12:49:37 PM PDT 24 May 23 12:52:42 PM PDT 24 80903939077 ps
T60 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1237710766 May 23 12:50:30 PM PDT 24 May 23 12:52:50 PM PDT 24 154268128 ps
T79 /workspace/coverage/default/27.sram_ctrl_multiple_keys.2955708432 May 23 12:51:20 PM PDT 24 May 23 12:53:11 PM PDT 24 1334372349 ps
T26 /workspace/coverage/default/27.sram_ctrl_regwen.2524052430 May 23 12:51:22 PM PDT 24 May 23 01:20:50 PM PDT 24 21676268234 ps
T151 /workspace/coverage/default/46.sram_ctrl_partial_access.4048755476 May 23 12:53:09 PM PDT 24 May 23 12:53:30 PM PDT 24 4008158124 ps
T46 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.582295887 May 23 12:51:10 PM PDT 24 May 23 01:12:37 PM PDT 24 4405015335 ps
T85 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3964289817 May 23 12:50:13 PM PDT 24 May 23 12:50:19 PM PDT 24 119518978 ps
T152 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3500998975 May 23 12:53:19 PM PDT 24 May 23 12:53:22 PM PDT 24 259453671 ps
T140 /workspace/coverage/default/34.sram_ctrl_multiple_keys.3270843165 May 23 12:51:54 PM PDT 24 May 23 12:57:34 PM PDT 24 8088203026 ps
T147 /workspace/coverage/default/14.sram_ctrl_multiple_keys.933841589 May 23 12:50:27 PM PDT 24 May 23 12:59:11 PM PDT 24 57846338809 ps
T153 /workspace/coverage/default/35.sram_ctrl_partial_access.1171200817 May 23 12:51:55 PM PDT 24 May 23 12:52:13 PM PDT 24 1314702920 ps
T145 /workspace/coverage/default/23.sram_ctrl_bijection.2740502457 May 23 12:50:50 PM PDT 24 May 23 12:51:21 PM PDT 24 2741625685 ps
T154 /workspace/coverage/default/1.sram_ctrl_ram_cfg.3394705145 May 23 12:49:34 PM PDT 24 May 23 12:49:36 PM PDT 24 35995719 ps
T155 /workspace/coverage/default/31.sram_ctrl_smoke.3572260449 May 23 12:51:32 PM PDT 24 May 23 12:51:37 PM PDT 24 80659510 ps
T8 /workspace/coverage/default/35.sram_ctrl_stress_all.1601725744 May 23 12:52:11 PM PDT 24 May 23 01:19:34 PM PDT 24 45568369176 ps
T149 /workspace/coverage/default/20.sram_ctrl_max_throughput.2280203169 May 23 12:50:39 PM PDT 24 May 23 12:50:49 PM PDT 24 66587624 ps
T156 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1088258056 May 23 12:50:04 PM PDT 24 May 23 12:50:50 PM PDT 24 113096883 ps
T61 /workspace/coverage/default/33.sram_ctrl_regwen.939906893 May 23 12:51:44 PM PDT 24 May 23 01:06:43 PM PDT 24 117675149562 ps
T136 /workspace/coverage/default/16.sram_ctrl_multiple_keys.2199782436 May 23 12:50:28 PM PDT 24 May 23 01:11:37 PM PDT 24 102449846010 ps
T139 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3541721075 May 23 12:51:19 PM PDT 24 May 23 12:52:17 PM PDT 24 576723928 ps
T144 /workspace/coverage/default/11.sram_ctrl_bijection.1563103591 May 23 12:50:11 PM PDT 24 May 23 12:50:40 PM PDT 24 2694482741 ps
T62 /workspace/coverage/default/9.sram_ctrl_stress_all.1086037271 May 23 12:50:04 PM PDT 24 May 23 01:31:18 PM PDT 24 9270299241 ps
T141 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1954089785 May 23 12:51:31 PM PDT 24 May 23 12:53:37 PM PDT 24 344753624 ps
T98 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.991957840 May 23 12:53:18 PM PDT 24 May 23 12:59:14 PM PDT 24 4022806921 ps
T134 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.4274974532 May 23 12:50:39 PM PDT 24 May 23 12:53:32 PM PDT 24 9006508136 ps
T27 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.640108748 May 23 12:50:52 PM PDT 24 May 23 12:56:11 PM PDT 24 13668886778 ps
T63 /workspace/coverage/default/38.sram_ctrl_regwen.3358111544 May 23 12:52:23 PM PDT 24 May 23 01:08:11 PM PDT 24 10699061248 ps
T86 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.3817482166 May 23 12:52:09 PM PDT 24 May 23 12:52:16 PM PDT 24 290686212 ps
T146 /workspace/coverage/default/37.sram_ctrl_bijection.2111913319 May 23 12:52:08 PM PDT 24 May 23 12:52:52 PM PDT 24 5305341105 ps
T23 /workspace/coverage/default/35.sram_ctrl_alert_test.4150578546 May 23 12:52:08 PM PDT 24 May 23 12:52:10 PM PDT 24 80583451 ps
T157 /workspace/coverage/default/3.sram_ctrl_smoke.819639016 May 23 12:49:38 PM PDT 24 May 23 12:50:39 PM PDT 24 1911886270 ps
T132 /workspace/coverage/default/28.sram_ctrl_executable.4252171001 May 23 12:51:22 PM PDT 24 May 23 12:58:29 PM PDT 24 29089745930 ps
T158 /workspace/coverage/default/8.sram_ctrl_max_throughput.54397239 May 23 12:50:01 PM PDT 24 May 23 12:50:09 PM PDT 24 59978855 ps
T87 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.3631280909 May 23 12:53:33 PM PDT 24 May 23 12:55:32 PM PDT 24 1819852299 ps
T9 /workspace/coverage/default/22.sram_ctrl_lc_escalation.3894515719 May 23 12:50:57 PM PDT 24 May 23 12:51:02 PM PDT 24 935706128 ps
T143 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3143770243 May 23 12:49:50 PM PDT 24 May 23 01:09:57 PM PDT 24 10140382047 ps
T159 /workspace/coverage/default/45.sram_ctrl_ram_cfg.769355854 May 23 12:53:04 PM PDT 24 May 23 12:53:07 PM PDT 24 41752722 ps
T148 /workspace/coverage/default/11.sram_ctrl_stress_all.3188897380 May 23 12:50:14 PM PDT 24 May 23 01:15:49 PM PDT 24 89895207485 ps
T24 /workspace/coverage/default/44.sram_ctrl_alert_test.584447163 May 23 12:53:03 PM PDT 24 May 23 12:53:05 PM PDT 24 29008021 ps
T160 /workspace/coverage/default/48.sram_ctrl_smoke.863060554 May 23 12:53:21 PM PDT 24 May 23 12:53:53 PM PDT 24 2094618762 ps
T64 /workspace/coverage/default/29.sram_ctrl_stress_all.796840342 May 23 12:51:32 PM PDT 24 May 23 01:18:42 PM PDT 24 94114540278 ps
T161 /workspace/coverage/default/44.sram_ctrl_partial_access.3493864853 May 23 12:52:50 PM PDT 24 May 23 12:53:04 PM PDT 24 257339170 ps
T32 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1657788826 May 23 12:51:56 PM PDT 24 May 23 12:52:18 PM PDT 24 694108972 ps
T65 /workspace/coverage/default/11.sram_ctrl_regwen.606065665 May 23 12:50:15 PM PDT 24 May 23 01:11:09 PM PDT 24 4251057507 ps
T112 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1145401597 May 23 12:50:00 PM PDT 24 May 23 12:54:22 PM PDT 24 3841402902 ps
T113 /workspace/coverage/default/10.sram_ctrl_ram_cfg.635408152 May 23 12:50:05 PM PDT 24 May 23 12:50:09 PM PDT 24 75685856 ps
T114 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2408085988 May 23 12:51:07 PM PDT 24 May 23 12:54:16 PM PDT 24 3777740463 ps
T115 /workspace/coverage/default/22.sram_ctrl_ram_cfg.4005665221 May 23 12:50:51 PM PDT 24 May 23 12:50:53 PM PDT 24 76751383 ps
T88 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.4209727861 May 23 12:51:44 PM PDT 24 May 23 12:54:36 PM PDT 24 1381377446 ps
T116 /workspace/coverage/default/23.sram_ctrl_stress_all.3184450340 May 23 12:50:51 PM PDT 24 May 23 01:11:04 PM PDT 24 53517470097 ps
T117 /workspace/coverage/default/32.sram_ctrl_multiple_keys.2099869255 May 23 12:51:35 PM PDT 24 May 23 01:07:52 PM PDT 24 50849151419 ps
T118 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2254467735 May 23 12:51:19 PM PDT 24 May 23 12:57:04 PM PDT 24 29337359561 ps
T162 /workspace/coverage/default/8.sram_ctrl_mem_walk.3436733880 May 23 12:50:02 PM PDT 24 May 23 12:50:09 PM PDT 24 80080796 ps
T163 /workspace/coverage/default/1.sram_ctrl_multiple_keys.4133465097 May 23 12:49:33 PM PDT 24 May 23 12:57:06 PM PDT 24 10106543088 ps
T133 /workspace/coverage/default/3.sram_ctrl_executable.1382544225 May 23 12:49:46 PM PDT 24 May 23 01:09:26 PM PDT 24 13536439968 ps
T164 /workspace/coverage/default/42.sram_ctrl_alert_test.2309103137 May 23 12:52:47 PM PDT 24 May 23 12:52:49 PM PDT 24 23500391 ps
T137 /workspace/coverage/default/37.sram_ctrl_stress_all.1852968802 May 23 12:52:09 PM PDT 24 May 23 01:16:54 PM PDT 24 21637008271 ps
T165 /workspace/coverage/default/22.sram_ctrl_multiple_keys.1227549937 May 23 12:50:40 PM PDT 24 May 23 12:57:26 PM PDT 24 23380433906 ps
T48 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3336663754 May 23 12:50:30 PM PDT 24 May 23 12:58:56 PM PDT 24 4358073411 ps
T166 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.2877175839 May 23 12:50:39 PM PDT 24 May 23 12:55:55 PM PDT 24 12950375632 ps
T89 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.4109003444 May 23 12:52:28 PM PDT 24 May 23 01:06:12 PM PDT 24 9615422085 ps
T167 /workspace/coverage/default/21.sram_ctrl_alert_test.2920209042 May 23 12:50:44 PM PDT 24 May 23 12:50:47 PM PDT 24 36436894 ps
T168 /workspace/coverage/default/49.sram_ctrl_multiple_keys.1120341899 May 23 12:53:35 PM PDT 24 May 23 12:58:02 PM PDT 24 2002481515 ps
T169 /workspace/coverage/default/33.sram_ctrl_executable.3089773630 May 23 12:51:42 PM PDT 24 May 23 01:09:51 PM PDT 24 58670281898 ps
T170 /workspace/coverage/default/3.sram_ctrl_ram_cfg.4276853970 May 23 12:49:42 PM PDT 24 May 23 12:49:44 PM PDT 24 129023417 ps
T135 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2149087212 May 23 12:52:47 PM PDT 24 May 23 12:57:31 PM PDT 24 13125914114 ps
T171 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.745595358 May 23 12:50:39 PM PDT 24 May 23 12:58:49 PM PDT 24 29115999425 ps
T172 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.1906233343 May 23 12:51:49 PM PDT 24 May 23 12:51:53 PM PDT 24 432505660 ps
T173 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2979534987 May 23 12:49:30 PM PDT 24 May 23 12:53:43 PM PDT 24 38197566149 ps
T174 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3740845785 May 23 12:50:33 PM PDT 24 May 23 12:53:12 PM PDT 24 2258820822 ps
T175 /workspace/coverage/default/40.sram_ctrl_ram_cfg.1622864172 May 23 12:52:38 PM PDT 24 May 23 12:52:40 PM PDT 24 52999863 ps
T176 /workspace/coverage/default/8.sram_ctrl_regwen.3309955989 May 23 12:50:03 PM PDT 24 May 23 12:50:21 PM PDT 24 1550542682 ps
T177 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.626355244 May 23 12:50:02 PM PDT 24 May 23 12:56:30 PM PDT 24 28245241136 ps
T178 /workspace/coverage/default/32.sram_ctrl_mem_walk.314526224 May 23 12:51:43 PM PDT 24 May 23 12:51:54 PM PDT 24 1048327928 ps
T179 /workspace/coverage/default/38.sram_ctrl_max_throughput.2433526691 May 23 12:52:23 PM PDT 24 May 23 12:52:31 PM PDT 24 240813441 ps
T180 /workspace/coverage/default/47.sram_ctrl_bijection.3853434610 May 23 12:53:19 PM PDT 24 May 23 12:54:42 PM PDT 24 10349726686 ps
T181 /workspace/coverage/default/31.sram_ctrl_regwen.3968374379 May 23 12:51:34 PM PDT 24 May 23 01:07:51 PM PDT 24 49535246677 ps
T182 /workspace/coverage/default/40.sram_ctrl_executable.2997081136 May 23 12:52:37 PM PDT 24 May 23 01:06:58 PM PDT 24 22054779060 ps
T183 /workspace/coverage/default/33.sram_ctrl_smoke.2785528561 May 23 12:51:54 PM PDT 24 May 23 12:52:07 PM PDT 24 2112827528 ps
T49 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2347167076 May 23 12:53:33 PM PDT 24 May 23 12:54:24 PM PDT 24 4380097505 ps
T184 /workspace/coverage/default/21.sram_ctrl_ram_cfg.312865916 May 23 12:50:36 PM PDT 24 May 23 12:50:39 PM PDT 24 82997851 ps
T185 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.2668565625 May 23 12:52:40 PM PDT 24 May 23 12:52:45 PM PDT 24 65803430 ps
T186 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.294613771 May 23 12:50:18 PM PDT 24 May 23 12:55:15 PM PDT 24 15919140687 ps
T187 /workspace/coverage/default/22.sram_ctrl_bijection.4003738683 May 23 12:50:39 PM PDT 24 May 23 12:51:44 PM PDT 24 1037933453 ps
T188 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.82220494 May 23 12:49:35 PM PDT 24 May 23 12:54:44 PM PDT 24 1347636442 ps
T189 /workspace/coverage/default/16.sram_ctrl_mem_walk.114024870 May 23 12:50:30 PM PDT 24 May 23 12:50:41 PM PDT 24 139770059 ps
T190 /workspace/coverage/default/6.sram_ctrl_mem_walk.3050749630 May 23 12:49:49 PM PDT 24 May 23 12:49:56 PM PDT 24 155206722 ps
T191 /workspace/coverage/default/12.sram_ctrl_ram_cfg.4193299768 May 23 12:50:12 PM PDT 24 May 23 12:50:13 PM PDT 24 44653957 ps
T50 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.865865183 May 23 12:50:00 PM PDT 24 May 23 12:53:38 PM PDT 24 12662096551 ps
T192 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3195075424 May 23 12:52:47 PM PDT 24 May 23 12:58:35 PM PDT 24 15496952401 ps
T138 /workspace/coverage/default/38.sram_ctrl_lc_escalation.2345896981 May 23 12:52:23 PM PDT 24 May 23 12:52:32 PM PDT 24 561427555 ps
T193 /workspace/coverage/default/6.sram_ctrl_ram_cfg.734260827 May 23 12:49:51 PM PDT 24 May 23 12:49:54 PM PDT 24 52684575 ps
T51 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.271935670 May 23 12:52:10 PM PDT 24 May 23 12:54:17 PM PDT 24 2319799072 ps
T194 /workspace/coverage/default/30.sram_ctrl_smoke.3361377463 May 23 12:51:32 PM PDT 24 May 23 12:51:37 PM PDT 24 657193671 ps
T195 /workspace/coverage/default/13.sram_ctrl_max_throughput.518828289 May 23 12:50:16 PM PDT 24 May 23 12:51:19 PM PDT 24 206090397 ps
T52 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1188959807 May 23 12:53:03 PM PDT 24 May 23 12:53:32 PM PDT 24 3517345787 ps
T196 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3904662923 May 23 12:49:42 PM PDT 24 May 23 12:49:57 PM PDT 24 76531504 ps
T197 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.2395063237 May 23 12:52:29 PM PDT 24 May 23 12:58:16 PM PDT 24 7653106610 ps
T198 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1725565878 May 23 12:50:15 PM PDT 24 May 23 12:50:41 PM PDT 24 485404821 ps
T119 /workspace/coverage/default/19.sram_ctrl_lc_escalation.4035409524 May 23 12:50:29 PM PDT 24 May 23 12:50:40 PM PDT 24 5207755767 ps
T199 /workspace/coverage/default/15.sram_ctrl_max_throughput.245137658 May 23 12:50:25 PM PDT 24 May 23 12:51:05 PM PDT 24 187891077 ps
T200 /workspace/coverage/default/28.sram_ctrl_smoke.2090632458 May 23 12:51:20 PM PDT 24 May 23 12:51:23 PM PDT 24 35275873 ps
T201 /workspace/coverage/default/30.sram_ctrl_multiple_keys.3274769509 May 23 12:51:34 PM PDT 24 May 23 01:03:55 PM PDT 24 6421367802 ps
T202 /workspace/coverage/default/49.sram_ctrl_regwen.2077676553 May 23 12:53:33 PM PDT 24 May 23 01:08:02 PM PDT 24 22938183522 ps
T203 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1915367375 May 23 12:52:24 PM PDT 24 May 23 01:03:42 PM PDT 24 41355552185 ps
T204 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.4251657104 May 23 12:52:48 PM PDT 24 May 23 12:56:01 PM PDT 24 2897674115 ps
T205 /workspace/coverage/default/42.sram_ctrl_regwen.3775929091 May 23 12:52:39 PM PDT 24 May 23 01:11:24 PM PDT 24 77336358849 ps
T206 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.2242153313 May 23 12:51:42 PM PDT 24 May 23 12:51:48 PM PDT 24 127149873 ps
T207 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4117631364 May 23 12:49:30 PM PDT 24 May 23 12:50:26 PM PDT 24 444577061 ps
T208 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.529202034 May 23 12:53:05 PM PDT 24 May 23 12:53:09 PM PDT 24 158802908 ps
T209 /workspace/coverage/default/44.sram_ctrl_max_throughput.1596898168 May 23 12:52:48 PM PDT 24 May 23 12:52:56 PM PDT 24 59122733 ps
T210 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.2002479629 May 23 12:49:28 PM PDT 24 May 23 12:54:46 PM PDT 24 3418706193 ps
T211 /workspace/coverage/default/26.sram_ctrl_lc_escalation.1002171054 May 23 12:51:21 PM PDT 24 May 23 12:51:30 PM PDT 24 1966419588 ps
T212 /workspace/coverage/default/41.sram_ctrl_stress_all.750894728 May 23 12:52:37 PM PDT 24 May 23 01:23:39 PM PDT 24 17645227156 ps
T213 /workspace/coverage/default/5.sram_ctrl_partial_access.4291272359 May 23 12:49:42 PM PDT 24 May 23 12:50:05 PM PDT 24 1177900909 ps
T214 /workspace/coverage/default/48.sram_ctrl_stress_all.250603164 May 23 12:53:32 PM PDT 24 May 23 01:19:49 PM PDT 24 14148737401 ps
T215 /workspace/coverage/default/32.sram_ctrl_regwen.167567523 May 23 12:51:49 PM PDT 24 May 23 01:18:24 PM PDT 24 15400004264 ps
T216 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2680464500 May 23 12:51:21 PM PDT 24 May 23 12:52:04 PM PDT 24 1253125986 ps
T217 /workspace/coverage/default/41.sram_ctrl_smoke.2139038946 May 23 12:52:36 PM PDT 24 May 23 12:52:40 PM PDT 24 698797092 ps
T218 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.810952080 May 23 12:51:09 PM PDT 24 May 23 12:59:59 PM PDT 24 6286390538 ps
T219 /workspace/coverage/default/2.sram_ctrl_mem_walk.2507706020 May 23 12:49:37 PM PDT 24 May 23 12:49:43 PM PDT 24 1717801338 ps
T220 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.4293586707 May 23 12:50:44 PM PDT 24 May 23 01:09:30 PM PDT 24 51102665608 ps
T221 /workspace/coverage/default/13.sram_ctrl_bijection.4003801012 May 23 12:50:15 PM PDT 24 May 23 12:50:55 PM PDT 24 1078943213 ps
T222 /workspace/coverage/default/47.sram_ctrl_stress_all.3184866945 May 23 12:53:21 PM PDT 24 May 23 02:15:58 PM PDT 24 11379681563 ps
T223 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.826321524 May 23 12:51:56 PM PDT 24 May 23 01:01:38 PM PDT 24 11927572106 ps
T224 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3149682884 May 23 12:52:49 PM PDT 24 May 23 12:52:55 PM PDT 24 72178349 ps
T225 /workspace/coverage/default/30.sram_ctrl_max_throughput.2091744017 May 23 12:51:32 PM PDT 24 May 23 12:54:00 PM PDT 24 143833587 ps
T226 /workspace/coverage/default/2.sram_ctrl_smoke.3232159906 May 23 12:49:43 PM PDT 24 May 23 12:50:30 PM PDT 24 542605129 ps
T227 /workspace/coverage/default/25.sram_ctrl_partial_access.2859204930 May 23 12:51:07 PM PDT 24 May 23 12:51:21 PM PDT 24 2846753942 ps
T228 /workspace/coverage/default/45.sram_ctrl_stress_all.2097659090 May 23 12:53:07 PM PDT 24 May 23 01:45:01 PM PDT 24 46786563615 ps
T229 /workspace/coverage/default/49.sram_ctrl_alert_test.2497270842 May 23 12:53:34 PM PDT 24 May 23 12:53:38 PM PDT 24 27778379 ps
T230 /workspace/coverage/default/21.sram_ctrl_max_throughput.2000961702 May 23 12:50:40 PM PDT 24 May 23 12:51:07 PM PDT 24 808758696 ps
T231 /workspace/coverage/default/23.sram_ctrl_ram_cfg.2134552070 May 23 12:50:53 PM PDT 24 May 23 12:50:56 PM PDT 24 51191990 ps
T232 /workspace/coverage/default/30.sram_ctrl_regwen.696824067 May 23 12:51:33 PM PDT 24 May 23 01:16:21 PM PDT 24 151742229132 ps
T233 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.3493517343 May 23 12:51:33 PM PDT 24 May 23 12:51:39 PM PDT 24 372331449 ps
T234 /workspace/coverage/default/42.sram_ctrl_max_throughput.3973165279 May 23 12:52:40 PM PDT 24 May 23 12:54:16 PM PDT 24 806309294 ps
T235 /workspace/coverage/default/33.sram_ctrl_mem_walk.373491534 May 23 12:51:49 PM PDT 24 May 23 12:52:00 PM PDT 24 1836583784 ps
T28 /workspace/coverage/default/48.sram_ctrl_lc_escalation.594915196 May 23 12:53:33 PM PDT 24 May 23 12:53:37 PM PDT 24 57376109 ps
T236 /workspace/coverage/default/25.sram_ctrl_multiple_keys.2425817741 May 23 12:51:09 PM PDT 24 May 23 12:59:51 PM PDT 24 24945480835 ps
T237 /workspace/coverage/default/16.sram_ctrl_partial_access.312378624 May 23 12:50:29 PM PDT 24 May 23 12:50:40 PM PDT 24 694819339 ps
T238 /workspace/coverage/default/26.sram_ctrl_partial_access.195035105 May 23 12:51:19 PM PDT 24 May 23 12:52:25 PM PDT 24 935953609 ps
T239 /workspace/coverage/default/44.sram_ctrl_smoke.3578015207 May 23 12:52:49 PM PDT 24 May 23 12:53:08 PM PDT 24 1076668608 ps
T240 /workspace/coverage/default/0.sram_ctrl_bijection.1585938038 May 23 12:49:28 PM PDT 24 May 23 12:50:25 PM PDT 24 3765597716 ps
T53 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3922784945 May 23 12:52:25 PM PDT 24 May 23 12:54:36 PM PDT 24 848354924 ps
T241 /workspace/coverage/default/26.sram_ctrl_stress_all.2056657194 May 23 12:51:21 PM PDT 24 May 23 01:54:15 PM PDT 24 54955751972 ps
T242 /workspace/coverage/default/46.sram_ctrl_max_throughput.1642871568 May 23 12:53:08 PM PDT 24 May 23 12:53:12 PM PDT 24 39314428 ps
T243 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2545214137 May 23 12:50:49 PM PDT 24 May 23 12:54:40 PM PDT 24 38254269138 ps
T244 /workspace/coverage/default/6.sram_ctrl_regwen.382417819 May 23 12:49:51 PM PDT 24 May 23 12:53:08 PM PDT 24 5377462277 ps
T245 /workspace/coverage/default/39.sram_ctrl_max_throughput.2242368707 May 23 12:52:23 PM PDT 24 May 23 12:52:57 PM PDT 24 157670963 ps
T246 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2711339929 May 23 12:51:35 PM PDT 24 May 23 12:51:40 PM PDT 24 146062092 ps
T247 /workspace/coverage/default/41.sram_ctrl_mem_walk.3944674395 May 23 12:52:37 PM PDT 24 May 23 12:52:48 PM PDT 24 2701035198 ps
T54 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2270219047 May 23 12:51:35 PM PDT 24 May 23 12:55:54 PM PDT 24 2047250698 ps
T248 /workspace/coverage/default/39.sram_ctrl_ram_cfg.1599665834 May 23 12:52:26 PM PDT 24 May 23 12:52:29 PM PDT 24 31135761 ps
T249 /workspace/coverage/default/4.sram_ctrl_alert_test.3225519932 May 23 12:49:40 PM PDT 24 May 23 12:49:41 PM PDT 24 13812184 ps
T250 /workspace/coverage/default/4.sram_ctrl_mem_walk.1730215473 May 23 12:49:42 PM PDT 24 May 23 12:49:52 PM PDT 24 143335625 ps
T251 /workspace/coverage/default/22.sram_ctrl_partial_access.696426740 May 23 12:50:39 PM PDT 24 May 23 12:50:43 PM PDT 24 184107121 ps
T252 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1070511662 May 23 12:53:18 PM PDT 24 May 23 12:55:12 PM PDT 24 1481463710 ps
T253 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2753259222 May 23 12:50:30 PM PDT 24 May 23 12:50:34 PM PDT 24 131045128 ps
T254 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.470637543 May 23 12:49:41 PM PDT 24 May 23 12:55:52 PM PDT 24 889974787 ps
T29 /workspace/coverage/default/25.sram_ctrl_lc_escalation.230362599 May 23 12:51:09 PM PDT 24 May 23 12:51:17 PM PDT 24 1815362983 ps
T255 /workspace/coverage/default/10.sram_ctrl_alert_test.3543976466 May 23 12:50:05 PM PDT 24 May 23 12:50:08 PM PDT 24 25785231 ps
T256 /workspace/coverage/default/35.sram_ctrl_mem_walk.3388934157 May 23 12:51:56 PM PDT 24 May 23 12:52:08 PM PDT 24 724402983 ps
T257 /workspace/coverage/default/36.sram_ctrl_lc_escalation.3550836589 May 23 12:52:09 PM PDT 24 May 23 12:52:13 PM PDT 24 995582790 ps
T258 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3340562884 May 23 12:50:14 PM PDT 24 May 23 12:56:30 PM PDT 24 2994321603 ps
T259 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1129919373 May 23 12:49:50 PM PDT 24 May 23 12:49:58 PM PDT 24 230453498 ps
T260 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3524537775 May 23 12:52:38 PM PDT 24 May 23 12:52:54 PM PDT 24 86576728 ps
T261 /workspace/coverage/default/5.sram_ctrl_ram_cfg.1624618713 May 23 12:49:48 PM PDT 24 May 23 12:49:51 PM PDT 24 28298489 ps
T262 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3919914658 May 23 12:51:07 PM PDT 24 May 23 12:51:20 PM PDT 24 628609873 ps
T263 /workspace/coverage/default/39.sram_ctrl_executable.3380613202 May 23 12:52:24 PM PDT 24 May 23 01:10:21 PM PDT 24 16401173219 ps
T264 /workspace/coverage/default/27.sram_ctrl_stress_all.543154782 May 23 12:51:22 PM PDT 24 May 23 02:04:08 PM PDT 24 27505029529 ps
T265 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2154971299 May 23 12:53:04 PM PDT 24 May 23 12:56:52 PM PDT 24 3272874271 ps
T266 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2960232356 May 23 12:50:03 PM PDT 24 May 23 12:50:09 PM PDT 24 346166163 ps
T267 /workspace/coverage/default/11.sram_ctrl_smoke.1745867193 May 23 12:50:09 PM PDT 24 May 23 12:50:38 PM PDT 24 680692268 ps
T268 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3649941370 May 23 12:50:02 PM PDT 24 May 23 12:50:40 PM PDT 24 844000704 ps
T269 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.2947319073 May 23 12:51:33 PM PDT 24 May 23 01:07:05 PM PDT 24 2924113527 ps
T270 /workspace/coverage/default/3.sram_ctrl_max_throughput.4174181616 May 23 12:49:35 PM PDT 24 May 23 12:49:37 PM PDT 24 33545803 ps
T271 /workspace/coverage/default/24.sram_ctrl_partial_access.3749455081 May 23 12:50:55 PM PDT 24 May 23 12:51:53 PM PDT 24 2044500190 ps
T272 /workspace/coverage/default/14.sram_ctrl_smoke.2989896379 May 23 12:50:24 PM PDT 24 May 23 12:50:31 PM PDT 24 622843014 ps
T273 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3633216203 May 23 12:49:34 PM PDT 24 May 23 12:53:03 PM PDT 24 2252495571 ps
T274 /workspace/coverage/default/39.sram_ctrl_stress_all.3515615020 May 23 12:52:26 PM PDT 24 May 23 01:06:15 PM PDT 24 4987101607 ps
T275 /workspace/coverage/default/9.sram_ctrl_mem_walk.1356705326 May 23 12:50:03 PM PDT 24 May 23 12:50:12 PM PDT 24 297604313 ps
T276 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.4209497985 May 23 12:49:36 PM PDT 24 May 23 12:53:19 PM PDT 24 1801071522 ps
T277 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1142827243 May 23 12:50:16 PM PDT 24 May 23 12:51:51 PM PDT 24 946710936 ps
T278 /workspace/coverage/default/28.sram_ctrl_regwen.3633840941 May 23 12:51:33 PM PDT 24 May 23 01:01:56 PM PDT 24 46825510529 ps
T279 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1245505207 May 23 12:50:30 PM PDT 24 May 23 12:53:52 PM PDT 24 4863813762 ps
T280 /workspace/coverage/default/17.sram_ctrl_smoke.1732482583 May 23 12:50:26 PM PDT 24 May 23 12:50:40 PM PDT 24 668334094 ps
T30 /workspace/coverage/default/31.sram_ctrl_lc_escalation.2108413845 May 23 12:51:36 PM PDT 24 May 23 12:51:44 PM PDT 24 747441143 ps
T281 /workspace/coverage/default/32.sram_ctrl_executable.1303604215 May 23 12:51:47 PM PDT 24 May 23 01:07:51 PM PDT 24 164329510277 ps
T282 /workspace/coverage/default/8.sram_ctrl_bijection.4146733766 May 23 12:50:03 PM PDT 24 May 23 12:50:26 PM PDT 24 668504727 ps
T283 /workspace/coverage/default/27.sram_ctrl_executable.1415168003 May 23 12:51:22 PM PDT 24 May 23 01:13:28 PM PDT 24 13709252265 ps
T284 /workspace/coverage/default/44.sram_ctrl_multiple_keys.2708004167 May 23 12:52:48 PM PDT 24 May 23 01:17:49 PM PDT 24 6325661193 ps
T285 /workspace/coverage/default/25.sram_ctrl_max_throughput.3399362221 May 23 12:51:07 PM PDT 24 May 23 12:51:45 PM PDT 24 125383125 ps
T286 /workspace/coverage/default/25.sram_ctrl_mem_walk.2119384320 May 23 12:51:07 PM PDT 24 May 23 12:51:14 PM PDT 24 1947585349 ps
T287 /workspace/coverage/default/2.sram_ctrl_regwen.2989254017 May 23 12:49:36 PM PDT 24 May 23 12:58:30 PM PDT 24 1793552295 ps
T288 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1098536698 May 23 12:49:52 PM PDT 24 May 23 12:49:56 PM PDT 24 208084674 ps
T289 /workspace/coverage/default/6.sram_ctrl_lc_escalation.2772972119 May 23 12:49:49 PM PDT 24 May 23 12:49:53 PM PDT 24 365536943 ps
T290 /workspace/coverage/default/19.sram_ctrl_mem_walk.825069492 May 23 12:50:26 PM PDT 24 May 23 12:50:33 PM PDT 24 597026666 ps
T291 /workspace/coverage/default/28.sram_ctrl_alert_test.349112446 May 23 12:51:31 PM PDT 24 May 23 12:51:33 PM PDT 24 13580121 ps
T292 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.3971483690 May 23 12:50:05 PM PDT 24 May 23 01:02:27 PM PDT 24 14090136740 ps
T293 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.913358328 May 23 12:51:56 PM PDT 24 May 23 12:52:02 PM PDT 24 613701508 ps
T294 /workspace/coverage/default/21.sram_ctrl_smoke.930762517 May 23 12:50:38 PM PDT 24 May 23 12:51:24 PM PDT 24 5490980093 ps
T295 /workspace/coverage/default/29.sram_ctrl_partial_access.2246582296 May 23 12:51:35 PM PDT 24 May 23 12:51:49 PM PDT 24 545950138 ps
T296 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2372554510 May 23 12:50:25 PM PDT 24 May 23 12:51:11 PM PDT 24 389522860 ps
T297 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.933146976 May 23 12:49:52 PM PDT 24 May 23 12:53:50 PM PDT 24 10430265797 ps
T298 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3227514637 May 23 12:52:27 PM PDT 24 May 23 12:54:51 PM PDT 24 155259223 ps
T299 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.4136548317 May 23 12:51:20 PM PDT 24 May 23 12:51:25 PM PDT 24 43677712 ps
T104 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3017679798 May 23 12:49:47 PM PDT 24 May 23 12:52:06 PM PDT 24 819248627 ps
T300 /workspace/coverage/default/8.sram_ctrl_ram_cfg.2349227019 May 23 12:50:01 PM PDT 24 May 23 12:50:03 PM PDT 24 29430698 ps
T301 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.537719758 May 23 12:49:50 PM PDT 24 May 23 12:55:47 PM PDT 24 2349724843 ps
T302 /workspace/coverage/default/45.sram_ctrl_alert_test.2835798664 May 23 12:53:04 PM PDT 24 May 23 12:53:06 PM PDT 24 11994530 ps
T303 /workspace/coverage/default/20.sram_ctrl_smoke.90579844 May 23 12:50:37 PM PDT 24 May 23 12:50:53 PM PDT 24 3720979108 ps
T304 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2273744921 May 23 12:52:39 PM PDT 24 May 23 12:56:06 PM PDT 24 132096594705 ps
T305 /workspace/coverage/default/32.sram_ctrl_alert_test.3939791733 May 23 12:51:52 PM PDT 24 May 23 12:51:54 PM PDT 24 16741661 ps
T306 /workspace/coverage/default/44.sram_ctrl_ram_cfg.2985718796 May 23 12:53:02 PM PDT 24 May 23 12:53:04 PM PDT 24 27401789 ps
T307 /workspace/coverage/default/8.sram_ctrl_alert_test.904993149 May 23 12:50:02 PM PDT 24 May 23 12:50:05 PM PDT 24 56849445 ps
T308 /workspace/coverage/default/22.sram_ctrl_mem_walk.1186099215 May 23 12:50:58 PM PDT 24 May 23 12:51:10 PM PDT 24 1307383735 ps
T309 /workspace/coverage/default/43.sram_ctrl_alert_test.2724211785 May 23 12:52:50 PM PDT 24 May 23 12:52:52 PM PDT 24 30915307 ps
T310 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.30036927 May 23 12:52:37 PM PDT 24 May 23 01:00:42 PM PDT 24 1719388106 ps
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