Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.33 98.99 92.48 99.31 100.00 95.26 98.38 96.89


Total tests in report: 1022
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
83.20 83.20 96.13 96.13 82.46 82.46 94.94 94.94 71.43 71.43 87.74 87.74 94.27 94.27 55.39 55.39 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3897263609
87.27 4.07 97.31 1.18 84.12 1.66 96.67 1.73 90.48 19.05 90.62 2.88 95.74 1.47 55.94 0.55 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3596639349
90.63 3.36 97.56 0.25 84.12 0.00 96.67 0.00 90.48 0.00 90.87 0.24 95.74 0.00 78.98 23.03 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3107296182
93.59 2.96 98.74 1.18 87.32 3.20 97.09 0.42 100.00 9.52 93.99 3.12 95.89 0.15 82.08 3.11 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3051627486
94.52 0.93 98.91 0.17 88.15 0.83 97.30 0.21 100.00 0.00 94.71 0.72 95.89 0.00 86.65 4.57 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2214883855
95.22 0.71 98.91 0.00 88.51 0.36 97.33 0.03 100.00 0.00 94.95 0.24 96.18 0.29 90.68 4.02 /workspace/coverage/default/8.sram_ctrl_regwen.1694793016
95.61 0.39 98.91 0.00 88.51 0.00 97.33 0.00 100.00 0.00 94.95 0.00 96.33 0.15 93.24 2.56 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.29236279
95.80 0.19 98.91 0.00 88.63 0.12 97.33 0.00 100.00 0.00 95.43 0.48 97.06 0.73 93.24 0.00 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3293845403
95.99 0.19 98.91 0.00 88.98 0.36 97.75 0.42 100.00 0.00 95.43 0.00 97.06 0.00 93.78 0.55 /workspace/coverage/default/12.sram_ctrl_alert_test.4181499017
96.17 0.18 98.91 0.00 88.98 0.00 97.82 0.07 100.00 0.00 95.43 0.00 98.24 1.17 93.78 0.00 /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2621881275
96.32 0.16 98.91 0.00 88.98 0.00 97.82 0.00 100.00 0.00 95.43 0.00 98.24 0.00 94.88 1.10 /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3039428410
96.48 0.16 98.91 0.00 88.98 0.00 97.82 0.00 100.00 0.00 95.43 0.00 98.24 0.00 95.98 1.10 /workspace/coverage/default/0.sram_ctrl_stress_all.960722669
96.61 0.13 98.99 0.08 88.98 0.00 98.65 0.83 100.00 0.00 95.43 0.00 98.24 0.00 95.98 0.00 /workspace/coverage/default/12.sram_ctrl_ram_cfg.2742324188
96.74 0.13 98.99 0.00 89.22 0.24 99.31 0.66 100.00 0.00 95.43 0.00 98.24 0.00 95.98 0.00 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3855175306
96.82 0.08 98.99 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.43 0.00 98.24 0.00 96.53 0.55 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2117771976
96.87 0.05 98.99 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.43 0.00 98.24 0.00 96.89 0.37 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3298312872
96.89 0.02 98.99 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.43 0.00 98.38 0.15 96.89 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3745432790


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3559153489
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3563012099
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.993963677
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3775691300
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2424561079
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3095633401
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.905889903
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.877188912
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1637989061
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3283310725
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3576419172
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2926756351
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3789506033
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1626501129
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.4126172927
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3854129896
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.798679880
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.4242090343
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3163409813
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.425954370
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3527623033
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2846802780
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3880386047
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1237346435
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3045844144
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1091534793
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3089362896
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.699329397
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3767765960
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1452178692
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1103925153
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.676638084
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2244164841
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1951035653
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3494082650
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1874896964
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4157147082
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.475254587
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2934586438
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.748678518
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4146115939
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3618070143
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1279580969
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.4290442274
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1905178438
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.508279170
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1528675656
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2433475751
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2585108699
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4034728415
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1308549948
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3641721797
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.179044799
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1809147451
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.491047214
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1597469445
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2369648246
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.4138133132
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3571933872
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.183115709
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.663721013
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1518510617
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2455508023
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1483885760
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1330918061
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.793263705
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1340063148
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1840829002
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.792090248
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.623324291
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2979183184
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.574123641
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.777924922
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.4021257069
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.12375906
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1264595885
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1804823478
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2292385219
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2149261774
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3996611655
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3342460223
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1895503223
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.358877858
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3352305408
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2367257097
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2489403477
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3313518982
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3349685245
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3180476785
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1088531858
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4041567522
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1046283272
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3471429208
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2920883744
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.4091926629
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.892934239
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2684363435
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.560949644
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2346201958
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2028604172
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2718519100
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.935291043
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.5426221
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.948226737
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.4144593372
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.636547546
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1820478080
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3183445996
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.610160800
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.149563722
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3160222307
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2181904908
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.4136986385
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3146094465
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.274610260
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.884681982
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.492628000
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3751955195
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3547884107
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2225191913
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2108383202
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1912912177
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4015151044
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2577982214
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3741634194
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1472875597
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1073325258
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2653609349
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1692220940
/workspace/coverage/default/0.sram_ctrl_alert_test.244402854
/workspace/coverage/default/0.sram_ctrl_bijection.3497504894
/workspace/coverage/default/0.sram_ctrl_executable.882433292
/workspace/coverage/default/0.sram_ctrl_lc_escalation.812912150
/workspace/coverage/default/0.sram_ctrl_max_throughput.2930681478
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2615721608
/workspace/coverage/default/0.sram_ctrl_mem_walk.854937295
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2920811060
/workspace/coverage/default/0.sram_ctrl_partial_access.3683027235
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2346962922
/workspace/coverage/default/0.sram_ctrl_ram_cfg.111522301
/workspace/coverage/default/0.sram_ctrl_regwen.3045744172
/workspace/coverage/default/0.sram_ctrl_smoke.2507887209
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1769458572
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.884384019
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3586597276
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3388812853
/workspace/coverage/default/1.sram_ctrl_alert_test.2935565908
/workspace/coverage/default/1.sram_ctrl_bijection.539425163
/workspace/coverage/default/1.sram_ctrl_executable.4148474670
/workspace/coverage/default/1.sram_ctrl_max_throughput.1168457081
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1651992714
/workspace/coverage/default/1.sram_ctrl_mem_walk.4768028
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3340845719
/workspace/coverage/default/1.sram_ctrl_partial_access.1420549183
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.184113342
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1668321576
/workspace/coverage/default/1.sram_ctrl_regwen.1513627327
/workspace/coverage/default/1.sram_ctrl_smoke.2911306144
/workspace/coverage/default/1.sram_ctrl_stress_all.2771595083
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2454868468
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3825075842
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1744992947
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3197978840
/workspace/coverage/default/10.sram_ctrl_alert_test.1537902054
/workspace/coverage/default/10.sram_ctrl_bijection.795778051
/workspace/coverage/default/10.sram_ctrl_executable.575918179
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3360209130
/workspace/coverage/default/10.sram_ctrl_max_throughput.3695746579
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3864845619
/workspace/coverage/default/10.sram_ctrl_mem_walk.2676249041
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3627901877
/workspace/coverage/default/10.sram_ctrl_partial_access.2381144473
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.787520809
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1005767520
/workspace/coverage/default/10.sram_ctrl_regwen.4139249104
/workspace/coverage/default/10.sram_ctrl_smoke.3636172517
/workspace/coverage/default/10.sram_ctrl_stress_all.1177945074
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3212961443
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.4098609018
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2994483044
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.528024490
/workspace/coverage/default/11.sram_ctrl_alert_test.4221743797
/workspace/coverage/default/11.sram_ctrl_bijection.3942504848
/workspace/coverage/default/11.sram_ctrl_executable.3330938700
/workspace/coverage/default/11.sram_ctrl_lc_escalation.199477249
/workspace/coverage/default/11.sram_ctrl_max_throughput.3787021288
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.52449402
/workspace/coverage/default/11.sram_ctrl_mem_walk.1677669425
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2827187763
/workspace/coverage/default/11.sram_ctrl_partial_access.3802732685
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.180858672
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2163216881
/workspace/coverage/default/11.sram_ctrl_regwen.134638460
/workspace/coverage/default/11.sram_ctrl_smoke.1821291487
/workspace/coverage/default/11.sram_ctrl_stress_all.1906187284
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2406017744
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2040910984
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2904532561
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3931891358
/workspace/coverage/default/12.sram_ctrl_bijection.1136919346
/workspace/coverage/default/12.sram_ctrl_executable.3867265347
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2470704985
/workspace/coverage/default/12.sram_ctrl_max_throughput.1888926029
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.687098529
/workspace/coverage/default/12.sram_ctrl_mem_walk.2490065013
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3457249451
/workspace/coverage/default/12.sram_ctrl_partial_access.2572332769
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.367123822
/workspace/coverage/default/12.sram_ctrl_regwen.1029806160
/workspace/coverage/default/12.sram_ctrl_smoke.2596614592
/workspace/coverage/default/12.sram_ctrl_stress_all.3630969199
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/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.238897312
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2630039178
/workspace/coverage/default/44.sram_ctrl_alert_test.1419845989
/workspace/coverage/default/44.sram_ctrl_bijection.3961242207
/workspace/coverage/default/44.sram_ctrl_executable.901402527
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2809946854
/workspace/coverage/default/44.sram_ctrl_max_throughput.2800808522
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3725797929
/workspace/coverage/default/44.sram_ctrl_mem_walk.1278074477
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2552413032
/workspace/coverage/default/44.sram_ctrl_partial_access.3347387806
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2661636054
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1017039293
/workspace/coverage/default/44.sram_ctrl_regwen.3047295139
/workspace/coverage/default/44.sram_ctrl_smoke.2615970475
/workspace/coverage/default/44.sram_ctrl_stress_all.166197711
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.704288554
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1237909629
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2078334829
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2281894339
/workspace/coverage/default/45.sram_ctrl_alert_test.3817852243
/workspace/coverage/default/45.sram_ctrl_bijection.1728127450
/workspace/coverage/default/45.sram_ctrl_executable.3675590037
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1712132863
/workspace/coverage/default/45.sram_ctrl_max_throughput.2852367059
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1191724986
/workspace/coverage/default/45.sram_ctrl_mem_walk.483602573
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4106066976
/workspace/coverage/default/45.sram_ctrl_partial_access.3526624268
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2907775481
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2749533612
/workspace/coverage/default/45.sram_ctrl_regwen.1698002521
/workspace/coverage/default/45.sram_ctrl_smoke.3485513538
/workspace/coverage/default/45.sram_ctrl_stress_all.134421099
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.194240754
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2559937388
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3541173082
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3366898378
/workspace/coverage/default/46.sram_ctrl_alert_test.267696971
/workspace/coverage/default/46.sram_ctrl_bijection.3621450625
/workspace/coverage/default/46.sram_ctrl_executable.70166921
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1771007808
/workspace/coverage/default/46.sram_ctrl_max_throughput.2096348495
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1785447248
/workspace/coverage/default/46.sram_ctrl_mem_walk.1287723756
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1867889730
/workspace/coverage/default/46.sram_ctrl_partial_access.3678720859
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4166132947
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3384430345
/workspace/coverage/default/46.sram_ctrl_regwen.3445446130
/workspace/coverage/default/46.sram_ctrl_smoke.3516686091
/workspace/coverage/default/46.sram_ctrl_stress_all.3474361421
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3044175674
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2379882320
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1927587702
/workspace/coverage/default/47.sram_ctrl_alert_test.957404222
/workspace/coverage/default/47.sram_ctrl_bijection.936268428
/workspace/coverage/default/47.sram_ctrl_executable.1017821566
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1163582444
/workspace/coverage/default/47.sram_ctrl_max_throughput.2700221807
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3705713978
/workspace/coverage/default/47.sram_ctrl_mem_walk.3238550503
/workspace/coverage/default/47.sram_ctrl_multiple_keys.537711451
/workspace/coverage/default/47.sram_ctrl_partial_access.2077165296
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2318060515
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3822678623
/workspace/coverage/default/47.sram_ctrl_regwen.850541755
/workspace/coverage/default/47.sram_ctrl_smoke.3915801036
/workspace/coverage/default/47.sram_ctrl_stress_all.3320426118
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.204048585
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.189322823
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3358628836
/workspace/coverage/default/48.sram_ctrl_alert_test.387058448
/workspace/coverage/default/48.sram_ctrl_bijection.4089047465
/workspace/coverage/default/48.sram_ctrl_executable.3426711475
/workspace/coverage/default/48.sram_ctrl_lc_escalation.149427901
/workspace/coverage/default/48.sram_ctrl_max_throughput.971812324
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2180633822
/workspace/coverage/default/48.sram_ctrl_mem_walk.1962217363
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3914628388
/workspace/coverage/default/48.sram_ctrl_partial_access.2557754962
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1130741401
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1968314298
/workspace/coverage/default/48.sram_ctrl_regwen.756075011
/workspace/coverage/default/48.sram_ctrl_smoke.1286893200
/workspace/coverage/default/48.sram_ctrl_stress_all.15588101
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.337794099
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.1143853093
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1284592616
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2656801420
/workspace/coverage/default/49.sram_ctrl_alert_test.3000145456
/workspace/coverage/default/49.sram_ctrl_bijection.358666369
/workspace/coverage/default/49.sram_ctrl_executable.1567843517
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3067777403
/workspace/coverage/default/49.sram_ctrl_max_throughput.125977219
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4147698913
/workspace/coverage/default/49.sram_ctrl_mem_walk.4010061880
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1028701910
/workspace/coverage/default/49.sram_ctrl_partial_access.3687561966
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1168188418
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3703570937
/workspace/coverage/default/49.sram_ctrl_regwen.3014407460
/workspace/coverage/default/49.sram_ctrl_smoke.1987159075
/workspace/coverage/default/49.sram_ctrl_stress_all.2876784154
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1696936587
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.356109912
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1799461790
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3534360502
/workspace/coverage/default/5.sram_ctrl_alert_test.283232788
/workspace/coverage/default/5.sram_ctrl_bijection.2711025766
/workspace/coverage/default/5.sram_ctrl_executable.3169459384
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2760405902
/workspace/coverage/default/5.sram_ctrl_max_throughput.373843524
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3929184584
/workspace/coverage/default/5.sram_ctrl_mem_walk.1429197633
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4180567880
/workspace/coverage/default/5.sram_ctrl_partial_access.3731101120
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.178480512
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3152542620
/workspace/coverage/default/5.sram_ctrl_regwen.3219792848
/workspace/coverage/default/5.sram_ctrl_smoke.3522468259
/workspace/coverage/default/5.sram_ctrl_stress_all.2187020653
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1255345189
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2911329767
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1196745901
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1206321218
/workspace/coverage/default/6.sram_ctrl_alert_test.1029979797
/workspace/coverage/default/6.sram_ctrl_bijection.3146676815
/workspace/coverage/default/6.sram_ctrl_executable.2386884498
/workspace/coverage/default/6.sram_ctrl_lc_escalation.313025881
/workspace/coverage/default/6.sram_ctrl_max_throughput.390627306
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.167281745
/workspace/coverage/default/6.sram_ctrl_mem_walk.4088098307
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2837275561
/workspace/coverage/default/6.sram_ctrl_partial_access.2475058335
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.306501650
/workspace/coverage/default/6.sram_ctrl_ram_cfg.7438476
/workspace/coverage/default/6.sram_ctrl_regwen.2467347407
/workspace/coverage/default/6.sram_ctrl_smoke.2155893013
/workspace/coverage/default/6.sram_ctrl_stress_all.4197713033
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1819604227
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.29814380
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2765598255
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3000650722
/workspace/coverage/default/7.sram_ctrl_alert_test.2573692501
/workspace/coverage/default/7.sram_ctrl_bijection.3944337948
/workspace/coverage/default/7.sram_ctrl_executable.4211041955
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1146357379
/workspace/coverage/default/7.sram_ctrl_max_throughput.227924402
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.155148170
/workspace/coverage/default/7.sram_ctrl_mem_walk.1913908235
/workspace/coverage/default/7.sram_ctrl_multiple_keys.4132467152
/workspace/coverage/default/7.sram_ctrl_partial_access.3115895871
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4163758741
/workspace/coverage/default/7.sram_ctrl_ram_cfg.248846433
/workspace/coverage/default/7.sram_ctrl_regwen.3582717601
/workspace/coverage/default/7.sram_ctrl_smoke.3335637948
/workspace/coverage/default/7.sram_ctrl_stress_all.3883481923
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3595943911
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4286768256
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3578116787
/workspace/coverage/default/8.sram_ctrl_alert_test.3004572754
/workspace/coverage/default/8.sram_ctrl_bijection.649169104
/workspace/coverage/default/8.sram_ctrl_executable.26274307
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3157801519
/workspace/coverage/default/8.sram_ctrl_max_throughput.2491336470
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3279937520
/workspace/coverage/default/8.sram_ctrl_mem_walk.3595418242
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3532208704
/workspace/coverage/default/8.sram_ctrl_partial_access.480044641
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2317827314
/workspace/coverage/default/8.sram_ctrl_ram_cfg.266830654
/workspace/coverage/default/8.sram_ctrl_smoke.2528503768
/workspace/coverage/default/8.sram_ctrl_stress_all.2775694750
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1462255138
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2767745641
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.176021763
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2422158800
/workspace/coverage/default/9.sram_ctrl_alert_test.1759424107
/workspace/coverage/default/9.sram_ctrl_bijection.2712231933
/workspace/coverage/default/9.sram_ctrl_executable.3198800288
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2940012427
/workspace/coverage/default/9.sram_ctrl_max_throughput.3574840514
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.77330934
/workspace/coverage/default/9.sram_ctrl_mem_walk.487099218
/workspace/coverage/default/9.sram_ctrl_multiple_keys.10040371
/workspace/coverage/default/9.sram_ctrl_partial_access.2320024017
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.379938320
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3145161352
/workspace/coverage/default/9.sram_ctrl_regwen.642259800
/workspace/coverage/default/9.sram_ctrl_smoke.3889770300
/workspace/coverage/default/9.sram_ctrl_stress_all.262923213
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2920210410
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.23263638
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2581451676




Total test records in report: 1022
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.1237909629 Jun 10 06:20:17 PM PDT 24 Jun 10 06:25:41 PM PDT 24 3317152901 ps
T2 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3596639349 Jun 10 06:19:17 PM PDT 24 Jun 10 06:19:20 PM PDT 24 392034003 ps
T3 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3897263609 Jun 10 06:17:36 PM PDT 24 Jun 10 06:22:10 PM PDT 24 1726467927 ps
T4 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3855175306 Jun 10 06:21:00 PM PDT 24 Jun 10 06:21:31 PM PDT 24 1687213697 ps
T9 /workspace/coverage/default/8.sram_ctrl_regwen.1694793016 Jun 10 06:10:29 PM PDT 24 Jun 10 06:34:13 PM PDT 24 196247789985 ps
T10 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.68087052 Jun 10 06:17:02 PM PDT 24 Jun 10 06:19:25 PM PDT 24 5692739367 ps
T11 /workspace/coverage/default/22.sram_ctrl_partial_access.255893797 Jun 10 06:14:25 PM PDT 24 Jun 10 06:16:04 PM PDT 24 6334360915 ps
T12 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.3693756551 Jun 10 06:12:30 PM PDT 24 Jun 10 06:18:54 PM PDT 24 7393847353 ps
T13 /workspace/coverage/default/25.sram_ctrl_smoke.1838045265 Jun 10 06:15:11 PM PDT 24 Jun 10 06:15:25 PM PDT 24 325383353 ps
T14 /workspace/coverage/default/32.sram_ctrl_regwen.980950724 Jun 10 06:17:11 PM PDT 24 Jun 10 06:26:43 PM PDT 24 11240443843 ps
T27 /workspace/coverage/default/28.sram_ctrl_executable.3850445662 Jun 10 06:16:04 PM PDT 24 Jun 10 06:24:24 PM PDT 24 10370527437 ps
T53 /workspace/coverage/default/38.sram_ctrl_executable.2198111490 Jun 10 06:19:00 PM PDT 24 Jun 10 06:28:10 PM PDT 24 14441519710 ps
T36 /workspace/coverage/default/25.sram_ctrl_mem_walk.3122853154 Jun 10 06:15:24 PM PDT 24 Jun 10 06:15:31 PM PDT 24 494067595 ps
T58 /workspace/coverage/default/30.sram_ctrl_smoke.3451907329 Jun 10 06:16:25 PM PDT 24 Jun 10 06:17:16 PM PDT 24 423406826 ps
T68 /workspace/coverage/default/40.sram_ctrl_smoke.1799671913 Jun 10 06:19:26 PM PDT 24 Jun 10 06:19:45 PM PDT 24 543895771 ps
T20 /workspace/coverage/default/5.sram_ctrl_bijection.2711025766 Jun 10 06:09:20 PM PDT 24 Jun 10 06:09:50 PM PDT 24 1376913696 ps
T69 /workspace/coverage/default/10.sram_ctrl_multiple_keys.3627901877 Jun 10 06:10:56 PM PDT 24 Jun 10 06:12:15 PM PDT 24 625645258 ps
T91 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.3994979204 Jun 10 06:14:16 PM PDT 24 Jun 10 06:18:03 PM PDT 24 12248048912 ps
T21 /workspace/coverage/default/45.sram_ctrl_regwen.1698002521 Jun 10 06:20:42 PM PDT 24 Jun 10 06:20:45 PM PDT 24 49836627 ps
T15 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.170228378 Jun 10 06:12:35 PM PDT 24 Jun 10 06:14:48 PM PDT 24 6924853341 ps
T137 /workspace/coverage/default/28.sram_ctrl_smoke.1864190952 Jun 10 06:16:00 PM PDT 24 Jun 10 06:16:37 PM PDT 24 405568809 ps
T70 /workspace/coverage/default/32.sram_ctrl_smoke.2856067738 Jun 10 06:17:01 PM PDT 24 Jun 10 06:17:04 PM PDT 24 604417058 ps
T28 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.4049834881 Jun 10 06:13:19 PM PDT 24 Jun 10 06:18:57 PM PDT 24 2997518100 ps
T71 /workspace/coverage/default/16.sram_ctrl_multiple_keys.2268661672 Jun 10 06:12:55 PM PDT 24 Jun 10 06:29:43 PM PDT 24 11458235622 ps
T39 /workspace/coverage/default/28.sram_ctrl_mem_walk.1954688220 Jun 10 06:16:07 PM PDT 24 Jun 10 06:16:19 PM PDT 24 1826623221 ps
T5 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3051627486 Jun 10 06:16:39 PM PDT 24 Jun 10 06:16:43 PM PDT 24 462009972 ps
T38 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3107296182 Jun 10 06:08:47 PM PDT 24 Jun 10 06:17:23 PM PDT 24 781423478 ps
T8 /workspace/coverage/default/28.sram_ctrl_stress_all.4041463248 Jun 10 06:16:09 PM PDT 24 Jun 10 06:20:21 PM PDT 24 982927808 ps
T40 /workspace/coverage/default/4.sram_ctrl_mem_walk.1370500777 Jun 10 06:09:16 PM PDT 24 Jun 10 06:09:26 PM PDT 24 346410700 ps
T135 /workspace/coverage/default/37.sram_ctrl_multiple_keys.3994413116 Jun 10 06:18:39 PM PDT 24 Jun 10 06:37:03 PM PDT 24 103766765606 ps
T31 /workspace/coverage/default/41.sram_ctrl_executable.2614815497 Jun 10 06:19:42 PM PDT 24 Jun 10 06:24:55 PM PDT 24 33424934755 ps
T138 /workspace/coverage/default/18.sram_ctrl_partial_access.2926208497 Jun 10 06:13:28 PM PDT 24 Jun 10 06:14:21 PM PDT 24 206556228 ps
T22 /workspace/coverage/default/48.sram_ctrl_regwen.756075011 Jun 10 06:21:28 PM PDT 24 Jun 10 06:34:00 PM PDT 24 64020756319 ps
T37 /workspace/coverage/default/16.sram_ctrl_mem_walk.3668467135 Jun 10 06:13:09 PM PDT 24 Jun 10 06:13:22 PM PDT 24 1388067465 ps
T134 /workspace/coverage/default/9.sram_ctrl_bijection.2712231933 Jun 10 06:10:45 PM PDT 24 Jun 10 06:11:52 PM PDT 24 1086664984 ps
T6 /workspace/coverage/default/18.sram_ctrl_lc_escalation.605257397 Jun 10 06:13:36 PM PDT 24 Jun 10 06:13:41 PM PDT 24 561888842 ps
T139 /workspace/coverage/default/3.sram_ctrl_partial_access.2019518048 Jun 10 06:08:38 PM PDT 24 Jun 10 06:08:41 PM PDT 24 53202232 ps
T140 /workspace/coverage/default/5.sram_ctrl_executable.3169459384 Jun 10 06:09:24 PM PDT 24 Jun 10 06:09:41 PM PDT 24 1196693753 ps
T92 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.4005358750 Jun 10 06:08:37 PM PDT 24 Jun 10 06:11:12 PM PDT 24 6049314229 ps
T56 /workspace/coverage/default/42.sram_ctrl_regwen.2522399713 Jun 10 06:19:56 PM PDT 24 Jun 10 06:40:24 PM PDT 24 62028939613 ps
T29 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.2305059720 Jun 10 06:14:57 PM PDT 24 Jun 10 06:46:52 PM PDT 24 20387743873 ps
T93 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.29236279 Jun 10 06:18:31 PM PDT 24 Jun 10 06:23:43 PM PDT 24 26376279481 ps
T141 /workspace/coverage/default/18.sram_ctrl_bijection.44918277 Jun 10 06:13:29 PM PDT 24 Jun 10 06:14:43 PM PDT 24 14641903662 ps
T142 /workspace/coverage/default/37.sram_ctrl_smoke.3368213677 Jun 10 06:18:41 PM PDT 24 Jun 10 06:18:51 PM PDT 24 296553791 ps
T143 /workspace/coverage/default/36.sram_ctrl_bijection.65936661 Jun 10 06:18:24 PM PDT 24 Jun 10 06:19:20 PM PDT 24 5340368540 ps
T136 /workspace/coverage/default/48.sram_ctrl_max_throughput.971812324 Jun 10 06:21:21 PM PDT 24 Jun 10 06:23:58 PM PDT 24 1444284205 ps
T132 /workspace/coverage/default/45.sram_ctrl_bijection.1728127450 Jun 10 06:20:33 PM PDT 24 Jun 10 06:21:23 PM PDT 24 8505930411 ps
T144 /workspace/coverage/default/40.sram_ctrl_max_throughput.280634742 Jun 10 06:19:29 PM PDT 24 Jun 10 06:20:59 PM PDT 24 446238729 ps
T57 /workspace/coverage/default/21.sram_ctrl_regwen.3030575185 Jun 10 06:14:17 PM PDT 24 Jun 10 06:24:00 PM PDT 24 24642594018 ps
T145 /workspace/coverage/default/10.sram_ctrl_max_throughput.3695746579 Jun 10 06:11:00 PM PDT 24 Jun 10 06:12:48 PM PDT 24 528999621 ps
T7 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3298312872 Jun 10 06:07:56 PM PDT 24 Jun 10 06:08:03 PM PDT 24 1927230528 ps
T76 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.3851606383 Jun 10 06:18:37 PM PDT 24 Jun 10 06:18:43 PM PDT 24 656735435 ps
T127 /workspace/coverage/default/2.sram_ctrl_regwen.4290460278 Jun 10 06:08:21 PM PDT 24 Jun 10 06:26:02 PM PDT 24 13727413973 ps
T16 /workspace/coverage/default/30.sram_ctrl_alert_test.2740739364 Jun 10 06:16:42 PM PDT 24 Jun 10 06:16:43 PM PDT 24 15826925 ps
T113 /workspace/coverage/default/9.sram_ctrl_lc_escalation.2940012427 Jun 10 06:10:49 PM PDT 24 Jun 10 06:10:56 PM PDT 24 615951315 ps
T133 /workspace/coverage/default/36.sram_ctrl_stress_all.621277799 Jun 10 06:18:40 PM PDT 24 Jun 10 06:42:22 PM PDT 24 63690063817 ps
T146 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3783103992 Jun 10 06:16:48 PM PDT 24 Jun 10 06:18:23 PM PDT 24 272610780 ps
T147 /workspace/coverage/default/14.sram_ctrl_bijection.2607081686 Jun 10 06:12:20 PM PDT 24 Jun 10 06:13:30 PM PDT 24 4013129687 ps
T17 /workspace/coverage/default/32.sram_ctrl_alert_test.3216486314 Jun 10 06:17:17 PM PDT 24 Jun 10 06:17:18 PM PDT 24 46952464 ps
T126 /workspace/coverage/default/0.sram_ctrl_stress_all.960722669 Jun 10 06:07:41 PM PDT 24 Jun 10 07:32:26 PM PDT 24 266964311512 ps
T128 /workspace/coverage/default/22.sram_ctrl_regwen.843693356 Jun 10 06:14:28 PM PDT 24 Jun 10 06:33:41 PM PDT 24 103101135625 ps
T130 /workspace/coverage/default/22.sram_ctrl_multiple_keys.1233330289 Jun 10 06:14:21 PM PDT 24 Jun 10 06:26:11 PM PDT 24 129178224985 ps
T148 /workspace/coverage/default/23.sram_ctrl_partial_access.877204708 Jun 10 06:14:45 PM PDT 24 Jun 10 06:15:06 PM PDT 24 7690194488 ps
T18 /workspace/coverage/default/37.sram_ctrl_alert_test.3147716786 Jun 10 06:18:56 PM PDT 24 Jun 10 06:18:57 PM PDT 24 16299009 ps
T23 /workspace/coverage/default/35.sram_ctrl_lc_escalation.985083847 Jun 10 06:18:16 PM PDT 24 Jun 10 06:18:20 PM PDT 24 1316216381 ps
T94 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1168188418 Jun 10 06:21:39 PM PDT 24 Jun 10 06:29:02 PM PDT 24 64970577846 ps
T95 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.4163758741 Jun 10 06:10:06 PM PDT 24 Jun 10 06:17:59 PM PDT 24 145399717171 ps
T41 /workspace/coverage/default/5.sram_ctrl_mem_walk.1429197633 Jun 10 06:09:28 PM PDT 24 Jun 10 06:09:35 PM PDT 24 1828020944 ps
T149 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1680347919 Jun 10 06:19:11 PM PDT 24 Jun 10 06:30:49 PM PDT 24 9219501949 ps
T19 /workspace/coverage/default/31.sram_ctrl_alert_test.3391592555 Jun 10 06:17:03 PM PDT 24 Jun 10 06:17:04 PM PDT 24 42968756 ps
T150 /workspace/coverage/default/2.sram_ctrl_bijection.4041499578 Jun 10 06:08:13 PM PDT 24 Jun 10 06:08:40 PM PDT 24 412980596 ps
T30 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.575727548 Jun 10 06:13:46 PM PDT 24 Jun 10 06:28:19 PM PDT 24 13130000237 ps
T151 /workspace/coverage/default/14.sram_ctrl_executable.85801675 Jun 10 06:12:30 PM PDT 24 Jun 10 06:42:01 PM PDT 24 17838368961 ps
T42 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1696748158 Jun 10 06:20:02 PM PDT 24 Jun 10 06:23:33 PM PDT 24 6631156469 ps
T54 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2920210410 Jun 10 06:10:54 PM PDT 24 Jun 10 06:14:33 PM PDT 24 1276588925 ps
T104 /workspace/coverage/default/6.sram_ctrl_bijection.3146676815 Jun 10 06:09:34 PM PDT 24 Jun 10 06:10:55 PM PDT 24 5300741819 ps
T105 /workspace/coverage/default/47.sram_ctrl_executable.1017821566 Jun 10 06:21:15 PM PDT 24 Jun 10 06:31:22 PM PDT 24 24362771158 ps
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T107 /workspace/coverage/default/12.sram_ctrl_alert_test.4181499017 Jun 10 06:12:00 PM PDT 24 Jun 10 06:12:01 PM PDT 24 16604134 ps
T108 /workspace/coverage/default/25.sram_ctrl_executable.3856794257 Jun 10 06:15:21 PM PDT 24 Jun 10 06:16:11 PM PDT 24 8047783577 ps
T109 /workspace/coverage/default/1.sram_ctrl_bijection.539425163 Jun 10 06:07:44 PM PDT 24 Jun 10 06:08:50 PM PDT 24 18442990633 ps
T110 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.189322823 Jun 10 06:21:14 PM PDT 24 Jun 10 06:22:44 PM PDT 24 124654310 ps
T111 /workspace/coverage/default/46.sram_ctrl_multiple_keys.1867889730 Jun 10 06:20:51 PM PDT 24 Jun 10 06:32:53 PM PDT 24 20853893518 ps
T112 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2019065103 Jun 10 06:13:41 PM PDT 24 Jun 10 06:15:02 PM PDT 24 225727132 ps
T152 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3627651382 Jun 10 06:13:29 PM PDT 24 Jun 10 06:15:07 PM PDT 24 137645630 ps
T153 /workspace/coverage/default/39.sram_ctrl_lc_escalation.258016481 Jun 10 06:19:17 PM PDT 24 Jun 10 06:19:20 PM PDT 24 1101838035 ps
T154 /workspace/coverage/default/47.sram_ctrl_mem_walk.3238550503 Jun 10 06:21:17 PM PDT 24 Jun 10 06:21:24 PM PDT 24 241013286 ps
T155 /workspace/coverage/default/7.sram_ctrl_bijection.3944337948 Jun 10 06:09:58 PM PDT 24 Jun 10 06:10:40 PM PDT 24 2533757777 ps
T77 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2514563826 Jun 10 06:12:29 PM PDT 24 Jun 10 06:18:00 PM PDT 24 2059459734 ps
T156 /workspace/coverage/default/25.sram_ctrl_bijection.1415030402 Jun 10 06:15:21 PM PDT 24 Jun 10 06:16:05 PM PDT 24 1974987881 ps
T129 /workspace/coverage/default/39.sram_ctrl_regwen.2444570602 Jun 10 06:19:18 PM PDT 24 Jun 10 06:40:10 PM PDT 24 35190709208 ps
T157 /workspace/coverage/default/2.sram_ctrl_partial_access.160381180 Jun 10 06:08:11 PM PDT 24 Jun 10 06:08:15 PM PDT 24 249799988 ps
T96 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.4256613029 Jun 10 06:09:00 PM PDT 24 Jun 10 06:11:31 PM PDT 24 9314289778 ps
T158 /workspace/coverage/default/40.sram_ctrl_executable.370975166 Jun 10 06:19:31 PM PDT 24 Jun 10 06:29:18 PM PDT 24 3439779321 ps
T159 /workspace/coverage/default/18.sram_ctrl_executable.2916220741 Jun 10 06:13:36 PM PDT 24 Jun 10 06:30:58 PM PDT 24 8465449359 ps
T24 /workspace/coverage/default/39.sram_ctrl_ram_cfg.44157855 Jun 10 06:19:16 PM PDT 24 Jun 10 06:19:17 PM PDT 24 29029609 ps
T25 /workspace/coverage/default/46.sram_ctrl_ram_cfg.3384430345 Jun 10 06:21:05 PM PDT 24 Jun 10 06:21:07 PM PDT 24 29545936 ps
T78 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2388845306 Jun 10 06:20:13 PM PDT 24 Jun 10 06:20:17 PM PDT 24 257126341 ps
T160 /workspace/coverage/default/15.sram_ctrl_executable.1537034523 Jun 10 06:12:46 PM PDT 24 Jun 10 06:30:49 PM PDT 24 194307639417 ps
T161 /workspace/coverage/default/3.sram_ctrl_alert_test.4019669195 Jun 10 06:08:51 PM PDT 24 Jun 10 06:08:52 PM PDT 24 21733246 ps
T162 /workspace/coverage/default/38.sram_ctrl_bijection.35499860 Jun 10 06:18:56 PM PDT 24 Jun 10 06:20:16 PM PDT 24 5277957194 ps
T163 /workspace/coverage/default/20.sram_ctrl_max_throughput.1952523727 Jun 10 06:13:58 PM PDT 24 Jun 10 06:16:14 PM PDT 24 134264706 ps
T43 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3893686520 Jun 10 06:12:50 PM PDT 24 Jun 10 06:13:13 PM PDT 24 1110957422 ps
T164 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3473312489 Jun 10 06:16:01 PM PDT 24 Jun 10 06:16:07 PM PDT 24 76417973 ps
T165 /workspace/coverage/default/11.sram_ctrl_max_throughput.3787021288 Jun 10 06:11:26 PM PDT 24 Jun 10 06:12:48 PM PDT 24 117345238 ps
T166 /workspace/coverage/default/40.sram_ctrl_lc_escalation.680686234 Jun 10 06:19:31 PM PDT 24 Jun 10 06:19:40 PM PDT 24 6337284355 ps
T26 /workspace/coverage/default/34.sram_ctrl_ram_cfg.825953391 Jun 10 06:17:49 PM PDT 24 Jun 10 06:17:50 PM PDT 24 78636750 ps
T44 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.3189924064 Jun 10 06:13:37 PM PDT 24 Jun 10 06:13:44 PM PDT 24 1668636324 ps
T167 /workspace/coverage/default/44.sram_ctrl_stress_all.166197711 Jun 10 06:20:30 PM PDT 24 Jun 10 06:41:33 PM PDT 24 113683069298 ps
T168 /workspace/coverage/default/31.sram_ctrl_smoke.948551949 Jun 10 06:16:38 PM PDT 24 Jun 10 06:19:19 PM PDT 24 150982176 ps
T169 /workspace/coverage/default/12.sram_ctrl_ram_cfg.2742324188 Jun 10 06:11:52 PM PDT 24 Jun 10 06:11:53 PM PDT 24 83488583 ps
T170 /workspace/coverage/default/13.sram_ctrl_ram_cfg.1326382891 Jun 10 06:12:13 PM PDT 24 Jun 10 06:12:14 PM PDT 24 28128411 ps
T171 /workspace/coverage/default/38.sram_ctrl_multiple_keys.3704743908 Jun 10 06:18:53 PM PDT 24 Jun 10 06:34:48 PM PDT 24 3410678368 ps
T79 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.1927587702 Jun 10 06:21:14 PM PDT 24 Jun 10 06:24:08 PM PDT 24 1321470820 ps
T97 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3825075842 Jun 10 06:07:52 PM PDT 24 Jun 10 06:10:13 PM PDT 24 11302773949 ps
T172 /workspace/coverage/default/2.sram_ctrl_alert_test.1026866636 Jun 10 06:08:30 PM PDT 24 Jun 10 06:08:31 PM PDT 24 30963646 ps
T173 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2498311816 Jun 10 06:18:09 PM PDT 24 Jun 10 06:20:48 PM PDT 24 2106204114 ps
T174 /workspace/coverage/default/4.sram_ctrl_max_throughput.3282853443 Jun 10 06:09:00 PM PDT 24 Jun 10 06:11:05 PM PDT 24 214499627 ps
T175 /workspace/coverage/default/36.sram_ctrl_partial_access.1102035829 Jun 10 06:18:31 PM PDT 24 Jun 10 06:18:44 PM PDT 24 733956673 ps
T176 /workspace/coverage/default/40.sram_ctrl_bijection.1861548851 Jun 10 06:19:24 PM PDT 24 Jun 10 06:20:47 PM PDT 24 7226044140 ps
T177 /workspace/coverage/default/14.sram_ctrl_lc_escalation.2048705840 Jun 10 06:12:30 PM PDT 24 Jun 10 06:12:33 PM PDT 24 1445647827 ps
T178 /workspace/coverage/default/16.sram_ctrl_max_throughput.2579987266 Jun 10 06:12:59 PM PDT 24 Jun 10 06:14:19 PM PDT 24 142793056 ps
T179 /workspace/coverage/default/22.sram_ctrl_alert_test.1409345548 Jun 10 06:14:44 PM PDT 24 Jun 10 06:14:44 PM PDT 24 45275132 ps
T180 /workspace/coverage/default/4.sram_ctrl_bijection.1646159613 Jun 10 06:08:56 PM PDT 24 Jun 10 06:10:07 PM PDT 24 11445064611 ps
T45 /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.3503672899 Jun 10 06:14:09 PM PDT 24 Jun 10 06:15:04 PM PDT 24 10011249374 ps
T181 /workspace/coverage/default/17.sram_ctrl_alert_test.2900509401 Jun 10 06:13:25 PM PDT 24 Jun 10 06:13:26 PM PDT 24 36564236 ps
T182 /workspace/coverage/default/42.sram_ctrl_lc_escalation.3012811091 Jun 10 06:19:59 PM PDT 24 Jun 10 06:20:04 PM PDT 24 1280435461 ps
T183 /workspace/coverage/default/33.sram_ctrl_mem_walk.1685421617 Jun 10 06:17:32 PM PDT 24 Jun 10 06:17:42 PM PDT 24 1986782327 ps
T184 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.2087260020 Jun 10 06:14:59 PM PDT 24 Jun 10 06:19:27 PM PDT 24 8382953179 ps
T80 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.370761322 Jun 10 06:19:59 PM PDT 24 Jun 10 06:32:05 PM PDT 24 10181706988 ps
T185 /workspace/coverage/default/1.sram_ctrl_stress_all.2771595083 Jun 10 06:08:00 PM PDT 24 Jun 10 06:59:32 PM PDT 24 64902482424 ps
T186 /workspace/coverage/default/30.sram_ctrl_stress_all.1508058407 Jun 10 06:16:40 PM PDT 24 Jun 10 07:29:29 PM PDT 24 65276379785 ps
T187 /workspace/coverage/default/8.sram_ctrl_mem_walk.3595418242 Jun 10 06:10:35 PM PDT 24 Jun 10 06:10:42 PM PDT 24 696314087 ps
T46 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.3597249707 Jun 10 06:16:58 PM PDT 24 Jun 10 06:17:02 PM PDT 24 98605085 ps
T188 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.666478426 Jun 10 06:19:51 PM PDT 24 Jun 10 06:22:03 PM PDT 24 3353981210 ps
T189 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.3366898378 Jun 10 06:20:56 PM PDT 24 Jun 10 06:24:31 PM PDT 24 661909706 ps
T131 /workspace/coverage/default/42.sram_ctrl_partial_access.2895958320 Jun 10 06:19:51 PM PDT 24 Jun 10 06:21:49 PM PDT 24 4874476531 ps
T190 /workspace/coverage/default/48.sram_ctrl_executable.3426711475 Jun 10 06:21:26 PM PDT 24 Jun 10 06:23:47 PM PDT 24 20468818085 ps
T191 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.3705414306 Jun 10 06:17:23 PM PDT 24 Jun 10 06:21:03 PM PDT 24 9023700745 ps
T192 /workspace/coverage/default/35.sram_ctrl_alert_test.1540557801 Jun 10 06:18:24 PM PDT 24 Jun 10 06:18:25 PM PDT 24 31690415 ps
T193 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.29448524 Jun 10 06:08:48 PM PDT 24 Jun 10 06:08:51 PM PDT 24 543853557 ps
T194 /workspace/coverage/default/36.sram_ctrl_smoke.1679618207 Jun 10 06:18:24 PM PDT 24 Jun 10 06:20:03 PM PDT 24 2267852918 ps
T195 /workspace/coverage/default/32.sram_ctrl_multiple_keys.564139593 Jun 10 06:16:58 PM PDT 24 Jun 10 06:35:02 PM PDT 24 85389931997 ps
T196 /workspace/coverage/default/22.sram_ctrl_mem_walk.165524306 Jun 10 06:14:34 PM PDT 24 Jun 10 06:14:48 PM PDT 24 2720905647 ps
T32 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.604571017 Jun 10 06:09:16 PM PDT 24 Jun 10 06:10:07 PM PDT 24 1535483760 ps
T197 /workspace/coverage/default/17.sram_ctrl_lc_escalation.2449623279 Jun 10 06:13:16 PM PDT 24 Jun 10 06:13:20 PM PDT 24 781262336 ps
T198 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1553666129 Jun 10 06:09:05 PM PDT 24 Jun 10 06:09:41 PM PDT 24 311230698 ps
T199 /workspace/coverage/default/25.sram_ctrl_partial_access.1408257019 Jun 10 06:15:20 PM PDT 24 Jun 10 06:16:17 PM PDT 24 339953435 ps
T200 /workspace/coverage/default/20.sram_ctrl_alert_test.3073765687 Jun 10 06:14:09 PM PDT 24 Jun 10 06:14:10 PM PDT 24 34695071 ps
T201 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2317827314 Jun 10 06:10:26 PM PDT 24 Jun 10 06:14:25 PM PDT 24 9095003996 ps
T202 /workspace/coverage/default/29.sram_ctrl_executable.2401171003 Jun 10 06:16:23 PM PDT 24 Jun 10 06:43:13 PM PDT 24 17738510356 ps
T203 /workspace/coverage/default/24.sram_ctrl_alert_test.4227121353 Jun 10 06:15:11 PM PDT 24 Jun 10 06:15:12 PM PDT 24 24885754 ps
T204 /workspace/coverage/default/33.sram_ctrl_partial_access.147004234 Jun 10 06:17:22 PM PDT 24 Jun 10 06:19:27 PM PDT 24 3715865383 ps
T205 /workspace/coverage/default/23.sram_ctrl_mem_walk.3518982036 Jun 10 06:14:54 PM PDT 24 Jun 10 06:15:01 PM PDT 24 1315779844 ps
T206 /workspace/coverage/default/2.sram_ctrl_smoke.2198720793 Jun 10 06:08:08 PM PDT 24 Jun 10 06:08:25 PM PDT 24 521990930 ps
T207 /workspace/coverage/default/45.sram_ctrl_multiple_keys.4106066976 Jun 10 06:20:34 PM PDT 24 Jun 10 06:33:59 PM PDT 24 14067666668 ps
T208 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3975279715 Jun 10 06:15:33 PM PDT 24 Jun 10 06:18:27 PM PDT 24 30297055715 ps
T209 /workspace/coverage/default/36.sram_ctrl_alert_test.3514559932 Jun 10 06:18:36 PM PDT 24 Jun 10 06:18:37 PM PDT 24 34509735 ps
T210 /workspace/coverage/default/26.sram_ctrl_alert_test.341839386 Jun 10 06:15:41 PM PDT 24 Jun 10 06:15:42 PM PDT 24 12771435 ps
T211 /workspace/coverage/default/0.sram_ctrl_mem_walk.854937295 Jun 10 06:07:40 PM PDT 24 Jun 10 06:07:47 PM PDT 24 970764899 ps
T212 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.4089430391 Jun 10 06:08:14 PM PDT 24 Jun 10 06:12:14 PM PDT 24 6634647693 ps
T213 /workspace/coverage/default/24.sram_ctrl_stress_all.3443132116 Jun 10 06:15:13 PM PDT 24 Jun 10 06:28:06 PM PDT 24 4343665793 ps
T214 /workspace/coverage/default/36.sram_ctrl_executable.2899231930 Jun 10 06:18:36 PM PDT 24 Jun 10 06:35:20 PM PDT 24 5742876606 ps
T215 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1666977237 Jun 10 06:11:49 PM PDT 24 Jun 10 06:16:54 PM PDT 24 3198958150 ps
T216 /workspace/coverage/default/15.sram_ctrl_max_throughput.2402047186 Jun 10 06:12:51 PM PDT 24 Jun 10 06:13:51 PM PDT 24 496697981 ps
T217 /workspace/coverage/default/10.sram_ctrl_stress_all.1177945074 Jun 10 06:11:09 PM PDT 24 Jun 10 06:11:59 PM PDT 24 2264443942 ps
T218 /workspace/coverage/default/46.sram_ctrl_executable.70166921 Jun 10 06:20:58 PM PDT 24 Jun 10 06:24:51 PM PDT 24 1190621030 ps
T219 /workspace/coverage/default/16.sram_ctrl_alert_test.2435245006 Jun 10 06:13:12 PM PDT 24 Jun 10 06:13:13 PM PDT 24 61459981 ps
T220 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.3536674525 Jun 10 06:19:31 PM PDT 24 Jun 10 06:19:37 PM PDT 24 2157134877 ps
T221 /workspace/coverage/default/1.sram_ctrl_smoke.2911306144 Jun 10 06:07:49 PM PDT 24 Jun 10 06:07:56 PM PDT 24 467122947 ps
T222 /workspace/coverage/default/20.sram_ctrl_lc_escalation.3951185760 Jun 10 06:14:08 PM PDT 24 Jun 10 06:14:13 PM PDT 24 295478881 ps
T223 /workspace/coverage/default/7.sram_ctrl_stress_all.3883481923 Jun 10 06:10:17 PM PDT 24 Jun 10 06:41:54 PM PDT 24 10446403133 ps
T224 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2078334829 Jun 10 06:20:22 PM PDT 24 Jun 10 06:21:26 PM PDT 24 457976235 ps
T225 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.1937299183 Jun 10 06:14:16 PM PDT 24 Jun 10 06:15:07 PM PDT 24 114351509 ps
T226 /workspace/coverage/default/3.sram_ctrl_max_throughput.4153498814 Jun 10 06:08:38 PM PDT 24 Jun 10 06:08:41 PM PDT 24 46144804 ps
T227 /workspace/coverage/default/0.sram_ctrl_regwen.3045744172 Jun 10 06:07:37 PM PDT 24 Jun 10 06:18:43 PM PDT 24 10207052926 ps
T228 /workspace/coverage/default/48.sram_ctrl_alert_test.387058448 Jun 10 06:21:29 PM PDT 24 Jun 10 06:21:30 PM PDT 24 46616531 ps
T229 /workspace/coverage/default/15.sram_ctrl_regwen.1332981357 Jun 10 06:12:47 PM PDT 24 Jun 10 06:13:36 PM PDT 24 12010543907 ps
T230 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1381129071 Jun 10 06:12:04 PM PDT 24 Jun 10 06:16:05 PM PDT 24 9605848027 ps
T231 /workspace/coverage/default/48.sram_ctrl_smoke.1286893200 Jun 10 06:21:21 PM PDT 24 Jun 10 06:21:46 PM PDT 24 1151892214 ps
T232 /workspace/coverage/default/14.sram_ctrl_multiple_keys.4247683280 Jun 10 06:12:19 PM PDT 24 Jun 10 06:27:17 PM PDT 24 3103529949 ps
T233 /workspace/coverage/default/1.sram_ctrl_multiple_keys.3340845719 Jun 10 06:07:49 PM PDT 24 Jun 10 06:23:37 PM PDT 24 51032203884 ps
T234 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1744992947 Jun 10 06:07:56 PM PDT 24 Jun 10 06:08:04 PM PDT 24 232701596 ps
T235 /workspace/coverage/default/34.sram_ctrl_regwen.3589481014 Jun 10 06:17:50 PM PDT 24 Jun 10 06:42:55 PM PDT 24 43241817295 ps
T236 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3929184584 Jun 10 06:09:25 PM PDT 24 Jun 10 06:09:29 PM PDT 24 369930106 ps
T237 /workspace/coverage/default/6.sram_ctrl_lc_escalation.313025881 Jun 10 06:09:47 PM PDT 24 Jun 10 06:09:52 PM PDT 24 352141066 ps
T238 /workspace/coverage/default/39.sram_ctrl_mem_walk.3314485821 Jun 10 06:19:21 PM PDT 24 Jun 10 06:19:27 PM PDT 24 93461211 ps
T239 /workspace/coverage/default/40.sram_ctrl_alert_test.2402331182 Jun 10 06:19:36 PM PDT 24 Jun 10 06:19:37 PM PDT 24 39255188 ps
T240 /workspace/coverage/default/29.sram_ctrl_partial_access.3547356437 Jun 10 06:16:14 PM PDT 24 Jun 10 06:16:54 PM PDT 24 2853004985 ps
T241 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.1692220940 Jun 10 06:07:35 PM PDT 24 Jun 10 06:10:20 PM PDT 24 502582353 ps
T242 /workspace/coverage/default/20.sram_ctrl_regwen.3490860083 Jun 10 06:14:08 PM PDT 24 Jun 10 06:26:10 PM PDT 24 14128372075 ps
T243 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.3781256816 Jun 10 06:18:05 PM PDT 24 Jun 10 06:19:08 PM PDT 24 115965362 ps
T244 /workspace/coverage/default/27.sram_ctrl_smoke.1176800590 Jun 10 06:15:41 PM PDT 24 Jun 10 06:15:48 PM PDT 24 1013160952 ps
T245 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.184086943 Jun 10 06:18:44 PM PDT 24 Jun 10 06:23:44 PM PDT 24 12324669628 ps
T246 /workspace/coverage/default/32.sram_ctrl_partial_access.2242902565 Jun 10 06:17:06 PM PDT 24 Jun 10 06:17:16 PM PDT 24 218593295 ps
T247 /workspace/coverage/default/26.sram_ctrl_stress_all.3588815371 Jun 10 06:15:41 PM PDT 24 Jun 10 07:14:13 PM PDT 24 8358758611 ps
T248 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.936065690 Jun 10 06:13:08 PM PDT 24 Jun 10 06:13:12 PM PDT 24 217073822 ps
T249 /workspace/coverage/default/43.sram_ctrl_multiple_keys.2501700590 Jun 10 06:20:07 PM PDT 24 Jun 10 06:31:56 PM PDT 24 9240845374 ps
T250 /workspace/coverage/default/12.sram_ctrl_mem_walk.2490065013 Jun 10 06:11:50 PM PDT 24 Jun 10 06:11:57 PM PDT 24 1334745664 ps
T251 /workspace/coverage/default/46.sram_ctrl_mem_walk.1287723756 Jun 10 06:21:01 PM PDT 24 Jun 10 06:21:07 PM PDT 24 374978512 ps
T252 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2765598255 Jun 10 06:09:50 PM PDT 24 Jun 10 06:11:59 PM PDT 24 571810868 ps
T253 /workspace/coverage/default/42.sram_ctrl_multiple_keys.1732516978 Jun 10 06:19:51 PM PDT 24 Jun 10 06:44:02 PM PDT 24 54218962225 ps
T55 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1255345189 Jun 10 06:09:30 PM PDT 24 Jun 10 06:12:30 PM PDT 24 4813487511 ps
T254 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.121260284 Jun 10 06:08:42 PM PDT 24 Jun 10 06:25:11 PM PDT 24 11763797097 ps
T255 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.4009562076 Jun 10 06:15:39 PM PDT 24 Jun 10 06:15:43 PM PDT 24 531751156 ps
T256 /workspace/coverage/default/35.sram_ctrl_ram_cfg.2210632519 Jun 10 06:18:17 PM PDT 24 Jun 10 06:18:18 PM PDT 24 114222813 ps
T257 /workspace/coverage/default/16.sram_ctrl_bijection.2362066331 Jun 10 06:12:56 PM PDT 24 Jun 10 06:13:34 PM PDT 24 2516162572 ps
T258 /workspace/coverage/default/9.sram_ctrl_multiple_keys.10040371 Jun 10 06:10:45 PM PDT 24 Jun 10 06:50:01 PM PDT 24 5131634281 ps
T259 /workspace/coverage/default/27.sram_ctrl_regwen.231715632 Jun 10 06:15:51 PM PDT 24 Jun 10 06:37:09 PM PDT 24 11229314002 ps
T260 /workspace/coverage/default/43.sram_ctrl_executable.3150824123 Jun 10 06:20:09 PM PDT 24 Jun 10 06:25:58 PM PDT 24 6954310980 ps
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T261 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.3705713978 Jun 10 06:21:18 PM PDT 24 Jun 10 06:21:22 PM PDT 24 90292030 ps
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T263 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2906802228 Jun 10 06:16:13 PM PDT 24 Jun 10 06:20:55 PM PDT 24 5665083984 ps
T264 /workspace/coverage/default/0.sram_ctrl_executable.882433292 Jun 10 06:07:36 PM PDT 24 Jun 10 06:19:29 PM PDT 24 18822304106 ps
T265 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.4285986133 Jun 10 06:19:25 PM PDT 24 Jun 10 06:25:03 PM PDT 24 127705416827 ps
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T267 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.585715182 Jun 10 06:16:23 PM PDT 24 Jun 10 06:25:30 PM PDT 24 4899519043 ps
T268 /workspace/coverage/default/30.sram_ctrl_regwen.4118532077 Jun 10 06:16:39 PM PDT 24 Jun 10 06:24:05 PM PDT 24 36864031969 ps
T269 /workspace/coverage/default/41.sram_ctrl_max_throughput.1384660911 Jun 10 06:19:37 PM PDT 24 Jun 10 06:20:13 PM PDT 24 386326045 ps
T270 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.176848980 Jun 10 06:16:38 PM PDT 24 Jun 10 06:16:41 PM PDT 24 292452524 ps
T271 /workspace/coverage/default/25.sram_ctrl_ram_cfg.1309175126 Jun 10 06:15:24 PM PDT 24 Jun 10 06:15:25 PM PDT 24 28874486 ps
T272 /workspace/coverage/default/10.sram_ctrl_regwen.4139249104 Jun 10 06:11:09 PM PDT 24 Jun 10 06:41:06 PM PDT 24 98430755409 ps
T273 /workspace/coverage/default/29.sram_ctrl_regwen.4292899217 Jun 10 06:16:22 PM PDT 24 Jun 10 06:34:16 PM PDT 24 13310985347 ps
T274 /workspace/coverage/default/28.sram_ctrl_ram_cfg.856651251 Jun 10 06:16:03 PM PDT 24 Jun 10 06:16:04 PM PDT 24 145305646 ps
T275 /workspace/coverage/default/44.sram_ctrl_alert_test.1419845989 Jun 10 06:20:30 PM PDT 24 Jun 10 06:20:31 PM PDT 24 39777714 ps
T276 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1946653800 Jun 10 06:15:31 PM PDT 24 Jun 10 06:15:53 PM PDT 24 329116349 ps
T277 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1058367900 Jun 10 06:15:40 PM PDT 24 Jun 10 06:19:18 PM PDT 24 12787217965 ps
T278 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.1810279608 Jun 10 06:16:00 PM PDT 24 Jun 10 06:20:02 PM PDT 24 5067815973 ps
T81 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1976434537 Jun 10 06:08:26 PM PDT 24 Jun 10 06:08:32 PM PDT 24 91029734 ps
T279 /workspace/coverage/default/7.sram_ctrl_alert_test.2573692501 Jun 10 06:10:18 PM PDT 24 Jun 10 06:10:19 PM PDT 24 15975237 ps
T280 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2180633822 Jun 10 06:21:30 PM PDT 24 Jun 10 06:21:33 PM PDT 24 115127121 ps
T281 /workspace/coverage/default/43.sram_ctrl_partial_access.1183431764 Jun 10 06:20:07 PM PDT 24 Jun 10 06:20:27 PM PDT 24 15706412481 ps
T282 /workspace/coverage/default/40.sram_ctrl_ram_cfg.2405076441 Jun 10 06:19:30 PM PDT 24 Jun 10 06:19:32 PM PDT 24 87057220 ps
T283 /workspace/coverage/default/49.sram_ctrl_bijection.358666369 Jun 10 06:21:40 PM PDT 24 Jun 10 06:22:58 PM PDT 24 36957380961 ps
T284 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3044175674 Jun 10 06:20:48 PM PDT 24 Jun 10 06:26:22 PM PDT 24 22590730129 ps
T285 /workspace/coverage/default/41.sram_ctrl_ram_cfg.2724365861 Jun 10 06:19:43 PM PDT 24 Jun 10 06:19:44 PM PDT 24 30097653 ps
T286 /workspace/coverage/default/9.sram_ctrl_mem_walk.487099218 Jun 10 06:10:52 PM PDT 24 Jun 10 06:11:00 PM PDT 24 142122564 ps
T287 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.353250345 Jun 10 06:17:45 PM PDT 24 Jun 10 06:18:31 PM PDT 24 376136568 ps
T288 /workspace/coverage/default/29.sram_ctrl_stress_all.3594136133 Jun 10 06:16:27 PM PDT 24 Jun 10 06:41:40 PM PDT 24 19031204981 ps
T289 /workspace/coverage/default/22.sram_ctrl_smoke.4044793725 Jun 10 06:14:21 PM PDT 24 Jun 10 06:14:23 PM PDT 24 64614133 ps
T290 /workspace/coverage/default/21.sram_ctrl_smoke.2089787563 Jun 10 06:14:09 PM PDT 24 Jun 10 06:14:23 PM PDT 24 2856334179 ps
T291 /workspace/coverage/default/8.sram_ctrl_ram_cfg.266830654 Jun 10 06:10:30 PM PDT 24 Jun 10 06:10:32 PM PDT 24 84081414 ps
T292 /workspace/coverage/default/35.sram_ctrl_bijection.1040815553 Jun 10 06:17:57 PM PDT 24 Jun 10 06:18:17 PM PDT 24 1143166290 ps
T293 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.2281894339 Jun 10 06:20:38 PM PDT 24 Jun 10 06:29:03 PM PDT 24 2776692443 ps
T294 /workspace/coverage/default/16.sram_ctrl_ram_cfg.2323325292 Jun 10 06:13:06 PM PDT 24 Jun 10 06:13:07 PM PDT 24 51348978 ps
T295 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.3317082245 Jun 10 06:15:07 PM PDT 24 Jun 10 06:15:10 PM PDT 24 89593699 ps
T296 /workspace/coverage/default/44.sram_ctrl_lc_escalation.2809946854 Jun 10 06:20:22 PM PDT 24 Jun 10 06:20:29 PM PDT 24 438666472 ps
T297 /workspace/coverage/default/26.sram_ctrl_lc_escalation.2130818114 Jun 10 06:15:32 PM PDT 24 Jun 10 06:15:42 PM PDT 24 2993404506 ps
T298 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.478653841 Jun 10 06:15:57 PM PDT 24 Jun 10 06:19:09 PM PDT 24 2607337689 ps
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