Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.37 98.99 92.48 99.31 100.00 95.24 98.53 97.07


Total tests in report: 1019
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
85.76 85.76 95.67 95.67 82.11 82.11 96.39 96.39 66.67 66.67 87.68 87.68 94.25 94.25 77.51 77.51 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.4226679955
90.81 5.05 97.29 1.61 85.31 3.20 97.43 1.04 90.48 23.81 91.06 3.38 94.40 0.15 79.71 2.19 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2062874663
94.08 3.27 98.47 1.19 87.56 2.25 97.78 0.35 100.00 9.52 93.96 2.90 95.43 1.03 85.37 5.67 /workspace/coverage/default/16.sram_ctrl_stress_all.114266776
95.09 1.01 98.64 0.17 88.39 0.83 97.99 0.21 100.00 0.00 94.69 0.72 95.43 0.00 90.49 5.12 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.952669335
95.43 0.34 98.64 0.00 88.74 0.36 97.99 0.00 100.00 0.00 94.69 0.00 95.43 0.00 92.50 2.01 /workspace/coverage/default/30.sram_ctrl_stress_all.1283302512
95.76 0.33 98.90 0.25 88.74 0.00 97.99 0.00 100.00 0.00 94.93 0.24 96.31 0.88 93.42 0.91 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.883809621
95.96 0.20 98.90 0.00 88.74 0.00 97.99 0.00 100.00 0.00 94.93 0.00 96.46 0.15 94.70 1.28 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.104474006
96.16 0.20 98.90 0.00 88.74 0.00 98.06 0.07 100.00 0.00 94.93 0.00 97.79 1.33 94.70 0.00 /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3925200621
96.35 0.19 98.90 0.00 88.86 0.12 98.06 0.00 100.00 0.00 95.41 0.48 98.53 0.74 94.70 0.00 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2796175025
96.54 0.19 98.90 0.00 89.22 0.36 98.47 0.42 100.00 0.00 95.41 0.00 98.53 0.00 95.25 0.55 /workspace/coverage/default/11.sram_ctrl_alert_test.1835250543
96.67 0.13 98.98 0.08 89.22 0.00 99.31 0.83 100.00 0.00 95.41 0.00 98.53 0.00 95.25 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3978965285
96.80 0.13 98.98 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.41 0.00 98.53 0.00 96.16 0.91 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2899330722
96.88 0.08 98.98 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.41 0.00 98.53 0.00 96.71 0.55 /workspace/coverage/default/24.sram_ctrl_stress_all.312533555
96.90 0.03 98.98 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.41 0.00 98.53 0.00 96.89 0.18 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3626324325
96.93 0.03 98.98 0.00 89.22 0.00 99.31 0.00 100.00 0.00 95.41 0.00 98.53 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2684887469


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2431125948
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1641910139
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3556927414
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2345359292
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2233860737
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3916204499
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.162511703
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3435261995
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.217957209
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.4022066791
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2277935414
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.869893585
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.38652767
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.703068611
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.4000454267
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.4275012029
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1914944577
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.309602557
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3269242034
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.4168107228
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1522617645
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1531968207
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2215504897
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2942283367
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1440534509
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3964978720
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.215310740
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1027626577
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.596008591
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.870684609
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.479369772
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1727306615
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1068246689
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2717891614
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2225884736
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3804498899
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2635520046
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2702386157
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.436073441
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3150464785
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2048509411
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2972235719
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3614756816
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3490201912
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.779003449
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.79663850
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1503119098
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3790018516
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.963558
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.847081740
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3226391684
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.117163669
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3010053111
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2709793606
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.965296297
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1985461221
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3787113267
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.4273635821
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2627373549
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2398102746
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.692500295
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3211370134
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.393295780
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.737765838
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2609473118
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.403849815
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.4103474303
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.221926812
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2384490249
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.427424386
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3413600750
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1007406592
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3793649627
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1107103092
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3147648915
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2261731433
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4212032056
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3386193901
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1251106241
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2303231276
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2866448230
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2503409615
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1374400622
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3664641848
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1261262167
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1547557691
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.618443966
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1868013748
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1916646189
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3998872342
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3274682097
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.126512945
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1192979056
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2615024372
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1493755154
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3718996479
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1230541747
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1785666406
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2786456767
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1227478388
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3233947309
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2793087639
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3988037147
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3001122972
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2564920465
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1182053132
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1632372209
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2548921410
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2483495646
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1199781384
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1619687493
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.268769842
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.572796333
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3873643157
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2651215178
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3287981541
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.866454976
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.95606083
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1818740544
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1530862943
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3801135209
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.828553195
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1965230286
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.708849646
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.56591778
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.402568905
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3485188776
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4293937452
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1425672002
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3147842039
/workspace/coverage/default/0.sram_ctrl_alert_test.3685129592
/workspace/coverage/default/0.sram_ctrl_bijection.2653425843
/workspace/coverage/default/0.sram_ctrl_executable.985930989
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3254258037
/workspace/coverage/default/0.sram_ctrl_max_throughput.1101372579
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3047679556
/workspace/coverage/default/0.sram_ctrl_mem_walk.3347732731
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1970332404
/workspace/coverage/default/0.sram_ctrl_partial_access.501297239
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3624538594
/workspace/coverage/default/0.sram_ctrl_regwen.2506962738
/workspace/coverage/default/0.sram_ctrl_smoke.2145566275
/workspace/coverage/default/0.sram_ctrl_stress_all.553243384
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4290614201
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3097822986
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2867956512
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2332022398
/workspace/coverage/default/1.sram_ctrl_alert_test.143452934
/workspace/coverage/default/1.sram_ctrl_bijection.937086590
/workspace/coverage/default/1.sram_ctrl_executable.262420988
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1454998366
/workspace/coverage/default/1.sram_ctrl_max_throughput.1397977345
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.4150363886
/workspace/coverage/default/1.sram_ctrl_mem_walk.1255236904
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1343669734
/workspace/coverage/default/1.sram_ctrl_partial_access.3658142372
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2886447977
/workspace/coverage/default/1.sram_ctrl_ram_cfg.341460568
/workspace/coverage/default/1.sram_ctrl_regwen.1986667621
/workspace/coverage/default/1.sram_ctrl_smoke.288035517
/workspace/coverage/default/1.sram_ctrl_stress_all.1288792067
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.573028975
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2747983321
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3162392818
/workspace/coverage/default/10.sram_ctrl_alert_test.1693272621
/workspace/coverage/default/10.sram_ctrl_bijection.3511765570
/workspace/coverage/default/10.sram_ctrl_executable.1573350995
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2924915088
/workspace/coverage/default/10.sram_ctrl_max_throughput.2093093487
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2808982849
/workspace/coverage/default/10.sram_ctrl_mem_walk.4015787100
/workspace/coverage/default/10.sram_ctrl_multiple_keys.814235219
/workspace/coverage/default/10.sram_ctrl_partial_access.1696439802
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1409946587
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3364865398
/workspace/coverage/default/10.sram_ctrl_regwen.3723458535
/workspace/coverage/default/10.sram_ctrl_smoke.1025308812
/workspace/coverage/default/10.sram_ctrl_stress_all.1868092335
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1383250584
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.76611256
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3760051230
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3859833249
/workspace/coverage/default/11.sram_ctrl_bijection.2683512599
/workspace/coverage/default/11.sram_ctrl_executable.1109877806
/workspace/coverage/default/11.sram_ctrl_lc_escalation.726085542
/workspace/coverage/default/11.sram_ctrl_max_throughput.3485582074
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2589857592
/workspace/coverage/default/11.sram_ctrl_mem_walk.4196839678
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3420287731
/workspace/coverage/default/11.sram_ctrl_partial_access.2742138168
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1396904980
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1233441023
/workspace/coverage/default/11.sram_ctrl_regwen.4232050954
/workspace/coverage/default/11.sram_ctrl_smoke.2337097009
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.4164484028
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1120931474
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1501603517
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.305848319
/workspace/coverage/default/12.sram_ctrl_alert_test.1044782658
/workspace/coverage/default/12.sram_ctrl_bijection.1279812821
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3819920371
/workspace/coverage/default/12.sram_ctrl_max_throughput.856028943
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.4127586465
/workspace/coverage/default/12.sram_ctrl_mem_walk.3644687305
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2828429843
/workspace/coverage/default/12.sram_ctrl_partial_access.2206384635
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.645338088
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2162094595
/workspace/coverage/default/12.sram_ctrl_regwen.1555270614
/workspace/coverage/default/12.sram_ctrl_smoke.3564964520
/workspace/coverage/default/12.sram_ctrl_stress_all.23243577
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2231603231
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.2380380250
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1231314234
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3798020872
/workspace/coverage/default/13.sram_ctrl_alert_test.2160958465
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/workspace/coverage/default/44.sram_ctrl_max_throughput.3272791724
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1679258177
/workspace/coverage/default/44.sram_ctrl_mem_walk.2563352891
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2170012837
/workspace/coverage/default/44.sram_ctrl_partial_access.1110958837
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.19321376
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1069373283
/workspace/coverage/default/44.sram_ctrl_regwen.1244112080
/workspace/coverage/default/44.sram_ctrl_smoke.3396757112
/workspace/coverage/default/44.sram_ctrl_stress_all.4282300221
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2028411546
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.196408830
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1007019478
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.73059054
/workspace/coverage/default/45.sram_ctrl_alert_test.2560131809
/workspace/coverage/default/45.sram_ctrl_bijection.1772371110
/workspace/coverage/default/45.sram_ctrl_executable.3252601279
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3668629837
/workspace/coverage/default/45.sram_ctrl_max_throughput.3134833783
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2301195652
/workspace/coverage/default/45.sram_ctrl_mem_walk.2243705132
/workspace/coverage/default/45.sram_ctrl_multiple_keys.470923355
/workspace/coverage/default/45.sram_ctrl_partial_access.572003258
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1256104229
/workspace/coverage/default/45.sram_ctrl_ram_cfg.831375074
/workspace/coverage/default/45.sram_ctrl_regwen.2113153356
/workspace/coverage/default/45.sram_ctrl_smoke.3737143356
/workspace/coverage/default/45.sram_ctrl_stress_all.642887217
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.755397935
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2278725790
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.47144817
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1222387215
/workspace/coverage/default/46.sram_ctrl_alert_test.612130816
/workspace/coverage/default/46.sram_ctrl_bijection.173112816
/workspace/coverage/default/46.sram_ctrl_executable.574851219
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3385870533
/workspace/coverage/default/46.sram_ctrl_max_throughput.2117352837
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2761009551
/workspace/coverage/default/46.sram_ctrl_mem_walk.842108684
/workspace/coverage/default/46.sram_ctrl_multiple_keys.156101120
/workspace/coverage/default/46.sram_ctrl_partial_access.2015918425
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3052551137
/workspace/coverage/default/46.sram_ctrl_ram_cfg.973974396
/workspace/coverage/default/46.sram_ctrl_regwen.392654345
/workspace/coverage/default/46.sram_ctrl_smoke.2205384653
/workspace/coverage/default/46.sram_ctrl_stress_all.2094440661
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3583855020
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2351506845
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.668670211
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.377845432
/workspace/coverage/default/47.sram_ctrl_alert_test.743600863
/workspace/coverage/default/47.sram_ctrl_bijection.2101849832
/workspace/coverage/default/47.sram_ctrl_executable.3540100478
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2762633945
/workspace/coverage/default/47.sram_ctrl_max_throughput.2224269345
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2290992557
/workspace/coverage/default/47.sram_ctrl_mem_walk.2014662906
/workspace/coverage/default/47.sram_ctrl_multiple_keys.4267566051
/workspace/coverage/default/47.sram_ctrl_partial_access.3628428221
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4086131427
/workspace/coverage/default/47.sram_ctrl_ram_cfg.54152974
/workspace/coverage/default/47.sram_ctrl_regwen.1126402690
/workspace/coverage/default/47.sram_ctrl_smoke.205762067
/workspace/coverage/default/47.sram_ctrl_stress_all.1981821397
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1311609059
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3073613618
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1017910325
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2062980652
/workspace/coverage/default/48.sram_ctrl_alert_test.4231847726
/workspace/coverage/default/48.sram_ctrl_bijection.2791757811
/workspace/coverage/default/48.sram_ctrl_executable.1590297054
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3236680640
/workspace/coverage/default/48.sram_ctrl_max_throughput.1012707893
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.216948390
/workspace/coverage/default/48.sram_ctrl_mem_walk.1842605216
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2009875735
/workspace/coverage/default/48.sram_ctrl_partial_access.3638372829
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1328396504
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3504545437
/workspace/coverage/default/48.sram_ctrl_regwen.1374144665
/workspace/coverage/default/48.sram_ctrl_smoke.402678444
/workspace/coverage/default/48.sram_ctrl_stress_all.3274527857
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3399195427
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2181873510
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.609342505
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1775152702
/workspace/coverage/default/49.sram_ctrl_alert_test.1442026613
/workspace/coverage/default/49.sram_ctrl_bijection.658419270
/workspace/coverage/default/49.sram_ctrl_executable.3636849811
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3317885223
/workspace/coverage/default/49.sram_ctrl_max_throughput.379141930
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1116443041
/workspace/coverage/default/49.sram_ctrl_mem_walk.983986889
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1163163940
/workspace/coverage/default/49.sram_ctrl_partial_access.1856976028
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.338049610
/workspace/coverage/default/49.sram_ctrl_ram_cfg.657256152
/workspace/coverage/default/49.sram_ctrl_regwen.1373445259
/workspace/coverage/default/49.sram_ctrl_smoke.2184493339
/workspace/coverage/default/49.sram_ctrl_stress_all.438669036
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.987212727
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2268020764
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3864627603
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2452245040
/workspace/coverage/default/5.sram_ctrl_alert_test.3252638446
/workspace/coverage/default/5.sram_ctrl_bijection.1756612117
/workspace/coverage/default/5.sram_ctrl_executable.489058352
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1623977436
/workspace/coverage/default/5.sram_ctrl_max_throughput.1493082879
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3464566531
/workspace/coverage/default/5.sram_ctrl_mem_walk.2006033183
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3262881590
/workspace/coverage/default/5.sram_ctrl_partial_access.4232493957
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.185291995
/workspace/coverage/default/5.sram_ctrl_ram_cfg.657744434
/workspace/coverage/default/5.sram_ctrl_regwen.4260297347
/workspace/coverage/default/5.sram_ctrl_smoke.2561328527
/workspace/coverage/default/5.sram_ctrl_stress_all.3876378707
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1225166197
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2599881852
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2560803661
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1653401326
/workspace/coverage/default/6.sram_ctrl_alert_test.3035037003
/workspace/coverage/default/6.sram_ctrl_bijection.2156763171
/workspace/coverage/default/6.sram_ctrl_executable.1433687441
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1417553943
/workspace/coverage/default/6.sram_ctrl_max_throughput.3471629043
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2427849356
/workspace/coverage/default/6.sram_ctrl_mem_walk.561587648
/workspace/coverage/default/6.sram_ctrl_multiple_keys.962748515
/workspace/coverage/default/6.sram_ctrl_partial_access.2633609574
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1513064026
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1447607961
/workspace/coverage/default/6.sram_ctrl_regwen.1985215799
/workspace/coverage/default/6.sram_ctrl_smoke.2835373434
/workspace/coverage/default/6.sram_ctrl_stress_all.947490641
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3197931775
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2511158457
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1093990269
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1231705094
/workspace/coverage/default/7.sram_ctrl_alert_test.1368031477
/workspace/coverage/default/7.sram_ctrl_bijection.2477983527
/workspace/coverage/default/7.sram_ctrl_executable.85095225
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1947266563
/workspace/coverage/default/7.sram_ctrl_max_throughput.3523596690
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1302064173
/workspace/coverage/default/7.sram_ctrl_mem_walk.687602142
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3528855221
/workspace/coverage/default/7.sram_ctrl_partial_access.2536323133
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1863568622
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1902698314
/workspace/coverage/default/7.sram_ctrl_regwen.2549795229
/workspace/coverage/default/7.sram_ctrl_smoke.3377401270
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3219241289
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1656215665
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3694535873
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.299242927
/workspace/coverage/default/8.sram_ctrl_alert_test.2548382397
/workspace/coverage/default/8.sram_ctrl_bijection.3440591813
/workspace/coverage/default/8.sram_ctrl_executable.1647089293
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1246353032
/workspace/coverage/default/8.sram_ctrl_max_throughput.1292353494
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3803057675
/workspace/coverage/default/8.sram_ctrl_mem_walk.2127276830
/workspace/coverage/default/8.sram_ctrl_multiple_keys.568747222
/workspace/coverage/default/8.sram_ctrl_partial_access.3220473628
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.201669617
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3779260591
/workspace/coverage/default/8.sram_ctrl_regwen.2963162525
/workspace/coverage/default/8.sram_ctrl_smoke.4062602866
/workspace/coverage/default/8.sram_ctrl_stress_all.2713168267
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2910970231
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.419425154
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1445476097
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.4049058260
/workspace/coverage/default/9.sram_ctrl_alert_test.3407448390
/workspace/coverage/default/9.sram_ctrl_bijection.2503891855
/workspace/coverage/default/9.sram_ctrl_executable.853224482
/workspace/coverage/default/9.sram_ctrl_lc_escalation.480998946
/workspace/coverage/default/9.sram_ctrl_max_throughput.386065992
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2530617634
/workspace/coverage/default/9.sram_ctrl_mem_walk.2174867630
/workspace/coverage/default/9.sram_ctrl_multiple_keys.810837381
/workspace/coverage/default/9.sram_ctrl_partial_access.423453072
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1340688443
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1563517760
/workspace/coverage/default/9.sram_ctrl_regwen.1912253169
/workspace/coverage/default/9.sram_ctrl_smoke.906067953
/workspace/coverage/default/9.sram_ctrl_stress_all.248428554
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.814675643
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3085538615




Total test records in report: 1019
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/25.sram_ctrl_executable.1720639950 Jun 11 01:15:58 PM PDT 24 Jun 11 01:33:53 PM PDT 24 15512280769 ps
T2 /workspace/coverage/default/16.sram_ctrl_stress_all.114266776 Jun 11 01:13:29 PM PDT 24 Jun 11 01:52:22 PM PDT 24 32830886117 ps
T3 /workspace/coverage/default/28.sram_ctrl_mem_walk.2450900831 Jun 11 01:16:35 PM PDT 24 Jun 11 01:16:42 PM PDT 24 353411947 ps
T8 /workspace/coverage/default/23.sram_ctrl_alert_test.203613620 Jun 11 01:15:26 PM PDT 24 Jun 11 01:15:27 PM PDT 24 34903500 ps
T5 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.2452245040 Jun 11 01:10:57 PM PDT 24 Jun 11 01:30:34 PM PDT 24 4570407798 ps
T4 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4197963016 Jun 11 01:17:22 PM PDT 24 Jun 11 01:20:11 PM PDT 24 20348167513 ps
T9 /workspace/coverage/default/12.sram_ctrl_multiple_keys.2828429843 Jun 11 01:12:19 PM PDT 24 Jun 11 01:12:43 PM PDT 24 1213725268 ps
T10 /workspace/coverage/default/42.sram_ctrl_multiple_keys.1542593589 Jun 11 01:20:10 PM PDT 24 Jun 11 01:32:00 PM PDT 24 54007263910 ps
T11 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.883809621 Jun 11 01:11:58 PM PDT 24 Jun 11 01:36:08 PM PDT 24 7943478075 ps
T12 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.4226679955 Jun 11 01:13:06 PM PDT 24 Jun 11 01:15:27 PM PDT 24 1496769745 ps
T6 /workspace/coverage/default/2.sram_ctrl_lc_escalation.3405329987 Jun 11 01:10:31 PM PDT 24 Jun 11 01:10:34 PM PDT 24 213504203 ps
T22 /workspace/coverage/default/28.sram_ctrl_executable.4254482627 Jun 11 01:16:29 PM PDT 24 Jun 11 01:26:51 PM PDT 24 11297007122 ps
T15 /workspace/coverage/default/23.sram_ctrl_regwen.1025538932 Jun 11 01:15:24 PM PDT 24 Jun 11 01:24:18 PM PDT 24 4465153916 ps
T20 /workspace/coverage/default/1.sram_ctrl_smoke.288035517 Jun 11 01:10:21 PM PDT 24 Jun 11 01:12:24 PM PDT 24 136285886 ps
T59 /workspace/coverage/default/34.sram_ctrl_smoke.183649215 Jun 11 01:17:54 PM PDT 24 Jun 11 01:18:03 PM PDT 24 545802692 ps
T60 /workspace/coverage/default/11.sram_ctrl_partial_access.2742138168 Jun 11 01:12:08 PM PDT 24 Jun 11 01:12:17 PM PDT 24 310415205 ps
T61 /workspace/coverage/default/38.sram_ctrl_multiple_keys.1681374515 Jun 11 01:19:10 PM PDT 24 Jun 11 01:31:45 PM PDT 24 11115768109 ps
T16 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.755397935 Jun 11 01:21:04 PM PDT 24 Jun 11 01:30:49 PM PDT 24 3297378169 ps
T42 /workspace/coverage/default/38.sram_ctrl_mem_walk.4017651691 Jun 11 01:19:24 PM PDT 24 Jun 11 01:19:30 PM PDT 24 163334479 ps
T43 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.419425154 Jun 11 01:11:25 PM PDT 24 Jun 11 01:14:20 PM PDT 24 1854855837 ps
T44 /workspace/coverage/default/18.sram_ctrl_partial_access.3290978826 Jun 11 01:13:49 PM PDT 24 Jun 11 01:13:53 PM PDT 24 361009264 ps
T45 /workspace/coverage/default/36.sram_ctrl_max_throughput.2292817744 Jun 11 01:18:33 PM PDT 24 Jun 11 01:18:58 PM PDT 24 99342312 ps
T46 /workspace/coverage/default/16.sram_ctrl_smoke.3381844292 Jun 11 01:13:18 PM PDT 24 Jun 11 01:13:25 PM PDT 24 109204298 ps
T26 /workspace/coverage/default/13.sram_ctrl_partial_access.1906037504 Jun 11 01:12:39 PM PDT 24 Jun 11 01:13:00 PM PDT 24 2326300059 ps
T47 /workspace/coverage/default/46.sram_ctrl_max_throughput.2117352837 Jun 11 01:21:02 PM PDT 24 Jun 11 01:21:29 PM PDT 24 334726618 ps
T21 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3583855020 Jun 11 01:21:18 PM PDT 24 Jun 11 01:24:35 PM PDT 24 767175204 ps
T48 /workspace/coverage/default/28.sram_ctrl_max_throughput.1448769428 Jun 11 01:16:27 PM PDT 24 Jun 11 01:17:28 PM PDT 24 106118665 ps
T54 /workspace/coverage/default/39.sram_ctrl_regwen.3637542022 Jun 11 01:19:36 PM PDT 24 Jun 11 01:26:44 PM PDT 24 3914774412 ps
T148 /workspace/coverage/default/14.sram_ctrl_multiple_keys.2808669919 Jun 11 01:12:56 PM PDT 24 Jun 11 01:37:11 PM PDT 24 3290850368 ps
T13 /workspace/coverage/default/29.sram_ctrl_alert_test.2854714288 Jun 11 01:16:56 PM PDT 24 Jun 11 01:16:58 PM PDT 24 10990406 ps
T7 /workspace/coverage/default/4.sram_ctrl_stress_all.1391756075 Jun 11 01:10:54 PM PDT 24 Jun 11 02:29:42 PM PDT 24 243881907359 ps
T28 /workspace/coverage/default/19.sram_ctrl_regwen.1781309901 Jun 11 01:14:20 PM PDT 24 Jun 11 01:15:02 PM PDT 24 1089310204 ps
T33 /workspace/coverage/default/16.sram_ctrl_mem_walk.1246138053 Jun 11 01:13:31 PM PDT 24 Jun 11 01:13:37 PM PDT 24 227275829 ps
T32 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2062874663 Jun 11 01:18:44 PM PDT 24 Jun 11 01:19:07 PM PDT 24 1305901666 ps
T27 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.1688583056 Jun 11 01:17:42 PM PDT 24 Jun 11 01:20:13 PM PDT 24 1593879521 ps
T62 /workspace/coverage/default/11.sram_ctrl_lc_escalation.726085542 Jun 11 01:12:09 PM PDT 24 Jun 11 01:12:18 PM PDT 24 837990487 ps
T149 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.3684719350 Jun 11 01:17:21 PM PDT 24 Jun 11 01:17:28 PM PDT 24 197504393 ps
T150 /workspace/coverage/default/31.sram_ctrl_smoke.2728728452 Jun 11 01:17:09 PM PDT 24 Jun 11 01:18:11 PM PDT 24 103952848 ps
T147 /workspace/coverage/default/37.sram_ctrl_partial_access.3243263686 Jun 11 01:18:57 PM PDT 24 Jun 11 01:21:36 PM PDT 24 799481467 ps
T96 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2267830864 Jun 11 01:12:41 PM PDT 24 Jun 11 01:17:49 PM PDT 24 12848085929 ps
T78 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.3565706378 Jun 11 01:17:25 PM PDT 24 Jun 11 01:40:45 PM PDT 24 15538386889 ps
T151 /workspace/coverage/default/10.sram_ctrl_partial_access.1696439802 Jun 11 01:12:00 PM PDT 24 Jun 11 01:12:11 PM PDT 24 1134377358 ps
T63 /workspace/coverage/default/19.sram_ctrl_lc_escalation.3660544937 Jun 11 01:14:18 PM PDT 24 Jun 11 01:14:25 PM PDT 24 888980585 ps
T79 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.1764793497 Jun 11 01:14:28 PM PDT 24 Jun 11 01:31:21 PM PDT 24 3444711971 ps
T97 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.76611256 Jun 11 01:11:57 PM PDT 24 Jun 11 01:15:26 PM PDT 24 3581358695 ps
T152 /workspace/coverage/default/18.sram_ctrl_max_throughput.548963583 Jun 11 01:14:00 PM PDT 24 Jun 11 01:16:07 PM PDT 24 1512159488 ps
T35 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.3421450748 Jun 11 01:16:56 PM PDT 24 Jun 11 01:17:00 PM PDT 24 112470010 ps
T64 /workspace/coverage/default/29.sram_ctrl_regwen.2356234385 Jun 11 01:16:46 PM PDT 24 Jun 11 01:51:45 PM PDT 24 3921233768 ps
T18 /workspace/coverage/default/21.sram_ctrl_lc_escalation.3695840426 Jun 11 01:14:51 PM PDT 24 Jun 11 01:14:53 PM PDT 24 122861496 ps
T153 /workspace/coverage/default/23.sram_ctrl_bijection.3854557225 Jun 11 01:15:21 PM PDT 24 Jun 11 01:16:09 PM PDT 24 5455706801 ps
T154 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.428202632 Jun 11 01:15:03 PM PDT 24 Jun 11 01:16:27 PM PDT 24 1307925744 ps
T80 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.1277688745 Jun 11 01:18:14 PM PDT 24 Jun 11 01:18:21 PM PDT 24 611097180 ps
T81 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3859833249 Jun 11 01:12:08 PM PDT 24 Jun 11 01:21:46 PM PDT 24 5352437282 ps
T98 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.104474006 Jun 11 01:15:02 PM PDT 24 Jun 11 01:22:44 PM PDT 24 29208371817 ps
T23 /workspace/coverage/default/40.sram_ctrl_ram_cfg.96632184 Jun 11 01:19:47 PM PDT 24 Jun 11 01:19:48 PM PDT 24 28611293 ps
T99 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.2351506845 Jun 11 01:21:03 PM PDT 24 Jun 11 01:26:14 PM PDT 24 12703694052 ps
T82 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.2182850559 Jun 11 01:17:47 PM PDT 24 Jun 11 01:21:30 PM PDT 24 1993079882 ps
T155 /workspace/coverage/default/35.sram_ctrl_executable.1056653452 Jun 11 01:18:25 PM PDT 24 Jun 11 01:40:15 PM PDT 24 32343239984 ps
T156 /workspace/coverage/default/3.sram_ctrl_multiple_keys.1617025357 Jun 11 01:10:43 PM PDT 24 Jun 11 01:22:28 PM PDT 24 10621344671 ps
T83 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.2443315628 Jun 11 01:10:54 PM PDT 24 Jun 11 01:15:19 PM PDT 24 2832007078 ps
T29 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.1722220383 Jun 11 01:14:52 PM PDT 24 Jun 11 01:16:15 PM PDT 24 19017804318 ps
T157 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1093990269 Jun 11 01:11:05 PM PDT 24 Jun 11 01:12:20 PM PDT 24 485957874 ps
T158 /workspace/coverage/default/22.sram_ctrl_max_throughput.2469763814 Jun 11 01:15:06 PM PDT 24 Jun 11 01:15:19 PM PDT 24 515701276 ps
T138 /workspace/coverage/default/36.sram_ctrl_stress_all.628801135 Jun 11 01:18:44 PM PDT 24 Jun 11 01:57:04 PM PDT 24 40789987591 ps
T159 /workspace/coverage/default/31.sram_ctrl_partial_access.2185708285 Jun 11 01:17:23 PM PDT 24 Jun 11 01:19:54 PM PDT 24 482369125 ps
T100 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.3097822986 Jun 11 01:10:19 PM PDT 24 Jun 11 01:14:49 PM PDT 24 5663277313 ps
T14 /workspace/coverage/default/14.sram_ctrl_alert_test.483126837 Jun 11 01:13:07 PM PDT 24 Jun 11 01:13:08 PM PDT 24 33176849 ps
T36 /workspace/coverage/default/22.sram_ctrl_mem_walk.3935519484 Jun 11 01:15:03 PM PDT 24 Jun 11 01:15:09 PM PDT 24 344186923 ps
T160 /workspace/coverage/default/1.sram_ctrl_partial_access.3658142372 Jun 11 01:10:22 PM PDT 24 Jun 11 01:12:37 PM PDT 24 742644246 ps
T161 /workspace/coverage/default/27.sram_ctrl_multiple_keys.2421897019 Jun 11 01:16:07 PM PDT 24 Jun 11 01:19:23 PM PDT 24 4416188113 ps
T101 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3748707777 Jun 11 01:16:57 PM PDT 24 Jun 11 01:22:31 PM PDT 24 23572831401 ps
T139 /workspace/coverage/default/4.sram_ctrl_executable.1233930330 Jun 11 01:10:54 PM PDT 24 Jun 11 01:32:35 PM PDT 24 86523054647 ps
T102 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1120931474 Jun 11 01:12:07 PM PDT 24 Jun 11 01:19:30 PM PDT 24 4518821469 ps
T24 /workspace/coverage/default/8.sram_ctrl_ram_cfg.3779260591 Jun 11 01:11:35 PM PDT 24 Jun 11 01:11:36 PM PDT 24 45058542 ps
T25 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3571299548 Jun 11 01:17:10 PM PDT 24 Jun 11 01:17:12 PM PDT 24 167309598 ps
T162 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.3284950136 Jun 11 01:18:24 PM PDT 24 Jun 11 01:18:43 PM PDT 24 287074156 ps
T163 /workspace/coverage/default/42.sram_ctrl_max_throughput.2515903444 Jun 11 01:20:09 PM PDT 24 Jun 11 01:20:16 PM PDT 24 59068128 ps
T146 /workspace/coverage/default/33.sram_ctrl_multiple_keys.778447646 Jun 11 01:17:44 PM PDT 24 Jun 11 01:27:57 PM PDT 24 13228414471 ps
T164 /workspace/coverage/default/6.sram_ctrl_smoke.2835373434 Jun 11 01:11:05 PM PDT 24 Jun 11 01:11:10 PM PDT 24 177838163 ps
T135 /workspace/coverage/default/20.sram_ctrl_regwen.3946253420 Jun 11 01:14:31 PM PDT 24 Jun 11 01:33:43 PM PDT 24 13709068203 ps
T165 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.73059054 Jun 11 01:21:04 PM PDT 24 Jun 11 01:21:31 PM PDT 24 286461358 ps
T166 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1274758798 Jun 11 01:10:29 PM PDT 24 Jun 11 01:14:03 PM PDT 24 11975954969 ps
T143 /workspace/coverage/default/0.sram_ctrl_executable.985930989 Jun 11 01:10:19 PM PDT 24 Jun 11 01:25:36 PM PDT 24 12713356967 ps
T167 /workspace/coverage/default/33.sram_ctrl_smoke.200000655 Jun 11 01:17:48 PM PDT 24 Jun 11 01:18:02 PM PDT 24 243638556 ps
T37 /workspace/coverage/default/10.sram_ctrl_mem_walk.4015787100 Jun 11 01:11:57 PM PDT 24 Jun 11 01:12:05 PM PDT 24 342304904 ps
T168 /workspace/coverage/default/29.sram_ctrl_mem_walk.2141704845 Jun 11 01:16:57 PM PDT 24 Jun 11 01:17:11 PM PDT 24 1988510949 ps
T169 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.1653401326 Jun 11 01:11:15 PM PDT 24 Jun 11 01:13:34 PM PDT 24 637034915 ps
T142 /workspace/coverage/default/31.sram_ctrl_regwen.556307007 Jun 11 01:17:23 PM PDT 24 Jun 11 01:33:19 PM PDT 24 27501666370 ps
T170 /workspace/coverage/default/2.sram_ctrl_stress_all.2190265728 Jun 11 01:10:34 PM PDT 24 Jun 11 02:21:02 PM PDT 24 45419017820 ps
T136 /workspace/coverage/default/9.sram_ctrl_stress_all.248428554 Jun 11 01:11:58 PM PDT 24 Jun 11 01:39:42 PM PDT 24 8757295888 ps
T171 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.477701526 Jun 11 01:13:11 PM PDT 24 Jun 11 01:35:40 PM PDT 24 3344870111 ps
T172 /workspace/coverage/default/29.sram_ctrl_multiple_keys.1453492794 Jun 11 01:16:46 PM PDT 24 Jun 11 01:24:21 PM PDT 24 1880659932 ps
T144 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1090071476 Jun 11 01:14:50 PM PDT 24 Jun 11 01:26:45 PM PDT 24 492673962134 ps
T173 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1939212998 Jun 11 01:13:17 PM PDT 24 Jun 11 01:13:58 PM PDT 24 404374845 ps
T174 /workspace/coverage/default/30.sram_ctrl_mem_walk.1522631291 Jun 11 01:17:10 PM PDT 24 Jun 11 01:17:21 PM PDT 24 717748526 ps
T175 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.814675643 Jun 11 01:11:47 PM PDT 24 Jun 11 01:15:06 PM PDT 24 1997271393 ps
T176 /workspace/coverage/default/42.sram_ctrl_ram_cfg.3229342947 Jun 11 01:20:20 PM PDT 24 Jun 11 01:20:22 PM PDT 24 28955248 ps
T177 /workspace/coverage/default/26.sram_ctrl_smoke.3801026504 Jun 11 01:15:57 PM PDT 24 Jun 11 01:17:40 PM PDT 24 1159315290 ps
T178 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.3077511153 Jun 11 01:10:28 PM PDT 24 Jun 11 01:16:53 PM PDT 24 4059068656 ps
T179 /workspace/coverage/default/29.sram_ctrl_smoke.2719448974 Jun 11 01:16:36 PM PDT 24 Jun 11 01:16:47 PM PDT 24 323847010 ps
T17 /workspace/coverage/default/28.sram_ctrl_alert_test.281864708 Jun 11 01:16:38 PM PDT 24 Jun 11 01:16:39 PM PDT 24 14188717 ps
T145 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2855304581 Jun 11 01:15:35 PM PDT 24 Jun 11 01:19:40 PM PDT 24 20643520609 ps
T180 /workspace/coverage/default/6.sram_ctrl_ram_cfg.1447607961 Jun 11 01:11:13 PM PDT 24 Jun 11 01:11:16 PM PDT 24 27222732 ps
T140 /workspace/coverage/default/13.sram_ctrl_regwen.3572524132 Jun 11 01:12:39 PM PDT 24 Jun 11 01:32:19 PM PDT 24 15462967479 ps
T181 /workspace/coverage/default/1.sram_ctrl_mem_walk.1255236904 Jun 11 01:10:21 PM PDT 24 Jun 11 01:10:30 PM PDT 24 1747342004 ps
T182 /workspace/coverage/default/10.sram_ctrl_multiple_keys.814235219 Jun 11 01:11:57 PM PDT 24 Jun 11 01:26:44 PM PDT 24 2236353312 ps
T183 /workspace/coverage/default/1.sram_ctrl_bijection.937086590 Jun 11 01:10:18 PM PDT 24 Jun 11 01:11:24 PM PDT 24 1023859595 ps
T137 /workspace/coverage/default/45.sram_ctrl_executable.3252601279 Jun 11 01:21:04 PM PDT 24 Jun 11 01:27:47 PM PDT 24 15158553704 ps
T184 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.549241280 Jun 11 01:20:26 PM PDT 24 Jun 11 01:23:39 PM PDT 24 3208413797 ps
T185 /workspace/coverage/default/24.sram_ctrl_mem_walk.339871944 Jun 11 01:15:34 PM PDT 24 Jun 11 01:15:46 PM PDT 24 180442455 ps
T186 /workspace/coverage/default/11.sram_ctrl_alert_test.1835250543 Jun 11 01:12:18 PM PDT 24 Jun 11 01:12:20 PM PDT 24 47688080 ps
T187 /workspace/coverage/default/21.sram_ctrl_multiple_keys.3821089795 Jun 11 01:14:40 PM PDT 24 Jun 11 01:33:55 PM PDT 24 48294317724 ps
T188 /workspace/coverage/default/25.sram_ctrl_alert_test.2157676534 Jun 11 01:15:57 PM PDT 24 Jun 11 01:15:59 PM PDT 24 30862822 ps
T189 /workspace/coverage/default/40.sram_ctrl_executable.2695322842 Jun 11 01:19:45 PM PDT 24 Jun 11 01:25:05 PM PDT 24 3318414018 ps
T190 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.185291995 Jun 11 01:10:56 PM PDT 24 Jun 11 01:14:07 PM PDT 24 2677307152 ps
T191 /workspace/coverage/default/40.sram_ctrl_multiple_keys.3057729629 Jun 11 01:19:45 PM PDT 24 Jun 11 01:31:17 PM PDT 24 17641063855 ps
T192 /workspace/coverage/default/0.sram_ctrl_smoke.2145566275 Jun 11 01:10:19 PM PDT 24 Jun 11 01:11:58 PM PDT 24 799386772 ps
T193 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1324410418 Jun 11 01:13:39 PM PDT 24 Jun 11 01:18:59 PM PDT 24 26126199875 ps
T194 /workspace/coverage/default/16.sram_ctrl_max_throughput.132349526 Jun 11 01:13:18 PM PDT 24 Jun 11 01:13:37 PM PDT 24 82224184 ps
T19 /workspace/coverage/default/37.sram_ctrl_stress_all.1283999596 Jun 11 01:19:11 PM PDT 24 Jun 11 01:52:26 PM PDT 24 7770718531 ps
T141 /workspace/coverage/default/26.sram_ctrl_regwen.2416462280 Jun 11 01:16:07 PM PDT 24 Jun 11 01:38:17 PM PDT 24 67364589946 ps
T195 /workspace/coverage/default/24.sram_ctrl_regwen.1654342449 Jun 11 01:15:34 PM PDT 24 Jun 11 01:29:42 PM PDT 24 45881445284 ps
T196 /workspace/coverage/default/21.sram_ctrl_stress_all.4210454832 Jun 11 01:14:52 PM PDT 24 Jun 11 01:29:40 PM PDT 24 8851149692 ps
T197 /workspace/coverage/default/1.sram_ctrl_executable.262420988 Jun 11 01:10:20 PM PDT 24 Jun 11 01:13:08 PM PDT 24 2029008866 ps
T119 /workspace/coverage/default/41.sram_ctrl_stress_all.84302377 Jun 11 01:20:11 PM PDT 24 Jun 11 01:49:20 PM PDT 24 155010864238 ps
T198 /workspace/coverage/default/21.sram_ctrl_mem_walk.1419331330 Jun 11 01:14:50 PM PDT 24 Jun 11 01:14:57 PM PDT 24 686852408 ps
T199 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.2939128226 Jun 11 01:16:09 PM PDT 24 Jun 11 01:29:08 PM PDT 24 3925556184 ps
T200 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.2774468182 Jun 11 01:13:49 PM PDT 24 Jun 11 01:16:41 PM PDT 24 1793019338 ps
T201 /workspace/coverage/default/26.sram_ctrl_bijection.1781766964 Jun 11 01:16:06 PM PDT 24 Jun 11 01:17:16 PM PDT 24 16954639633 ps
T202 /workspace/coverage/default/32.sram_ctrl_bijection.604573996 Jun 11 01:17:33 PM PDT 24 Jun 11 01:17:57 PM PDT 24 1402344328 ps
T203 /workspace/coverage/default/49.sram_ctrl_stress_all.438669036 Jun 11 01:21:49 PM PDT 24 Jun 11 02:12:36 PM PDT 24 17099070261 ps
T55 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3478375581 Jun 11 01:17:25 PM PDT 24 Jun 11 01:17:53 PM PDT 24 380057697 ps
T204 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3085538615 Jun 11 01:11:46 PM PDT 24 Jun 11 01:11:48 PM PDT 24 223669750 ps
T205 /workspace/coverage/default/44.sram_ctrl_multiple_keys.2170012837 Jun 11 01:20:27 PM PDT 24 Jun 11 01:37:10 PM PDT 24 6418643272 ps
T206 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1116443041 Jun 11 01:21:52 PM PDT 24 Jun 11 01:21:58 PM PDT 24 368051411 ps
T207 /workspace/coverage/default/37.sram_ctrl_smoke.1351886640 Jun 11 01:18:55 PM PDT 24 Jun 11 01:19:11 PM PDT 24 973794747 ps
T208 /workspace/coverage/default/32.sram_ctrl_ram_cfg.4203084183 Jun 11 01:17:32 PM PDT 24 Jun 11 01:17:34 PM PDT 24 421782001 ps
T209 /workspace/coverage/default/36.sram_ctrl_partial_access.4026440230 Jun 11 01:18:36 PM PDT 24 Jun 11 01:18:46 PM PDT 24 1299506731 ps
T210 /workspace/coverage/default/34.sram_ctrl_mem_walk.620931857 Jun 11 01:18:14 PM PDT 24 Jun 11 01:18:19 PM PDT 24 175760957 ps
T120 /workspace/coverage/default/30.sram_ctrl_stress_all.1283302512 Jun 11 01:17:10 PM PDT 24 Jun 11 02:52:30 PM PDT 24 277198847607 ps
T211 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.3805815894 Jun 11 01:18:34 PM PDT 24 Jun 11 01:25:02 PM PDT 24 75194971076 ps
T212 /workspace/coverage/default/21.sram_ctrl_max_throughput.3082951219 Jun 11 01:14:50 PM PDT 24 Jun 11 01:14:52 PM PDT 24 55278808 ps
T213 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1140268303 Jun 11 01:17:44 PM PDT 24 Jun 11 01:17:47 PM PDT 24 313458820 ps
T214 /workspace/coverage/default/7.sram_ctrl_regwen.2549795229 Jun 11 01:11:16 PM PDT 24 Jun 11 01:29:05 PM PDT 24 11998422528 ps
T215 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3978965285 Jun 11 01:10:20 PM PDT 24 Jun 11 01:10:23 PM PDT 24 179580034 ps
T216 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.2290992557 Jun 11 01:21:30 PM PDT 24 Jun 11 01:21:36 PM PDT 24 582827082 ps
T217 /workspace/coverage/default/6.sram_ctrl_mem_walk.561587648 Jun 11 01:11:17 PM PDT 24 Jun 11 01:11:24 PM PDT 24 1202529096 ps
T218 /workspace/coverage/default/3.sram_ctrl_smoke.1053962574 Jun 11 01:10:30 PM PDT 24 Jun 11 01:10:40 PM PDT 24 146517141 ps
T219 /workspace/coverage/default/24.sram_ctrl_max_throughput.4133623516 Jun 11 01:15:34 PM PDT 24 Jun 11 01:17:24 PM PDT 24 1729308388 ps
T220 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.3897687148 Jun 11 01:14:40 PM PDT 24 Jun 11 01:18:43 PM PDT 24 10330317325 ps
T221 /workspace/coverage/default/31.sram_ctrl_mem_walk.734043046 Jun 11 01:17:22 PM PDT 24 Jun 11 01:17:30 PM PDT 24 375892381 ps
T222 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1483378240 Jun 11 01:13:49 PM PDT 24 Jun 11 01:21:08 PM PDT 24 24256357806 ps
T223 /workspace/coverage/default/22.sram_ctrl_multiple_keys.3432084699 Jun 11 01:14:52 PM PDT 24 Jun 11 01:18:38 PM PDT 24 10476308064 ps
T224 /workspace/coverage/default/9.sram_ctrl_mem_walk.2174867630 Jun 11 01:11:46 PM PDT 24 Jun 11 01:11:54 PM PDT 24 931030529 ps
T225 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.706203142 Jun 11 01:19:11 PM PDT 24 Jun 11 01:34:33 PM PDT 24 2800488860 ps
T226 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1343669734 Jun 11 01:10:19 PM PDT 24 Jun 11 01:15:36 PM PDT 24 3503203744 ps
T227 /workspace/coverage/default/24.sram_ctrl_stress_all.312533555 Jun 11 01:15:45 PM PDT 24 Jun 11 02:14:06 PM PDT 24 59927474238 ps
T228 /workspace/coverage/default/45.sram_ctrl_mem_walk.2243705132 Jun 11 01:21:03 PM PDT 24 Jun 11 01:21:12 PM PDT 24 141165167 ps
T229 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.17791141 Jun 11 01:19:34 PM PDT 24 Jun 11 01:19:40 PM PDT 24 155476241 ps
T230 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.3219549828 Jun 11 01:14:51 PM PDT 24 Jun 11 01:14:54 PM PDT 24 47739152 ps
T56 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1225166197 Jun 11 01:11:05 PM PDT 24 Jun 11 01:11:14 PM PDT 24 255577482 ps
T111 /workspace/coverage/default/10.sram_ctrl_smoke.1025308812 Jun 11 01:11:58 PM PDT 24 Jun 11 01:12:08 PM PDT 24 925033826 ps
T38 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2985686055 Jun 11 01:15:15 PM PDT 24 Jun 11 01:17:35 PM PDT 24 435751305 ps
T112 /workspace/coverage/default/33.sram_ctrl_stress_pipeline.2809591662 Jun 11 01:17:49 PM PDT 24 Jun 11 01:22:44 PM PDT 24 2878602238 ps
T113 /workspace/coverage/default/48.sram_ctrl_multiple_keys.2009875735 Jun 11 01:21:30 PM PDT 24 Jun 11 01:38:04 PM PDT 24 11308530677 ps
T114 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.305848319 Jun 11 01:12:31 PM PDT 24 Jun 11 01:26:07 PM PDT 24 11461317284 ps
T115 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1952744147 Jun 11 01:19:45 PM PDT 24 Jun 11 01:20:41 PM PDT 24 112139409 ps
T116 /workspace/coverage/default/20.sram_ctrl_mem_walk.1218366038 Jun 11 01:14:39 PM PDT 24 Jun 11 01:14:51 PM PDT 24 691260052 ps
T117 /workspace/coverage/default/14.sram_ctrl_smoke.507320469 Jun 11 01:12:58 PM PDT 24 Jun 11 01:15:08 PM PDT 24 608934144 ps
T118 /workspace/coverage/default/4.sram_ctrl_max_throughput.3720177830 Jun 11 01:10:54 PM PDT 24 Jun 11 01:11:22 PM PDT 24 181374893 ps
T231 /workspace/coverage/default/9.sram_ctrl_multiple_keys.810837381 Jun 11 01:11:47 PM PDT 24 Jun 11 01:20:14 PM PDT 24 10830363728 ps
T232 /workspace/coverage/default/42.sram_ctrl_smoke.3423292521 Jun 11 01:20:08 PM PDT 24 Jun 11 01:20:13 PM PDT 24 109430789 ps
T233 /workspace/coverage/default/48.sram_ctrl_bijection.2791757811 Jun 11 01:21:31 PM PDT 24 Jun 11 01:22:43 PM PDT 24 5901199082 ps
T234 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1248539861 Jun 11 01:10:31 PM PDT 24 Jun 11 01:11:38 PM PDT 24 449600444 ps
T235 /workspace/coverage/default/18.sram_ctrl_stress_all.1602966474 Jun 11 01:14:12 PM PDT 24 Jun 11 01:43:32 PM PDT 24 25524564510 ps
T236 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3927909833 Jun 11 01:10:42 PM PDT 24 Jun 11 01:13:45 PM PDT 24 16590310036 ps
T237 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3532249851 Jun 11 01:20:19 PM PDT 24 Jun 11 01:25:59 PM PDT 24 3602977863 ps
T238 /workspace/coverage/default/15.sram_ctrl_bijection.4043984905 Jun 11 01:13:07 PM PDT 24 Jun 11 01:13:53 PM PDT 24 696158615 ps
T239 /workspace/coverage/default/5.sram_ctrl_bijection.1756612117 Jun 11 01:10:55 PM PDT 24 Jun 11 01:11:21 PM PDT 24 1607183140 ps
T240 /workspace/coverage/default/30.sram_ctrl_lc_escalation.1776100385 Jun 11 01:17:11 PM PDT 24 Jun 11 01:17:18 PM PDT 24 2341598126 ps
T241 /workspace/coverage/default/49.sram_ctrl_executable.3636849811 Jun 11 01:21:54 PM PDT 24 Jun 11 01:35:47 PM PDT 24 37769502068 ps
T242 /workspace/coverage/default/13.sram_ctrl_access_during_key_req.3798020872 Jun 11 01:12:40 PM PDT 24 Jun 11 01:16:08 PM PDT 24 1982603789 ps
T243 /workspace/coverage/default/5.sram_ctrl_lc_escalation.1623977436 Jun 11 01:10:58 PM PDT 24 Jun 11 01:11:08 PM PDT 24 1089385051 ps
T244 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.47144817 Jun 11 01:20:51 PM PDT 24 Jun 11 01:21:40 PM PDT 24 404062635 ps
T245 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.4049058260 Jun 11 01:11:45 PM PDT 24 Jun 11 01:12:37 PM PDT 24 3513450307 ps
T246 /workspace/coverage/default/28.sram_ctrl_multiple_keys.1829898273 Jun 11 01:16:26 PM PDT 24 Jun 11 01:31:24 PM PDT 24 57035647425 ps
T247 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.2181873510 Jun 11 01:21:30 PM PDT 24 Jun 11 01:25:18 PM PDT 24 2372984633 ps
T248 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1857638654 Jun 11 01:19:24 PM PDT 24 Jun 11 02:00:47 PM PDT 24 91279822137 ps
T249 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.381516712 Jun 11 01:18:04 PM PDT 24 Jun 11 01:18:07 PM PDT 24 41633636 ps
T57 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2910970231 Jun 11 01:11:34 PM PDT 24 Jun 11 01:12:53 PM PDT 24 560095353 ps
T250 /workspace/coverage/default/5.sram_ctrl_ram_cfg.657744434 Jun 11 01:10:55 PM PDT 24 Jun 11 01:10:57 PM PDT 24 75926086 ps
T251 /workspace/coverage/default/14.sram_ctrl_executable.1042719363 Jun 11 01:13:08 PM PDT 24 Jun 11 01:19:23 PM PDT 24 9343644345 ps
T252 /workspace/coverage/default/4.sram_ctrl_alert_test.3822343329 Jun 11 01:10:54 PM PDT 24 Jun 11 01:10:56 PM PDT 24 94810537 ps
T253 /workspace/coverage/default/0.sram_ctrl_partial_access.501297239 Jun 11 01:10:18 PM PDT 24 Jun 11 01:10:36 PM PDT 24 3361554454 ps
T254 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3951096699 Jun 11 01:17:44 PM PDT 24 Jun 11 01:25:00 PM PDT 24 16517103829 ps
T255 /workspace/coverage/default/12.sram_ctrl_ram_cfg.2162094595 Jun 11 01:12:28 PM PDT 24 Jun 11 01:12:29 PM PDT 24 26842172 ps
T256 /workspace/coverage/default/3.sram_ctrl_stress_all.694020449 Jun 11 01:10:42 PM PDT 24 Jun 11 02:34:44 PM PDT 24 237621314983 ps
T257 /workspace/coverage/default/19.sram_ctrl_smoke.3041858862 Jun 11 01:14:11 PM PDT 24 Jun 11 01:14:29 PM PDT 24 2761261790 ps
T39 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.1472484128 Jun 11 01:15:34 PM PDT 24 Jun 11 01:15:41 PM PDT 24 351052238 ps
T258 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.609342505 Jun 11 01:21:33 PM PDT 24 Jun 11 01:21:35 PM PDT 24 72014332 ps
T259 /workspace/coverage/default/3.sram_ctrl_mem_walk.785600531 Jun 11 01:10:43 PM PDT 24 Jun 11 01:10:50 PM PDT 24 3698342276 ps
T260 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3478950753 Jun 11 01:16:06 PM PDT 24 Jun 11 01:16:08 PM PDT 24 251190750 ps
T261 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.2354744587 Jun 11 01:13:09 PM PDT 24 Jun 11 01:13:16 PM PDT 24 649989844 ps
T262 /workspace/coverage/default/13.sram_ctrl_ram_cfg.2213970236 Jun 11 01:12:40 PM PDT 24 Jun 11 01:12:42 PM PDT 24 26119771 ps
T263 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.716047710 Jun 11 01:19:23 PM PDT 24 Jun 11 01:20:11 PM PDT 24 409437537 ps
T264 /workspace/coverage/default/27.sram_ctrl_alert_test.2379988132 Jun 11 01:16:26 PM PDT 24 Jun 11 01:16:29 PM PDT 24 14487544 ps
T265 /workspace/coverage/default/3.sram_ctrl_alert_test.3032545622 Jun 11 01:10:44 PM PDT 24 Jun 11 01:10:45 PM PDT 24 17328981 ps
T266 /workspace/coverage/default/32.sram_ctrl_executable.1773101599 Jun 11 01:17:33 PM PDT 24 Jun 11 01:22:49 PM PDT 24 1627309976 ps
T267 /workspace/coverage/default/6.sram_ctrl_regwen.1985215799 Jun 11 01:11:13 PM PDT 24 Jun 11 01:23:04 PM PDT 24 12493823474 ps
T34 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.918564375 Jun 11 01:14:41 PM PDT 24 Jun 11 01:14:47 PM PDT 24 209090466 ps
T268 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4086131427 Jun 11 01:21:18 PM PDT 24 Jun 11 01:24:52 PM PDT 24 19850149057 ps
T40 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.1120203434 Jun 11 01:16:35 PM PDT 24 Jun 11 01:16:39 PM PDT 24 62606832 ps
T269 /workspace/coverage/default/21.sram_ctrl_bijection.1251087550 Jun 11 01:14:39 PM PDT 24 Jun 11 01:15:03 PM PDT 24 368103324 ps
T270 /workspace/coverage/default/37.sram_ctrl_executable.2824251572 Jun 11 01:19:11 PM PDT 24 Jun 11 01:35:35 PM PDT 24 11226649734 ps
T271 /workspace/coverage/default/29.sram_ctrl_bijection.2251456381 Jun 11 01:16:46 PM PDT 24 Jun 11 01:17:57 PM PDT 24 1075716252 ps
T272 /workspace/coverage/default/3.sram_ctrl_regwen.1948141846 Jun 11 01:10:42 PM PDT 24 Jun 11 01:30:31 PM PDT 24 39458201203 ps
T58 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2536808673 Jun 11 01:17:33 PM PDT 24 Jun 11 01:19:02 PM PDT 24 413813616 ps
T41 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3399195427 Jun 11 01:21:42 PM PDT 24 Jun 11 01:24:57 PM PDT 24 1449961075 ps
T273 /workspace/coverage/default/40.sram_ctrl_bijection.1119352861 Jun 11 01:19:49 PM PDT 24 Jun 11 01:20:04 PM PDT 24 449416808 ps
T274 /workspace/coverage/default/1.sram_ctrl_regwen.1986667621 Jun 11 01:10:19 PM PDT 24 Jun 11 01:43:26 PM PDT 24 102141538717 ps
T275 /workspace/coverage/default/4.sram_ctrl_smoke.2549440319 Jun 11 01:10:44 PM PDT 24 Jun 11 01:10:57 PM PDT 24 372773325 ps
T276 /workspace/coverage/default/45.sram_ctrl_regwen.2113153356 Jun 11 01:21:03 PM PDT 24 Jun 11 01:33:56 PM PDT 24 2471731008 ps
T277 /workspace/coverage/default/7.sram_ctrl_multiple_keys.3528855221 Jun 11 01:11:14 PM PDT 24 Jun 11 01:22:18 PM PDT 24 1958600829 ps
T278 /workspace/coverage/default/7.sram_ctrl_lc_escalation.1947266563 Jun 11 01:11:17 PM PDT 24 Jun 11 01:11:23 PM PDT 24 331792674 ps
T279 /workspace/coverage/default/41.sram_ctrl_lc_escalation.48470296 Jun 11 01:19:59 PM PDT 24 Jun 11 01:20:04 PM PDT 24 341447492 ps
T280 /workspace/coverage/default/40.sram_ctrl_lc_escalation.2186444031 Jun 11 01:19:46 PM PDT 24 Jun 11 01:19:54 PM PDT 24 706751482 ps
T281 /workspace/coverage/default/34.sram_ctrl_bijection.2329797691 Jun 11 01:18:03 PM PDT 24 Jun 11 01:18:40 PM PDT 24 1942174082 ps
T282 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.4061635766 Jun 11 01:15:16 PM PDT 24 Jun 11 01:17:27 PM PDT 24 331116655 ps
T283 /workspace/coverage/default/46.sram_ctrl_smoke.2205384653 Jun 11 01:21:05 PM PDT 24 Jun 11 01:21:09 PM PDT 24 168556454 ps
T284 /workspace/coverage/default/0.sram_ctrl_lc_escalation.3254258037 Jun 11 01:10:17 PM PDT 24 Jun 11 01:10:26 PM PDT 24 7317229842 ps
T285 /workspace/coverage/default/41.sram_ctrl_multiple_keys.1450860606 Jun 11 01:19:59 PM PDT 24 Jun 11 01:37:14 PM PDT 24 53848270914 ps
T30 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3197931775 Jun 11 01:11:14 PM PDT 24 Jun 11 01:11:43 PM PDT 24 868337062 ps
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T287 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2442503259 Jun 11 01:19:23 PM PDT 24 Jun 11 01:19:46 PM PDT 24 475369219 ps
T288 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3464566531 Jun 11 01:11:06 PM PDT 24 Jun 11 01:11:10 PM PDT 24 97480993 ps
T289 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3624538594 Jun 11 01:10:19 PM PDT 24 Jun 11 01:18:12 PM PDT 24 18068574233 ps
T290 /workspace/coverage/default/22.sram_ctrl_lc_escalation.4126893420 Jun 11 01:15:02 PM PDT 24 Jun 11 01:15:11 PM PDT 24 9706169552 ps
T291 /workspace/coverage/default/44.sram_ctrl_regwen.1244112080 Jun 11 01:20:43 PM PDT 24 Jun 11 01:35:55 PM PDT 24 37445605319 ps
T31 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3410029535 Jun 11 01:16:57 PM PDT 24 Jun 11 01:17:55 PM PDT 24 15640800821 ps
T292 /workspace/coverage/default/8.sram_ctrl_lc_escalation.1246353032 Jun 11 01:11:35 PM PDT 24 Jun 11 01:11:44 PM PDT 24 2789673199 ps
T293 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.2107591070 Jun 11 01:19:22 PM PDT 24 Jun 11 01:19:26 PM PDT 24 341804323 ps
T294 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3002693458 Jun 11 01:13:40 PM PDT 24 Jun 11 01:16:06 PM PDT 24 562838014 ps
T295 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.216948390 Jun 11 01:21:32 PM PDT 24 Jun 11 01:21:40 PM PDT 24 776304355 ps
T296 /workspace/coverage/default/44.sram_ctrl_lc_escalation.3215721325 Jun 11 01:20:28 PM PDT 24 Jun 11 01:20:35 PM PDT 24 502264955 ps
T297 /workspace/coverage/default/3.sram_ctrl_max_throughput.2469359095 Jun 11 01:10:45 PM PDT 24 Jun 11 01:10:47 PM PDT 24 71029102 ps
T298 /workspace/coverage/default/2.sram_ctrl_partial_access.256604976 Jun 11 01:10:29 PM PDT 24 Jun 11 01:10:45 PM PDT 24 627729306 ps
T299 /workspace/coverage/default/26.sram_ctrl_executable.3959139903 Jun 11 01:16:06 PM PDT 24 Jun 11 01:25:00 PM PDT 24 13776747281 ps
T300 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.2301195652 Jun 11 01:21:03 PM PDT 24 Jun 11 01:21:09 PM PDT 24 190206889 ps
T301 /workspace/coverage/default/47.sram_ctrl_max_throughput.2224269345 Jun 11 01:21:34 PM PDT 24 Jun 11 01:22:05 PM PDT 24 105338808 ps
T302 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.3120898813 Jun 11 01:13:39 PM PDT 24 Jun 11 01:13:46 PM PDT 24 790729838 ps
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