| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2351740031 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.914173630 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2850552222 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.97901081 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.911226516 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.73337092 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1246810223 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2179634516 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2207974449 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3902889833 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3337847435 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.928149351 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2608578833 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.214210617 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.333777570 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3518175254 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.684774594 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1192038178 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2229791764 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1765178958 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2039860185 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3658799698 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2971753179 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.304242990 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3976151861 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3319008341 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.43783403 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.4269478055 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3449526782 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1082055821 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1714373861 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3545533176 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1508547948 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3958577932 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2743922956 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.67112567 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3706717967 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.512875475 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1139566092 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3434210344 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2199376246 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3917767872 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.709050601 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4118724925 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1883884411 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.231541951 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3240773187 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1498124579 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.601031363 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2415420310 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1728307401 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3655078970 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2978701323 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3766286372 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4176510038 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1403463424 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1478671842 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1786546879 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.336074119 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2250831692 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3414288574 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1550365069 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.4234558457 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2956630946 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3001343097 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3349343529 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2255287852 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.128327976 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.4101826877 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1882452922 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3462793009 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.593779360 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.910109111 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.626035877 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3606755106 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2574981300 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.228160263 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.823473569 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.4032983073 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.513399560 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1646008438 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1766037225 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1285284430 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1739976501 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4033367632 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4253051357 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3075362670 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1800193335 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1094919312 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3244906623 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.950180689 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1049488770 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3067196858 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.4140010221 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2810302361 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3360323950 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.539055489 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1605596508 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3185042414 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3729608573 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1104808381 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2602077721 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2318545463 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2150780351 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.173047564 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3476547233 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1276930929 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1054584513 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2313518733 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2795430511 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.843333784 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2868178052 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2049361895 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1540301952 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.4098601177 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1347336004 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.4028222933 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.483811370 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.14950638 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.986096207 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3388591733 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3236680284 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.966159924 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3117868323 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.417528457 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3953255399 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.605446439 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3223273552 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.3525775821 |
| /workspace/coverage/default/0.sram_ctrl_bijection.83922690 |
| /workspace/coverage/default/0.sram_ctrl_executable.2228762620 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.1967896714 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.1972022204 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1137907108 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.3027100766 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.48827378 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.1873631352 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3791142319 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.3840105148 |
| /workspace/coverage/default/0.sram_ctrl_regwen.2731572041 |
| /workspace/coverage/default/0.sram_ctrl_smoke.3795505720 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.2617014391 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2045201414 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.2951014137 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2651740602 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.3025693604 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.1647945076 |
| /workspace/coverage/default/1.sram_ctrl_bijection.2676561347 |
| /workspace/coverage/default/1.sram_ctrl_executable.2598412924 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.2943497435 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.1747592878 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.1193349657 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.1163730268 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.3494616245 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.1880409288 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3857727705 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.1178048389 |
| /workspace/coverage/default/1.sram_ctrl_regwen.560593644 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.3261824378 |
| /workspace/coverage/default/1.sram_ctrl_smoke.3888195608 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.329900174 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.4102636198 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2430919938 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.1799699924 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.1728123390 |
| /workspace/coverage/default/10.sram_ctrl_bijection.2006055040 |
| /workspace/coverage/default/10.sram_ctrl_executable.1704129040 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.1116861547 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.2254827610 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.3794237452 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.4026183426 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.1086686607 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.3732050436 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.2066069964 |
| /workspace/coverage/default/10.sram_ctrl_regwen.1483658423 |
| /workspace/coverage/default/10.sram_ctrl_smoke.3396324298 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.3910127719 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4236089243 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.3965028209 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.352924578 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3633328340 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.970253589 |
| /workspace/coverage/default/11.sram_ctrl_bijection.2907946939 |
| /workspace/coverage/default/11.sram_ctrl_executable.2229412125 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.2601389179 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.2266296071 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3282517850 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.3638304603 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.1004469425 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.1666586058 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3881304210 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.3944100169 |
| /workspace/coverage/default/11.sram_ctrl_regwen.2565324431 |
| /workspace/coverage/default/11.sram_ctrl_smoke.275628799 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.2657087912 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.78856006 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1519873543 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.697230818 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.1744542254 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.3340729828 |
| /workspace/coverage/default/12.sram_ctrl_bijection.351889612 |
| /workspace/coverage/default/12.sram_ctrl_executable.1660453564 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.2228415681 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.2844836316 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2860448843 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.2387456550 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.1641107848 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.4038153790 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1968449361 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.1186463196 |
| /workspace/coverage/default/12.sram_ctrl_regwen.3363804257 |
| /workspace/coverage/default/12.sram_ctrl_smoke.3321477053 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.266419993 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3207844587 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1854102758 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.2927970867 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.46464306 |
| /workspace/coverage/default/13.sram_ctrl_bijection.584286419 |
| /workspace/coverage/default/13.sram_ctrl_executable.405693159 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.1750114891 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.2171977197 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1558454551 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.1693717889 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.3914774589 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.4010918073 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.85127253 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.1468554132 |
| /workspace/coverage/default/13.sram_ctrl_regwen.4060934570 |
| /workspace/coverage/default/13.sram_ctrl_smoke.2020021016 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.1085537795 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2293054283 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3511126474 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1246639741 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.8880717 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.271852166 |
| /workspace/coverage/default/14.sram_ctrl_bijection.1843459779 |
| /workspace/coverage/default/14.sram_ctrl_executable.4245053415 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.2101836990 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.4065509022 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.3947842086 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.4039471557 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.3978655069 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.2544982232 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3904845431 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.2237664926 |
| /workspace/coverage/default/14.sram_ctrl_regwen.992648059 |
| /workspace/coverage/default/14.sram_ctrl_smoke.2523745547 |
| /workspace/coverage/default/14.sram_ctrl_stress_all.636048280 |
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| /workspace/coverage/default/43.sram_ctrl_max_throughput.476044211 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1345962062 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.59529169 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.536059683 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.563775646 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2296136692 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.1732583213 |
| /workspace/coverage/default/43.sram_ctrl_regwen.259216296 |
| /workspace/coverage/default/43.sram_ctrl_smoke.3171452795 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.589705479 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.4247709800 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.191124278 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.475081113 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.2590887735 |
| /workspace/coverage/default/44.sram_ctrl_bijection.2490955871 |
| /workspace/coverage/default/44.sram_ctrl_executable.1270971738 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.1291430132 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.2717715956 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3550634 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.1201173055 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.40357213 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.3055636942 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.447388713 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.1828358159 |
| /workspace/coverage/default/44.sram_ctrl_regwen.2654415771 |
| /workspace/coverage/default/44.sram_ctrl_smoke.1686714450 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.1522857453 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3979653365 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.263104067 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3201622242 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.2249421601 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.4245570559 |
| /workspace/coverage/default/45.sram_ctrl_bijection.4294404704 |
| /workspace/coverage/default/45.sram_ctrl_executable.621998590 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.3308787369 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.2943639236 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3415678577 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.644561319 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.950019276 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.1842673837 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1830592153 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.3539764799 |
| /workspace/coverage/default/45.sram_ctrl_regwen.3552896314 |
| /workspace/coverage/default/45.sram_ctrl_smoke.2337386828 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.4128771464 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4143716299 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2074582859 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2523552530 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.4105028083 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.3595346903 |
| /workspace/coverage/default/46.sram_ctrl_bijection.1467297557 |
| /workspace/coverage/default/46.sram_ctrl_executable.2853781740 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.1354684558 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.1470982357 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2423832324 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.1512879298 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.223716467 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.2106774917 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2644388951 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.2226293590 |
| /workspace/coverage/default/46.sram_ctrl_regwen.3504518327 |
| /workspace/coverage/default/46.sram_ctrl_smoke.1151350918 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4269266300 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.2556805170 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.4186016138 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3280407356 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.1532851653 |
| /workspace/coverage/default/47.sram_ctrl_bijection.422942686 |
| /workspace/coverage/default/47.sram_ctrl_executable.652440802 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.2841541794 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.964859466 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1642737561 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.963727237 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.3446063749 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.2863573419 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1664239962 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.532338707 |
| /workspace/coverage/default/47.sram_ctrl_regwen.2517297760 |
| /workspace/coverage/default/47.sram_ctrl_smoke.770632778 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.3208177749 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3130126843 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.214118215 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3924741815 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.931587210 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.1649493466 |
| /workspace/coverage/default/48.sram_ctrl_bijection.1221048977 |
| /workspace/coverage/default/48.sram_ctrl_executable.3060992336 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.407634677 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.1109668315 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2210514575 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.26483275 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.357453851 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.229071254 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1722491917 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.3091459318 |
| /workspace/coverage/default/48.sram_ctrl_regwen.178622705 |
| /workspace/coverage/default/48.sram_ctrl_smoke.3108094197 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.727540963 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.742409293 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.3261057611 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.2325126136 |
| /workspace/coverage/default/49.sram_ctrl_bijection.621103265 |
| /workspace/coverage/default/49.sram_ctrl_executable.1690089387 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.1003979301 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.3230186683 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.829049958 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.1942627001 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.2618815431 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.3610340977 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1789234936 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.4291690005 |
| /workspace/coverage/default/49.sram_ctrl_regwen.758564172 |
| /workspace/coverage/default/49.sram_ctrl_smoke.866700182 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.2486837857 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2613072099 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3542462673 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2939748549 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.1377004282 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.2964206155 |
| /workspace/coverage/default/5.sram_ctrl_bijection.4136438188 |
| /workspace/coverage/default/5.sram_ctrl_executable.1208775495 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.2995958987 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.2660372046 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3401257201 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.1659072219 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.2323095183 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.4024168862 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3759944760 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.38628647 |
| /workspace/coverage/default/5.sram_ctrl_regwen.2059468864 |
| /workspace/coverage/default/5.sram_ctrl_smoke.1540370978 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.2098739625 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.122548256 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2610603425 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.3383131319 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.2522127507 |
| /workspace/coverage/default/6.sram_ctrl_bijection.782724268 |
| /workspace/coverage/default/6.sram_ctrl_executable.3476497943 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.1088962826 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.548349263 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1490188051 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.1535864133 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.2158487894 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.498531715 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3264474171 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.3609678946 |
| /workspace/coverage/default/6.sram_ctrl_regwen.3777993905 |
| /workspace/coverage/default/6.sram_ctrl_smoke.3949718288 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.2875892796 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.594356786 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.3995853809 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1338476535 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3433905213 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.1512630271 |
| /workspace/coverage/default/7.sram_ctrl_bijection.1510648720 |
| /workspace/coverage/default/7.sram_ctrl_executable.677908361 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.1010360137 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.2747446687 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.4068955553 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.8217102 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.1628960579 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.913926628 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1277724261 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.2385602539 |
| /workspace/coverage/default/7.sram_ctrl_regwen.2481081824 |
| /workspace/coverage/default/7.sram_ctrl_smoke.2719233814 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.622873402 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3277353175 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3348796655 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2320483644 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.1635416045 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.1978799705 |
| /workspace/coverage/default/8.sram_ctrl_bijection.955548253 |
| /workspace/coverage/default/8.sram_ctrl_executable.2849211327 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.598057444 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.1397037854 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1612853922 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.106838787 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.1053610327 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.3407513371 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.263073557 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.325870049 |
| /workspace/coverage/default/8.sram_ctrl_regwen.3900373127 |
| /workspace/coverage/default/8.sram_ctrl_smoke.2558906622 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3787744270 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3194978699 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2611492666 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1575922854 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.1568892680 |
| /workspace/coverage/default/9.sram_ctrl_bijection.3039739461 |
| /workspace/coverage/default/9.sram_ctrl_executable.272890729 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.2299555746 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.2330706190 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3914259339 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.2810420258 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.1021577923 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.1263058443 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1924488966 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.3226306899 |
| /workspace/coverage/default/9.sram_ctrl_regwen.3215914192 |
| /workspace/coverage/default/9.sram_ctrl_smoke.2599643107 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.3983968445 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1661401947 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2723220161 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.3184800890 |
|
|
Jun 21 04:52:10 PM PDT 24 |
Jun 21 04:58:30 PM PDT 24 |
19622882306 ps |
| T2 |
/workspace/coverage/default/43.sram_ctrl_access_during_key_req.1280373400 |
|
|
Jun 21 04:52:23 PM PDT 24 |
Jun 21 05:08:05 PM PDT 24 |
3346247997 ps |
| T3 |
/workspace/coverage/default/39.sram_ctrl_smoke.2267980015 |
|
|
Jun 21 04:52:12 PM PDT 24 |
Jun 21 04:52:21 PM PDT 24 |
566405920 ps |
| T4 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1053610327 |
|
|
Jun 21 04:50:09 PM PDT 24 |
Jun 21 05:10:35 PM PDT 24 |
56140365082 ps |
| T6 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1226025375 |
|
|
Jun 21 04:51:16 PM PDT 24 |
Jun 21 04:51:28 PM PDT 24 |
734770413 ps |
| T5 |
/workspace/coverage/default/21.sram_ctrl_multiple_keys.738535296 |
|
|
Jun 21 04:50:36 PM PDT 24 |
Jun 21 04:57:50 PM PDT 24 |
12584226150 ps |
| T9 |
/workspace/coverage/default/13.sram_ctrl_executable.405693159 |
|
|
Jun 21 04:50:20 PM PDT 24 |
Jun 21 05:14:33 PM PDT 24 |
16701074726 ps |
| T10 |
/workspace/coverage/default/24.sram_ctrl_regwen.600932873 |
|
|
Jun 21 04:51:07 PM PDT 24 |
Jun 21 05:10:59 PM PDT 24 |
2857174029 ps |
| T11 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.4031229045 |
|
|
Jun 21 04:51:14 PM PDT 24 |
Jun 21 04:52:03 PM PDT 24 |
116326493 ps |
| T12 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1628960579 |
|
|
Jun 21 04:50:14 PM PDT 24 |
Jun 21 04:58:16 PM PDT 24 |
22436299529 ps |
| T20 |
/workspace/coverage/default/7.sram_ctrl_regwen.2481081824 |
|
|
Jun 21 04:50:14 PM PDT 24 |
Jun 21 05:00:14 PM PDT 24 |
5330389155 ps |
| T41 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3383131319 |
|
|
Jun 21 04:50:05 PM PDT 24 |
Jun 21 04:57:08 PM PDT 24 |
6922969754 ps |
| T63 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.3130875439 |
|
|
Jun 21 04:51:44 PM PDT 24 |
Jun 21 05:03:19 PM PDT 24 |
28768068464 ps |
| T64 |
/workspace/coverage/default/43.sram_ctrl_partial_access.563775646 |
|
|
Jun 21 04:52:27 PM PDT 24 |
Jun 21 04:53:21 PM PDT 24 |
150449347 ps |
| T23 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.2438116237 |
|
|
Jun 21 04:52:22 PM PDT 24 |
Jun 21 04:53:43 PM PDT 24 |
1604652533 ps |
| T27 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.532338707 |
|
|
Jun 21 04:52:49 PM PDT 24 |
Jun 21 04:52:53 PM PDT 24 |
76254311 ps |
| T42 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1918416419 |
|
|
Jun 21 04:52:13 PM PDT 24 |
Jun 21 04:54:28 PM PDT 24 |
2558469225 ps |
| T43 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.26483275 |
|
|
Jun 21 04:52:55 PM PDT 24 |
Jun 21 04:53:06 PM PDT 24 |
463080262 ps |
| T50 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.971773504 |
|
|
Jun 21 04:50:29 PM PDT 24 |
Jun 21 04:55:03 PM PDT 24 |
2967603948 ps |
| T24 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3103609450 |
|
|
Jun 21 04:52:40 PM PDT 24 |
Jun 21 05:22:32 PM PDT 24 |
25578485646 ps |
| T51 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.895234731 |
|
|
Jun 21 04:51:00 PM PDT 24 |
Jun 21 05:13:33 PM PDT 24 |
36577372565 ps |
| T7 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2299555746 |
|
|
Jun 21 04:50:18 PM PDT 24 |
Jun 21 04:50:21 PM PDT 24 |
248542758 ps |
| T52 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.293383441 |
|
|
Jun 21 04:50:51 PM PDT 24 |
Jun 21 04:53:00 PM PDT 24 |
504657599 ps |
| T53 |
/workspace/coverage/default/23.sram_ctrl_bijection.1335660772 |
|
|
Jun 21 04:50:57 PM PDT 24 |
Jun 21 04:51:58 PM PDT 24 |
993506538 ps |
| T77 |
/workspace/coverage/default/40.sram_ctrl_smoke.4037654074 |
|
|
Jun 21 04:52:11 PM PDT 24 |
Jun 21 04:53:10 PM PDT 24 |
470059502 ps |
| T146 |
/workspace/coverage/default/6.sram_ctrl_smoke.3949718288 |
|
|
Jun 21 04:50:01 PM PDT 24 |
Jun 21 04:51:04 PM PDT 24 |
462582155 ps |
| T101 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3194978699 |
|
|
Jun 21 04:50:09 PM PDT 24 |
Jun 21 04:53:51 PM PDT 24 |
19859437879 ps |
| T147 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1397037854 |
|
|
Jun 21 04:50:11 PM PDT 24 |
Jun 21 04:50:39 PM PDT 24 |
364820129 ps |
| T78 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.3107225566 |
|
|
Jun 21 04:51:30 PM PDT 24 |
Jun 21 04:54:00 PM PDT 24 |
16026702512 ps |
| T13 |
/workspace/coverage/default/21.sram_ctrl_alert_test.1090999876 |
|
|
Jun 21 04:50:51 PM PDT 24 |
Jun 21 04:50:54 PM PDT 24 |
18420836 ps |
| T8 |
/workspace/coverage/default/1.sram_ctrl_stress_all.2002732354 |
|
|
Jun 21 04:49:29 PM PDT 24 |
Jun 21 05:40:14 PM PDT 24 |
117575734977 ps |
| T44 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.2525234527 |
|
|
Jun 21 04:50:39 PM PDT 24 |
Jun 21 04:50:45 PM PDT 24 |
101780483 ps |
| T148 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.2796259040 |
|
|
Jun 21 04:52:11 PM PDT 24 |
Jun 21 04:53:52 PM PDT 24 |
1458548864 ps |
| T25 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3023171142 |
|
|
Jun 21 04:50:33 PM PDT 24 |
Jun 21 04:53:17 PM PDT 24 |
5952553172 ps |
| T149 |
/workspace/coverage/default/35.sram_ctrl_smoke.2262635333 |
|
|
Jun 21 04:51:41 PM PDT 24 |
Jun 21 04:51:52 PM PDT 24 |
507569302 ps |
| T150 |
/workspace/coverage/default/2.sram_ctrl_partial_access.359056784 |
|
|
Jun 21 04:49:46 PM PDT 24 |
Jun 21 04:49:50 PM PDT 24 |
56251039 ps |
| T151 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.3533847155 |
|
|
Jun 21 04:51:50 PM PDT 24 |
Jun 21 04:51:52 PM PDT 24 |
44230763 ps |
| T152 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2611492666 |
|
|
Jun 21 04:50:07 PM PDT 24 |
Jun 21 04:52:32 PM PDT 24 |
972020726 ps |
| T144 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.696962857 |
|
|
Jun 21 04:51:07 PM PDT 24 |
Jun 21 05:01:43 PM PDT 24 |
3037006587 ps |
| T102 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.931879737 |
|
|
Jun 21 04:52:12 PM PDT 24 |
Jun 21 04:56:47 PM PDT 24 |
2919563123 ps |
| T132 |
/workspace/coverage/default/6.sram_ctrl_executable.3476497943 |
|
|
Jun 21 04:50:08 PM PDT 24 |
Jun 21 05:01:22 PM PDT 24 |
60135807142 ps |
| T21 |
/workspace/coverage/default/3.sram_ctrl_stress_all.2287920172 |
|
|
Jun 21 04:49:57 PM PDT 24 |
Jun 21 05:15:21 PM PDT 24 |
5670281810 ps |
| T139 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.4045728143 |
|
|
Jun 21 04:51:59 PM PDT 24 |
Jun 21 05:03:12 PM PDT 24 |
170378904902 ps |
| T131 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.243321177 |
|
|
Jun 21 04:50:02 PM PDT 24 |
Jun 21 04:50:11 PM PDT 24 |
143678117 ps |
| T153 |
/workspace/coverage/default/15.sram_ctrl_bijection.1667095461 |
|
|
Jun 21 04:50:26 PM PDT 24 |
Jun 21 04:50:45 PM PDT 24 |
805834510 ps |
| T143 |
/workspace/coverage/default/42.sram_ctrl_smoke.2645510415 |
|
|
Jun 21 04:52:22 PM PDT 24 |
Jun 21 04:52:37 PM PDT 24 |
218234876 ps |
| T154 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1763948570 |
|
|
Jun 21 04:51:33 PM PDT 24 |
Jun 21 04:51:52 PM PDT 24 |
3236409852 ps |
| T155 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2587488089 |
|
|
Jun 21 04:50:34 PM PDT 24 |
Jun 21 04:51:15 PM PDT 24 |
415684144 ps |
| T133 |
/workspace/coverage/default/4.sram_ctrl_executable.3045160806 |
|
|
Jun 21 04:49:58 PM PDT 24 |
Jun 21 04:58:12 PM PDT 24 |
30367557338 ps |
| T14 |
/workspace/coverage/default/48.sram_ctrl_alert_test.1649493466 |
|
|
Jun 21 04:52:57 PM PDT 24 |
Jun 21 04:52:58 PM PDT 24 |
11529492 ps |
| T156 |
/workspace/coverage/default/4.sram_ctrl_smoke.159948510 |
|
|
Jun 21 04:49:58 PM PDT 24 |
Jun 21 04:50:08 PM PDT 24 |
261761318 ps |
| T85 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2210514575 |
|
|
Jun 21 04:52:56 PM PDT 24 |
Jun 21 04:53:00 PM PDT 24 |
165116070 ps |
| T103 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1830592153 |
|
|
Jun 21 04:52:34 PM PDT 24 |
Jun 21 04:56:45 PM PDT 24 |
11995083118 ps |
| T157 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3924741815 |
|
|
Jun 21 04:52:41 PM PDT 24 |
Jun 21 04:53:56 PM PDT 24 |
404939155 ps |
| T26 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.4036639332 |
|
|
Jun 21 04:51:14 PM PDT 24 |
Jun 21 05:02:23 PM PDT 24 |
4729325970 ps |
| T158 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2860535486 |
|
|
Jun 21 04:49:51 PM PDT 24 |
Jun 21 04:51:24 PM PDT 24 |
286610299 ps |
| T86 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.8880717 |
|
|
Jun 21 04:50:31 PM PDT 24 |
Jun 21 04:55:52 PM PDT 24 |
5337917096 ps |
| T87 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4105028083 |
|
|
Jun 21 04:52:41 PM PDT 24 |
Jun 21 05:04:14 PM PDT 24 |
23408000632 ps |
| T134 |
/workspace/coverage/default/32.sram_ctrl_executable.3417470668 |
|
|
Jun 21 04:51:33 PM PDT 24 |
Jun 21 05:12:40 PM PDT 24 |
4287995905 ps |
| T104 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.727540963 |
|
|
Jun 21 04:52:49 PM PDT 24 |
Jun 21 04:55:11 PM PDT 24 |
1436381854 ps |
| T105 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3511126474 |
|
|
Jun 21 04:50:22 PM PDT 24 |
Jun 21 04:55:39 PM PDT 24 |
3285011581 ps |
| T15 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1568892680 |
|
|
Jun 21 04:50:20 PM PDT 24 |
Jun 21 04:50:24 PM PDT 24 |
38883743 ps |
| T159 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.344860051 |
|
|
Jun 21 04:51:21 PM PDT 24 |
Jun 21 04:52:16 PM PDT 24 |
111903678 ps |
| T106 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.4015563090 |
|
|
Jun 21 04:49:44 PM PDT 24 |
Jun 21 04:53:15 PM PDT 24 |
2235728829 ps |
| T160 |
/workspace/coverage/default/9.sram_ctrl_bijection.3039739461 |
|
|
Jun 21 04:50:20 PM PDT 24 |
Jun 21 04:51:31 PM PDT 24 |
1078061584 ps |
| T88 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.3872094753 |
|
|
Jun 21 04:51:32 PM PDT 24 |
Jun 21 04:54:15 PM PDT 24 |
1541117015 ps |
| T161 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.64503161 |
|
|
Jun 21 04:51:17 PM PDT 24 |
Jun 21 04:51:28 PM PDT 24 |
117210236 ps |
| T45 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3789200532 |
|
|
Jun 21 04:52:13 PM PDT 24 |
Jun 21 04:52:24 PM PDT 24 |
252281713 ps |
| T46 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.1891240682 |
|
|
Jun 21 04:50:50 PM PDT 24 |
Jun 21 04:51:03 PM PDT 24 |
448950117 ps |
| T113 |
/workspace/coverage/default/28.sram_ctrl_smoke.2049603809 |
|
|
Jun 21 04:51:17 PM PDT 24 |
Jun 21 04:52:13 PM PDT 24 |
371828132 ps |
| T28 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.3241746610 |
|
|
Jun 21 04:50:31 PM PDT 24 |
Jun 21 04:50:33 PM PDT 24 |
28382708 ps |
| T66 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.2462388987 |
|
|
Jun 21 04:52:14 PM PDT 24 |
Jun 21 04:52:22 PM PDT 24 |
673625401 ps |
| T16 |
/workspace/coverage/default/4.sram_ctrl_alert_test.4275542123 |
|
|
Jun 21 04:50:01 PM PDT 24 |
Jun 21 04:50:02 PM PDT 24 |
12352887 ps |
| T114 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.1109668315 |
|
|
Jun 21 04:52:56 PM PDT 24 |
Jun 21 04:53:34 PM PDT 24 |
347270664 ps |
| T67 |
/workspace/coverage/default/40.sram_ctrl_stress_all.3104470852 |
|
|
Jun 21 04:52:11 PM PDT 24 |
Jun 21 05:00:00 PM PDT 24 |
21495727421 ps |
| T68 |
/workspace/coverage/default/6.sram_ctrl_regwen.3777993905 |
|
|
Jun 21 04:50:07 PM PDT 24 |
Jun 21 05:10:40 PM PDT 24 |
14680501967 ps |
| T115 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3983968445 |
|
|
Jun 21 04:50:17 PM PDT 24 |
Jun 21 04:56:40 PM PDT 24 |
4123227856 ps |
| T22 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.1140941525 |
|
|
Jun 21 04:50:34 PM PDT 24 |
Jun 21 04:50:56 PM PDT 24 |
933425670 ps |
| T29 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.259142576 |
|
|
Jun 21 04:49:54 PM PDT 24 |
Jun 21 04:49:56 PM PDT 24 |
87049688 ps |
| T162 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.3868629704 |
|
|
Jun 21 04:50:37 PM PDT 24 |
Jun 21 04:50:45 PM PDT 24 |
77728239 ps |
| T89 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.1374111824 |
|
|
Jun 21 04:52:15 PM PDT 24 |
Jun 21 04:52:21 PM PDT 24 |
355459823 ps |
| T163 |
/workspace/coverage/default/26.sram_ctrl_multiple_keys.1908762086 |
|
|
Jun 21 04:50:58 PM PDT 24 |
Jun 21 04:57:53 PM PDT 24 |
7628689309 ps |
| T116 |
/workspace/coverage/default/27.sram_ctrl_stress_all.2671505771 |
|
|
Jun 21 04:51:06 PM PDT 24 |
Jun 21 06:03:54 PM PDT 24 |
204108845471 ps |
| T137 |
/workspace/coverage/default/38.sram_ctrl_regwen.2612603568 |
|
|
Jun 21 04:52:14 PM PDT 24 |
Jun 21 05:02:12 PM PDT 24 |
12060557695 ps |
| T164 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1088962826 |
|
|
Jun 21 04:50:08 PM PDT 24 |
Jun 21 04:50:14 PM PDT 24 |
1536842500 ps |
| T165 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.896209849 |
|
|
Jun 21 04:51:32 PM PDT 24 |
Jun 21 04:55:24 PM PDT 24 |
514788799 ps |
| T47 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.1163730268 |
|
|
Jun 21 04:49:34 PM PDT 24 |
Jun 21 04:49:57 PM PDT 24 |
2624817147 ps |
| T166 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.3381511147 |
|
|
Jun 21 04:52:14 PM PDT 24 |
Jun 21 04:52:18 PM PDT 24 |
29384169 ps |
| T90 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1345962062 |
|
|
Jun 21 04:52:18 PM PDT 24 |
Jun 21 04:52:25 PM PDT 24 |
448940897 ps |
| T138 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3104285046 |
|
|
Jun 21 04:50:21 PM PDT 24 |
Jun 21 04:57:57 PM PDT 24 |
18105153508 ps |
| T117 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1750114891 |
|
|
Jun 21 04:50:27 PM PDT 24 |
Jun 21 04:50:35 PM PDT 24 |
608796750 ps |
| T167 |
/workspace/coverage/default/19.sram_ctrl_alert_test.247803087 |
|
|
Jun 21 04:50:36 PM PDT 24 |
Jun 21 04:50:40 PM PDT 24 |
36202158 ps |
| T168 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.697373499 |
|
|
Jun 21 04:49:57 PM PDT 24 |
Jun 21 04:50:38 PM PDT 24 |
107457624 ps |
| T145 |
/workspace/coverage/default/41.sram_ctrl_stress_all.2407848540 |
|
|
Jun 21 04:52:18 PM PDT 24 |
Jun 21 05:11:00 PM PDT 24 |
5032648840 ps |
| T169 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3025693604 |
|
|
Jun 21 04:49:35 PM PDT 24 |
Jun 21 05:09:15 PM PDT 24 |
16790574431 ps |
| T48 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3207844587 |
|
|
Jun 21 04:50:21 PM PDT 24 |
Jun 21 04:54:37 PM PDT 24 |
6586753320 ps |
| T170 |
/workspace/coverage/default/13.sram_ctrl_alert_test.2292264373 |
|
|
Jun 21 04:50:23 PM PDT 24 |
Jun 21 04:50:27 PM PDT 24 |
41982978 ps |
| T49 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3130126843 |
|
|
Jun 21 04:52:50 PM PDT 24 |
Jun 21 04:53:53 PM PDT 24 |
770861926 ps |
| T171 |
/workspace/coverage/default/47.sram_ctrl_bijection.422942686 |
|
|
Jun 21 04:52:45 PM PDT 24 |
Jun 21 04:53:49 PM PDT 24 |
32276393526 ps |
| T172 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3105959224 |
|
|
Jun 21 04:51:21 PM PDT 24 |
Jun 21 04:51:55 PM PDT 24 |
1362896313 ps |
| T135 |
/workspace/coverage/default/11.sram_ctrl_executable.2229412125 |
|
|
Jun 21 04:50:19 PM PDT 24 |
Jun 21 05:10:51 PM PDT 24 |
23224527968 ps |
| T173 |
/workspace/coverage/default/13.sram_ctrl_stress_all.1085537795 |
|
|
Jun 21 04:50:22 PM PDT 24 |
Jun 21 05:49:22 PM PDT 24 |
183479596045 ps |
| T174 |
/workspace/coverage/default/13.sram_ctrl_partial_access.4010918073 |
|
|
Jun 21 04:50:21 PM PDT 24 |
Jun 21 04:50:30 PM PDT 24 |
808147405 ps |
| T91 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1490188051 |
|
|
Jun 21 04:50:09 PM PDT 24 |
Jun 21 04:50:16 PM PDT 24 |
238666972 ps |
| T175 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.2349964980 |
|
|
Jun 21 04:51:14 PM PDT 24 |
Jun 21 04:53:32 PM PDT 24 |
532625437 ps |
| T176 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.2492972206 |
|
|
Jun 21 04:50:35 PM PDT 24 |
Jun 21 04:50:42 PM PDT 24 |
1393276902 ps |
| T177 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3308787369 |
|
|
Jun 21 04:52:35 PM PDT 24 |
Jun 21 04:52:46 PM PDT 24 |
3337820798 ps |
| T178 |
/workspace/coverage/default/27.sram_ctrl_smoke.3661846192 |
|
|
Jun 21 04:51:06 PM PDT 24 |
Jun 21 04:51:14 PM PDT 24 |
1183746466 ps |
| T136 |
/workspace/coverage/default/37.sram_ctrl_stress_all.1044022154 |
|
|
Jun 21 04:51:58 PM PDT 24 |
Jun 21 05:23:54 PM PDT 24 |
5815030752 ps |
| T179 |
/workspace/coverage/default/11.sram_ctrl_smoke.275628799 |
|
|
Jun 21 04:50:21 PM PDT 24 |
Jun 21 04:50:26 PM PDT 24 |
98148761 ps |
| T180 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3521641290 |
|
|
Jun 21 04:52:20 PM PDT 24 |
Jun 21 04:53:05 PM PDT 24 |
207246043 ps |
| T181 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.2456194 |
|
|
Jun 21 04:50:33 PM PDT 24 |
Jun 21 05:01:27 PM PDT 24 |
2768089846 ps |
| T140 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.85127253 |
|
|
Jun 21 04:50:22 PM PDT 24 |
Jun 21 04:56:11 PM PDT 24 |
64618071068 ps |
| T182 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.2666601549 |
|
|
Jun 21 04:50:34 PM PDT 24 |
Jun 21 04:51:02 PM PDT 24 |
1230958877 ps |
| T183 |
/workspace/coverage/default/10.sram_ctrl_executable.1704129040 |
|
|
Jun 21 04:50:23 PM PDT 24 |
Jun 21 05:03:19 PM PDT 24 |
6572605921 ps |
| T184 |
/workspace/coverage/default/10.sram_ctrl_bijection.2006055040 |
|
|
Jun 21 04:50:18 PM PDT 24 |
Jun 21 04:51:17 PM PDT 24 |
1770330820 ps |
| T185 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.475081113 |
|
|
Jun 21 04:52:34 PM PDT 24 |
Jun 21 05:07:12 PM PDT 24 |
17795149540 ps |
| T54 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4236089243 |
|
|
Jun 21 04:50:24 PM PDT 24 |
Jun 21 04:51:38 PM PDT 24 |
2971651889 ps |
| T186 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.1736569981 |
|
|
Jun 21 04:51:32 PM PDT 24 |
Jun 21 04:51:35 PM PDT 24 |
28933102 ps |
| T141 |
/workspace/coverage/default/31.sram_ctrl_executable.19043766 |
|
|
Jun 21 04:51:34 PM PDT 24 |
Jun 21 05:17:35 PM PDT 24 |
72602916771 ps |
| T187 |
/workspace/coverage/default/41.sram_ctrl_partial_access.4127486474 |
|
|
Jun 21 04:52:12 PM PDT 24 |
Jun 21 04:52:30 PM PDT 24 |
9545139574 ps |
| T188 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2106774917 |
|
|
Jun 21 04:52:33 PM PDT 24 |
Jun 21 04:54:22 PM PDT 24 |
2539925943 ps |
| T65 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1017415195 |
|
|
Jun 21 04:51:41 PM PDT 24 |
Jun 21 04:52:06 PM PDT 24 |
5549713241 ps |
| T189 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.407505522 |
|
|
Jun 21 04:50:37 PM PDT 24 |
Jun 21 04:50:45 PM PDT 24 |
5335113207 ps |
| T190 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.2611719772 |
|
|
Jun 21 04:51:17 PM PDT 24 |
Jun 21 05:16:56 PM PDT 24 |
8055810828 ps |
| T191 |
/workspace/coverage/default/48.sram_ctrl_bijection.1221048977 |
|
|
Jun 21 04:52:48 PM PDT 24 |
Jun 21 04:53:29 PM PDT 24 |
11018847449 ps |
| T192 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1317414642 |
|
|
Jun 21 04:51:16 PM PDT 24 |
Jun 21 05:02:24 PM PDT 24 |
46521554825 ps |
| T193 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3539764799 |
|
|
Jun 21 04:52:35 PM PDT 24 |
Jun 21 04:52:37 PM PDT 24 |
52558071 ps |
| T55 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3128278126 |
|
|
Jun 21 04:50:29 PM PDT 24 |
Jun 21 04:54:06 PM PDT 24 |
1916985547 ps |
| T194 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.1898808415 |
|
|
Jun 21 04:49:42 PM PDT 24 |
Jun 21 05:11:47 PM PDT 24 |
5819727432 ps |
| T195 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1003979301 |
|
|
Jun 21 04:52:57 PM PDT 24 |
Jun 21 04:53:06 PM PDT 24 |
1293876882 ps |
| T196 |
/workspace/coverage/default/36.sram_ctrl_smoke.720267556 |
|
|
Jun 21 04:51:42 PM PDT 24 |
Jun 21 04:52:00 PM PDT 24 |
1557055768 ps |
| T56 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2102957315 |
|
|
Jun 21 04:51:34 PM PDT 24 |
Jun 21 04:51:42 PM PDT 24 |
192788676 ps |
| T197 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.1535864133 |
|
|
Jun 21 04:50:09 PM PDT 24 |
Jun 21 04:50:21 PM PDT 24 |
1525825618 ps |
| T198 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2228415681 |
|
|
Jun 21 04:50:24 PM PDT 24 |
Jun 21 04:50:32 PM PDT 24 |
491320256 ps |
| T199 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.2710899982 |
|
|
Jun 21 04:51:19 PM PDT 24 |
Jun 21 04:54:18 PM PDT 24 |
7266715866 ps |
| T200 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.564430841 |
|
|
Jun 21 04:51:34 PM PDT 24 |
Jun 21 04:53:42 PM PDT 24 |
269830405 ps |
| T201 |
/workspace/coverage/default/47.sram_ctrl_smoke.770632778 |
|
|
Jun 21 04:52:46 PM PDT 24 |
Jun 21 04:53:06 PM PDT 24 |
7862621699 ps |
| T202 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2970054971 |
|
|
Jun 21 04:50:30 PM PDT 24 |
Jun 21 04:50:55 PM PDT 24 |
933148889 ps |
| T203 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.2678850755 |
|
|
Jun 21 04:51:19 PM PDT 24 |
Jun 21 04:51:25 PM PDT 24 |
53703164 ps |
| T204 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1658577663 |
|
|
Jun 21 04:52:12 PM PDT 24 |
Jun 21 04:52:25 PM PDT 24 |
558321825 ps |
| T205 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1439193336 |
|
|
Jun 21 04:50:27 PM PDT 24 |
Jun 21 04:50:33 PM PDT 24 |
1525574954 ps |
| T206 |
/workspace/coverage/default/13.sram_ctrl_bijection.584286419 |
|
|
Jun 21 04:50:18 PM PDT 24 |
Jun 21 04:50:55 PM PDT 24 |
1083776865 ps |
| T207 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.3035449341 |
|
|
Jun 21 04:51:58 PM PDT 24 |
Jun 21 04:51:59 PM PDT 24 |
42519080 ps |
| T208 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.4039471557 |
|
|
Jun 21 04:50:28 PM PDT 24 |
Jun 21 04:50:40 PM PDT 24 |
889520381 ps |
| T209 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.2833978045 |
|
|
Jun 21 04:51:49 PM PDT 24 |
Jun 21 04:53:50 PM PDT 24 |
669273542 ps |
| T210 |
/workspace/coverage/default/38.sram_ctrl_alert_test.4254919047 |
|
|
Jun 21 04:52:11 PM PDT 24 |
Jun 21 04:52:14 PM PDT 24 |
103991809 ps |
| T211 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.1766701153 |
|
|
Jun 21 04:49:43 PM PDT 24 |
Jun 21 04:49:50 PM PDT 24 |
1478020894 ps |
| T142 |
/workspace/coverage/default/20.sram_ctrl_executable.399988932 |
|
|
Jun 21 04:50:34 PM PDT 24 |
Jun 21 05:13:42 PM PDT 24 |
39080529158 ps |
| T212 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.1854102758 |
|
|
Jun 21 04:50:19 PM PDT 24 |
Jun 21 04:56:01 PM PDT 24 |
3408005472 ps |
| T213 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3846890301 |
|
|
Jun 21 04:51:19 PM PDT 24 |
Jun 21 04:59:22 PM PDT 24 |
120963668780 ps |
| T214 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1297348991 |
|
|
Jun 21 04:50:03 PM PDT 24 |
Jun 21 05:33:25 PM PDT 24 |
32681613458 ps |
| T215 |
/workspace/coverage/default/33.sram_ctrl_executable.1533512758 |
|
|
Jun 21 04:51:30 PM PDT 24 |
Jun 21 05:02:43 PM PDT 24 |
2801032888 ps |
| T216 |
/workspace/coverage/default/25.sram_ctrl_stress_all.130902027 |
|
|
Jun 21 04:50:59 PM PDT 24 |
Jun 21 05:33:15 PM PDT 24 |
31619006428 ps |
| T217 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2943639236 |
|
|
Jun 21 04:52:26 PM PDT 24 |
Jun 21 04:54:04 PM PDT 24 |
129873288 ps |
| T218 |
/workspace/coverage/default/15.sram_ctrl_smoke.3615507039 |
|
|
Jun 21 04:50:31 PM PDT 24 |
Jun 21 04:50:42 PM PDT 24 |
2109676467 ps |
| T219 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3433905213 |
|
|
Jun 21 04:50:10 PM PDT 24 |
Jun 21 05:01:24 PM PDT 24 |
3041427197 ps |
| T220 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3007574714 |
|
|
Jun 21 04:52:18 PM PDT 24 |
Jun 21 04:54:26 PM PDT 24 |
280638883 ps |
| T221 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.1213467885 |
|
|
Jun 21 04:51:19 PM PDT 24 |
Jun 21 05:06:43 PM PDT 24 |
3660138022 ps |
| T222 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.3227625028 |
|
|
Jun 21 04:50:29 PM PDT 24 |
Jun 21 04:50:37 PM PDT 24 |
884009608 ps |
| T223 |
/workspace/coverage/default/37.sram_ctrl_alert_test.3869762907 |
|
|
Jun 21 04:52:00 PM PDT 24 |
Jun 21 04:52:02 PM PDT 24 |
14735906 ps |
| T224 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3427075075 |
|
|
Jun 21 04:50:34 PM PDT 24 |
Jun 21 04:50:41 PM PDT 24 |
336920601 ps |
| T225 |
/workspace/coverage/default/18.sram_ctrl_partial_access.1816189499 |
|
|
Jun 21 04:50:38 PM PDT 24 |
Jun 21 04:50:59 PM PDT 24 |
1299338871 ps |
| T226 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2651219705 |
|
|
Jun 21 04:51:40 PM PDT 24 |
Jun 21 04:51:46 PM PDT 24 |
182668202 ps |
| T227 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3965028209 |
|
|
Jun 21 04:50:19 PM PDT 24 |
Jun 21 04:56:24 PM PDT 24 |
3716054114 ps |
| T228 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.4100358265 |
|
|
Jun 21 04:51:30 PM PDT 24 |
Jun 21 04:51:57 PM PDT 24 |
627688115 ps |
| T229 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.2528471019 |
|
|
Jun 21 04:50:31 PM PDT 24 |
Jun 21 04:50:40 PM PDT 24 |
668301621 ps |
| T230 |
/workspace/coverage/default/44.sram_ctrl_bijection.2490955871 |
|
|
Jun 21 04:52:21 PM PDT 24 |
Jun 21 04:52:40 PM PDT 24 |
276178167 ps |
| T231 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.429627929 |
|
|
Jun 21 04:49:43 PM PDT 24 |
Jun 21 04:54:44 PM PDT 24 |
12345918630 ps |
| T232 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3550634 |
|
|
Jun 21 04:52:27 PM PDT 24 |
Jun 21 04:52:34 PM PDT 24 |
722951680 ps |
| T233 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.3937942949 |
|
|
Jun 21 04:51:43 PM PDT 24 |
Jun 21 04:54:46 PM PDT 24 |
2002935347 ps |
| T234 |
/workspace/coverage/default/12.sram_ctrl_bijection.351889612 |
|
|
Jun 21 04:50:21 PM PDT 24 |
Jun 21 04:50:45 PM PDT 24 |
4555519339 ps |
| T235 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.2451425648 |
|
|
Jun 21 04:50:37 PM PDT 24 |
Jun 21 04:50:43 PM PDT 24 |
46573130 ps |
| T236 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1150259682 |
|
|
Jun 21 04:51:20 PM PDT 24 |
Jun 21 04:51:47 PM PDT 24 |
13846262370 ps |
| T237 |
/workspace/coverage/default/41.sram_ctrl_bijection.4158318371 |
|
|
Jun 21 04:52:13 PM PDT 24 |
Jun 21 04:52:53 PM PDT 24 |
578968872 ps |
| T238 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.613557991 |
|
|
Jun 21 04:51:34 PM PDT 24 |
Jun 21 04:51:37 PM PDT 24 |
74832683 ps |
| T239 |
/workspace/coverage/default/26.sram_ctrl_alert_test.796838390 |
|
|
Jun 21 04:51:05 PM PDT 24 |
Jun 21 04:51:07 PM PDT 24 |
12672288 ps |
| T240 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2570016293 |
|
|
Jun 21 04:51:01 PM PDT 24 |
Jun 21 04:57:29 PM PDT 24 |
8943890607 ps |
| T241 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.4204522683 |
|
|
Jun 21 04:50:52 PM PDT 24 |
Jun 21 04:51:00 PM PDT 24 |
148386721 ps |
| T242 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1789234936 |
|
|
Jun 21 04:52:56 PM PDT 24 |
Jun 21 04:56:55 PM PDT 24 |
9443661668 ps |
| T243 |
/workspace/coverage/default/16.sram_ctrl_regwen.1537689842 |
|
|
Jun 21 04:50:31 PM PDT 24 |
Jun 21 04:58:32 PM PDT 24 |
5408212262 ps |
| T244 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1587421344 |
|
|
Jun 21 04:52:12 PM PDT 24 |
Jun 21 04:53:34 PM PDT 24 |
986372147 ps |
| T245 |
/workspace/coverage/default/20.sram_ctrl_alert_test.2584504062 |
|
|
Jun 21 04:50:37 PM PDT 24 |
Jun 21 04:50:41 PM PDT 24 |
13128717 ps |
| T246 |
/workspace/coverage/default/49.sram_ctrl_executable.1690089387 |
|
|
Jun 21 04:52:59 PM PDT 24 |
Jun 21 05:05:16 PM PDT 24 |
32925915857 ps |
| T247 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.566110578 |
|
|
Jun 21 04:51:35 PM PDT 24 |
Jun 21 04:52:19 PM PDT 24 |
8058402461 ps |
| T248 |
/workspace/coverage/default/16.sram_ctrl_alert_test.2673402261 |
|
|
Jun 21 04:50:33 PM PDT 24 |
Jun 21 04:50:37 PM PDT 24 |
37281974 ps |
| T249 |
/workspace/coverage/default/11.sram_ctrl_regwen.2565324431 |
|
|
Jun 21 04:50:20 PM PDT 24 |
Jun 21 05:12:08 PM PDT 24 |
38685105621 ps |
| T250 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.1664478053 |
|
|
Jun 21 04:49:56 PM PDT 24 |
Jun 21 04:50:00 PM PDT 24 |
372904030 ps |
| T251 |
/workspace/coverage/default/23.sram_ctrl_smoke.170288106 |
|
|
Jun 21 04:50:55 PM PDT 24 |
Jun 21 04:51:02 PM PDT 24 |
216790838 ps |
| T252 |
/workspace/coverage/default/17.sram_ctrl_smoke.2276257023 |
|
|
Jun 21 04:50:28 PM PDT 24 |
Jun 21 04:50:36 PM PDT 24 |
281659872 ps |
| T253 |
/workspace/coverage/default/4.sram_ctrl_partial_access.647949038 |
|
|
Jun 21 04:49:55 PM PDT 24 |
Jun 21 04:50:10 PM PDT 24 |
1549068879 ps |
| T254 |
/workspace/coverage/default/45.sram_ctrl_smoke.2337386828 |
|
|
Jun 21 04:52:31 PM PDT 24 |
Jun 21 04:52:33 PM PDT 24 |
233236686 ps |
| T255 |
/workspace/coverage/default/11.sram_ctrl_alert_test.970253589 |
|
|
Jun 21 04:50:21 PM PDT 24 |
Jun 21 04:50:26 PM PDT 24 |
13313283 ps |
| T256 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3611535372 |
|
|
Jun 21 04:51:34 PM PDT 24 |
Jun 21 04:51:37 PM PDT 24 |
48067176 ps |
| T257 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3407513371 |
|
|
Jun 21 04:50:11 PM PDT 24 |
Jun 21 04:50:21 PM PDT 24 |
1996302280 ps |
| T258 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.3892808275 |
|
|
Jun 21 04:50:30 PM PDT 24 |
Jun 21 04:50:36 PM PDT 24 |
79772769 ps |
| T259 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3261057611 |
|
|
Jun 21 04:52:56 PM PDT 24 |
Jun 21 04:54:45 PM PDT 24 |
1401058994 ps |
| T260 |
/workspace/coverage/default/12.sram_ctrl_executable.1660453564 |
|
|
Jun 21 04:50:22 PM PDT 24 |
Jun 21 04:55:03 PM PDT 24 |
4201543151 ps |
| T261 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.3746063233 |
|
|
Jun 21 04:49:44 PM PDT 24 |
Jun 21 04:50:05 PM PDT 24 |
2342058793 ps |
| T262 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2013641015 |
|
|
Jun 21 04:52:13 PM PDT 24 |
Jun 21 04:52:21 PM PDT 24 |
288083008 ps |
| T263 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1968449361 |
|
|
Jun 21 04:50:21 PM PDT 24 |
Jun 21 05:01:53 PM PDT 24 |
57577340274 ps |
| T264 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.4139942188 |
|
|
Jun 21 04:51:50 PM PDT 24 |
Jun 21 04:52:45 PM PDT 24 |
355016621 ps |
| T265 |
/workspace/coverage/default/26.sram_ctrl_partial_access.2862328973 |
|
|
Jun 21 04:50:58 PM PDT 24 |
Jun 21 04:51:18 PM PDT 24 |
316356122 ps |
| T266 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.1906501105 |
|
|
Jun 21 04:52:13 PM PDT 24 |
Jun 21 05:03:03 PM PDT 24 |
2524811554 ps |
| T267 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1942627001 |
|
|
Jun 21 04:53:06 PM PDT 24 |
Jun 21 04:53:19 PM PDT 24 |
462821402 ps |
| T268 |
/workspace/coverage/default/21.sram_ctrl_partial_access.879477179 |
|
|
Jun 21 04:50:50 PM PDT 24 |
Jun 21 04:51:11 PM PDT 24 |
4419096517 ps |
| T269 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3749415004 |
|
|
Jun 21 04:51:03 PM PDT 24 |
Jun 21 04:53:00 PM PDT 24 |
5332512883 ps |
| T270 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2601389179 |
|
|
Jun 21 04:50:26 PM PDT 24 |
Jun 21 04:50:34 PM PDT 24 |
3352960502 ps |
| T271 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.3291524773 |
|
|
Jun 21 04:52:22 PM PDT 24 |
Jun 21 04:52:29 PM PDT 24 |
271393172 ps |
| T272 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.1512879298 |
|
|
Jun 21 04:52:45 PM PDT 24 |
Jun 21 04:52:51 PM PDT 24 |
78182252 ps |
| T108 |
/workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.955099516 |
|
|
Jun 21 04:51:59 PM PDT 24 |
Jun 21 04:52:06 PM PDT 24 |
161180427 ps |
| T273 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2296136692 |
|
|
Jun 21 04:52:22 PM PDT 24 |
Jun 21 04:58:39 PM PDT 24 |
34586495900 ps |
| T274 |
/workspace/coverage/default/45.sram_ctrl_stress_all.4128771464 |
|
|
Jun 21 04:52:35 PM PDT 24 |
Jun 21 05:40:23 PM PDT 24 |
71040427828 ps |
| T275 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.598057444 |
|
|
Jun 21 04:50:10 PM PDT 24 |
Jun 21 04:50:19 PM PDT 24 |
1974909461 ps |
| T276 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.2101836990 |
|
|
Jun 21 04:50:26 PM PDT 24 |
Jun 21 04:50:37 PM PDT 24 |
659049020 ps |
| T277 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2214967808 |
|
|
Jun 21 04:50:33 PM PDT 24 |
Jun 21 04:51:59 PM PDT 24 |
325119099 ps |
| T278 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.644561319 |
|
|
Jun 21 04:52:34 PM PDT 24 |
Jun 21 04:52:42 PM PDT 24 |
233185757 ps |
| T279 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.2805861143 |
|
|
Jun 21 04:50:49 PM PDT 24 |
Jun 21 04:50:52 PM PDT 24 |
116096101 ps |
| T280 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.548349263 |
|
|
Jun 21 04:50:06 PM PDT 24 |
Jun 21 04:52:07 PM PDT 24 |
528863600 ps |
| T281 |
/workspace/coverage/default/34.sram_ctrl_smoke.1650329695 |
|
|
Jun 21 04:51:35 PM PDT 24 |
Jun 21 04:51:45 PM PDT 24 |
752756809 ps |
| T282 |
/workspace/coverage/default/40.sram_ctrl_partial_access.2662306522 |
|
|
Jun 21 04:52:14 PM PDT 24 |
Jun 21 04:52:34 PM PDT 24 |
334891911 ps |
| T283 |
/workspace/coverage/default/27.sram_ctrl_executable.1620976500 |
|
|
Jun 21 04:51:18 PM PDT 24 |
Jun 21 05:00:47 PM PDT 24 |
5896641613 ps |
| T284 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.965353178 |
|
|
Jun 21 04:50:49 PM PDT 24 |
Jun 21 04:59:27 PM PDT 24 |
14894324758 ps |
| T285 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.428986998 |
|
|
Jun 21 04:52:21 PM PDT 24 |
Jun 21 04:52:25 PM PDT 24 |
321236103 ps |
| T286 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3494616245 |
|
|
Jun 21 04:49:35 PM PDT 24 |
Jun 21 04:58:10 PM PDT 24 |
9057433856 ps |
| T287 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1137907108 |
|
|
Jun 21 04:49:35 PM PDT 24 |
Jun 21 04:49:50 PM PDT 24 |
160142807 ps |
| T288 |
/workspace/coverage/default/38.sram_ctrl_access_during_key_req.3213348503 |
|
|
Jun 21 04:52:12 PM PDT 24 |
Jun 21 05:09:26 PM PDT 24 |
3035677743 ps |
| T289 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.609727790 |
|
|
Jun 21 04:51:49 PM PDT 24 |
Jun 21 04:59:56 PM PDT 24 |
17057717848 ps |
| T290 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.263104067 |
|
|
Jun 21 04:52:34 PM PDT 24 |
Jun 21 04:56:52 PM PDT 24 |
10867125612 ps |
| T291 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.599053943 |
|
|
Jun 21 04:50:39 PM PDT 24 |
Jun 21 04:50:42 PM PDT 24 |
75266679 ps |
| T292 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.3903301454 |
|
|
Jun 21 04:52:14 PM PDT 24 |
Jun 21 04:52:27 PM PDT 24 |
694928809 ps |
| T293 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.350544698 |
|
|
Jun 21 04:51:01 PM PDT 24 |
Jun 21 04:51:04 PM PDT 24 |
44041131 ps |
| T294 |
/workspace/coverage/default/29.sram_ctrl_stress_all.2141867770 |
|
|
Jun 21 04:51:25 PM PDT 24 |
Jun 21 05:39:38 PM PDT 24 |
30219003204 ps |
| T295 |
/workspace/coverage/default/30.sram_ctrl_bijection.1103345566 |
|
|
Jun 21 04:51:20 PM PDT 24 |
Jun 21 04:51:36 PM PDT 24 |
530699520 ps |
| T296 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1110660918 |
|
|
Jun 21 04:52:11 PM PDT 24 |
Jun 21 04:52:14 PM PDT 24 |
26824536 ps |
| T297 |
/workspace/coverage/default/23.sram_ctrl_executable.1786920343 |
|
|
Jun 21 04:50:59 PM PDT 24 |
Jun 21 05:04:18 PM PDT 24 |
53996265282 ps |
| T298 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.905220900 |
|
|
Jun 21 04:51:01 PM PDT 24 |
Jun 21 04:51:12 PM PDT 24 |
249229597 ps |
| T299 |
/workspace/coverage/default/3.sram_ctrl_executable.3429282711 |
|
|
Jun 21 04:50:03 PM PDT 24 |
Jun 21 05:11:37 PM PDT 24 |
13084177447 ps |
| T300 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.1081096377 |
|
|
Jun 21 04:51:59 PM PDT 24 |
Jun 21 04:52:03 PM PDT 24 |
59779795 ps |
| T301 |
/workspace/coverage/default/45.sram_ctrl_executable.621998590 |
|
|
Jun 21 04:52:39 PM PDT 24 |
Jun 21 05:09:54 PM PDT 24 |
3157682071 ps |
| T302 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2254827610 |
|
|
Jun 21 04:50:19 PM PDT 24 |
Jun 21 04:50:22 PM PDT 24 |
49877414 ps |
| T303 |
/workspace/coverage/default/46.sram_ctrl_bijection.1467297557 |
|
|
Jun 21 04:52:32 PM PDT 24 |
Jun 21 04:53:14 PM PDT 24 |
7581540965 ps |
| T304 |
/workspace/coverage/default/12.sram_ctrl_stress_all.266419993 |
|
|
Jun 21 04:50:23 PM PDT 24 |
Jun 21 05:01:44 PM PDT 24 |
27903902602 ps |
| T305 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1375914628 |
|
|
Jun 21 04:49:55 PM PDT 24 |
Jun 21 04:50:19 PM PDT 24 |
263994529 ps |
| T306 |
/workspace/coverage/default/18.sram_ctrl_smoke.1959813541 |
|
|
Jun 21 04:50:35 PM PDT 24 |
Jun 21 04:50:53 PM PDT 24 |
956094847 ps |
| T307 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.3027100766 |
|
|
Jun 21 04:49:31 PM PDT 24 |
Jun 21 04:49:53 PM PDT 24 |
2151388591 ps |
| T308 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3759944760 |
|
|
Jun 21 04:50:06 PM PDT 24 |
Jun 21 04:55:41 PM PDT 24 |
21947596199 ps |
| T309 |
/workspace/coverage/default/14.sram_ctrl_executable.4245053415 |
|
|
Jun 21 04:50:33 PM PDT 24 |
Jun 21 04:52:12 PM PDT 24 |
5070961791 ps |
| T310 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.3136211507 |
|
|
Jun 21 04:52:21 PM PDT 24 |
Jun 21 04:56:32 PM PDT 24 |
2538027133 ps |
| T109 |
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3787744270 |
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Jun 21 04:50:10 PM PDT 24 |
Jun 21 04:51:16 PM PDT 24 |
3657174690 ps |