Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1027
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
81.04 81.04 95.68 95.68 80.21 80.21 93.41 93.41 61.90 61.90 85.75 85.75 94.40 94.40 55.94 55.94 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2112930434
87.27 6.23 96.86 1.19 81.87 1.66 95.56 2.15 71.43 9.52 88.41 2.66 95.43 1.03 81.35 25.41 /workspace/coverage/default/25.sram_ctrl_stress_all.1120508521
93.08 5.80 98.73 1.86 84.48 2.61 96.12 0.55 100.00 28.57 93.24 4.83 95.43 0.00 83.55 2.19 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1292546488
94.39 1.31 98.73 0.00 87.32 2.84 97.78 1.66 100.00 0.00 94.44 1.21 95.43 0.00 87.02 3.47 /workspace/coverage/default/12.sram_ctrl_stress_all.4011081568
95.36 0.97 98.90 0.17 87.91 0.59 97.99 0.21 100.00 0.00 95.17 0.72 95.43 0.00 92.14 5.12 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2198324568
95.94 0.58 99.07 0.17 89.69 1.78 98.40 0.42 100.00 0.00 95.89 0.72 96.02 0.59 92.50 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.2020786940
96.32 0.38 99.07 0.00 90.17 0.47 98.40 0.00 100.00 0.00 96.14 0.24 96.17 0.15 94.33 1.83 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3039686940
96.58 0.26 99.07 0.00 90.40 0.24 98.47 0.07 100.00 0.00 96.14 0.00 97.49 1.33 94.52 0.18 /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3452166173
96.80 0.21 99.07 0.00 90.76 0.36 98.89 0.42 100.00 0.00 96.14 0.00 97.49 0.00 95.25 0.73 /workspace/coverage/default/29.sram_ctrl_alert_test.3335438061
96.93 0.13 99.15 0.08 90.76 0.00 99.72 0.83 100.00 0.00 96.14 0.00 97.49 0.00 95.25 0.00 /workspace/coverage/default/10.sram_ctrl_ram_cfg.4030584171
97.06 0.13 99.15 0.00 90.76 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.38 0.88 95.25 0.00 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2617832537
97.18 0.12 99.15 0.00 90.88 0.12 99.72 0.00 100.00 0.00 96.14 0.00 98.38 0.00 95.98 0.73 /workspace/coverage/default/3.sram_ctrl_stress_all.1083775408
97.28 0.11 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.74 95.98 0.00 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1610688384
97.36 0.08 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.53 0.55 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2771940709
97.43 0.07 99.15 0.00 91.00 0.12 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/default/40.sram_ctrl_stress_all.823230501
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2367036878
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1566592588
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.4056726946


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3311696299
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2079164527
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3850964918
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.290191546
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3559919203
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.13938797
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.708111343
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3032434759
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.715198239
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1340820073
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.4089389239
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.280875184
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1130491541
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3632990814
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2535466035
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3890436926
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3392632304
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.4004117719
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.459551579
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2527291151
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.4148790257
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2301011370
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2923747070
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3507259273
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2165639061
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1751564608
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.93598528
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2687110697
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.713162305
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1966244569
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.746252577
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.4184074751
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2716615355
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1986879545
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2583157961
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1565914471
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1294034616
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3043793576
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2909940832
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1626041302
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.367020893
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1791525764
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2715859757
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.637715971
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4115836053
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2418741865
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2466230235
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1456016255
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3174854204
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3129196572
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.441470887
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.12124172
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3107174131
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.539733747
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1517337259
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2299559321
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2997954172
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3685066169
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1571472455
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2683495195
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2380461882
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1732750522
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3614652269
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2227207919
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3655347276
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4259518246
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.413856031
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2655715070
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2593614999
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3848523051
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1860115616
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2948170600
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3704931459
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1756177666
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3872082830
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.27693999
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.240973612
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1714957226
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3194910783
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.799370068
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2395035220
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3401514587
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.766389287
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2174688509
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.499750335
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3927144434
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.4212411589
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.4242136689
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1249249625
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2682312967
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.765606497
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3293714342
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.127839202
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.4099720621
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.975392968
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1112239381
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.905633019
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2960012885
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3175491559
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2420933492
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.75712912
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1589220462
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2572052520
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.67148963
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1376961504
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2679434534
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1697814428
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.592402305
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.811550519
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1581788794
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.421158125
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.943587901
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3968976452
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.828865274
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2239004412
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2110019280
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1366837887
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3587280088
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1466771534
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.164317673
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.702487889
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.751232916
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.209629270
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1714310301
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1035066553
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1253391800
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1022599337
/workspace/coverage/default/0.sram_ctrl_alert_test.3780739734
/workspace/coverage/default/0.sram_ctrl_bijection.2609563174
/workspace/coverage/default/0.sram_ctrl_executable.2721603680
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2636258548
/workspace/coverage/default/0.sram_ctrl_max_throughput.678136631
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.58051704
/workspace/coverage/default/0.sram_ctrl_mem_walk.269133868
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1375867936
/workspace/coverage/default/0.sram_ctrl_partial_access.2339345375
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.418181949
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1950718236
/workspace/coverage/default/0.sram_ctrl_regwen.3187119448
/workspace/coverage/default/0.sram_ctrl_smoke.4258475034
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2541704487
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3647102450
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1871711464
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.4090596511
/workspace/coverage/default/1.sram_ctrl_alert_test.1052246465
/workspace/coverage/default/1.sram_ctrl_bijection.4209312223
/workspace/coverage/default/1.sram_ctrl_executable.1210947761
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3262019844
/workspace/coverage/default/1.sram_ctrl_max_throughput.1701112343
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2244084000
/workspace/coverage/default/1.sram_ctrl_mem_walk.243424775
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1862692146
/workspace/coverage/default/1.sram_ctrl_partial_access.956688028
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.741498807
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2204426677
/workspace/coverage/default/1.sram_ctrl_regwen.1476655017
/workspace/coverage/default/1.sram_ctrl_sec_cm.2779699643
/workspace/coverage/default/1.sram_ctrl_smoke.4268833913
/workspace/coverage/default/1.sram_ctrl_stress_all.965072685
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3578960259
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.4199144587
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3402892196
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2916400498
/workspace/coverage/default/10.sram_ctrl_alert_test.2716754194
/workspace/coverage/default/10.sram_ctrl_bijection.3985190110
/workspace/coverage/default/10.sram_ctrl_executable.3397192796
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2922918977
/workspace/coverage/default/10.sram_ctrl_max_throughput.4177967495
/workspace/coverage/default/10.sram_ctrl_mem_walk.1447600888
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3849659342
/workspace/coverage/default/10.sram_ctrl_partial_access.2773620971
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2133069322
/workspace/coverage/default/10.sram_ctrl_regwen.4257924567
/workspace/coverage/default/10.sram_ctrl_smoke.5003983
/workspace/coverage/default/10.sram_ctrl_stress_all.1118560849
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.141903215
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3585992242
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2104748030
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.4140680461
/workspace/coverage/default/11.sram_ctrl_alert_test.2811999568
/workspace/coverage/default/11.sram_ctrl_bijection.4151695638
/workspace/coverage/default/11.sram_ctrl_executable.4190915393
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1425520357
/workspace/coverage/default/11.sram_ctrl_max_throughput.1231782324
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2235176275
/workspace/coverage/default/11.sram_ctrl_mem_walk.3560989090
/workspace/coverage/default/11.sram_ctrl_multiple_keys.830455422
/workspace/coverage/default/11.sram_ctrl_partial_access.1594900424
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3925063523
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2714367849
/workspace/coverage/default/11.sram_ctrl_regwen.371378737
/workspace/coverage/default/11.sram_ctrl_smoke.2244647332
/workspace/coverage/default/11.sram_ctrl_stress_all.2787287638
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.4228537946
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2897499053
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.237810044
/workspace/coverage/default/12.sram_ctrl_alert_test.3111116565
/workspace/coverage/default/12.sram_ctrl_bijection.3404411771
/workspace/coverage/default/12.sram_ctrl_executable.2954291016
/workspace/coverage/default/12.sram_ctrl_lc_escalation.836521583
/workspace/coverage/default/12.sram_ctrl_max_throughput.1080193859
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3732800075
/workspace/coverage/default/12.sram_ctrl_mem_walk.3909963247
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3283706008
/workspace/coverage/default/12.sram_ctrl_partial_access.1788882771
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.523451840
/workspace/coverage/default/12.sram_ctrl_ram_cfg.196673538
/workspace/coverage/default/12.sram_ctrl_regwen.3062388452
/workspace/coverage/default/12.sram_ctrl_smoke.4159654732
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2852946286
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/workspace/coverage/default/43.sram_ctrl_partial_access.1378163701
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3029185077
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2416857669
/workspace/coverage/default/43.sram_ctrl_regwen.3820537430
/workspace/coverage/default/43.sram_ctrl_smoke.1343532635
/workspace/coverage/default/43.sram_ctrl_stress_all.1638683967
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.4225691521
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1903794802
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.156435413
/workspace/coverage/default/44.sram_ctrl_alert_test.1513670448
/workspace/coverage/default/44.sram_ctrl_bijection.1275171178
/workspace/coverage/default/44.sram_ctrl_executable.3331368495
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2060439053
/workspace/coverage/default/44.sram_ctrl_max_throughput.1259534447
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.942044482
/workspace/coverage/default/44.sram_ctrl_mem_walk.3917495235
/workspace/coverage/default/44.sram_ctrl_multiple_keys.2885138114
/workspace/coverage/default/44.sram_ctrl_partial_access.1012109063
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.4037446420
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3806482120
/workspace/coverage/default/44.sram_ctrl_regwen.778308654
/workspace/coverage/default/44.sram_ctrl_smoke.84149603
/workspace/coverage/default/44.sram_ctrl_stress_all.2178687093
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2031471320
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3995720531
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3565909841
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1709104774
/workspace/coverage/default/45.sram_ctrl_alert_test.3648288721
/workspace/coverage/default/45.sram_ctrl_bijection.1083705742
/workspace/coverage/default/45.sram_ctrl_executable.3321158610
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1411593860
/workspace/coverage/default/45.sram_ctrl_max_throughput.1576167907
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1151611330
/workspace/coverage/default/45.sram_ctrl_mem_walk.2403243226
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1559934909
/workspace/coverage/default/45.sram_ctrl_partial_access.2188776845
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.940333590
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1213440964
/workspace/coverage/default/45.sram_ctrl_regwen.2849650449
/workspace/coverage/default/45.sram_ctrl_smoke.3268911641
/workspace/coverage/default/45.sram_ctrl_stress_all.3577288435
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4277422843
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.308928449
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3741867524
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2276248368
/workspace/coverage/default/46.sram_ctrl_alert_test.2937421770
/workspace/coverage/default/46.sram_ctrl_bijection.3530735904
/workspace/coverage/default/46.sram_ctrl_executable.3783373485
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1252791032
/workspace/coverage/default/46.sram_ctrl_max_throughput.1112238169
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2180339647
/workspace/coverage/default/46.sram_ctrl_mem_walk.885463136
/workspace/coverage/default/46.sram_ctrl_multiple_keys.885232025
/workspace/coverage/default/46.sram_ctrl_partial_access.858169631
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1971506354
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1385314773
/workspace/coverage/default/46.sram_ctrl_regwen.398561071
/workspace/coverage/default/46.sram_ctrl_smoke.3300946582
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1956545257
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2271638645
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3389574973
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1964281654
/workspace/coverage/default/47.sram_ctrl_alert_test.2412804924
/workspace/coverage/default/47.sram_ctrl_bijection.4076906249
/workspace/coverage/default/47.sram_ctrl_executable.1727019232
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3363482694
/workspace/coverage/default/47.sram_ctrl_max_throughput.969608607
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3155340518
/workspace/coverage/default/47.sram_ctrl_mem_walk.3291946941
/workspace/coverage/default/47.sram_ctrl_multiple_keys.378375007
/workspace/coverage/default/47.sram_ctrl_partial_access.2057429525
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1082498650
/workspace/coverage/default/47.sram_ctrl_ram_cfg.475514859
/workspace/coverage/default/47.sram_ctrl_regwen.410292566
/workspace/coverage/default/47.sram_ctrl_smoke.3077709737
/workspace/coverage/default/47.sram_ctrl_stress_all.2853773847
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.4202053803
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2967707913
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3001411410
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2367732313
/workspace/coverage/default/48.sram_ctrl_alert_test.1659464439
/workspace/coverage/default/48.sram_ctrl_bijection.359893691
/workspace/coverage/default/48.sram_ctrl_executable.639883056
/workspace/coverage/default/48.sram_ctrl_lc_escalation.243309775
/workspace/coverage/default/48.sram_ctrl_max_throughput.1896010904
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1842379296
/workspace/coverage/default/48.sram_ctrl_mem_walk.3417159076
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2855195299
/workspace/coverage/default/48.sram_ctrl_partial_access.1806792503
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1026090791
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2120015449
/workspace/coverage/default/48.sram_ctrl_regwen.86211835
/workspace/coverage/default/48.sram_ctrl_smoke.1260269332
/workspace/coverage/default/48.sram_ctrl_stress_all.551160691
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1935281910
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2164350797
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.94315964
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1584155435
/workspace/coverage/default/49.sram_ctrl_alert_test.2772489751
/workspace/coverage/default/49.sram_ctrl_bijection.704522950
/workspace/coverage/default/49.sram_ctrl_executable.1306475987
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2784352184
/workspace/coverage/default/49.sram_ctrl_max_throughput.2488145669
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2820080824
/workspace/coverage/default/49.sram_ctrl_mem_walk.3523050928
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2157301374
/workspace/coverage/default/49.sram_ctrl_partial_access.3495733984
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3884733480
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3257975399
/workspace/coverage/default/49.sram_ctrl_regwen.4148438766
/workspace/coverage/default/49.sram_ctrl_smoke.955793255
/workspace/coverage/default/49.sram_ctrl_stress_all.3954362363
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.276029736
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3048184012
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.392315132
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2876226434
/workspace/coverage/default/5.sram_ctrl_alert_test.504126021
/workspace/coverage/default/5.sram_ctrl_bijection.1132620620
/workspace/coverage/default/5.sram_ctrl_executable.991100482
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1502285570
/workspace/coverage/default/5.sram_ctrl_max_throughput.1308239162
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1591139037
/workspace/coverage/default/5.sram_ctrl_mem_walk.2840443411
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1914516388
/workspace/coverage/default/5.sram_ctrl_partial_access.1596350876
/workspace/coverage/default/5.sram_ctrl_ram_cfg.858567751
/workspace/coverage/default/5.sram_ctrl_regwen.2075764675
/workspace/coverage/default/5.sram_ctrl_smoke.868113450
/workspace/coverage/default/5.sram_ctrl_stress_all.1312046048
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2852409880
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2170555728
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1667564185
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2311865837
/workspace/coverage/default/6.sram_ctrl_alert_test.1221904911
/workspace/coverage/default/6.sram_ctrl_bijection.1925111322
/workspace/coverage/default/6.sram_ctrl_executable.2288984281
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3329860115
/workspace/coverage/default/6.sram_ctrl_max_throughput.380461434
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.4206091034
/workspace/coverage/default/6.sram_ctrl_mem_walk.3452593378
/workspace/coverage/default/6.sram_ctrl_multiple_keys.706583307
/workspace/coverage/default/6.sram_ctrl_partial_access.257360533
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3117214661
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3478249942
/workspace/coverage/default/6.sram_ctrl_regwen.368696499
/workspace/coverage/default/6.sram_ctrl_smoke.970688259
/workspace/coverage/default/6.sram_ctrl_stress_all.2931763793
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2400243731
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1573677744
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.4130539947
/workspace/coverage/default/7.sram_ctrl_alert_test.3894407417
/workspace/coverage/default/7.sram_ctrl_bijection.153102338
/workspace/coverage/default/7.sram_ctrl_executable.378419866
/workspace/coverage/default/7.sram_ctrl_lc_escalation.931994769
/workspace/coverage/default/7.sram_ctrl_max_throughput.1818866836
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.4124562155
/workspace/coverage/default/7.sram_ctrl_mem_walk.3259162998
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3939662128
/workspace/coverage/default/7.sram_ctrl_partial_access.3605627713
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2962848207
/workspace/coverage/default/7.sram_ctrl_ram_cfg.728643897
/workspace/coverage/default/7.sram_ctrl_regwen.3194500227
/workspace/coverage/default/7.sram_ctrl_smoke.2806988548
/workspace/coverage/default/7.sram_ctrl_stress_all.2888459324
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2846124895
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1184883669
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4177664027
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.366947081
/workspace/coverage/default/8.sram_ctrl_alert_test.1451957026
/workspace/coverage/default/8.sram_ctrl_bijection.4167892427
/workspace/coverage/default/8.sram_ctrl_executable.3780642411
/workspace/coverage/default/8.sram_ctrl_lc_escalation.145143447
/workspace/coverage/default/8.sram_ctrl_max_throughput.2832827441
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2226009327
/workspace/coverage/default/8.sram_ctrl_mem_walk.2942802573
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1050558621
/workspace/coverage/default/8.sram_ctrl_partial_access.328432353
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3007238085
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2012420089
/workspace/coverage/default/8.sram_ctrl_regwen.1878994002
/workspace/coverage/default/8.sram_ctrl_smoke.1761407661
/workspace/coverage/default/8.sram_ctrl_stress_all.1920801550
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2363605896
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1555423977
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1006748573
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.314099456
/workspace/coverage/default/9.sram_ctrl_alert_test.2678241890
/workspace/coverage/default/9.sram_ctrl_bijection.787842872
/workspace/coverage/default/9.sram_ctrl_executable.4276237562
/workspace/coverage/default/9.sram_ctrl_lc_escalation.696699110
/workspace/coverage/default/9.sram_ctrl_max_throughput.1611427550
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.137662156
/workspace/coverage/default/9.sram_ctrl_mem_walk.808312053
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2692932128
/workspace/coverage/default/9.sram_ctrl_partial_access.2692171057
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3553408557
/workspace/coverage/default/9.sram_ctrl_ram_cfg.472564559
/workspace/coverage/default/9.sram_ctrl_regwen.2972186864
/workspace/coverage/default/9.sram_ctrl_smoke.1930942908
/workspace/coverage/default/9.sram_ctrl_stress_all.2869244250
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.847509885
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2698349475
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2945827717




Total test records in report: 1027
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/25.sram_ctrl_smoke.885907549 Jun 22 06:14:39 PM PDT 24 Jun 22 06:16:25 PM PDT 24 119824818 ps
T2 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1647305132 Jun 22 06:14:48 PM PDT 24 Jun 22 06:16:54 PM PDT 24 1972117223 ps
T3 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4177664027 Jun 22 06:13:01 PM PDT 24 Jun 22 06:13:41 PM PDT 24 123393600 ps
T4 /workspace/coverage/default/7.sram_ctrl_max_throughput.1818866836 Jun 22 06:13:01 PM PDT 24 Jun 22 06:15:21 PM PDT 24 271942082 ps
T10 /workspace/coverage/default/24.sram_ctrl_bijection.1302056539 Jun 22 06:14:35 PM PDT 24 Jun 22 06:15:39 PM PDT 24 4185312172 ps
T11 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3001411410 Jun 22 06:18:24 PM PDT 24 Jun 22 06:18:42 PM PDT 24 935408871 ps
T5 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.4045361918 Jun 22 06:12:45 PM PDT 24 Jun 22 06:12:52 PM PDT 24 341781901 ps
T12 /workspace/coverage/default/36.sram_ctrl_partial_access.95024055 Jun 22 06:16:28 PM PDT 24 Jun 22 06:16:36 PM PDT 24 293664249 ps
T6 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.23974888 Jun 22 06:14:38 PM PDT 24 Jun 22 06:19:03 PM PDT 24 3364083366 ps
T13 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2112930434 Jun 22 06:13:01 PM PDT 24 Jun 22 06:18:47 PM PDT 24 1015992865 ps
T7 /workspace/coverage/default/25.sram_ctrl_stress_all.1120508521 Jun 22 06:14:56 PM PDT 24 Jun 22 07:35:55 PM PDT 24 9373202506 ps
T14 /workspace/coverage/default/41.sram_ctrl_alert_test.3444476468 Jun 22 06:17:22 PM PDT 24 Jun 22 06:17:24 PM PDT 24 20650888 ps
T43 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3741867524 Jun 22 06:18:00 PM PDT 24 Jun 22 06:20:06 PM PDT 24 571425348 ps
T15 /workspace/coverage/default/29.sram_ctrl_alert_test.3335438061 Jun 22 06:15:22 PM PDT 24 Jun 22 06:15:24 PM PDT 24 17990355 ps
T16 /workspace/coverage/default/2.sram_ctrl_alert_test.1082559230 Jun 22 06:12:43 PM PDT 24 Jun 22 06:12:45 PM PDT 24 12012736 ps
T21 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1038067525 Jun 22 06:13:27 PM PDT 24 Jun 22 06:23:54 PM PDT 24 1434334321 ps
T66 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.3647102450 Jun 22 06:12:34 PM PDT 24 Jun 22 06:17:22 PM PDT 24 47575647148 ps
T67 /workspace/coverage/default/3.sram_ctrl_alert_test.1590347225 Jun 22 06:12:42 PM PDT 24 Jun 22 06:12:44 PM PDT 24 15576604 ps
T22 /workspace/coverage/default/39.sram_ctrl_regwen.2492349894 Jun 22 06:16:55 PM PDT 24 Jun 22 06:23:20 PM PDT 24 50607995471 ps
T42 /workspace/coverage/default/21.sram_ctrl_regwen.4015246290 Jun 22 06:14:15 PM PDT 24 Jun 22 06:26:22 PM PDT 24 38177048305 ps
T80 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1845331201 Jun 22 06:14:26 PM PDT 24 Jun 22 06:19:27 PM PDT 24 3432615405 ps
T81 /workspace/coverage/default/24.sram_ctrl_multiple_keys.1789832532 Jun 22 06:14:35 PM PDT 24 Jun 22 06:17:15 PM PDT 24 5766108494 ps
T27 /workspace/coverage/default/2.sram_ctrl_ram_cfg.2754979070 Jun 22 06:12:41 PM PDT 24 Jun 22 06:12:43 PM PDT 24 32357482 ps
T44 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.1280938872 Jun 22 06:12:45 PM PDT 24 Jun 22 06:43:49 PM PDT 24 9612775277 ps
T98 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1056400045 Jun 22 06:12:38 PM PDT 24 Jun 22 06:15:51 PM PDT 24 7586123876 ps
T142 /workspace/coverage/default/20.sram_ctrl_max_throughput.118532497 Jun 22 06:14:10 PM PDT 24 Jun 22 06:15:45 PM PDT 24 408982971 ps
T41 /workspace/coverage/default/35.sram_ctrl_executable.4213811734 Jun 22 06:16:19 PM PDT 24 Jun 22 06:30:52 PM PDT 24 23520226042 ps
T82 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3039686940 Jun 22 06:12:51 PM PDT 24 Jun 22 06:21:43 PM PDT 24 78977883942 ps
T139 /workspace/coverage/default/42.sram_ctrl_bijection.3220773231 Jun 22 06:17:21 PM PDT 24 Jun 22 06:18:45 PM PDT 24 4981048207 ps
T8 /workspace/coverage/default/12.sram_ctrl_stress_all.4011081568 Jun 22 06:13:27 PM PDT 24 Jun 22 06:38:27 PM PDT 24 96380088118 ps
T49 /workspace/coverage/default/13.sram_ctrl_mem_walk.1250862515 Jun 22 06:13:27 PM PDT 24 Jun 22 06:13:36 PM PDT 24 826203729 ps
T23 /workspace/coverage/default/23.sram_ctrl_regwen.1428636502 Jun 22 06:14:32 PM PDT 24 Jun 22 06:28:30 PM PDT 24 2675462070 ps
T86 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.3182866713 Jun 22 06:14:24 PM PDT 24 Jun 22 06:14:29 PM PDT 24 146293161 ps
T141 /workspace/coverage/default/37.sram_ctrl_partial_access.911829430 Jun 22 06:16:35 PM PDT 24 Jun 22 06:17:11 PM PDT 24 1066462315 ps
T9 /workspace/coverage/default/17.sram_ctrl_stress_all.1804706952 Jun 22 06:14:00 PM PDT 24 Jun 22 06:52:09 PM PDT 24 59014289489 ps
T137 /workspace/coverage/default/28.sram_ctrl_bijection.2772417079 Jun 22 06:15:08 PM PDT 24 Jun 22 06:16:05 PM PDT 24 9873318471 ps
T143 /workspace/coverage/default/43.sram_ctrl_alert_test.3850653229 Jun 22 06:17:38 PM PDT 24 Jun 22 06:17:39 PM PDT 24 14724996 ps
T144 /workspace/coverage/default/10.sram_ctrl_bijection.3985190110 Jun 22 06:13:11 PM PDT 24 Jun 22 06:13:30 PM PDT 24 1064246670 ps
T99 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.3105272714 Jun 22 06:14:32 PM PDT 24 Jun 22 06:19:14 PM PDT 24 11739031666 ps
T51 /workspace/coverage/default/22.sram_ctrl_mem_walk.760148396 Jun 22 06:14:24 PM PDT 24 Jun 22 06:14:30 PM PDT 24 98837858 ps
T64 /workspace/coverage/default/18.sram_ctrl_stress_all.3954438485 Jun 22 06:13:59 PM PDT 24 Jun 22 07:16:57 PM PDT 24 43330142043 ps
T138 /workspace/coverage/default/24.sram_ctrl_smoke.3503019206 Jun 22 06:14:32 PM PDT 24 Jun 22 06:16:52 PM PDT 24 721499129 ps
T145 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.565836191 Jun 22 06:13:25 PM PDT 24 Jun 22 06:13:39 PM PDT 24 71757701 ps
T146 /workspace/coverage/default/44.sram_ctrl_mem_walk.3917495235 Jun 22 06:17:43 PM PDT 24 Jun 22 06:17:53 PM PDT 24 775525330 ps
T100 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.2294027905 Jun 22 06:15:36 PM PDT 24 Jun 22 06:18:42 PM PDT 24 3852251360 ps
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T65 /workspace/coverage/default/34.sram_ctrl_regwen.2766469711 Jun 22 06:16:06 PM PDT 24 Jun 22 06:33:33 PM PDT 24 79181853550 ps
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T147 /workspace/coverage/default/4.sram_ctrl_partial_access.3373673407 Jun 22 06:12:44 PM PDT 24 Jun 22 06:12:49 PM PDT 24 186026618 ps
T87 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.514959870 Jun 22 06:13:59 PM PDT 24 Jun 22 06:14:06 PM PDT 24 1004172417 ps
T148 /workspace/coverage/default/30.sram_ctrl_alert_test.3311565269 Jun 22 06:15:29 PM PDT 24 Jun 22 06:15:30 PM PDT 24 14824133 ps
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T20 /workspace/coverage/default/24.sram_ctrl_lc_escalation.924583161 Jun 22 06:14:39 PM PDT 24 Jun 22 06:14:47 PM PDT 24 1845576553 ps
T150 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1767146112 Jun 22 06:13:33 PM PDT 24 Jun 22 06:14:54 PM PDT 24 781572526 ps
T151 /workspace/coverage/default/21.sram_ctrl_multiple_keys.518553675 Jun 22 06:14:14 PM PDT 24 Jun 22 06:29:09 PM PDT 24 3097438547 ps
T47 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3578960259 Jun 22 06:12:42 PM PDT 24 Jun 22 06:13:07 PM PDT 24 813330636 ps
T72 /workspace/coverage/default/6.sram_ctrl_lc_escalation.3329860115 Jun 22 06:12:52 PM PDT 24 Jun 22 06:12:55 PM PDT 24 680606836 ps
T52 /workspace/coverage/default/18.sram_ctrl_mem_walk.4006282607 Jun 22 06:13:55 PM PDT 24 Jun 22 06:14:06 PM PDT 24 713164016 ps
T101 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.1819256752 Jun 22 06:16:40 PM PDT 24 Jun 22 06:19:20 PM PDT 24 1849440957 ps
T53 /workspace/coverage/default/7.sram_ctrl_mem_walk.3259162998 Jun 22 06:13:07 PM PDT 24 Jun 22 06:13:18 PM PDT 24 1442296332 ps
T152 /workspace/coverage/default/0.sram_ctrl_mem_walk.269133868 Jun 22 06:12:41 PM PDT 24 Jun 22 06:12:50 PM PDT 24 1610729409 ps
T153 /workspace/coverage/default/30.sram_ctrl_smoke.2192791739 Jun 22 06:15:24 PM PDT 24 Jun 22 06:15:27 PM PDT 24 107402891 ps
T50 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2617832537 Jun 22 06:13:11 PM PDT 24 Jun 22 06:13:15 PM PDT 24 206566394 ps
T154 /workspace/coverage/default/6.sram_ctrl_smoke.970688259 Jun 22 06:12:51 PM PDT 24 Jun 22 06:12:59 PM PDT 24 415943366 ps
T45 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.2311865837 Jun 22 06:12:57 PM PDT 24 Jun 22 06:25:05 PM PDT 24 7735320510 ps
T155 /workspace/coverage/default/2.sram_ctrl_smoke.1928080894 Jun 22 06:12:43 PM PDT 24 Jun 22 06:12:47 PM PDT 24 179378725 ps
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T157 /workspace/coverage/default/28.sram_ctrl_multiple_keys.2467950983 Jun 22 06:15:06 PM PDT 24 Jun 22 06:34:25 PM PDT 24 7434401678 ps
T120 /workspace/coverage/default/47.sram_ctrl_lc_escalation.3363482694 Jun 22 06:18:19 PM PDT 24 Jun 22 06:18:27 PM PDT 24 727252305 ps
T158 /workspace/coverage/default/44.sram_ctrl_alert_test.1513670448 Jun 22 06:17:43 PM PDT 24 Jun 22 06:17:45 PM PDT 24 34694538 ps
T28 /workspace/coverage/default/43.sram_ctrl_ram_cfg.2416857669 Jun 22 06:17:37 PM PDT 24 Jun 22 06:17:38 PM PDT 24 44971157 ps
T68 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4277422843 Jun 22 06:18:01 PM PDT 24 Jun 22 06:18:29 PM PDT 24 281596036 ps
T24 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2363605896 Jun 22 06:13:06 PM PDT 24 Jun 22 06:14:54 PM PDT 24 1310768318 ps
T159 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2104748030 Jun 22 06:13:12 PM PDT 24 Jun 22 06:15:34 PM PDT 24 571817219 ps
T160 /workspace/coverage/default/10.sram_ctrl_stress_all.1118560849 Jun 22 06:13:19 PM PDT 24 Jun 22 07:19:06 PM PDT 24 44362964272 ps
T161 /workspace/coverage/default/44.sram_ctrl_executable.3331368495 Jun 22 06:17:45 PM PDT 24 Jun 22 06:23:07 PM PDT 24 38365365985 ps
T54 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2234573328 Jun 22 06:14:38 PM PDT 24 Jun 22 06:14:45 PM PDT 24 1676144306 ps
T162 /workspace/coverage/default/2.sram_ctrl_regwen.2854321048 Jun 22 06:12:43 PM PDT 24 Jun 22 06:16:18 PM PDT 24 3104619103 ps
T130 /workspace/coverage/default/32.sram_ctrl_stress_all.162320742 Jun 22 06:15:51 PM PDT 24 Jun 22 07:21:45 PM PDT 24 138323407304 ps
T25 /workspace/coverage/default/44.sram_ctrl_stress_all.2178687093 Jun 22 06:17:47 PM PDT 24 Jun 22 07:08:08 PM PDT 24 8300484564 ps
T29 /workspace/coverage/default/45.sram_ctrl_ram_cfg.1213440964 Jun 22 06:18:00 PM PDT 24 Jun 22 06:18:01 PM PDT 24 116713669 ps
T55 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.3925802908 Jun 22 06:17:14 PM PDT 24 Jun 22 06:17:20 PM PDT 24 97550377 ps
T163 /workspace/coverage/default/31.sram_ctrl_multiple_keys.777533353 Jun 22 06:15:36 PM PDT 24 Jun 22 06:45:45 PM PDT 24 3819544567 ps
T102 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.2164350797 Jun 22 06:18:30 PM PDT 24 Jun 22 06:21:34 PM PDT 24 8115677545 ps
T164 /workspace/coverage/default/30.sram_ctrl_max_throughput.2084553194 Jun 22 06:15:26 PM PDT 24 Jun 22 06:15:31 PM PDT 24 90322688 ps
T165 /workspace/coverage/default/34.sram_ctrl_alert_test.2276069218 Jun 22 06:16:10 PM PDT 24 Jun 22 06:16:11 PM PDT 24 56030769 ps
T166 /workspace/coverage/default/10.sram_ctrl_lc_escalation.2922918977 Jun 22 06:13:12 PM PDT 24 Jun 22 06:13:18 PM PDT 24 632041418 ps
T167 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3063802893 Jun 22 06:12:49 PM PDT 24 Jun 22 06:12:58 PM PDT 24 6333706435 ps
T168 /workspace/coverage/default/20.sram_ctrl_executable.2199192177 Jun 22 06:14:05 PM PDT 24 Jun 22 06:32:18 PM PDT 24 15195776648 ps
T56 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3137880094 Jun 22 06:15:14 PM PDT 24 Jun 22 06:15:21 PM PDT 24 92572870 ps
T169 /workspace/coverage/default/34.sram_ctrl_lc_escalation.3457693910 Jun 22 06:16:03 PM PDT 24 Jun 22 06:16:06 PM PDT 24 2341216357 ps
T170 /workspace/coverage/default/28.sram_ctrl_smoke.507411595 Jun 22 06:15:10 PM PDT 24 Jun 22 06:15:28 PM PDT 24 1478605796 ps
T134 /workspace/coverage/default/29.sram_ctrl_stress_all.3751337893 Jun 22 06:15:22 PM PDT 24 Jun 22 06:43:41 PM PDT 24 26587836469 ps
T171 /workspace/coverage/default/26.sram_ctrl_stress_all.3689635569 Jun 22 06:14:54 PM PDT 24 Jun 22 07:20:08 PM PDT 24 35053777291 ps
T172 /workspace/coverage/default/21.sram_ctrl_smoke.3424952527 Jun 22 06:14:13 PM PDT 24 Jun 22 06:14:42 PM PDT 24 360635996 ps
T173 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2962848207 Jun 22 06:13:02 PM PDT 24 Jun 22 06:19:13 PM PDT 24 48996567204 ps
T174 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.1481642476 Jun 22 06:13:42 PM PDT 24 Jun 22 06:16:07 PM PDT 24 156495844 ps
T175 /workspace/coverage/default/2.sram_ctrl_stress_all.2155355616 Jun 22 06:12:42 PM PDT 24 Jun 22 06:37:45 PM PDT 24 21133109199 ps
T176 /workspace/coverage/default/34.sram_ctrl_stress_all.732191909 Jun 22 06:16:10 PM PDT 24 Jun 22 07:48:13 PM PDT 24 23955914058 ps
T177 /workspace/coverage/default/48.sram_ctrl_partial_access.1806792503 Jun 22 06:18:32 PM PDT 24 Jun 22 06:19:16 PM PDT 24 127257644 ps
T178 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.3568818903 Jun 22 06:15:06 PM PDT 24 Jun 22 06:18:38 PM PDT 24 2653894135 ps
T179 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.940333590 Jun 22 06:17:51 PM PDT 24 Jun 22 06:20:22 PM PDT 24 2006739258 ps
T180 /workspace/coverage/default/39.sram_ctrl_bijection.402904053 Jun 22 06:16:51 PM PDT 24 Jun 22 06:17:23 PM PDT 24 5828124787 ps
T88 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.3237360395 Jun 22 06:14:52 PM PDT 24 Jun 22 06:14:56 PM PDT 24 345793853 ps
T181 /workspace/coverage/default/41.sram_ctrl_executable.1661106564 Jun 22 06:17:15 PM PDT 24 Jun 22 06:27:54 PM PDT 24 15535189850 ps
T132 /workspace/coverage/default/3.sram_ctrl_stress_all.1083775408 Jun 22 06:12:43 PM PDT 24 Jun 22 07:52:07 PM PDT 24 75648653605 ps
T182 /workspace/coverage/default/20.sram_ctrl_regwen.957068978 Jun 22 06:14:11 PM PDT 24 Jun 22 06:24:03 PM PDT 24 22405565727 ps
T183 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1388074953 Jun 22 06:13:45 PM PDT 24 Jun 22 06:15:09 PM PDT 24 253248953 ps
T184 /workspace/coverage/default/27.sram_ctrl_partial_access.1556486446 Jun 22 06:15:01 PM PDT 24 Jun 22 06:15:21 PM PDT 24 3944520578 ps
T46 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.3054097179 Jun 22 06:15:57 PM PDT 24 Jun 22 06:29:07 PM PDT 24 2760375524 ps
T185 /workspace/coverage/default/28.sram_ctrl_mem_walk.1922198984 Jun 22 06:15:15 PM PDT 24 Jun 22 06:15:29 PM PDT 24 5698612697 ps
T186 /workspace/coverage/default/19.sram_ctrl_multiple_keys.3772163685 Jun 22 06:13:54 PM PDT 24 Jun 22 06:36:59 PM PDT 24 12338606085 ps
T133 /workspace/coverage/default/15.sram_ctrl_multiple_keys.2491613055 Jun 22 06:13:36 PM PDT 24 Jun 22 06:28:47 PM PDT 24 62185984929 ps
T57 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.677633909 Jun 22 06:16:20 PM PDT 24 Jun 22 06:16:23 PM PDT 24 257323497 ps
T187 /workspace/coverage/default/33.sram_ctrl_mem_walk.1081138922 Jun 22 06:16:00 PM PDT 24 Jun 22 06:16:11 PM PDT 24 718377121 ps
T188 /workspace/coverage/default/41.sram_ctrl_ram_cfg.2200910469 Jun 22 06:17:14 PM PDT 24 Jun 22 06:17:16 PM PDT 24 68356625 ps
T131 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1695183837 Jun 22 06:13:33 PM PDT 24 Jun 22 06:18:29 PM PDT 24 42697832824 ps
T189 /workspace/coverage/default/42.sram_ctrl_lc_escalation.3463878801 Jun 22 06:17:23 PM PDT 24 Jun 22 06:17:27 PM PDT 24 316357718 ps
T190 /workspace/coverage/default/49.sram_ctrl_bijection.704522950 Jun 22 06:18:45 PM PDT 24 Jun 22 06:19:31 PM PDT 24 1881721461 ps
T191 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.3062855577 Jun 22 06:13:43 PM PDT 24 Jun 22 06:18:24 PM PDT 24 5664795562 ps
T192 /workspace/coverage/default/44.sram_ctrl_partial_access.1012109063 Jun 22 06:17:45 PM PDT 24 Jun 22 06:17:51 PM PDT 24 395797842 ps
T193 /workspace/coverage/default/10.sram_ctrl_executable.3397192796 Jun 22 06:13:13 PM PDT 24 Jun 22 06:14:38 PM PDT 24 332489328 ps
T194 /workspace/coverage/default/38.sram_ctrl_alert_test.3843861163 Jun 22 06:16:49 PM PDT 24 Jun 22 06:16:51 PM PDT 24 12714488 ps
T195 /workspace/coverage/default/20.sram_ctrl_partial_access.1525321159 Jun 22 06:14:07 PM PDT 24 Jun 22 06:14:13 PM PDT 24 565678175 ps
T196 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3099176880 Jun 22 06:13:25 PM PDT 24 Jun 22 06:15:20 PM PDT 24 140885167 ps
T197 /workspace/coverage/default/42.sram_ctrl_partial_access.2556040376 Jun 22 06:17:23 PM PDT 24 Jun 22 06:19:31 PM PDT 24 3219138615 ps
T198 /workspace/coverage/default/48.sram_ctrl_regwen.86211835 Jun 22 06:18:37 PM PDT 24 Jun 22 06:35:01 PM PDT 24 4900920808 ps
T199 /workspace/coverage/default/33.sram_ctrl_alert_test.3407178566 Jun 22 06:16:05 PM PDT 24 Jun 22 06:16:06 PM PDT 24 41047063 ps
T200 /workspace/coverage/default/7.sram_ctrl_executable.378419866 Jun 22 06:13:02 PM PDT 24 Jun 22 06:29:45 PM PDT 24 10020253581 ps
T201 /workspace/coverage/default/18.sram_ctrl_alert_test.1507411758 Jun 22 06:13:59 PM PDT 24 Jun 22 06:14:00 PM PDT 24 24394157 ps
T202 /workspace/coverage/default/5.sram_ctrl_max_throughput.1308239162 Jun 22 06:12:51 PM PDT 24 Jun 22 06:14:03 PM PDT 24 118021326 ps
T203 /workspace/coverage/default/26.sram_ctrl_multiple_keys.1835330536 Jun 22 06:14:52 PM PDT 24 Jun 22 06:33:38 PM PDT 24 16457668046 ps
T204 /workspace/coverage/default/8.sram_ctrl_smoke.1761407661 Jun 22 06:13:06 PM PDT 24 Jun 22 06:13:07 PM PDT 24 24189923 ps
T205 /workspace/coverage/default/19.sram_ctrl_lc_escalation.3024953350 Jun 22 06:14:00 PM PDT 24 Jun 22 06:14:10 PM PDT 24 641491643 ps
T206 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.308928449 Jun 22 06:17:51 PM PDT 24 Jun 22 06:21:04 PM PDT 24 9035758599 ps
T207 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.432334981 Jun 22 06:13:47 PM PDT 24 Jun 22 06:13:57 PM PDT 24 259432849 ps
T208 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.1871467211 Jun 22 06:13:41 PM PDT 24 Jun 22 06:19:55 PM PDT 24 1782161626 ps
T69 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.350219142 Jun 22 06:14:55 PM PDT 24 Jun 22 06:24:08 PM PDT 24 2316476360 ps
T209 /workspace/coverage/default/30.sram_ctrl_partial_access.1768952203 Jun 22 06:15:31 PM PDT 24 Jun 22 06:15:46 PM PDT 24 617782664 ps
T210 /workspace/coverage/default/22.sram_ctrl_executable.2581963486 Jun 22 06:14:25 PM PDT 24 Jun 22 06:34:13 PM PDT 24 59245307449 ps
T211 /workspace/coverage/default/3.sram_ctrl_executable.2636048953 Jun 22 06:12:50 PM PDT 24 Jun 22 06:31:56 PM PDT 24 27800545646 ps
T212 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.951187189 Jun 22 06:16:50 PM PDT 24 Jun 22 06:19:07 PM PDT 24 292001473 ps
T213 /workspace/coverage/default/29.sram_ctrl_multiple_keys.4001898357 Jun 22 06:15:14 PM PDT 24 Jun 22 06:48:26 PM PDT 24 58788782740 ps
T214 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1916201576 Jun 22 06:14:02 PM PDT 24 Jun 22 06:14:08 PM PDT 24 192985865 ps
T215 /workspace/coverage/default/11.sram_ctrl_regwen.371378737 Jun 22 06:13:19 PM PDT 24 Jun 22 06:25:05 PM PDT 24 1619939710 ps
T216 /workspace/coverage/default/37.sram_ctrl_multiple_keys.2691927456 Jun 22 06:16:34 PM PDT 24 Jun 22 06:32:14 PM PDT 24 8596620133 ps
T217 /workspace/coverage/default/24.sram_ctrl_regwen.3416394777 Jun 22 06:14:37 PM PDT 24 Jun 22 07:02:02 PM PDT 24 25333899851 ps
T218 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.648891151 Jun 22 06:16:04 PM PDT 24 Jun 22 06:16:08 PM PDT 24 417263111 ps
T219 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1343899271 Jun 22 06:14:46 PM PDT 24 Jun 22 06:14:52 PM PDT 24 601072776 ps
T220 /workspace/coverage/default/16.sram_ctrl_max_throughput.3862221745 Jun 22 06:13:40 PM PDT 24 Jun 22 06:15:25 PM PDT 24 350949011 ps
T221 /workspace/coverage/default/5.sram_ctrl_ram_cfg.858567751 Jun 22 06:12:51 PM PDT 24 Jun 22 06:12:53 PM PDT 24 29423510 ps
T222 /workspace/coverage/default/32.sram_ctrl_alert_test.1081961532 Jun 22 06:15:50 PM PDT 24 Jun 22 06:15:51 PM PDT 24 37582350 ps
T223 /workspace/coverage/default/17.sram_ctrl_executable.1354881912 Jun 22 06:13:53 PM PDT 24 Jun 22 06:34:11 PM PDT 24 58146636116 ps
T224 /workspace/coverage/default/35.sram_ctrl_multiple_keys.610531583 Jun 22 06:16:11 PM PDT 24 Jun 22 06:32:28 PM PDT 24 3450547527 ps
T225 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.2876226434 Jun 22 06:12:55 PM PDT 24 Jun 22 06:30:22 PM PDT 24 3642226007 ps
T226 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1006748573 Jun 22 06:13:04 PM PDT 24 Jun 22 06:13:17 PM PDT 24 126815485 ps
T227 /workspace/coverage/default/10.sram_ctrl_partial_access.2773620971 Jun 22 06:13:21 PM PDT 24 Jun 22 06:13:28 PM PDT 24 131600156 ps
T228 /workspace/coverage/default/28.sram_ctrl_alert_test.775013417 Jun 22 06:15:15 PM PDT 24 Jun 22 06:15:17 PM PDT 24 17959942 ps
T229 /workspace/coverage/default/38.sram_ctrl_stress_all.2024309440 Jun 22 06:16:49 PM PDT 24 Jun 22 08:04:34 PM PDT 24 419076060170 ps
T230 /workspace/coverage/default/12.sram_ctrl_partial_access.1788882771 Jun 22 06:13:25 PM PDT 24 Jun 22 06:13:44 PM PDT 24 918646966 ps
T231 /workspace/coverage/default/8.sram_ctrl_bijection.4167892427 Jun 22 06:13:10 PM PDT 24 Jun 22 06:14:16 PM PDT 24 17109017729 ps
T70 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.2679280740 Jun 22 06:12:47 PM PDT 24 Jun 22 06:16:11 PM PDT 24 1305612410 ps
T232 /workspace/coverage/default/41.sram_ctrl_stress_all.709431727 Jun 22 06:17:16 PM PDT 24 Jun 22 07:03:40 PM PDT 24 35855554954 ps
T233 /workspace/coverage/default/34.sram_ctrl_partial_access.1996250790 Jun 22 06:16:03 PM PDT 24 Jun 22 06:16:12 PM PDT 24 331063704 ps
T234 /workspace/coverage/default/40.sram_ctrl_stress_all.823230501 Jun 22 06:17:01 PM PDT 24 Jun 22 07:00:33 PM PDT 24 29856591862 ps
T235 /workspace/coverage/default/12.sram_ctrl_mem_walk.3909963247 Jun 22 06:13:25 PM PDT 24 Jun 22 06:13:34 PM PDT 24 1299498290 ps
T236 /workspace/coverage/default/2.sram_ctrl_max_throughput.1675415913 Jun 22 06:12:42 PM PDT 24 Jun 22 06:13:33 PM PDT 24 1501117906 ps
T237 /workspace/coverage/default/11.sram_ctrl_mem_walk.3560989090 Jun 22 06:13:17 PM PDT 24 Jun 22 06:13:23 PM PDT 24 186749347 ps
T238 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3393674601 Jun 22 06:13:26 PM PDT 24 Jun 22 06:13:29 PM PDT 24 45631513 ps
T239 /workspace/coverage/default/39.sram_ctrl_ram_cfg.2868886723 Jun 22 06:16:55 PM PDT 24 Jun 22 06:16:57 PM PDT 24 77758005 ps
T240 /workspace/coverage/default/37.sram_ctrl_mem_walk.2735676678 Jun 22 06:16:36 PM PDT 24 Jun 22 06:16:43 PM PDT 24 1935552124 ps
T241 /workspace/coverage/default/8.sram_ctrl_mem_walk.2942802573 Jun 22 06:13:12 PM PDT 24 Jun 22 06:13:19 PM PDT 24 334288965 ps
T242 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3389574973 Jun 22 06:18:06 PM PDT 24 Jun 22 06:18:32 PM PDT 24 446819825 ps
T243 /workspace/coverage/default/27.sram_ctrl_stress_all.2785256173 Jun 22 06:15:06 PM PDT 24 Jun 22 07:18:33 PM PDT 24 54779312695 ps
T244 /workspace/coverage/default/1.sram_ctrl_partial_access.956688028 Jun 22 06:12:39 PM PDT 24 Jun 22 06:12:42 PM PDT 24 839021189 ps
T245 /workspace/coverage/default/22.sram_ctrl_lc_escalation.4230621448 Jun 22 06:14:26 PM PDT 24 Jun 22 06:14:32 PM PDT 24 1002816286 ps
T246 /workspace/coverage/default/40.sram_ctrl_lc_escalation.1647774322 Jun 22 06:17:02 PM PDT 24 Jun 22 06:17:08 PM PDT 24 398223785 ps
T247 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.4130539947 Jun 22 06:13:00 PM PDT 24 Jun 22 06:25:00 PM PDT 24 3871550335 ps
T248 /workspace/coverage/default/44.sram_ctrl_regwen.778308654 Jun 22 06:17:46 PM PDT 24 Jun 22 06:29:07 PM PDT 24 11395689547 ps
T249 /workspace/coverage/default/33.sram_ctrl_lc_escalation.584644839 Jun 22 06:16:01 PM PDT 24 Jun 22 06:16:10 PM PDT 24 817375891 ps
T250 /workspace/coverage/default/19.sram_ctrl_partial_access.2521308088 Jun 22 06:13:59 PM PDT 24 Jun 22 06:14:17 PM PDT 24 316643755 ps
T251 /workspace/coverage/default/13.sram_ctrl_alert_test.3830484744 Jun 22 06:13:25 PM PDT 24 Jun 22 06:13:27 PM PDT 24 24940059 ps
T252 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.2578178945 Jun 22 06:13:59 PM PDT 24 Jun 22 06:14:06 PM PDT 24 656291648 ps
T135 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1082498650 Jun 22 06:18:23 PM PDT 24 Jun 22 06:23:06 PM PDT 24 50296811452 ps
T253 /workspace/coverage/default/10.sram_ctrl_ram_cfg.4030584171 Jun 22 06:13:12 PM PDT 24 Jun 22 06:13:13 PM PDT 24 90262530 ps
T254 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1184883669 Jun 22 06:12:56 PM PDT 24 Jun 22 06:16:23 PM PDT 24 8376698959 ps
T255 /workspace/coverage/default/8.sram_ctrl_lc_escalation.145143447 Jun 22 06:13:04 PM PDT 24 Jun 22 06:13:05 PM PDT 24 808791308 ps
T256 /workspace/coverage/default/45.sram_ctrl_lc_escalation.1411593860 Jun 22 06:17:58 PM PDT 24 Jun 22 06:18:02 PM PDT 24 1597148405 ps
T257 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.2285621559 Jun 22 06:16:47 PM PDT 24 Jun 22 06:21:10 PM PDT 24 10801316135 ps
T258 /workspace/coverage/default/35.sram_ctrl_mem_walk.1897658785 Jun 22 06:16:20 PM PDT 24 Jun 22 06:16:25 PM PDT 24 79356921 ps
T259 /workspace/coverage/default/42.sram_ctrl_smoke.3709103872 Jun 22 06:17:29 PM PDT 24 Jun 22 06:17:43 PM PDT 24 119391363 ps
T260 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2815623475 Jun 22 06:16:11 PM PDT 24 Jun 22 06:23:47 PM PDT 24 19333969769 ps
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T296 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.485274439 Jun 22 06:14:09 PM PDT 24 Jun 22 06:14:22 PM PDT 24 75670934 ps
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T298 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3631107080 Jun 22 06:13:34 PM PDT 24 Jun 22 06:13:41 PM PDT 24 181345459 ps
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T32 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.4111279537 Jun 22 06:13:35 PM PDT 24 Jun 22 06:13:39 PM PDT 24 921861374 ps
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T36 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.693941795 Jun 22 06:13:42 PM PDT 24 Jun 22 06:13:46 PM PDT 24 210398331 ps
T37 /workspace/coverage/default/35.sram_ctrl_lc_escalation.4031876099 Jun 22 06:16:14 PM PDT 24 Jun 22 06:16:16 PM PDT 24 174751202 ps
T38 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2321024663 Jun 22 06:13:20 PM PDT 24 Jun 22 06:19:09 PM PDT 24 3616666398 ps
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