Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1771153491 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.4139942868 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.767955073 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.736601096 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.4129365858 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2653376477 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2837349976 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3174813413 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1789826934 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2675663840 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3141728418 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1949761410 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.4021817363 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2960598514 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3669025613 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1279962315 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2711422044 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3127881793 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3948723763 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.960479329 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2269023151 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.293954489 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3516173064 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2263747084 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3753280269 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3776107372 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2906462858 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2543240702 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1651813210 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.976742397 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3028279472 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2488942805 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3659959415 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2288174162 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.315933966 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2113150761 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.483372044 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1408838966 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3110468876 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.823602014 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2824347684 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3966230992 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1042016733 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1426722227 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4042725529 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1686396776 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3724153744 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.153586408 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.246048899 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.300583159 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2914759887 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.113726483 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.260270225 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3905204755 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3787911318 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.797560383 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.883692474 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1004859772 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2534065271 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3303369489 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2356610711 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.368242210 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2680514706 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1686083175 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.842720737 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1992493165 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2962189889 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2549040796 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.4266876014 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3479116123 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.270775193 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2612187345 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1516157629 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1656250590 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.412705701 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1586310010 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2794627860 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.835348421 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3442119420 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1200178258 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1125490394 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3720158813 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1048542713 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1027616354 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3306352127 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1641924871 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2889161240 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2367081029 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.837072236 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3126537391 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.4108299715 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.286728230 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1836278607 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3022495475 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2366152326 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3754900394 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1992419394 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.646945688 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1493801223 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1082988217 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3172490850 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3141809810 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3874951165 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.482772711 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1829770770 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.865449533 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2864828831 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4011649802 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2813716775 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1504311792 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2635573044 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3685974459 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2276264753 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3614510255 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2780514167 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2751100899 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1337431089 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2255585632 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1500173759 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3548687100 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3717812680 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2876879909 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.73487422 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2279754015 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.124109686 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2248553241 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3015966338 |
/workspace/coverage/default/0.sram_ctrl_alert_test.946791988 |
/workspace/coverage/default/0.sram_ctrl_bijection.3964781606 |
/workspace/coverage/default/0.sram_ctrl_executable.523292138 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3971996268 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.4154324337 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.162917764 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.1058525129 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1296478021 |
/workspace/coverage/default/0.sram_ctrl_partial_access.2500698251 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1987446269 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.857512248 |
/workspace/coverage/default/0.sram_ctrl_regwen.1748664154 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.2422038198 |
/workspace/coverage/default/0.sram_ctrl_smoke.2050348353 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2684734281 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.969026819 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1869744436 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2913999257 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1326092386 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3222276609 |
/workspace/coverage/default/1.sram_ctrl_bijection.445122570 |
/workspace/coverage/default/1.sram_ctrl_executable.2006845628 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1909300129 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.2252817045 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2830373411 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.445799514 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1254242209 |
/workspace/coverage/default/1.sram_ctrl_partial_access.444685035 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.273960459 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.431995679 |
/workspace/coverage/default/1.sram_ctrl_regwen.2668433446 |
/workspace/coverage/default/1.sram_ctrl_smoke.153376301 |
/workspace/coverage/default/1.sram_ctrl_stress_all.3529021890 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.510404557 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2616321352 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3722328769 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2640881893 |
/workspace/coverage/default/10.sram_ctrl_alert_test.3279018488 |
/workspace/coverage/default/10.sram_ctrl_bijection.2748476348 |
/workspace/coverage/default/10.sram_ctrl_executable.2778108393 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1605165120 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2250423392 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1265698695 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.206871153 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2443294029 |
/workspace/coverage/default/10.sram_ctrl_partial_access.2418875829 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1215721819 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.62015455 |
/workspace/coverage/default/10.sram_ctrl_regwen.1584111978 |
/workspace/coverage/default/10.sram_ctrl_smoke.3745666610 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1647727280 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2554821812 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3097011920 |
/workspace/coverage/default/11.sram_ctrl_alert_test.165114920 |
/workspace/coverage/default/11.sram_ctrl_bijection.1006073946 |
/workspace/coverage/default/11.sram_ctrl_executable.3285749339 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3936407057 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1855092114 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.4069789800 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.2241353871 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3641809621 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1989625578 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4078683176 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3929688376 |
/workspace/coverage/default/11.sram_ctrl_regwen.3758683757 |
/workspace/coverage/default/11.sram_ctrl_smoke.3652198108 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.825047104 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1795463486 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2102216011 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1640277246 |
/workspace/coverage/default/12.sram_ctrl_alert_test.533089461 |
/workspace/coverage/default/12.sram_ctrl_bijection.3310217065 |
/workspace/coverage/default/12.sram_ctrl_executable.692866149 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.4112808307 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.4004007260 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1222875484 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3942229564 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.47468597 |
/workspace/coverage/default/12.sram_ctrl_partial_access.4018204979 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.4121208534 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.86881471 |
/workspace/coverage/default/12.sram_ctrl_regwen.323424410 |
/workspace/coverage/default/12.sram_ctrl_smoke.699186123 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.734278778 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1140519980 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.580749495 |
/workspace/coverage/default/13.sram_ctrl_alert_test.4079684005 |
/workspace/coverage/default/13.sram_ctrl_bijection.1848453914 |
/workspace/coverage/default/13.sram_ctrl_executable.3264577819 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1390330964 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.1479029884 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.672871192 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.1332363945 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.2763617959 |
/workspace/coverage/default/13.sram_ctrl_partial_access.659994617 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1822008586 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2900862520 |
/workspace/coverage/default/13.sram_ctrl_regwen.517313157 |
/workspace/coverage/default/13.sram_ctrl_smoke.4250855018 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2077926427 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3080108408 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2782873905 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.3887589346 |
/workspace/coverage/default/14.sram_ctrl_alert_test.869870911 |
/workspace/coverage/default/14.sram_ctrl_bijection.102828287 |
/workspace/coverage/default/14.sram_ctrl_executable.147174171 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3255471980 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.3045619608 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.603339003 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.3472151220 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.1561371036 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2040580826 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3363567792 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.1205051252 |
/workspace/coverage/default/14.sram_ctrl_regwen.2763975002 |
/workspace/coverage/default/14.sram_ctrl_smoke.3737728621 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3033273526 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.857236131 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.984002275 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1845474311 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.3609637673 |
/workspace/coverage/default/15.sram_ctrl_alert_test.2187268353 |
/workspace/coverage/default/15.sram_ctrl_bijection.3302400234 |
/workspace/coverage/default/15.sram_ctrl_executable.3794577340 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.4146938719 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.1149398719 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.1528277544 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.4175634790 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.1163063750 |
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/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1672093925 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2095255888 |
/workspace/coverage/default/45.sram_ctrl_alert_test.3865990163 |
/workspace/coverage/default/45.sram_ctrl_bijection.2152561208 |
/workspace/coverage/default/45.sram_ctrl_executable.3451254014 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2529249341 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2798309029 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.479726748 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.609504409 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3060966186 |
/workspace/coverage/default/45.sram_ctrl_partial_access.647099349 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3737249106 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.994092928 |
/workspace/coverage/default/45.sram_ctrl_regwen.1184353882 |
/workspace/coverage/default/45.sram_ctrl_smoke.551884210 |
/workspace/coverage/default/45.sram_ctrl_stress_all.3951868056 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1546555513 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2878451892 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.664754374 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.900645634 |
/workspace/coverage/default/46.sram_ctrl_alert_test.483173474 |
/workspace/coverage/default/46.sram_ctrl_bijection.251524108 |
/workspace/coverage/default/46.sram_ctrl_executable.319378277 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3925983546 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2158195738 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1670977410 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3542274062 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.97788274 |
/workspace/coverage/default/46.sram_ctrl_partial_access.4062449007 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3115673950 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.29686479 |
/workspace/coverage/default/46.sram_ctrl_regwen.2844277066 |
/workspace/coverage/default/46.sram_ctrl_smoke.4238003761 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3999958608 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2686325604 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2280539831 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1606418129 |
/workspace/coverage/default/47.sram_ctrl_alert_test.217655574 |
/workspace/coverage/default/47.sram_ctrl_bijection.718887419 |
/workspace/coverage/default/47.sram_ctrl_executable.974899068 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1162021501 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.2704786884 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4168607813 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.1415737070 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2665150921 |
/workspace/coverage/default/47.sram_ctrl_partial_access.546803992 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3065128617 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.299061747 |
/workspace/coverage/default/47.sram_ctrl_regwen.2831730292 |
/workspace/coverage/default/47.sram_ctrl_smoke.1917247189 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2051147272 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2347498599 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2755514010 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.336076351 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.76941485 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2006888577 |
/workspace/coverage/default/48.sram_ctrl_bijection.2156638226 |
/workspace/coverage/default/48.sram_ctrl_executable.644453404 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2467488175 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2044486603 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1098096360 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.1930116032 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1612462508 |
/workspace/coverage/default/48.sram_ctrl_partial_access.247508540 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.330948076 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3550584235 |
/workspace/coverage/default/48.sram_ctrl_regwen.522658116 |
/workspace/coverage/default/48.sram_ctrl_smoke.3191461851 |
/workspace/coverage/default/48.sram_ctrl_stress_all.2641731493 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2133504283 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3208951099 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1284185626 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1291226882 |
/workspace/coverage/default/49.sram_ctrl_alert_test.3211642914 |
/workspace/coverage/default/49.sram_ctrl_bijection.2960615651 |
/workspace/coverage/default/49.sram_ctrl_executable.3309557190 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.747052107 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.2287938045 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1229704199 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2009806222 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1410397058 |
/workspace/coverage/default/49.sram_ctrl_partial_access.598994520 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1446864991 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2260448960 |
/workspace/coverage/default/49.sram_ctrl_regwen.3807040080 |
/workspace/coverage/default/49.sram_ctrl_smoke.1293505756 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1541977522 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.481689810 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1535878925 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3151583631 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3126893747 |
/workspace/coverage/default/5.sram_ctrl_alert_test.2411286409 |
/workspace/coverage/default/5.sram_ctrl_bijection.3815066459 |
/workspace/coverage/default/5.sram_ctrl_executable.3087801775 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1620057603 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.3860898265 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3273956593 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.494360186 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3564531214 |
/workspace/coverage/default/5.sram_ctrl_partial_access.469195205 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.81654534 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.557535342 |
/workspace/coverage/default/5.sram_ctrl_regwen.3103429422 |
/workspace/coverage/default/5.sram_ctrl_smoke.3733134050 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3774136165 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.372746464 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1973638752 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1334844508 |
/workspace/coverage/default/6.sram_ctrl_alert_test.201204657 |
/workspace/coverage/default/6.sram_ctrl_bijection.1035043732 |
/workspace/coverage/default/6.sram_ctrl_executable.4291667903 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2419431900 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.1909196998 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2631402500 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.795799237 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3629846812 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2680043560 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4136353076 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1487742760 |
/workspace/coverage/default/6.sram_ctrl_regwen.2420756352 |
/workspace/coverage/default/6.sram_ctrl_smoke.3865749418 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4109805279 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1712524280 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.314917438 |
/workspace/coverage/default/7.sram_ctrl_alert_test.3566588278 |
/workspace/coverage/default/7.sram_ctrl_bijection.2291097766 |
/workspace/coverage/default/7.sram_ctrl_executable.2525677578 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2944815644 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.1612931708 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1306244771 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.3766903856 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2027124009 |
/workspace/coverage/default/7.sram_ctrl_partial_access.4010688209 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3732436947 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.577952776 |
/workspace/coverage/default/7.sram_ctrl_regwen.1424187790 |
/workspace/coverage/default/7.sram_ctrl_smoke.811978669 |
/workspace/coverage/default/7.sram_ctrl_stress_all.4247891422 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.789728070 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3401365590 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.544055045 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2768663164 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2553034482 |
/workspace/coverage/default/8.sram_ctrl_bijection.1062393258 |
/workspace/coverage/default/8.sram_ctrl_executable.613473876 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.944498483 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1692851151 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.299502880 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2651942191 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1195291711 |
/workspace/coverage/default/8.sram_ctrl_partial_access.2369260537 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.309554601 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2720918416 |
/workspace/coverage/default/8.sram_ctrl_regwen.1920780816 |
/workspace/coverage/default/8.sram_ctrl_smoke.1119242373 |
/workspace/coverage/default/8.sram_ctrl_stress_all.3264126461 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.881369300 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2565284741 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3464900463 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2312542336 |
/workspace/coverage/default/9.sram_ctrl_bijection.1157359536 |
/workspace/coverage/default/9.sram_ctrl_executable.2705045038 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2832725689 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.4061123442 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1577915832 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2185145653 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.635981956 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2049644307 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1245168124 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3655734106 |
/workspace/coverage/default/9.sram_ctrl_regwen.2575661007 |
/workspace/coverage/default/9.sram_ctrl_smoke.1056095036 |
/workspace/coverage/default/9.sram_ctrl_stress_all.921133404 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3091318964 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3422159841 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/25.sram_ctrl_mem_partial_access.2950808681 |
|
|
Jun 24 05:46:10 PM PDT 24 |
Jun 24 05:46:15 PM PDT 24 |
909629301 ps |
T2 |
/workspace/coverage/default/13.sram_ctrl_alert_test.4079684005 |
|
|
Jun 24 05:45:36 PM PDT 24 |
Jun 24 05:45:39 PM PDT 24 |
38669608 ps |
T3 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.1881361203 |
|
|
Jun 24 05:46:10 PM PDT 24 |
Jun 24 05:51:16 PM PDT 24 |
12327161214 ps |
T5 |
/workspace/coverage/default/26.sram_ctrl_bijection.2866823570 |
|
|
Jun 24 05:46:10 PM PDT 24 |
Jun 24 05:46:38 PM PDT 24 |
397995782 ps |
T4 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1431584140 |
|
|
Jun 24 05:47:33 PM PDT 24 |
Jun 24 05:48:10 PM PDT 24 |
437265804 ps |
T6 |
/workspace/coverage/default/22.sram_ctrl_bijection.2169813222 |
|
|
Jun 24 05:46:03 PM PDT 24 |
Jun 24 05:46:32 PM PDT 24 |
391940801 ps |
T10 |
/workspace/coverage/default/33.sram_ctrl_regwen.3804972703 |
|
|
Jun 24 05:46:45 PM PDT 24 |
Jun 24 06:00:42 PM PDT 24 |
65898540973 ps |
T11 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3275683774 |
|
|
Jun 24 05:45:31 PM PDT 24 |
Jun 24 05:45:57 PM PDT 24 |
1673894884 ps |
T7 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.4112808307 |
|
|
Jun 24 05:45:38 PM PDT 24 |
Jun 24 05:45:44 PM PDT 24 |
305660450 ps |
T8 |
/workspace/coverage/default/13.sram_ctrl_stress_all.3201616654 |
|
|
Jun 24 05:45:51 PM PDT 24 |
Jun 24 06:53:56 PM PDT 24 |
13496944314 ps |
T21 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1754366417 |
|
|
Jun 24 05:45:53 PM PDT 24 |
Jun 24 05:47:42 PM PDT 24 |
1184151052 ps |
T39 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.3500526101 |
|
|
Jun 24 05:45:15 PM PDT 24 |
Jun 24 06:03:11 PM PDT 24 |
13396843985 ps |
T12 |
/workspace/coverage/default/46.sram_ctrl_alert_test.483173474 |
|
|
Jun 24 05:48:01 PM PDT 24 |
Jun 24 05:48:02 PM PDT 24 |
30955551 ps |
T40 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4136353076 |
|
|
Jun 24 05:45:34 PM PDT 24 |
Jun 24 05:50:24 PM PDT 24 |
3738247805 ps |
T54 |
/workspace/coverage/default/49.sram_ctrl_bijection.2960615651 |
|
|
Jun 24 05:48:19 PM PDT 24 |
Jun 24 05:49:22 PM PDT 24 |
57779859125 ps |
T37 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.1528277544 |
|
|
Jun 24 05:45:53 PM PDT 24 |
Jun 24 05:46:00 PM PDT 24 |
348816888 ps |
T55 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.1056990562 |
|
|
Jun 24 05:46:16 PM PDT 24 |
Jun 24 05:49:16 PM PDT 24 |
1931478861 ps |
T23 |
/workspace/coverage/default/23.sram_ctrl_stress_all.3781970492 |
|
|
Jun 24 05:46:17 PM PDT 24 |
Jun 24 06:47:20 PM PDT 24 |
11757417849 ps |
T18 |
/workspace/coverage/default/1.sram_ctrl_regwen.2668433446 |
|
|
Jun 24 05:45:12 PM PDT 24 |
Jun 24 05:56:14 PM PDT 24 |
6998769929 ps |
T9 |
/workspace/coverage/default/47.sram_ctrl_stress_all.2051147272 |
|
|
Jun 24 05:48:15 PM PDT 24 |
Jun 24 06:23:29 PM PDT 24 |
40775953491 ps |
T24 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.1215121636 |
|
|
Jun 24 05:46:19 PM PDT 24 |
Jun 24 05:46:21 PM PDT 24 |
78517574 ps |
T44 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.3472151220 |
|
|
Jun 24 05:45:54 PM PDT 24 |
Jun 24 05:46:01 PM PDT 24 |
96852969 ps |
T45 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.1954288600 |
|
|
Jun 24 05:46:33 PM PDT 24 |
Jun 24 05:46:44 PM PDT 24 |
1277112505 ps |
T133 |
/workspace/coverage/default/10.sram_ctrl_bijection.2748476348 |
|
|
Jun 24 05:45:54 PM PDT 24 |
Jun 24 05:46:58 PM PDT 24 |
1032802587 ps |
T49 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.4168607813 |
|
|
Jun 24 05:48:09 PM PDT 24 |
Jun 24 05:48:15 PM PDT 24 |
175405870 ps |
T102 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.2720743593 |
|
|
Jun 24 05:45:41 PM PDT 24 |
Jun 24 05:50:52 PM PDT 24 |
14285606955 ps |
T25 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.2533248623 |
|
|
Jun 24 05:47:02 PM PDT 24 |
Jun 24 05:47:04 PM PDT 24 |
31803400 ps |
T81 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.1736031939 |
|
|
Jun 24 05:47:25 PM PDT 24 |
Jun 24 05:53:17 PM PDT 24 |
14104557238 ps |
T136 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2554821812 |
|
|
Jun 24 05:45:31 PM PDT 24 |
Jun 24 05:45:37 PM PDT 24 |
54104477 ps |
T135 |
/workspace/coverage/default/30.sram_ctrl_bijection.140655624 |
|
|
Jun 24 05:46:24 PM PDT 24 |
Jun 24 05:47:35 PM PDT 24 |
4186908299 ps |
T82 |
/workspace/coverage/default/31.sram_ctrl_executable.4015048707 |
|
|
Jun 24 05:46:36 PM PDT 24 |
Jun 24 06:08:05 PM PDT 24 |
52150947515 ps |
T13 |
/workspace/coverage/default/44.sram_ctrl_alert_test.2315658608 |
|
|
Jun 24 05:47:50 PM PDT 24 |
Jun 24 05:47:52 PM PDT 24 |
14539996 ps |
T137 |
/workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3321102336 |
|
|
Jun 24 05:46:07 PM PDT 24 |
Jun 24 05:46:22 PM PDT 24 |
147662239 ps |
T134 |
/workspace/coverage/default/31.sram_ctrl_alert_test.1886241343 |
|
|
Jun 24 05:46:33 PM PDT 24 |
Jun 24 05:46:34 PM PDT 24 |
31613763 ps |
T26 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.373961778 |
|
|
Jun 24 05:45:10 PM PDT 24 |
Jun 24 05:45:13 PM PDT 24 |
71854851 ps |
T38 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2160611247 |
|
|
Jun 24 05:47:15 PM PDT 24 |
Jun 24 05:56:48 PM PDT 24 |
32507094352 ps |
T22 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1882820665 |
|
|
Jun 24 05:47:59 PM PDT 24 |
Jun 24 05:48:35 PM PDT 24 |
974703949 ps |
T19 |
/workspace/coverage/default/40.sram_ctrl_stress_all.1562054645 |
|
|
Jun 24 05:47:21 PM PDT 24 |
Jun 24 06:59:21 PM PDT 24 |
102752217455 ps |
T103 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1907970114 |
|
|
Jun 24 05:45:35 PM PDT 24 |
Jun 24 05:51:23 PM PDT 24 |
4876607221 ps |
T112 |
/workspace/coverage/default/18.sram_ctrl_smoke.852571141 |
|
|
Jun 24 05:46:01 PM PDT 24 |
Jun 24 05:46:20 PM PDT 24 |
840300730 ps |
T67 |
/workspace/coverage/default/40.sram_ctrl_regwen.1191878618 |
|
|
Jun 24 05:47:21 PM PDT 24 |
Jun 24 06:07:39 PM PDT 24 |
27543372900 ps |
T104 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3363567792 |
|
|
Jun 24 05:45:50 PM PDT 24 |
Jun 24 05:50:00 PM PDT 24 |
24283146277 ps |
T105 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.372746464 |
|
|
Jun 24 05:45:25 PM PDT 24 |
Jun 24 05:49:28 PM PDT 24 |
16583616951 ps |
T71 |
/workspace/coverage/default/25.sram_ctrl_regwen.168177917 |
|
|
Jun 24 05:46:18 PM PDT 24 |
Jun 24 06:05:03 PM PDT 24 |
57045065922 ps |
T113 |
/workspace/coverage/default/3.sram_ctrl_partial_access.3305650723 |
|
|
Jun 24 05:45:05 PM PDT 24 |
Jun 24 05:47:40 PM PDT 24 |
3891577555 ps |
T52 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.1756384032 |
|
|
Jun 24 05:45:24 PM PDT 24 |
Jun 24 05:45:37 PM PDT 24 |
235061450 ps |
T130 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.3775478634 |
|
|
Jun 24 05:45:58 PM PDT 24 |
Jun 24 06:06:53 PM PDT 24 |
13069714763 ps |
T138 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1535878925 |
|
|
Jun 24 05:48:16 PM PDT 24 |
Jun 24 05:50:17 PM PDT 24 |
7611136267 ps |
T139 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.3581985124 |
|
|
Jun 24 05:47:03 PM PDT 24 |
Jun 24 05:51:27 PM PDT 24 |
5303513845 ps |
T140 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.3062144207 |
|
|
Jun 24 05:46:00 PM PDT 24 |
Jun 24 06:01:10 PM PDT 24 |
47697852952 ps |
T141 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.1742770453 |
|
|
Jun 24 05:45:56 PM PDT 24 |
Jun 24 05:48:32 PM PDT 24 |
136234435 ps |
T142 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.1205051252 |
|
|
Jun 24 05:45:38 PM PDT 24 |
Jun 24 05:45:41 PM PDT 24 |
26399343 ps |
T17 |
/workspace/coverage/default/20.sram_ctrl_stress_all.4003226389 |
|
|
Jun 24 05:45:56 PM PDT 24 |
Jun 24 06:26:41 PM PDT 24 |
47314141171 ps |
T143 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.1003550799 |
|
|
Jun 24 05:46:04 PM PDT 24 |
Jun 24 05:50:26 PM PDT 24 |
10348400374 ps |
T72 |
/workspace/coverage/default/17.sram_ctrl_stress_all.614768028 |
|
|
Jun 24 05:46:06 PM PDT 24 |
Jun 24 06:23:32 PM PDT 24 |
48107117292 ps |
T144 |
/workspace/coverage/default/44.sram_ctrl_partial_access.1819971744 |
|
|
Jun 24 05:47:45 PM PDT 24 |
Jun 24 05:47:55 PM PDT 24 |
1315461568 ps |
T145 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2913999257 |
|
|
Jun 24 05:45:06 PM PDT 24 |
Jun 24 05:47:06 PM PDT 24 |
147277002 ps |
T146 |
/workspace/coverage/default/4.sram_ctrl_executable.3354799152 |
|
|
Jun 24 05:45:26 PM PDT 24 |
Jun 24 05:56:16 PM PDT 24 |
22707504211 ps |
T51 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.1687250512 |
|
|
Jun 24 05:46:08 PM PDT 24 |
Jun 24 05:46:15 PM PDT 24 |
740756059 ps |
T147 |
/workspace/coverage/default/13.sram_ctrl_regwen.517313157 |
|
|
Jun 24 05:45:33 PM PDT 24 |
Jun 24 05:50:57 PM PDT 24 |
3263400843 ps |
T148 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3151583631 |
|
|
Jun 24 05:48:15 PM PDT 24 |
Jun 24 05:48:46 PM PDT 24 |
456894286 ps |
T66 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3681471402 |
|
|
Jun 24 05:45:23 PM PDT 24 |
Jun 24 05:45:34 PM PDT 24 |
267742056 ps |
T149 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3290468640 |
|
|
Jun 24 05:45:54 PM PDT 24 |
Jun 24 05:51:58 PM PDT 24 |
13453490376 ps |
T132 |
/workspace/coverage/default/39.sram_ctrl_stress_all.2437479124 |
|
|
Jun 24 05:47:11 PM PDT 24 |
Jun 24 06:40:32 PM PDT 24 |
47287654566 ps |
T150 |
/workspace/coverage/default/35.sram_ctrl_bijection.3183576967 |
|
|
Jun 24 05:46:52 PM PDT 24 |
Jun 24 05:47:26 PM PDT 24 |
2128207591 ps |
T151 |
/workspace/coverage/default/35.sram_ctrl_executable.1946724794 |
|
|
Jun 24 05:46:51 PM PDT 24 |
Jun 24 06:10:54 PM PDT 24 |
13232406270 ps |
T152 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.171685303 |
|
|
Jun 24 05:46:34 PM PDT 24 |
Jun 24 05:52:28 PM PDT 24 |
7466001545 ps |
T153 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.727329973 |
|
|
Jun 24 05:45:12 PM PDT 24 |
Jun 24 05:51:50 PM PDT 24 |
56252573866 ps |
T154 |
/workspace/coverage/default/47.sram_ctrl_alert_test.217655574 |
|
|
Jun 24 05:48:08 PM PDT 24 |
Jun 24 05:48:10 PM PDT 24 |
10658547 ps |
T14 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.1713406081 |
|
|
Jun 24 05:45:23 PM PDT 24 |
Jun 24 05:45:27 PM PDT 24 |
467001953 ps |
T29 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3140568123 |
|
|
Jun 24 05:46:46 PM PDT 24 |
Jun 24 05:46:52 PM PDT 24 |
450007753 ps |
T20 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.1606080033 |
|
|
Jun 24 05:45:07 PM PDT 24 |
Jun 24 05:45:17 PM PDT 24 |
2775331547 ps |
T30 |
/workspace/coverage/default/7.sram_ctrl_partial_access.4010688209 |
|
|
Jun 24 05:45:32 PM PDT 24 |
Jun 24 05:45:50 PM PDT 24 |
1610104832 ps |
T31 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2102216011 |
|
|
Jun 24 05:45:32 PM PDT 24 |
Jun 24 05:47:23 PM PDT 24 |
155351687 ps |
T32 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2290004489 |
|
|
Jun 24 05:46:24 PM PDT 24 |
Jun 24 05:46:35 PM PDT 24 |
188770581 ps |
T33 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.1910451315 |
|
|
Jun 24 05:45:56 PM PDT 24 |
Jun 24 06:04:39 PM PDT 24 |
20073187376 ps |
T34 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2720918416 |
|
|
Jun 24 05:45:31 PM PDT 24 |
Jun 24 05:45:33 PM PDT 24 |
75561206 ps |
T35 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3273956593 |
|
|
Jun 24 05:45:25 PM PDT 24 |
Jun 24 05:45:30 PM PDT 24 |
89884247 ps |
T36 |
/workspace/coverage/default/42.sram_ctrl_regwen.2932074742 |
|
|
Jun 24 05:47:34 PM PDT 24 |
Jun 24 06:02:51 PM PDT 24 |
12623990471 ps |
T87 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.699693383 |
|
|
Jun 24 05:45:42 PM PDT 24 |
Jun 24 05:45:45 PM PDT 24 |
97799162 ps |
T53 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.1406969340 |
|
|
Jun 24 05:45:39 PM PDT 24 |
Jun 24 05:45:51 PM PDT 24 |
927648958 ps |
T155 |
/workspace/coverage/default/16.sram_ctrl_alert_test.1923742446 |
|
|
Jun 24 05:45:35 PM PDT 24 |
Jun 24 05:45:38 PM PDT 24 |
35708486 ps |
T114 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.2096437507 |
|
|
Jun 24 05:46:41 PM PDT 24 |
Jun 24 05:46:46 PM PDT 24 |
422967856 ps |
T156 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.431485331 |
|
|
Jun 24 05:46:42 PM PDT 24 |
Jun 24 05:50:45 PM PDT 24 |
4766209592 ps |
T157 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.795799237 |
|
|
Jun 24 05:45:24 PM PDT 24 |
Jun 24 05:45:31 PM PDT 24 |
140791756 ps |
T158 |
/workspace/coverage/default/43.sram_ctrl_executable.2486014408 |
|
|
Jun 24 05:47:46 PM PDT 24 |
Jun 24 06:03:05 PM PDT 24 |
5080868039 ps |
T159 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1604432441 |
|
|
Jun 24 05:46:23 PM PDT 24 |
Jun 24 05:46:26 PM PDT 24 |
54673785 ps |
T160 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.1608815202 |
|
|
Jun 24 05:45:59 PM PDT 24 |
Jun 24 05:46:10 PM PDT 24 |
11821070114 ps |
T161 |
/workspace/coverage/default/13.sram_ctrl_smoke.4250855018 |
|
|
Jun 24 05:45:38 PM PDT 24 |
Jun 24 05:45:57 PM PDT 24 |
5618571102 ps |
T50 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.381653701 |
|
|
Jun 24 05:47:34 PM PDT 24 |
Jun 24 05:49:59 PM PDT 24 |
1931330751 ps |
T162 |
/workspace/coverage/default/23.sram_ctrl_alert_test.2795413590 |
|
|
Jun 24 05:46:02 PM PDT 24 |
Jun 24 05:46:06 PM PDT 24 |
45427069 ps |
T163 |
/workspace/coverage/default/41.sram_ctrl_bijection.137078406 |
|
|
Jun 24 05:47:28 PM PDT 24 |
Jun 24 05:47:47 PM PDT 24 |
999600425 ps |
T68 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.1330307105 |
|
|
Jun 24 05:46:26 PM PDT 24 |
Jun 24 05:46:36 PM PDT 24 |
1255740456 ps |
T56 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.603339003 |
|
|
Jun 24 05:45:33 PM PDT 24 |
Jun 24 05:45:41 PM PDT 24 |
166834519 ps |
T15 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.199910183 |
|
|
Jun 24 05:45:10 PM PDT 24 |
Jun 24 05:45:14 PM PDT 24 |
473085263 ps |
T131 |
/workspace/coverage/default/4.sram_ctrl_stress_all.1163736856 |
|
|
Jun 24 05:45:31 PM PDT 24 |
Jun 24 06:18:25 PM PDT 24 |
22741521785 ps |
T164 |
/workspace/coverage/default/12.sram_ctrl_regwen.323424410 |
|
|
Jun 24 05:45:28 PM PDT 24 |
Jun 24 05:59:58 PM PDT 24 |
22155225889 ps |
T165 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1195291711 |
|
|
Jun 24 05:45:49 PM PDT 24 |
Jun 24 05:48:14 PM PDT 24 |
1890735469 ps |
T166 |
/workspace/coverage/default/3.sram_ctrl_bijection.86377516 |
|
|
Jun 24 05:45:09 PM PDT 24 |
Jun 24 05:46:07 PM PDT 24 |
13033640835 ps |
T167 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.1969681180 |
|
|
Jun 24 05:45:58 PM PDT 24 |
Jun 24 05:46:02 PM PDT 24 |
30688160 ps |
T168 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3936407057 |
|
|
Jun 24 05:45:33 PM PDT 24 |
Jun 24 05:45:40 PM PDT 24 |
436540409 ps |
T169 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.2250423392 |
|
|
Jun 24 05:45:23 PM PDT 24 |
Jun 24 05:45:27 PM PDT 24 |
79278176 ps |
T170 |
/workspace/coverage/default/8.sram_ctrl_alert_test.2553034482 |
|
|
Jun 24 05:45:28 PM PDT 24 |
Jun 24 05:45:31 PM PDT 24 |
29418865 ps |
T171 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1254242209 |
|
|
Jun 24 05:45:01 PM PDT 24 |
Jun 24 05:51:01 PM PDT 24 |
2898170137 ps |
T172 |
/workspace/coverage/default/5.sram_ctrl_stress_all.1687682382 |
|
|
Jun 24 05:45:27 PM PDT 24 |
Jun 24 06:10:55 PM PDT 24 |
127507691414 ps |
T88 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.1542778365 |
|
|
Jun 24 05:45:58 PM PDT 24 |
Jun 24 05:46:04 PM PDT 24 |
92542648 ps |
T173 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.3932846682 |
|
|
Jun 24 05:47:04 PM PDT 24 |
Jun 24 05:47:06 PM PDT 24 |
30468073 ps |
T174 |
/workspace/coverage/default/23.sram_ctrl_bijection.3630399314 |
|
|
Jun 24 05:46:07 PM PDT 24 |
Jun 24 05:47:18 PM PDT 24 |
24042470367 ps |
T175 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1296478021 |
|
|
Jun 24 05:45:10 PM PDT 24 |
Jun 24 05:59:03 PM PDT 24 |
4342967163 ps |
T176 |
/workspace/coverage/default/31.sram_ctrl_smoke.1690518558 |
|
|
Jun 24 05:46:36 PM PDT 24 |
Jun 24 05:46:52 PM PDT 24 |
2942476325 ps |
T177 |
/workspace/coverage/default/31.sram_ctrl_regwen.3286034273 |
|
|
Jun 24 05:46:35 PM PDT 24 |
Jun 24 06:02:19 PM PDT 24 |
53139659046 ps |
T178 |
/workspace/coverage/default/47.sram_ctrl_bijection.718887419 |
|
|
Jun 24 05:48:01 PM PDT 24 |
Jun 24 05:49:21 PM PDT 24 |
13316397770 ps |
T179 |
/workspace/coverage/default/17.sram_ctrl_alert_test.316027534 |
|
|
Jun 24 05:45:54 PM PDT 24 |
Jun 24 05:45:56 PM PDT 24 |
20287693 ps |
T180 |
/workspace/coverage/default/47.sram_ctrl_regwen.2831730292 |
|
|
Jun 24 05:48:09 PM PDT 24 |
Jun 24 05:48:29 PM PDT 24 |
4461240254 ps |
T181 |
/workspace/coverage/default/2.sram_ctrl_executable.384739709 |
|
|
Jun 24 05:45:23 PM PDT 24 |
Jun 24 06:09:43 PM PDT 24 |
20589505916 ps |
T182 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.1700923764 |
|
|
Jun 24 05:45:24 PM PDT 24 |
Jun 24 05:49:47 PM PDT 24 |
2651099538 ps |
T183 |
/workspace/coverage/default/8.sram_ctrl_regwen.1920780816 |
|
|
Jun 24 05:45:29 PM PDT 24 |
Jun 24 05:58:38 PM PDT 24 |
15149651692 ps |
T184 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2502855763 |
|
|
Jun 24 05:45:50 PM PDT 24 |
Jun 24 05:48:30 PM PDT 24 |
3147216470 ps |
T185 |
/workspace/coverage/default/15.sram_ctrl_bijection.3302400234 |
|
|
Jun 24 05:45:55 PM PDT 24 |
Jun 24 05:47:20 PM PDT 24 |
4979509237 ps |
T186 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.3493975579 |
|
|
Jun 24 05:46:52 PM PDT 24 |
Jun 24 06:08:44 PM PDT 24 |
105551288704 ps |
T187 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3726524712 |
|
|
Jun 24 05:45:23 PM PDT 24 |
Jun 24 05:50:04 PM PDT 24 |
12630868250 ps |
T188 |
/workspace/coverage/default/11.sram_ctrl_executable.3285749339 |
|
|
Jun 24 05:45:37 PM PDT 24 |
Jun 24 06:03:39 PM PDT 24 |
34764398848 ps |
T189 |
/workspace/coverage/default/11.sram_ctrl_smoke.3652198108 |
|
|
Jun 24 05:45:29 PM PDT 24 |
Jun 24 05:47:07 PM PDT 24 |
1186286995 ps |
T190 |
/workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1225007963 |
|
|
Jun 24 05:46:46 PM PDT 24 |
Jun 24 05:52:11 PM PDT 24 |
4394612483 ps |
T191 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.2233526694 |
|
|
Jun 24 05:47:23 PM PDT 24 |
Jun 24 05:47:30 PM PDT 24 |
439079928 ps |
T192 |
/workspace/coverage/default/30.sram_ctrl_multiple_keys.2023360863 |
|
|
Jun 24 05:46:24 PM PDT 24 |
Jun 24 05:56:22 PM PDT 24 |
22784399563 ps |
T193 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1605165120 |
|
|
Jun 24 05:45:34 PM PDT 24 |
Jun 24 05:45:40 PM PDT 24 |
232452497 ps |
T57 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.969026819 |
|
|
Jun 24 05:45:09 PM PDT 24 |
Jun 24 05:56:23 PM PDT 24 |
6361872063 ps |
T194 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.4004007260 |
|
|
Jun 24 05:45:44 PM PDT 24 |
Jun 24 05:47:28 PM PDT 24 |
136343357 ps |
T195 |
/workspace/coverage/default/21.sram_ctrl_smoke.2224574229 |
|
|
Jun 24 05:45:55 PM PDT 24 |
Jun 24 05:46:13 PM PDT 24 |
2631643669 ps |
T196 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.737100075 |
|
|
Jun 24 05:46:53 PM PDT 24 |
Jun 24 05:52:29 PM PDT 24 |
5399661233 ps |
T197 |
/workspace/coverage/default/42.sram_ctrl_max_throughput.3722733733 |
|
|
Jun 24 05:47:39 PM PDT 24 |
Jun 24 05:47:51 PM PDT 24 |
124668154 ps |
T198 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.557535342 |
|
|
Jun 24 05:45:26 PM PDT 24 |
Jun 24 05:45:29 PM PDT 24 |
102649559 ps |
T199 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1245168124 |
|
|
Jun 24 05:45:51 PM PDT 24 |
Jun 24 05:49:40 PM PDT 24 |
16724224050 ps |
T200 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.3189015506 |
|
|
Jun 24 05:46:12 PM PDT 24 |
Jun 24 05:46:22 PM PDT 24 |
320567602 ps |
T201 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.2185145653 |
|
|
Jun 24 05:45:33 PM PDT 24 |
Jun 24 05:45:46 PM PDT 24 |
8802248953 ps |
T202 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.2521107336 |
|
|
Jun 24 05:46:00 PM PDT 24 |
Jun 24 05:46:11 PM PDT 24 |
2936102028 ps |
T41 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.2271708508 |
|
|
Jun 24 05:45:24 PM PDT 24 |
Jun 24 05:58:36 PM PDT 24 |
3490418980 ps |
T203 |
/workspace/coverage/default/29.sram_ctrl_smoke.441516238 |
|
|
Jun 24 05:46:27 PM PDT 24 |
Jun 24 05:47:11 PM PDT 24 |
92866601 ps |
T58 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.3126721732 |
|
|
Jun 24 05:46:17 PM PDT 24 |
Jun 24 05:46:22 PM PDT 24 |
60690509 ps |
T204 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2335739239 |
|
|
Jun 24 05:45:04 PM PDT 24 |
Jun 24 05:54:54 PM PDT 24 |
106153503201 ps |
T205 |
/workspace/coverage/default/40.sram_ctrl_executable.2216182734 |
|
|
Jun 24 05:47:22 PM PDT 24 |
Jun 24 06:01:23 PM PDT 24 |
2637009817 ps |
T206 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.927526990 |
|
|
Jun 24 05:47:32 PM PDT 24 |
Jun 24 05:47:36 PM PDT 24 |
349055393 ps |
T207 |
/workspace/coverage/default/43.sram_ctrl_mem_walk.2433055901 |
|
|
Jun 24 05:47:45 PM PDT 24 |
Jun 24 05:47:56 PM PDT 24 |
1860448627 ps |
T208 |
/workspace/coverage/default/28.sram_ctrl_executable.3951545707 |
|
|
Jun 24 05:46:26 PM PDT 24 |
Jun 24 06:07:02 PM PDT 24 |
11465611177 ps |
T59 |
/workspace/coverage/default/33.sram_ctrl_mem_partial_access.2223195246 |
|
|
Jun 24 05:46:41 PM PDT 24 |
Jun 24 05:46:48 PM PDT 24 |
703135421 ps |
T209 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.1398834537 |
|
|
Jun 24 05:46:00 PM PDT 24 |
Jun 24 05:46:04 PM PDT 24 |
26322928 ps |
T210 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2009806222 |
|
|
Jun 24 05:48:18 PM PDT 24 |
Jun 24 05:48:29 PM PDT 24 |
1571171817 ps |
T211 |
/workspace/coverage/default/4.sram_ctrl_lc_escalation.3747546587 |
|
|
Jun 24 05:45:34 PM PDT 24 |
Jun 24 05:45:44 PM PDT 24 |
4099137561 ps |
T212 |
/workspace/coverage/default/1.sram_ctrl_bijection.445122570 |
|
|
Jun 24 05:45:21 PM PDT 24 |
Jun 24 05:45:57 PM PDT 24 |
548324202 ps |
T213 |
/workspace/coverage/default/12.sram_ctrl_smoke.699186123 |
|
|
Jun 24 05:45:24 PM PDT 24 |
Jun 24 05:46:19 PM PDT 24 |
464382066 ps |
T214 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.1096765810 |
|
|
Jun 24 05:45:57 PM PDT 24 |
Jun 24 05:46:09 PM PDT 24 |
62605982 ps |
T69 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2347498599 |
|
|
Jun 24 05:48:08 PM PDT 24 |
Jun 24 05:48:54 PM PDT 24 |
515978904 ps |
T215 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3942229564 |
|
|
Jun 24 05:45:57 PM PDT 24 |
Jun 24 05:46:12 PM PDT 24 |
464219728 ps |
T216 |
/workspace/coverage/default/48.sram_ctrl_partial_access.247508540 |
|
|
Jun 24 05:48:10 PM PDT 24 |
Jun 24 05:48:46 PM PDT 24 |
388483121 ps |
T217 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.364951758 |
|
|
Jun 24 05:46:19 PM PDT 24 |
Jun 24 05:46:29 PM PDT 24 |
641827255 ps |
T218 |
/workspace/coverage/default/15.sram_ctrl_regwen.2113118028 |
|
|
Jun 24 05:45:32 PM PDT 24 |
Jun 24 06:02:51 PM PDT 24 |
15645405743 ps |
T219 |
/workspace/coverage/default/28.sram_ctrl_partial_access.693989693 |
|
|
Jun 24 05:46:17 PM PDT 24 |
Jun 24 05:46:22 PM PDT 24 |
815481812 ps |
T220 |
/workspace/coverage/default/19.sram_ctrl_bijection.3623626132 |
|
|
Jun 24 05:45:43 PM PDT 24 |
Jun 24 05:46:29 PM PDT 24 |
5096956647 ps |
T42 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1326092386 |
|
|
Jun 24 05:45:22 PM PDT 24 |
Jun 24 05:56:33 PM PDT 24 |
14128322484 ps |
T221 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2651942191 |
|
|
Jun 24 05:45:35 PM PDT 24 |
Jun 24 05:45:47 PM PDT 24 |
917198910 ps |
T222 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.2156952597 |
|
|
Jun 24 05:47:22 PM PDT 24 |
Jun 24 05:47:26 PM PDT 24 |
191311867 ps |
T223 |
/workspace/coverage/default/8.sram_ctrl_smoke.1119242373 |
|
|
Jun 24 05:45:55 PM PDT 24 |
Jun 24 05:46:33 PM PDT 24 |
359392728 ps |
T46 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2052439709 |
|
|
Jun 24 05:46:26 PM PDT 24 |
Jun 24 05:46:47 PM PDT 24 |
741966456 ps |
T43 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.2665356721 |
|
|
Jun 24 05:46:53 PM PDT 24 |
Jun 24 05:49:58 PM PDT 24 |
1194845334 ps |
T224 |
/workspace/coverage/default/31.sram_ctrl_stress_all.1176405961 |
|
|
Jun 24 05:46:33 PM PDT 24 |
Jun 24 06:04:23 PM PDT 24 |
10904590626 ps |
T70 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3411260613 |
|
|
Jun 24 05:46:16 PM PDT 24 |
Jun 24 05:46:35 PM PDT 24 |
477709448 ps |
T225 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.4110404243 |
|
|
Jun 24 05:46:21 PM PDT 24 |
Jun 24 05:49:16 PM PDT 24 |
9484225054 ps |
T226 |
/workspace/coverage/default/37.sram_ctrl_lc_escalation.2076467926 |
|
|
Jun 24 05:47:00 PM PDT 24 |
Jun 24 05:47:03 PM PDT 24 |
378756829 ps |
T227 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.445799514 |
|
|
Jun 24 05:45:22 PM PDT 24 |
Jun 24 05:45:32 PM PDT 24 |
521750354 ps |
T228 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3664720596 |
|
|
Jun 24 05:45:37 PM PDT 24 |
Jun 24 05:50:32 PM PDT 24 |
4103978002 ps |
T229 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1672093925 |
|
|
Jun 24 05:47:43 PM PDT 24 |
Jun 24 05:50:21 PM PDT 24 |
605806961 ps |
T230 |
/workspace/coverage/default/39.sram_ctrl_ram_cfg.1110462509 |
|
|
Jun 24 05:47:11 PM PDT 24 |
Jun 24 05:47:12 PM PDT 24 |
49014940 ps |
T231 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.499023230 |
|
|
Jun 24 05:47:11 PM PDT 24 |
Jun 24 05:47:30 PM PDT 24 |
87644865 ps |
T232 |
/workspace/coverage/default/3.sram_ctrl_smoke.1303683238 |
|
|
Jun 24 05:45:22 PM PDT 24 |
Jun 24 05:45:35 PM PDT 24 |
743419196 ps |
T233 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2223840698 |
|
|
Jun 24 05:46:05 PM PDT 24 |
Jun 24 05:46:30 PM PDT 24 |
1642129994 ps |
T234 |
/workspace/coverage/default/22.sram_ctrl_alert_test.4111231738 |
|
|
Jun 24 05:46:05 PM PDT 24 |
Jun 24 05:46:09 PM PDT 24 |
23314632 ps |
T235 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1822008586 |
|
|
Jun 24 05:45:42 PM PDT 24 |
Jun 24 05:50:37 PM PDT 24 |
9888927320 ps |
T236 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.2699110017 |
|
|
Jun 24 05:47:13 PM PDT 24 |
Jun 24 05:56:04 PM PDT 24 |
11005505412 ps |
T237 |
/workspace/coverage/default/24.sram_ctrl_regwen.439945070 |
|
|
Jun 24 05:46:05 PM PDT 24 |
Jun 24 05:50:33 PM PDT 24 |
16069945283 ps |
T238 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2798309029 |
|
|
Jun 24 05:47:50 PM PDT 24 |
Jun 24 05:48:41 PM PDT 24 |
371191547 ps |
T239 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.1731564009 |
|
|
Jun 24 05:46:01 PM PDT 24 |
Jun 24 05:47:16 PM PDT 24 |
211344298 ps |
T240 |
/workspace/coverage/default/18.sram_ctrl_alert_test.1311279073 |
|
|
Jun 24 05:45:51 PM PDT 24 |
Jun 24 05:45:53 PM PDT 24 |
29880602 ps |
T241 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2529249341 |
|
|
Jun 24 05:47:51 PM PDT 24 |
Jun 24 05:47:59 PM PDT 24 |
6397512468 ps |
T242 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.1612931708 |
|
|
Jun 24 05:45:34 PM PDT 24 |
Jun 24 05:46:53 PM PDT 24 |
141227188 ps |
T243 |
/workspace/coverage/default/9.sram_ctrl_executable.2705045038 |
|
|
Jun 24 05:45:35 PM PDT 24 |
Jun 24 05:57:56 PM PDT 24 |
12495567246 ps |
T244 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1869744436 |
|
|
Jun 24 05:45:15 PM PDT 24 |
Jun 24 05:50:07 PM PDT 24 |
3172454448 ps |
T245 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3278317249 |
|
|
Jun 24 05:47:29 PM PDT 24 |
Jun 24 05:47:39 PM PDT 24 |
361794901 ps |
T246 |
/workspace/coverage/default/9.sram_ctrl_bijection.1157359536 |
|
|
Jun 24 05:45:31 PM PDT 24 |
Jun 24 05:46:51 PM PDT 24 |
3618507211 ps |
T247 |
/workspace/coverage/default/29.sram_ctrl_regwen.2772260312 |
|
|
Jun 24 05:46:26 PM PDT 24 |
Jun 24 05:47:48 PM PDT 24 |
7675218777 ps |
T248 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.484379516 |
|
|
Jun 24 05:46:50 PM PDT 24 |
Jun 24 05:46:58 PM PDT 24 |
4398222871 ps |
T249 |
/workspace/coverage/default/20.sram_ctrl_partial_access.3594070817 |
|
|
Jun 24 05:46:05 PM PDT 24 |
Jun 24 05:48:43 PM PDT 24 |
817795959 ps |
T250 |
/workspace/coverage/default/23.sram_ctrl_executable.3069950369 |
|
|
Jun 24 05:46:06 PM PDT 24 |
Jun 24 06:04:33 PM PDT 24 |
2809545327 ps |
T251 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.833640882 |
|
|
Jun 24 05:46:42 PM PDT 24 |
Jun 24 05:50:11 PM PDT 24 |
383129283 ps |
T252 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.1332363945 |
|
|
Jun 24 05:45:53 PM PDT 24 |
Jun 24 05:46:05 PM PDT 24 |
2127446417 ps |
T253 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3198894149 |
|
|
Jun 24 05:47:26 PM PDT 24 |
Jun 24 06:11:00 PM PDT 24 |
20547975057 ps |
T254 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2368073331 |
|
|
Jun 24 05:46:16 PM PDT 24 |
Jun 24 05:50:41 PM PDT 24 |
14325996735 ps |
T47 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2133504283 |
|
|
Jun 24 05:48:17 PM PDT 24 |
Jun 24 05:49:20 PM PDT 24 |
1904008343 ps |
T255 |
/workspace/coverage/default/5.sram_ctrl_alert_test.2411286409 |
|
|
Jun 24 05:45:28 PM PDT 24 |
Jun 24 05:45:31 PM PDT 24 |
14524350 ps |
T256 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2831870565 |
|
|
Jun 24 05:47:01 PM PDT 24 |
Jun 24 05:47:05 PM PDT 24 |
68146268 ps |
T257 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2832725689 |
|
|
Jun 24 05:45:37 PM PDT 24 |
Jun 24 05:45:48 PM PDT 24 |
2953378171 ps |
T258 |
/workspace/coverage/default/4.sram_ctrl_smoke.148589731 |
|
|
Jun 24 05:45:24 PM PDT 24 |
Jun 24 05:45:42 PM PDT 24 |
259532495 ps |
T259 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.3494408987 |
|
|
Jun 24 05:47:12 PM PDT 24 |
Jun 24 05:48:44 PM PDT 24 |
1873739945 ps |
T260 |
/workspace/coverage/default/20.sram_ctrl_executable.1044648528 |
|
|
Jun 24 05:45:57 PM PDT 24 |
Jun 24 05:56:53 PM PDT 24 |
7140040543 ps |
T261 |
/workspace/coverage/default/18.sram_ctrl_regwen.2979108419 |
|
|
Jun 24 05:46:00 PM PDT 24 |
Jun 24 05:51:29 PM PDT 24 |
7885950897 ps |
T262 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3474076543 |
|
|
Jun 24 05:47:46 PM PDT 24 |
Jun 24 05:52:23 PM PDT 24 |
10833863384 ps |
T263 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.2225051972 |
|
|
Jun 24 05:46:41 PM PDT 24 |
Jun 24 05:46:44 PM PDT 24 |
44579962 ps |
T264 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.2976624418 |
|
|
Jun 24 05:45:09 PM PDT 24 |
Jun 24 05:45:14 PM PDT 24 |
397906819 ps |
T265 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.330948076 |
|
|
Jun 24 05:48:08 PM PDT 24 |
Jun 24 05:52:00 PM PDT 24 |
3060274819 ps |
T266 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3641809621 |
|
|
Jun 24 05:45:55 PM PDT 24 |
Jun 24 05:51:57 PM PDT 24 |
34883365964 ps |
T267 |
/workspace/coverage/default/9.sram_ctrl_smoke.1056095036 |
|
|
Jun 24 05:45:36 PM PDT 24 |
Jun 24 05:45:52 PM PDT 24 |
261496787 ps |
T268 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1162021501 |
|
|
Jun 24 05:48:08 PM PDT 24 |
Jun 24 05:48:16 PM PDT 24 |
4321059108 ps |
T269 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.3815490954 |
|
|
Jun 24 05:46:52 PM PDT 24 |
Jun 24 05:51:56 PM PDT 24 |
3194511705 ps |
T270 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2665150921 |
|
|
Jun 24 05:48:01 PM PDT 24 |
Jun 24 05:53:35 PM PDT 24 |
7201747889 ps |
T271 |
/workspace/coverage/default/29.sram_ctrl_stress_all.1817934082 |
|
|
Jun 24 05:46:23 PM PDT 24 |
Jun 24 06:44:19 PM PDT 24 |
209428375736 ps |
T272 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.494360186 |
|
|
Jun 24 05:45:18 PM PDT 24 |
Jun 24 05:45:24 PM PDT 24 |
145122506 ps |
T273 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.3170748831 |
|
|
Jun 24 05:47:16 PM PDT 24 |
Jun 24 05:47:22 PM PDT 24 |
723273282 ps |
T274 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2158195738 |
|
|
Jun 24 05:48:01 PM PDT 24 |
Jun 24 05:50:37 PM PDT 24 |
142517341 ps |
T275 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3222276609 |
|
|
Jun 24 05:45:06 PM PDT 24 |
Jun 24 05:45:08 PM PDT 24 |
14334729 ps |
T16 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.1849676624 |
|
|
Jun 24 05:45:24 PM PDT 24 |
Jun 24 05:45:30 PM PDT 24 |
278684901 ps |
T276 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.273960459 |
|
|
Jun 24 05:45:07 PM PDT 24 |
Jun 24 05:51:59 PM PDT 24 |
17354260696 ps |
T277 |
/workspace/coverage/default/21.sram_ctrl_alert_test.340641747 |
|
|
Jun 24 05:46:00 PM PDT 24 |
Jun 24 05:46:04 PM PDT 24 |
25667757 ps |
T278 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.1815594321 |
|
|
Jun 24 05:47:24 PM PDT 24 |
Jun 24 05:47:25 PM PDT 24 |
44129120 ps |
T279 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3940095266 |
|
|
Jun 24 05:46:36 PM PDT 24 |
Jun 24 05:46:43 PM PDT 24 |
604391238 ps |
T280 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.1490922179 |
|
|
Jun 24 05:47:02 PM PDT 24 |
Jun 24 05:47:08 PM PDT 24 |
967281954 ps |
T281 |
/workspace/coverage/default/30.sram_ctrl_smoke.2489858974 |
|
|
Jun 24 05:46:24 PM PDT 24 |
Jun 24 05:46:42 PM PDT 24 |
69722994 ps |
T282 |
/workspace/coverage/default/36.sram_ctrl_executable.1897577999 |
|
|
Jun 24 05:47:03 PM PDT 24 |
Jun 24 06:04:31 PM PDT 24 |
2395474440 ps |
T283 |
/workspace/coverage/default/2.sram_ctrl_smoke.2002869646 |
|
|
Jun 24 05:45:27 PM PDT 24 |
Jun 24 05:45:51 PM PDT 24 |
683053824 ps |
T284 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3919724663 |
|
|
Jun 24 05:47:02 PM PDT 24 |
Jun 24 05:52:46 PM PDT 24 |
4936016251 ps |
T285 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1472990483 |
|
|
Jun 24 05:46:28 PM PDT 24 |
Jun 24 05:47:16 PM PDT 24 |
507426066 ps |
T286 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.609504409 |
|
|
Jun 24 05:47:50 PM PDT 24 |
Jun 24 05:48:02 PM PDT 24 |
457531440 ps |
T287 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2006888577 |
|
|
Jun 24 05:48:19 PM PDT 24 |
Jun 24 05:48:20 PM PDT 24 |
67433686 ps |
T288 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.242485834 |
|
|
Jun 24 05:46:18 PM PDT 24 |
Jun 24 05:47:03 PM PDT 24 |
98911812 ps |
T289 |
/workspace/coverage/default/32.sram_ctrl_alert_test.3879436014 |
|
|
Jun 24 05:46:45 PM PDT 24 |
Jun 24 05:46:47 PM PDT 24 |
43742844 ps |
T290 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.1227739165 |
|
|
Jun 24 05:47:22 PM PDT 24 |
Jun 24 05:48:04 PM PDT 24 |
106205126 ps |
T291 |
/workspace/coverage/default/25.sram_ctrl_partial_access.1885545594 |
|
|
Jun 24 05:46:21 PM PDT 24 |
Jun 24 05:47:24 PM PDT 24 |
279582151 ps |
T292 |
/workspace/coverage/default/10.sram_ctrl_executable.2778108393 |
|
|
Jun 24 05:45:33 PM PDT 24 |
Jun 24 05:49:51 PM PDT 24 |
8836172446 ps |
T293 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.1346028016 |
|
|
Jun 24 05:47:36 PM PDT 24 |
Jun 24 05:51:08 PM PDT 24 |
2149295460 ps |
T294 |
/workspace/coverage/default/15.sram_ctrl_partial_access.2233790232 |
|
|
Jun 24 05:45:35 PM PDT 24 |
Jun 24 05:45:40 PM PDT 24 |
49890571 ps |
T295 |
/workspace/coverage/default/34.sram_ctrl_partial_access.973786543 |
|
|
Jun 24 05:46:41 PM PDT 24 |
Jun 24 05:47:00 PM PDT 24 |
1011484180 ps |
T296 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.1855092114 |
|
|
Jun 24 05:45:33 PM PDT 24 |
Jun 24 05:46:53 PM PDT 24 |
1142611031 ps |
T297 |
/workspace/coverage/default/33.sram_ctrl_bijection.1800374315 |
|
|
Jun 24 05:46:43 PM PDT 24 |
Jun 24 05:48:06 PM PDT 24 |
7239212961 ps |
T298 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.2830796079 |
|
|
Jun 24 05:45:54 PM PDT 24 |
Jun 24 05:48:55 PM PDT 24 |
1706018690 ps |
T299 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1217357918 |
|
|
Jun 24 05:47:03 PM PDT 24 |
Jun 24 06:01:17 PM PDT 24 |
2650255972 ps |
T300 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3542274062 |
|
|
Jun 24 05:48:02 PM PDT 24 |
Jun 24 05:48:07 PM PDT 24 |
641417737 ps |
T301 |
/workspace/coverage/default/8.sram_ctrl_bijection.1062393258 |
|
|
Jun 24 05:45:40 PM PDT 24 |
Jun 24 05:46:56 PM PDT 24 |
9252057604 ps |
T302 |
/workspace/coverage/default/33.sram_ctrl_executable.4011916114 |
|
|
Jun 24 05:46:41 PM PDT 24 |
Jun 24 05:48:09 PM PDT 24 |
1573576257 ps |
T303 |
/workspace/coverage/default/27.sram_ctrl_regwen.3863459096 |
|
|
Jun 24 05:46:14 PM PDT 24 |
Jun 24 05:58:20 PM PDT 24 |
20350741415 ps |
T304 |
/workspace/coverage/default/35.sram_ctrl_alert_test.1388305408 |
|
|
Jun 24 05:46:51 PM PDT 24 |
Jun 24 05:46:52 PM PDT 24 |
13137902 ps |
T305 |
/workspace/coverage/default/23.sram_ctrl_regwen.1503915083 |
|
|
Jun 24 05:46:17 PM PDT 24 |
Jun 24 05:49:14 PM PDT 24 |
7597459935 ps |