SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.u_prim_lc_sync | 100.00 | 100.00 | 100.00 | ||||
tb.dut.u_tlul_lc_gate.u_err_en_sync | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
91.90 | 100.00 | 88.89 | 100.00 | 100.00 | 70.59 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_buffs[0].gen_bits[0].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[1].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[2].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[3].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[0].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[1].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[2].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[3].u_prim_buf | 100.00 | 100.00 | |||||
gen_flops.u_prim_flop_2sync | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
89.00 | 100.00 | 100.00 | 100.00 | 95.00 | 50.00 | u_tlul_lc_gate |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_buffs[0].gen_bits[0].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[1].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[2].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[3].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[0].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[1].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[2].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[3].u_prim_buf | 100.00 | 100.00 |
SCORE | LINE |
100.00 | 100.00 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 3 | 3 | 100.00 | |
ALWAYS | 68 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
68 | 1 | 1 | |
106 | 2 | 2 |
SCORE | LINE |
100.00 | 100.00 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 3 | 3 | 100.00 | |
ALWAYS | 84 | 0 | 0 | |
CONT_ASSIGN | 93 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
84 | unreachable | ||
85 | unreachable | ||
87 | unreachable | ||
93 | 1 | 1 | |
106 | 2 | 2 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 4 | 4 | 100.00 | 4 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 4 | 4 | 100.00 | 4 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 1782 | 1782 | 0 | 0 |
OutputsKnown_A | 666868514 | 666641906 | 0 | 0 |
gen_flops.OutputDelay_A | 333434257 | 333307775 | 0 | 2673 |
gen_no_flops.OutputDelay_A | 333434257 | 333320953 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 1782 | 1782 | 0 | 0 |
T1 | 2 | 2 | 0 | 0 |
T2 | 2 | 2 | 0 | 0 |
T3 | 2 | 2 | 0 | 0 |
T4 | 2 | 2 | 0 | 0 |
T8 | 2 | 2 | 0 | 0 |
T9 | 2 | 2 | 0 | 0 |
T10 | 2 | 2 | 0 | 0 |
T11 | 2 | 2 | 0 | 0 |
T12 | 2 | 2 | 0 | 0 |
T13 | 2 | 2 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 666868514 | 666641906 | 0 | 0 |
T1 | 408462 | 408350 | 0 | 0 |
T2 | 206428 | 206416 | 0 | 0 |
T3 | 87134 | 86992 | 0 | 0 |
T4 | 652164 | 652024 | 0 | 0 |
T8 | 127178 | 127076 | 0 | 0 |
T9 | 420508 | 420384 | 0 | 0 |
T10 | 565090 | 564976 | 0 | 0 |
T11 | 69738 | 69604 | 0 | 0 |
T12 | 993352 | 993242 | 0 | 0 |
T13 | 820312 | 820130 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 333434257 | 333307775 | 0 | 2673 |
T1 | 204231 | 204172 | 0 | 3 |
T2 | 103214 | 103207 | 0 | 3 |
T3 | 43567 | 43493 | 0 | 3 |
T4 | 326082 | 326009 | 0 | 3 |
T8 | 63589 | 63535 | 0 | 3 |
T9 | 210254 | 210189 | 0 | 3 |
T10 | 282545 | 282485 | 0 | 3 |
T11 | 34869 | 34799 | 0 | 3 |
T12 | 496676 | 496618 | 0 | 3 |
T13 | 410156 | 410062 | 0 | 3 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 333434257 | 333320953 | 0 | 0 |
T1 | 204231 | 204175 | 0 | 0 |
T2 | 103214 | 103208 | 0 | 0 |
T3 | 43567 | 43496 | 0 | 0 |
T4 | 326082 | 326012 | 0 | 0 |
T8 | 63589 | 63538 | 0 | 0 |
T9 | 210254 | 210192 | 0 | 0 |
T10 | 282545 | 282488 | 0 | 0 |
T11 | 34869 | 34802 | 0 | 0 |
T12 | 496676 | 496621 | 0 | 0 |
T13 | 410156 | 410065 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 3 | 3 | 100.00 | |
ALWAYS | 68 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
68 | 1 | 1 | |
106 | 2 | 2 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 891 | 891 | 0 | 0 |
OutputsKnown_A | 333434257 | 333320953 | 0 | 0 |
gen_flops.OutputDelay_A | 333434257 | 333307775 | 0 | 2673 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 891 | 891 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 333434257 | 333320953 | 0 | 0 |
T1 | 204231 | 204175 | 0 | 0 |
T2 | 103214 | 103208 | 0 | 0 |
T3 | 43567 | 43496 | 0 | 0 |
T4 | 326082 | 326012 | 0 | 0 |
T8 | 63589 | 63538 | 0 | 0 |
T9 | 210254 | 210192 | 0 | 0 |
T10 | 282545 | 282488 | 0 | 0 |
T11 | 34869 | 34802 | 0 | 0 |
T12 | 496676 | 496621 | 0 | 0 |
T13 | 410156 | 410065 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 333434257 | 333307775 | 0 | 2673 |
T1 | 204231 | 204172 | 0 | 3 |
T2 | 103214 | 103207 | 0 | 3 |
T3 | 43567 | 43493 | 0 | 3 |
T4 | 326082 | 326009 | 0 | 3 |
T8 | 63589 | 63535 | 0 | 3 |
T9 | 210254 | 210189 | 0 | 3 |
T10 | 282545 | 282485 | 0 | 3 |
T11 | 34869 | 34799 | 0 | 3 |
T12 | 496676 | 496618 | 0 | 3 |
T13 | 410156 | 410062 | 0 | 3 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 3 | 3 | 100.00 | |
ALWAYS | 84 | 0 | 0 | |
CONT_ASSIGN | 93 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
84 | unreachable | ||
85 | unreachable | ||
87 | unreachable | ||
93 | 1 | 1 | |
106 | 2 | 2 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 891 | 891 | 0 | 0 |
OutputsKnown_A | 333434257 | 333320953 | 0 | 0 |
gen_no_flops.OutputDelay_A | 333434257 | 333320953 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 891 | 891 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T8 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
T13 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 333434257 | 333320953 | 0 | 0 |
T1 | 204231 | 204175 | 0 | 0 |
T2 | 103214 | 103208 | 0 | 0 |
T3 | 43567 | 43496 | 0 | 0 |
T4 | 326082 | 326012 | 0 | 0 |
T8 | 63589 | 63538 | 0 | 0 |
T9 | 210254 | 210192 | 0 | 0 |
T10 | 282545 | 282488 | 0 | 0 |
T11 | 34869 | 34802 | 0 | 0 |
T12 | 496676 | 496621 | 0 | 0 |
T13 | 410156 | 410065 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 333434257 | 333320953 | 0 | 0 |
T1 | 204231 | 204175 | 0 | 0 |
T2 | 103214 | 103208 | 0 | 0 |
T3 | 43567 | 43496 | 0 | 0 |
T4 | 326082 | 326012 | 0 | 0 |
T8 | 63589 | 63538 | 0 | 0 |
T9 | 210254 | 210192 | 0 | 0 |
T10 | 282545 | 282488 | 0 | 0 |
T11 | 34869 | 34802 | 0 | 0 |
T12 | 496676 | 496621 | 0 | 0 |
T13 | 410156 | 410065 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |