Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1026
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
72.28 72.28 91.86 91.86 77.01 77.01 87.17 87.17 23.81 23.81 82.13 82.13 93.36 93.36 50.64 50.64 /workspace/coverage/default/46.sram_ctrl_regwen.4164543647
87.57 15.28 96.44 4.58 85.07 8.06 97.43 10.26 66.67 42.86 89.61 7.49 96.02 2.65 81.72 31.08 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1340667542
91.62 4.05 97.54 1.10 85.43 0.36 97.43 0.00 90.48 23.81 91.55 1.93 97.20 1.18 81.72 0.00 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.945752479
94.52 2.90 98.73 1.19 87.80 2.37 97.78 0.35 100.00 9.52 94.20 2.66 97.20 0.00 85.92 4.20 /workspace/coverage/default/43.sram_ctrl_stress_all.1633577820
95.49 0.97 98.90 0.17 88.39 0.59 97.99 0.21 100.00 0.00 94.93 0.72 97.20 0.00 91.04 5.12 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2280695899
96.07 0.58 99.07 0.17 90.17 1.78 98.40 0.42 100.00 0.00 95.65 0.72 97.79 0.59 91.41 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.838906980
96.44 0.37 99.07 0.00 90.17 0.00 98.40 0.00 100.00 0.00 95.65 0.00 97.79 0.00 93.97 2.56 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2649106001
96.65 0.21 99.07 0.00 90.52 0.36 98.82 0.42 100.00 0.00 95.65 0.00 97.79 0.00 94.70 0.73 /workspace/coverage/default/18.sram_ctrl_alert_test.2369321230
96.83 0.18 99.07 0.00 90.52 0.00 98.89 0.07 100.00 0.00 95.65 0.00 98.97 1.18 94.70 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2902803511
96.96 0.13 99.15 0.08 90.52 0.00 99.72 0.83 100.00 0.00 95.65 0.00 98.97 0.00 94.70 0.00 /workspace/coverage/default/10.sram_ctrl_ram_cfg.2892326062
97.09 0.13 99.15 0.00 90.52 0.00 99.72 0.00 100.00 0.00 95.65 0.00 98.97 0.00 95.61 0.91 /workspace/coverage/default/10.sram_ctrl_stress_all.3891536249
97.18 0.09 99.15 0.00 90.76 0.24 99.72 0.00 100.00 0.00 95.65 0.00 98.97 0.00 95.98 0.37 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1094682540
97.26 0.09 99.15 0.00 90.88 0.12 99.72 0.00 100.00 0.00 96.14 0.48 98.97 0.00 95.98 0.00 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.383628818
97.31 0.05 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.34 0.37 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1362809902
97.37 0.05 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.71 0.37 /workspace/coverage/default/12.sram_ctrl_stress_all.723509738
97.39 0.03 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.89 0.18 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.4040514814
97.42 0.03 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2732733675
97.44 0.03 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.284189521
97.47 0.03 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.18 /workspace/coverage/default/20.sram_ctrl_partial_access.3031459343
97.49 0.02 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3066208179
97.51 0.02 99.15 0.00 91.00 0.12 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.3660820933

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.159364512
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1226616817
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3238573181
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2430534606
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4146257161
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4040951819
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2147177689
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3234308337
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1823758346
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2770858650
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3952934676
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1886821577
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.488664744
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1316800364
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.939820072
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3978283192
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3426201223
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2873565045
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2490956732
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2531867456
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3398059005
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.333726945
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2091226345
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3362045816
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.4143061959
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1199570626
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1407694152
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.4144071684
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3538793965
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2575346834
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.4248746904
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.352887722
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1984242596
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2319665335
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1960504321
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3360943537
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.292756821
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3023273365
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3520316663
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.39474284
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.4287356835
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4277737999
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1416095899
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1043038194
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1894812072
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2164484819
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2827884967
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1995242621
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3098002525
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3534128130
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1078837542
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1046209993
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3930485246
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2272912019
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3570816954
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.959722178
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.198314349
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4138549733
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.204755032
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3772403724
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.788139515
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3198741464
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.4131458637
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2457536550
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2896390240
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.391288615
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4162374178
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3589295688
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.118878117
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2561035719
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.4149562383
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3516552422
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.484842826
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.295203377
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2392715691
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1312411417
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1186809278
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2792826604
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3723924745
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2627963456
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2939324311
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.598564719
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3967626952
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3115340280
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2153650706
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.4024094169
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3702726718
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3893589149
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1768702241
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.4261819737
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2245266120
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2256050532
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.556654182
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3368639631
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3450715001
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3976179613
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2688499033
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3536196238
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.492452330
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1134857738
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1641832104
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3045318248
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3885144865
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.764300318
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2871650569
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3258719268
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1076083804
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3158955286
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3585367252
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1413108337
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3256554523
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3398324603
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1594269534
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1593136840
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3819516303
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.807226894
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2468784297
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1251659458
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.384763167
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3921454995
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3199397667
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2732617148
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3548828923
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.298909009
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1099581592
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.883685733
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1357854066
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3410945117
/workspace/coverage/default/0.sram_ctrl_alert_test.1650411680
/workspace/coverage/default/0.sram_ctrl_bijection.555819456
/workspace/coverage/default/0.sram_ctrl_executable.3103723954
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3017486205
/workspace/coverage/default/0.sram_ctrl_max_throughput.1419752180
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3523017869
/workspace/coverage/default/0.sram_ctrl_mem_walk.254373112
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2010525360
/workspace/coverage/default/0.sram_ctrl_partial_access.2754686684
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4205597089
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1646749641
/workspace/coverage/default/0.sram_ctrl_regwen.2862676512
/workspace/coverage/default/0.sram_ctrl_smoke.3673813610
/workspace/coverage/default/0.sram_ctrl_stress_all.4250642956
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1039188917
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3793982770
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.338558893
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.825866693
/workspace/coverage/default/1.sram_ctrl_alert_test.3075865718
/workspace/coverage/default/1.sram_ctrl_bijection.4124865971
/workspace/coverage/default/1.sram_ctrl_executable.3941718230
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3143352019
/workspace/coverage/default/1.sram_ctrl_max_throughput.20094614
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3073510400
/workspace/coverage/default/1.sram_ctrl_mem_walk.306354889
/workspace/coverage/default/1.sram_ctrl_multiple_keys.164829836
/workspace/coverage/default/1.sram_ctrl_partial_access.1951038192
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1862419089
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2721864510
/workspace/coverage/default/1.sram_ctrl_regwen.2412528019
/workspace/coverage/default/1.sram_ctrl_sec_cm.380241402
/workspace/coverage/default/1.sram_ctrl_smoke.3260731544
/workspace/coverage/default/1.sram_ctrl_stress_all.1916812724
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3446503993
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.988711653
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.5817514
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.295771296
/workspace/coverage/default/10.sram_ctrl_alert_test.3434217643
/workspace/coverage/default/10.sram_ctrl_bijection.1348972757
/workspace/coverage/default/10.sram_ctrl_executable.2259525741
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1922353750
/workspace/coverage/default/10.sram_ctrl_max_throughput.3209130153
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.1178887032
/workspace/coverage/default/10.sram_ctrl_mem_walk.2994042970
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1208139992
/workspace/coverage/default/10.sram_ctrl_partial_access.2604935226
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.64877460
/workspace/coverage/default/10.sram_ctrl_regwen.3573621832
/workspace/coverage/default/10.sram_ctrl_smoke.565955280
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.324742322
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.129517821
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1773924129
/workspace/coverage/default/11.sram_ctrl_alert_test.2221888856
/workspace/coverage/default/11.sram_ctrl_bijection.3093356046
/workspace/coverage/default/11.sram_ctrl_executable.2600551654
/workspace/coverage/default/11.sram_ctrl_lc_escalation.211268355
/workspace/coverage/default/11.sram_ctrl_max_throughput.1226081057
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1388230755
/workspace/coverage/default/11.sram_ctrl_mem_walk.2405952256
/workspace/coverage/default/11.sram_ctrl_multiple_keys.537789435
/workspace/coverage/default/11.sram_ctrl_partial_access.3095018281
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4066485130
/workspace/coverage/default/11.sram_ctrl_ram_cfg.66936178
/workspace/coverage/default/11.sram_ctrl_regwen.3823808542
/workspace/coverage/default/11.sram_ctrl_smoke.2583035053
/workspace/coverage/default/11.sram_ctrl_stress_all.809650966
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.4289076822
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1707093100
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1208671066
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1532792617
/workspace/coverage/default/12.sram_ctrl_alert_test.3837278552
/workspace/coverage/default/12.sram_ctrl_bijection.75485246
/workspace/coverage/default/12.sram_ctrl_executable.931475398
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/workspace/coverage/default/43.sram_ctrl_lc_escalation.3180414212
/workspace/coverage/default/43.sram_ctrl_max_throughput.3104331892
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2696515197
/workspace/coverage/default/43.sram_ctrl_mem_walk.1879774065
/workspace/coverage/default/43.sram_ctrl_multiple_keys.811206341
/workspace/coverage/default/43.sram_ctrl_partial_access.1143330816
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1351857807
/workspace/coverage/default/43.sram_ctrl_ram_cfg.766066479
/workspace/coverage/default/43.sram_ctrl_regwen.2082981308
/workspace/coverage/default/43.sram_ctrl_smoke.3580355908
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1476934556
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3313169776
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3374404362
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4013532072
/workspace/coverage/default/44.sram_ctrl_alert_test.2914580910
/workspace/coverage/default/44.sram_ctrl_bijection.285598654
/workspace/coverage/default/44.sram_ctrl_executable.2700910113
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1198373180
/workspace/coverage/default/44.sram_ctrl_max_throughput.327606289
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1911254858
/workspace/coverage/default/44.sram_ctrl_mem_walk.3037318097
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1894723884
/workspace/coverage/default/44.sram_ctrl_partial_access.828856728
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3785533965
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3473092820
/workspace/coverage/default/44.sram_ctrl_regwen.3767406922
/workspace/coverage/default/44.sram_ctrl_smoke.1117113117
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3901527517
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2031013808
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.510170680
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2421938895
/workspace/coverage/default/45.sram_ctrl_alert_test.2458490762
/workspace/coverage/default/45.sram_ctrl_bijection.3369175904
/workspace/coverage/default/45.sram_ctrl_executable.3624065600
/workspace/coverage/default/45.sram_ctrl_lc_escalation.176853601
/workspace/coverage/default/45.sram_ctrl_max_throughput.168425772
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.946806190
/workspace/coverage/default/45.sram_ctrl_mem_walk.1215078731
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2043827387
/workspace/coverage/default/45.sram_ctrl_partial_access.2383613387
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.378000448
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2540967894
/workspace/coverage/default/45.sram_ctrl_regwen.95645206
/workspace/coverage/default/45.sram_ctrl_smoke.1033931963
/workspace/coverage/default/45.sram_ctrl_stress_all.2084898588
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3541301867
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2006895848
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2988715359
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1774986588
/workspace/coverage/default/46.sram_ctrl_alert_test.1667579669
/workspace/coverage/default/46.sram_ctrl_bijection.4215250149
/workspace/coverage/default/46.sram_ctrl_executable.3373259653
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3443440954
/workspace/coverage/default/46.sram_ctrl_max_throughput.1978421648
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2276825681
/workspace/coverage/default/46.sram_ctrl_mem_walk.2827031411
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1269440966
/workspace/coverage/default/46.sram_ctrl_partial_access.1637229836
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1774726737
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3983889932
/workspace/coverage/default/46.sram_ctrl_smoke.572330213
/workspace/coverage/default/46.sram_ctrl_stress_all.1017223324
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2015349852
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.516031339
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.226437501
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1054624594
/workspace/coverage/default/47.sram_ctrl_alert_test.3103410464
/workspace/coverage/default/47.sram_ctrl_bijection.2092529209
/workspace/coverage/default/47.sram_ctrl_executable.4236553596
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2221248579
/workspace/coverage/default/47.sram_ctrl_max_throughput.4284278885
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3251926801
/workspace/coverage/default/47.sram_ctrl_mem_walk.2823173327
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1270667720
/workspace/coverage/default/47.sram_ctrl_partial_access.3532727338
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.669956890
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1847941487
/workspace/coverage/default/47.sram_ctrl_regwen.3268453854
/workspace/coverage/default/47.sram_ctrl_smoke.2462913072
/workspace/coverage/default/47.sram_ctrl_stress_all.732641648
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3363777723
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2153558967
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1339372662
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1563422901
/workspace/coverage/default/48.sram_ctrl_alert_test.1487509801
/workspace/coverage/default/48.sram_ctrl_bijection.4004064572
/workspace/coverage/default/48.sram_ctrl_executable.3992801361
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1136101258
/workspace/coverage/default/48.sram_ctrl_max_throughput.3218265353
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2851804157
/workspace/coverage/default/48.sram_ctrl_mem_walk.2210569771
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2699810923
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2872414530
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1336102661
/workspace/coverage/default/48.sram_ctrl_regwen.1665233130
/workspace/coverage/default/48.sram_ctrl_smoke.2023953936
/workspace/coverage/default/48.sram_ctrl_stress_all.3780815806
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2488889876
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3315994231
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3541204846
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2625411417
/workspace/coverage/default/49.sram_ctrl_alert_test.7771356
/workspace/coverage/default/49.sram_ctrl_bijection.277661109
/workspace/coverage/default/49.sram_ctrl_executable.4277855806
/workspace/coverage/default/49.sram_ctrl_lc_escalation.871604677
/workspace/coverage/default/49.sram_ctrl_max_throughput.1893219539
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3776766264
/workspace/coverage/default/49.sram_ctrl_mem_walk.1919323718
/workspace/coverage/default/49.sram_ctrl_multiple_keys.4213305551
/workspace/coverage/default/49.sram_ctrl_partial_access.740989986
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3674517928
/workspace/coverage/default/49.sram_ctrl_ram_cfg.136362271
/workspace/coverage/default/49.sram_ctrl_regwen.1465964701
/workspace/coverage/default/49.sram_ctrl_smoke.605697476
/workspace/coverage/default/49.sram_ctrl_stress_all.2964552791
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2014130865
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4184385855
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1584871128
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3107035799
/workspace/coverage/default/5.sram_ctrl_alert_test.3005004629
/workspace/coverage/default/5.sram_ctrl_bijection.3589911041
/workspace/coverage/default/5.sram_ctrl_executable.480315870
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2345421212
/workspace/coverage/default/5.sram_ctrl_max_throughput.3585838742
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2494067072
/workspace/coverage/default/5.sram_ctrl_mem_walk.1944546330
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1756118146
/workspace/coverage/default/5.sram_ctrl_partial_access.2857523451
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2794366710
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1944616195
/workspace/coverage/default/5.sram_ctrl_regwen.1496224563
/workspace/coverage/default/5.sram_ctrl_smoke.2574021764
/workspace/coverage/default/5.sram_ctrl_stress_all.1243996279
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4266451361
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.627695362
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3785087791
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.912235175
/workspace/coverage/default/6.sram_ctrl_alert_test.2062464204
/workspace/coverage/default/6.sram_ctrl_bijection.1596548754
/workspace/coverage/default/6.sram_ctrl_executable.2745092029
/workspace/coverage/default/6.sram_ctrl_lc_escalation.847260623
/workspace/coverage/default/6.sram_ctrl_max_throughput.3650343221
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1220942506
/workspace/coverage/default/6.sram_ctrl_mem_walk.3471345334
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1019012267
/workspace/coverage/default/6.sram_ctrl_partial_access.3946720352
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2166022539
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2739023549
/workspace/coverage/default/6.sram_ctrl_regwen.2225280562
/workspace/coverage/default/6.sram_ctrl_smoke.1401172809
/workspace/coverage/default/6.sram_ctrl_stress_all.1755537036
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.664103710
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2173890556
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2362748409
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.144992643
/workspace/coverage/default/7.sram_ctrl_alert_test.1362813993
/workspace/coverage/default/7.sram_ctrl_bijection.416066182
/workspace/coverage/default/7.sram_ctrl_executable.1932598366
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3452869537
/workspace/coverage/default/7.sram_ctrl_max_throughput.2116924668
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3455140750
/workspace/coverage/default/7.sram_ctrl_mem_walk.2753974475
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2490046511
/workspace/coverage/default/7.sram_ctrl_partial_access.1550604194
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.155916446
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3278477504
/workspace/coverage/default/7.sram_ctrl_regwen.3863302234
/workspace/coverage/default/7.sram_ctrl_smoke.1425435166
/workspace/coverage/default/7.sram_ctrl_stress_all.1531812948
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1455790813
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1966778429
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.597717008
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.829969000
/workspace/coverage/default/8.sram_ctrl_alert_test.3095584647
/workspace/coverage/default/8.sram_ctrl_bijection.407337627
/workspace/coverage/default/8.sram_ctrl_executable.1114055331
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1244168983
/workspace/coverage/default/8.sram_ctrl_max_throughput.3745688155
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.927139100
/workspace/coverage/default/8.sram_ctrl_mem_walk.2544293158
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4092880003
/workspace/coverage/default/8.sram_ctrl_partial_access.4092539476
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1370746519
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3558721611
/workspace/coverage/default/8.sram_ctrl_smoke.3092800726
/workspace/coverage/default/8.sram_ctrl_stress_all.295452888
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.704445295
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3776140852
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3960670104
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1380853566
/workspace/coverage/default/9.sram_ctrl_alert_test.3258771957
/workspace/coverage/default/9.sram_ctrl_bijection.1242008732
/workspace/coverage/default/9.sram_ctrl_executable.2478419554
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2668506835
/workspace/coverage/default/9.sram_ctrl_max_throughput.2914261890
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.4248490220
/workspace/coverage/default/9.sram_ctrl_mem_walk.3964802658
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2902029433
/workspace/coverage/default/9.sram_ctrl_partial_access.2033512173
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2590255381
/workspace/coverage/default/9.sram_ctrl_ram_cfg.241937951
/workspace/coverage/default/9.sram_ctrl_regwen.1080565618
/workspace/coverage/default/9.sram_ctrl_smoke.764023413
/workspace/coverage/default/9.sram_ctrl_stress_all.2943827724
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3775408839
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.921621214
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3385920862



Total test records in report: 1026
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.4013532072 Jun 25 06:06:17 PM PDT 24 Jun 25 06:20:11 PM PDT 24 2105435761 ps
T2 /workspace/coverage/default/46.sram_ctrl_regwen.4164543647 Jun 25 06:06:35 PM PDT 24 Jun 25 06:21:14 PM PDT 24 10640368153 ps
T3 /workspace/coverage/default/1.sram_ctrl_mem_walk.306354889 Jun 25 06:02:29 PM PDT 24 Jun 25 06:02:41 PM PDT 24 1815383944 ps
T8 /workspace/coverage/default/32.sram_ctrl_bijection.2906339360 Jun 25 06:04:45 PM PDT 24 Jun 25 06:05:29 PM PDT 24 2764800143 ps
T4 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1183709286 Jun 25 06:03:14 PM PDT 24 Jun 25 06:08:38 PM PDT 24 6793296653 ps
T9 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.912235175 Jun 25 06:02:43 PM PDT 24 Jun 25 06:13:45 PM PDT 24 42051135529 ps
T10 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1380853566 Jun 25 06:02:50 PM PDT 24 Jun 25 06:15:25 PM PDT 24 2883105555 ps
T11 /workspace/coverage/default/48.sram_ctrl_bijection.4004064572 Jun 25 06:06:44 PM PDT 24 Jun 25 06:07:10 PM PDT 24 2179481499 ps
T12 /workspace/coverage/default/21.sram_ctrl_regwen.4043488309 Jun 25 06:03:40 PM PDT 24 Jun 25 06:31:50 PM PDT 24 5016944424 ps
T13 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1966778429 Jun 25 06:02:47 PM PDT 24 Jun 25 06:09:31 PM PDT 24 4228323209 ps
T23 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1340667542 Jun 25 06:03:19 PM PDT 24 Jun 25 06:04:25 PM PDT 24 1627773213 ps
T25 /workspace/coverage/default/11.sram_ctrl_mem_walk.2405952256 Jun 25 06:02:57 PM PDT 24 Jun 25 06:03:07 PM PDT 24 3290799143 ps
T24 /workspace/coverage/default/10.sram_ctrl_stress_all.3891536249 Jun 25 06:02:56 PM PDT 24 Jun 25 07:46:31 PM PDT 24 143368039252 ps
T57 /workspace/coverage/default/1.sram_ctrl_bijection.4124865971 Jun 25 06:02:24 PM PDT 24 Jun 25 06:03:35 PM PDT 24 4016853943 ps
T49 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2649106001 Jun 25 06:04:13 PM PDT 24 Jun 25 06:11:58 PM PDT 24 17798576555 ps
T58 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.1829927465 Jun 25 06:04:12 PM PDT 24 Jun 25 06:09:18 PM PDT 24 3293110862 ps
T14 /workspace/coverage/default/42.sram_ctrl_alert_test.3146878822 Jun 25 06:06:06 PM PDT 24 Jun 25 06:06:08 PM PDT 24 42143185 ps
T20 /workspace/coverage/default/26.sram_ctrl_regwen.1054564300 Jun 25 06:04:11 PM PDT 24 Jun 25 06:06:37 PM PDT 24 3405243973 ps
T59 /workspace/coverage/default/11.sram_ctrl_smoke.2583035053 Jun 25 06:02:58 PM PDT 24 Jun 25 06:03:05 PM PDT 24 227907270 ps
T60 /workspace/coverage/default/47.sram_ctrl_max_throughput.4284278885 Jun 25 06:06:36 PM PDT 24 Jun 25 06:07:06 PM PDT 24 659503069 ps
T5 /workspace/coverage/default/27.sram_ctrl_lc_escalation.1038283285 Jun 25 06:04:24 PM PDT 24 Jun 25 06:04:30 PM PDT 24 716670312 ps
T67 /workspace/coverage/default/32.sram_ctrl_stress_all.3088467991 Jun 25 06:04:54 PM PDT 24 Jun 25 07:37:07 PM PDT 24 51422876643 ps
T42 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.945752479 Jun 25 06:05:25 PM PDT 24 Jun 25 06:05:33 PM PDT 24 391000523 ps
T68 /workspace/coverage/default/34.sram_ctrl_regwen.622089981 Jun 25 06:05:14 PM PDT 24 Jun 25 06:34:33 PM PDT 24 14545374483 ps
T137 /workspace/coverage/default/32.sram_ctrl_executable.3656672535 Jun 25 06:04:54 PM PDT 24 Jun 25 06:24:17 PM PDT 24 26078413304 ps
T144 /workspace/coverage/default/1.sram_ctrl_max_throughput.20094614 Jun 25 06:02:21 PM PDT 24 Jun 25 06:04:01 PM PDT 24 1813030532 ps
T145 /workspace/coverage/default/44.sram_ctrl_max_throughput.327606289 Jun 25 06:06:16 PM PDT 24 Jun 25 06:07:57 PM PDT 24 123434505 ps
T15 /workspace/coverage/default/2.sram_ctrl_alert_test.1815822359 Jun 25 06:02:29 PM PDT 24 Jun 25 06:02:32 PM PDT 24 51132450 ps
T43 /workspace/coverage/default/32.sram_ctrl_mem_walk.4158712484 Jun 25 06:04:55 PM PDT 24 Jun 25 06:05:08 PM PDT 24 1621005910 ps
T28 /workspace/coverage/default/26.sram_ctrl_ram_cfg.218868526 Jun 25 06:04:14 PM PDT 24 Jun 25 06:04:16 PM PDT 24 235032468 ps
T139 /workspace/coverage/default/46.sram_ctrl_stress_all.1017223324 Jun 25 06:06:37 PM PDT 24 Jun 25 06:28:45 PM PDT 24 17387213936 ps
T146 /workspace/coverage/default/21.sram_ctrl_partial_access.1142696365 Jun 25 06:03:41 PM PDT 24 Jun 25 06:03:55 PM PDT 24 2220332736 ps
T47 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1911254858 Jun 25 06:06:20 PM PDT 24 Jun 25 06:06:27 PM PDT 24 179351035 ps
T99 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1388946112 Jun 25 06:03:19 PM PDT 24 Jun 25 06:05:45 PM PDT 24 7619897918 ps
T48 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2069546386 Jun 25 06:04:03 PM PDT 24 Jun 25 06:04:10 PM PDT 24 466250793 ps
T29 /workspace/coverage/default/32.sram_ctrl_ram_cfg.472362295 Jun 25 06:04:57 PM PDT 24 Jun 25 06:04:58 PM PDT 24 26769801 ps
T65 /workspace/coverage/default/47.sram_ctrl_partial_access.3532727338 Jun 25 06:06:43 PM PDT 24 Jun 25 06:06:52 PM PDT 24 162107666 ps
T64 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.159223988 Jun 25 06:03:00 PM PDT 24 Jun 25 06:06:23 PM PDT 24 3995724464 ps
T6 /workspace/coverage/default/49.sram_ctrl_lc_escalation.871604677 Jun 25 06:06:55 PM PDT 24 Jun 25 06:07:06 PM PDT 24 1469882695 ps
T21 /workspace/coverage/default/3.sram_ctrl_regwen.1364740329 Jun 25 06:02:39 PM PDT 24 Jun 25 06:14:40 PM PDT 24 16050615552 ps
T7 /workspace/coverage/default/30.sram_ctrl_stress_all.963634753 Jun 25 06:04:40 PM PDT 24 Jun 25 06:36:37 PM PDT 24 25069751466 ps
T147 /workspace/coverage/default/47.sram_ctrl_smoke.2462913072 Jun 25 06:06:36 PM PDT 24 Jun 25 06:06:52 PM PDT 24 894849819 ps
T22 /workspace/coverage/default/38.sram_ctrl_lc_escalation.3625471362 Jun 25 06:05:29 PM PDT 24 Jun 25 06:05:34 PM PDT 24 377885522 ps
T129 /workspace/coverage/default/40.sram_ctrl_multiple_keys.2894927114 Jun 25 06:05:44 PM PDT 24 Jun 25 06:12:13 PM PDT 24 5044031553 ps
T86 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.1248305073 Jun 25 06:05:24 PM PDT 24 Jun 25 06:16:17 PM PDT 24 10823523395 ps
T148 /workspace/coverage/default/43.sram_ctrl_executable.2969499112 Jun 25 06:06:10 PM PDT 24 Jun 25 06:14:08 PM PDT 24 2518795204 ps
T141 /workspace/coverage/default/45.sram_ctrl_bijection.3369175904 Jun 25 06:06:18 PM PDT 24 Jun 25 06:06:48 PM PDT 24 3134798350 ps
T149 /workspace/coverage/default/41.sram_ctrl_max_throughput.3320008133 Jun 25 06:05:47 PM PDT 24 Jun 25 06:08:17 PM PDT 24 531864140 ps
T126 /workspace/coverage/default/32.sram_ctrl_regwen.3399151828 Jun 25 06:04:57 PM PDT 24 Jun 25 06:12:20 PM PDT 24 2185703156 ps
T16 /workspace/coverage/default/25.sram_ctrl_alert_test.3607643933 Jun 25 06:04:22 PM PDT 24 Jun 25 06:04:23 PM PDT 24 70092011 ps
T150 /workspace/coverage/default/30.sram_ctrl_smoke.3660191799 Jun 25 06:04:29 PM PDT 24 Jun 25 06:04:39 PM PDT 24 65214466 ps
T151 /workspace/coverage/default/38.sram_ctrl_multiple_keys.2107295468 Jun 25 06:05:29 PM PDT 24 Jun 25 06:07:12 PM PDT 24 12314268831 ps
T87 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.3660820933 Jun 25 06:03:04 PM PDT 24 Jun 25 06:18:53 PM PDT 24 14769830630 ps
T152 /workspace/coverage/default/36.sram_ctrl_lc_escalation.3095846316 Jun 25 06:05:24 PM PDT 24 Jun 25 06:05:28 PM PDT 24 286881970 ps
T153 /workspace/coverage/default/43.sram_ctrl_max_throughput.3104331892 Jun 25 06:06:06 PM PDT 24 Jun 25 06:06:31 PM PDT 24 1009644335 ps
T140 /workspace/coverage/default/15.sram_ctrl_lc_escalation.528829416 Jun 25 06:03:15 PM PDT 24 Jun 25 06:03:29 PM PDT 24 3857391115 ps
T136 /workspace/coverage/default/17.sram_ctrl_regwen.993024183 Jun 25 06:03:20 PM PDT 24 Jun 25 06:22:05 PM PDT 24 20704283830 ps
T130 /workspace/coverage/default/48.sram_ctrl_regwen.1665233130 Jun 25 06:06:46 PM PDT 24 Jun 25 06:16:39 PM PDT 24 7712644016 ps
T30 /workspace/coverage/default/38.sram_ctrl_ram_cfg.1853633783 Jun 25 06:05:30 PM PDT 24 Jun 25 06:05:32 PM PDT 24 28833372 ps
T142 /workspace/coverage/default/8.sram_ctrl_partial_access.4092539476 Jun 25 06:02:48 PM PDT 24 Jun 25 06:03:07 PM PDT 24 304604152 ps
T131 /workspace/coverage/default/37.sram_ctrl_multiple_keys.3636655524 Jun 25 06:05:24 PM PDT 24 Jun 25 06:40:14 PM PDT 24 25739407338 ps
T154 /workspace/coverage/default/9.sram_ctrl_max_throughput.2914261890 Jun 25 06:02:48 PM PDT 24 Jun 25 06:03:04 PM PDT 24 72308910 ps
T155 /workspace/coverage/default/42.sram_ctrl_partial_access.1929942837 Jun 25 06:05:56 PM PDT 24 Jun 25 06:06:03 PM PDT 24 990415075 ps
T108 /workspace/coverage/default/5.sram_ctrl_lc_escalation.2345421212 Jun 25 06:02:42 PM PDT 24 Jun 25 06:02:45 PM PDT 24 314891637 ps
T156 /workspace/coverage/default/30.sram_ctrl_bijection.1467790571 Jun 25 06:04:29 PM PDT 24 Jun 25 06:05:16 PM PDT 24 8430288850 ps
T50 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.3467409038 Jun 25 06:04:35 PM PDT 24 Jun 25 06:04:39 PM PDT 24 59662421 ps
T157 /workspace/coverage/default/31.sram_ctrl_max_throughput.2310615809 Jun 25 06:04:46 PM PDT 24 Jun 25 06:05:23 PM PDT 24 97400048 ps
T26 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1447210835 Jun 25 06:03:32 PM PDT 24 Jun 25 06:04:48 PM PDT 24 806749194 ps
T100 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.2462772242 Jun 25 06:04:01 PM PDT 24 Jun 25 06:08:04 PM PDT 24 2508137152 ps
T158 /workspace/coverage/default/49.sram_ctrl_bijection.277661109 Jun 25 06:06:55 PM PDT 24 Jun 25 06:07:16 PM PDT 24 4413760983 ps
T159 /workspace/coverage/default/29.sram_ctrl_bijection.553115565 Jun 25 06:04:39 PM PDT 24 Jun 25 06:05:51 PM PDT 24 4557567456 ps
T138 /workspace/coverage/default/48.sram_ctrl_lc_escalation.1136101258 Jun 25 06:06:45 PM PDT 24 Jun 25 06:06:53 PM PDT 24 545807341 ps
T160 /workspace/coverage/default/21.sram_ctrl_bijection.3725831003 Jun 25 06:03:41 PM PDT 24 Jun 25 06:04:18 PM PDT 24 1664627761 ps
T161 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.283935072 Jun 25 06:03:21 PM PDT 24 Jun 25 06:09:34 PM PDT 24 3667175711 ps
T27 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3373368213 Jun 25 06:04:01 PM PDT 24 Jun 25 06:04:42 PM PDT 24 1214685531 ps
T162 /workspace/coverage/default/7.sram_ctrl_partial_access.1550604194 Jun 25 06:02:49 PM PDT 24 Jun 25 06:03:14 PM PDT 24 479403970 ps
T143 /workspace/coverage/default/36.sram_ctrl_regwen.1462786798 Jun 25 06:05:26 PM PDT 24 Jun 25 06:28:33 PM PDT 24 18337599024 ps
T163 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2362748409 Jun 25 06:02:42 PM PDT 24 Jun 25 06:04:24 PM PDT 24 150980692 ps
T51 /workspace/coverage/default/37.sram_ctrl_mem_walk.3182167179 Jun 25 06:05:23 PM PDT 24 Jun 25 06:05:37 PM PDT 24 655409542 ps
T164 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3366604807 Jun 25 06:03:22 PM PDT 24 Jun 25 06:03:41 PM PDT 24 179797161 ps
T165 /workspace/coverage/default/42.sram_ctrl_max_throughput.3863236999 Jun 25 06:05:56 PM PDT 24 Jun 25 06:06:14 PM PDT 24 1303123669 ps
T166 /workspace/coverage/default/19.sram_ctrl_partial_access.58551054 Jun 25 06:03:32 PM PDT 24 Jun 25 06:04:07 PM PDT 24 1408841646 ps
T167 /workspace/coverage/default/21.sram_ctrl_max_throughput.17491995 Jun 25 06:03:41 PM PDT 24 Jun 25 06:05:52 PM PDT 24 523758365 ps
T168 /workspace/coverage/default/6.sram_ctrl_regwen.2225280562 Jun 25 06:02:48 PM PDT 24 Jun 25 06:08:17 PM PDT 24 2410979417 ps
T66 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1876547367 Jun 25 06:03:10 PM PDT 24 Jun 25 06:03:45 PM PDT 24 3793110795 ps
T169 /workspace/coverage/default/29.sram_ctrl_mem_walk.3812893559 Jun 25 06:04:34 PM PDT 24 Jun 25 06:04:41 PM PDT 24 105238719 ps
T170 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3760997618 Jun 25 06:03:55 PM PDT 24 Jun 25 06:03:59 PM PDT 24 67954579 ps
T109 /workspace/coverage/default/40.sram_ctrl_stress_all.2962113825 Jun 25 06:05:46 PM PDT 24 Jun 25 06:34:29 PM PDT 24 35537525424 ps
T171 /workspace/coverage/default/34.sram_ctrl_partial_access.4282966969 Jun 25 06:05:03 PM PDT 24 Jun 25 06:05:08 PM PDT 24 366139422 ps
T172 /workspace/coverage/default/33.sram_ctrl_max_throughput.776101750 Jun 25 06:04:53 PM PDT 24 Jun 25 06:06:04 PM PDT 24 849951000 ps
T173 /workspace/coverage/default/28.sram_ctrl_alert_test.610214492 Jun 25 06:04:29 PM PDT 24 Jun 25 06:04:31 PM PDT 24 11381050 ps
T52 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.4205226259 Jun 25 06:06:05 PM PDT 24 Jun 25 06:09:36 PM PDT 24 911523685 ps
T174 /workspace/coverage/default/0.sram_ctrl_mem_walk.254373112 Jun 25 06:02:22 PM PDT 24 Jun 25 06:02:30 PM PDT 24 240454717 ps
T175 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.827037460 Jun 25 06:05:56 PM PDT 24 Jun 25 06:10:10 PM PDT 24 19728472126 ps
T53 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.781659824 Jun 25 06:04:56 PM PDT 24 Jun 25 06:05:02 PM PDT 24 101257075 ps
T176 /workspace/coverage/default/46.sram_ctrl_bijection.4215250149 Jun 25 06:06:41 PM PDT 24 Jun 25 06:07:39 PM PDT 24 1791053926 ps
T177 /workspace/coverage/default/17.sram_ctrl_mem_walk.3617738909 Jun 25 06:03:21 PM PDT 24 Jun 25 06:03:29 PM PDT 24 457267463 ps
T178 /workspace/coverage/default/33.sram_ctrl_alert_test.1049289746 Jun 25 06:05:05 PM PDT 24 Jun 25 06:05:06 PM PDT 24 14228615 ps
T132 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.2213604236 Jun 25 06:03:15 PM PDT 24 Jun 25 06:03:22 PM PDT 24 172965364 ps
T179 /workspace/coverage/default/32.sram_ctrl_max_throughput.3056189188 Jun 25 06:04:54 PM PDT 24 Jun 25 06:06:18 PM PDT 24 546830721 ps
T110 /workspace/coverage/default/43.sram_ctrl_stress_all.1633577820 Jun 25 06:06:20 PM PDT 24 Jun 25 07:11:55 PM PDT 24 60426261660 ps
T180 /workspace/coverage/default/18.sram_ctrl_alert_test.2369321230 Jun 25 06:03:29 PM PDT 24 Jun 25 06:03:31 PM PDT 24 16795116 ps
T133 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.2696515197 Jun 25 06:06:16 PM PDT 24 Jun 25 06:06:22 PM PDT 24 162631724 ps
T134 /workspace/coverage/default/23.sram_ctrl_multiple_keys.102662713 Jun 25 06:03:53 PM PDT 24 Jun 25 06:15:59 PM PDT 24 16445630544 ps
T181 /workspace/coverage/default/31.sram_ctrl_bijection.1871361136 Jun 25 06:04:39 PM PDT 24 Jun 25 06:05:02 PM PDT 24 1395635772 ps
T182 /workspace/coverage/default/48.sram_ctrl_alert_test.1487509801 Jun 25 06:06:55 PM PDT 24 Jun 25 06:06:58 PM PDT 24 39517437 ps
T183 /workspace/coverage/default/4.sram_ctrl_stress_all.2624087644 Jun 25 06:02:42 PM PDT 24 Jun 25 06:20:58 PM PDT 24 3934178489 ps
T184 /workspace/coverage/default/13.sram_ctrl_mem_walk.1061378304 Jun 25 06:03:05 PM PDT 24 Jun 25 06:03:17 PM PDT 24 470294849 ps
T185 /workspace/coverage/default/44.sram_ctrl_mem_walk.3037318097 Jun 25 06:06:17 PM PDT 24 Jun 25 06:06:32 PM PDT 24 3628856295 ps
T186 /workspace/coverage/default/31.sram_ctrl_mem_walk.551946449 Jun 25 06:04:47 PM PDT 24 Jun 25 06:04:54 PM PDT 24 990235181 ps
T187 /workspace/coverage/default/42.sram_ctrl_bijection.3745286626 Jun 25 06:05:58 PM PDT 24 Jun 25 06:07:13 PM PDT 24 3355348273 ps
T188 /workspace/coverage/default/16.sram_ctrl_partial_access.3904405062 Jun 25 06:03:11 PM PDT 24 Jun 25 06:04:48 PM PDT 24 235249875 ps
T189 /workspace/coverage/default/10.sram_ctrl_max_throughput.3209130153 Jun 25 06:02:56 PM PDT 24 Jun 25 06:03:26 PM PDT 24 299293579 ps
T190 /workspace/coverage/default/14.sram_ctrl_lc_escalation.2499344720 Jun 25 06:03:08 PM PDT 24 Jun 25 06:03:16 PM PDT 24 629093825 ps
T191 /workspace/coverage/default/8.sram_ctrl_bijection.407337627 Jun 25 06:02:49 PM PDT 24 Jun 25 06:03:11 PM PDT 24 1226436452 ps
T192 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.360330199 Jun 25 06:03:52 PM PDT 24 Jun 25 06:18:06 PM PDT 24 3349168127 ps
T193 /workspace/coverage/default/26.sram_ctrl_smoke.612589076 Jun 25 06:04:13 PM PDT 24 Jun 25 06:05:08 PM PDT 24 500163683 ps
T194 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2902904355 Jun 25 06:05:26 PM PDT 24 Jun 25 06:10:42 PM PDT 24 14286820338 ps
T195 /workspace/coverage/default/34.sram_ctrl_bijection.1740149463 Jun 25 06:05:04 PM PDT 24 Jun 25 06:05:54 PM PDT 24 2762566289 ps
T196 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.1773924129 Jun 25 06:02:57 PM PDT 24 Jun 25 06:06:45 PM PDT 24 1066509314 ps
T197 /workspace/coverage/default/6.sram_ctrl_max_throughput.3650343221 Jun 25 06:02:38 PM PDT 24 Jun 25 06:02:49 PM PDT 24 79949723 ps
T123 /workspace/coverage/default/12.sram_ctrl_stress_all.723509738 Jun 25 06:03:04 PM PDT 24 Jun 25 07:25:44 PM PDT 24 599284748690 ps
T198 /workspace/coverage/default/10.sram_ctrl_ram_cfg.2892326062 Jun 25 06:03:00 PM PDT 24 Jun 25 06:03:02 PM PDT 24 36827333 ps
T199 /workspace/coverage/default/3.sram_ctrl_alert_test.2516291048 Jun 25 06:02:37 PM PDT 24 Jun 25 06:02:39 PM PDT 24 15299528 ps
T200 /workspace/coverage/default/10.sram_ctrl_partial_access.2604935226 Jun 25 06:02:56 PM PDT 24 Jun 25 06:04:06 PM PDT 24 671313286 ps
T201 /workspace/coverage/default/18.sram_ctrl_multiple_keys.2394115622 Jun 25 06:03:22 PM PDT 24 Jun 25 06:27:59 PM PDT 24 3574921009 ps
T202 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.822486857 Jun 25 06:05:16 PM PDT 24 Jun 25 06:32:49 PM PDT 24 30279653678 ps
T203 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.376828852 Jun 25 06:02:35 PM PDT 24 Jun 25 06:10:53 PM PDT 24 7402426777 ps
T204 /workspace/coverage/default/32.sram_ctrl_lc_escalation.2959764507 Jun 25 06:04:55 PM PDT 24 Jun 25 06:04:59 PM PDT 24 285882946 ps
T205 /workspace/coverage/default/25.sram_ctrl_multiple_keys.71860258 Jun 25 06:04:07 PM PDT 24 Jun 25 06:20:44 PM PDT 24 21971537003 ps
T206 /workspace/coverage/default/1.sram_ctrl_regwen.2412528019 Jun 25 06:02:32 PM PDT 24 Jun 25 06:08:47 PM PDT 24 18656628632 ps
T207 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.338558893 Jun 25 06:02:24 PM PDT 24 Jun 25 06:03:35 PM PDT 24 545885159 ps
T208 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.1774986588 Jun 25 06:06:26 PM PDT 24 Jun 25 06:24:48 PM PDT 24 5026724636 ps
T127 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.378000448 Jun 25 06:06:26 PM PDT 24 Jun 25 06:14:43 PM PDT 24 47739621516 ps
T209 /workspace/coverage/default/39.sram_ctrl_stress_all.1486267037 Jun 25 06:05:39 PM PDT 24 Jun 25 07:42:29 PM PDT 24 70707278257 ps
T210 /workspace/coverage/default/44.sram_ctrl_bijection.285598654 Jun 25 06:06:18 PM PDT 24 Jun 25 06:06:53 PM PDT 24 1515791842 ps
T211 /workspace/coverage/default/13.sram_ctrl_smoke.1513934713 Jun 25 06:03:04 PM PDT 24 Jun 25 06:03:21 PM PDT 24 492578524 ps
T212 /workspace/coverage/default/22.sram_ctrl_stress_all.3102210877 Jun 25 06:03:55 PM PDT 24 Jun 25 06:17:11 PM PDT 24 57256076917 ps
T213 /workspace/coverage/default/49.sram_ctrl_executable.4277855806 Jun 25 06:06:54 PM PDT 24 Jun 25 06:09:58 PM PDT 24 2258498584 ps
T214 /workspace/coverage/default/32.sram_ctrl_multiple_keys.619617170 Jun 25 06:04:47 PM PDT 24 Jun 25 06:11:43 PM PDT 24 69610415281 ps
T215 /workspace/coverage/default/20.sram_ctrl_stress_all.1943163918 Jun 25 06:03:43 PM PDT 24 Jun 25 06:57:56 PM PDT 24 47539749942 ps
T216 /workspace/coverage/default/39.sram_ctrl_ram_cfg.249397703 Jun 25 06:05:43 PM PDT 24 Jun 25 06:05:44 PM PDT 24 75434218 ps
T217 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.375241270 Jun 25 06:04:01 PM PDT 24 Jun 25 06:04:09 PM PDT 24 70972516 ps
T54 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2604424216 Jun 25 06:04:02 PM PDT 24 Jun 25 06:05:22 PM PDT 24 2156758690 ps
T55 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.3177942255 Jun 25 06:03:30 PM PDT 24 Jun 25 06:03:34 PM PDT 24 66887209 ps
T218 /workspace/coverage/default/4.sram_ctrl_regwen.2506595593 Jun 25 06:02:42 PM PDT 24 Jun 25 06:10:25 PM PDT 24 1799274725 ps
T219 /workspace/coverage/default/43.sram_ctrl_multiple_keys.811206341 Jun 25 06:06:07 PM PDT 24 Jun 25 06:29:04 PM PDT 24 33167672471 ps
T220 /workspace/coverage/default/31.sram_ctrl_ram_cfg.2071305066 Jun 25 06:04:49 PM PDT 24 Jun 25 06:04:50 PM PDT 24 98170647 ps
T221 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.3182585926 Jun 25 06:05:56 PM PDT 24 Jun 25 06:19:28 PM PDT 24 3359789439 ps
T222 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.2153558967 Jun 25 06:06:37 PM PDT 24 Jun 25 06:10:34 PM PDT 24 9353839573 ps
T223 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2484162072 Jun 25 06:04:03 PM PDT 24 Jun 25 06:06:05 PM PDT 24 147804967 ps
T224 /workspace/coverage/default/43.sram_ctrl_lc_escalation.3180414212 Jun 25 06:06:05 PM PDT 24 Jun 25 06:06:14 PM PDT 24 712500107 ps
T225 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.3220541302 Jun 25 06:04:22 PM PDT 24 Jun 25 06:11:46 PM PDT 24 5943652424 ps
T135 /workspace/coverage/default/20.sram_ctrl_partial_access.3031459343 Jun 25 06:03:32 PM PDT 24 Jun 25 06:05:47 PM PDT 24 3130034613 ps
T226 /workspace/coverage/default/22.sram_ctrl_alert_test.1549406554 Jun 25 06:03:53 PM PDT 24 Jun 25 06:03:57 PM PDT 24 42062166 ps
T56 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1774419122 Jun 25 06:05:47 PM PDT 24 Jun 25 06:18:24 PM PDT 24 7945505018 ps
T227 /workspace/coverage/default/3.sram_ctrl_ram_cfg.3212180983 Jun 25 06:02:36 PM PDT 24 Jun 25 06:02:38 PM PDT 24 81685524 ps
T228 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.2114340095 Jun 25 06:03:53 PM PDT 24 Jun 25 06:09:58 PM PDT 24 14905211200 ps
T229 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3541204846 Jun 25 06:06:43 PM PDT 24 Jun 25 06:06:52 PM PDT 24 405062856 ps
T230 /workspace/coverage/default/23.sram_ctrl_stress_all.2947996164 Jun 25 06:03:53 PM PDT 24 Jun 25 06:51:21 PM PDT 24 6514813250 ps
T231 /workspace/coverage/default/22.sram_ctrl_multiple_keys.439518461 Jun 25 06:03:53 PM PDT 24 Jun 25 06:18:59 PM PDT 24 51848786038 ps
T232 /workspace/coverage/default/43.sram_ctrl_partial_access.1143330816 Jun 25 06:06:05 PM PDT 24 Jun 25 06:06:11 PM PDT 24 53467987 ps
T233 /workspace/coverage/default/47.sram_ctrl_alert_test.3103410464 Jun 25 06:06:44 PM PDT 24 Jun 25 06:06:47 PM PDT 24 107168616 ps
T234 /workspace/coverage/default/25.sram_ctrl_executable.624612258 Jun 25 06:04:02 PM PDT 24 Jun 25 06:24:10 PM PDT 24 16398448336 ps
T235 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1878231996 Jun 25 06:05:43 PM PDT 24 Jun 25 06:11:53 PM PDT 24 9848381737 ps
T236 /workspace/coverage/default/48.sram_ctrl_max_throughput.3218265353 Jun 25 06:06:44 PM PDT 24 Jun 25 06:08:11 PM PDT 24 242392947 ps
T237 /workspace/coverage/default/16.sram_ctrl_alert_test.4281356331 Jun 25 06:03:12 PM PDT 24 Jun 25 06:03:14 PM PDT 24 11479174 ps
T238 /workspace/coverage/default/13.sram_ctrl_max_throughput.1216065397 Jun 25 06:03:09 PM PDT 24 Jun 25 06:04:15 PM PDT 24 201644831 ps
T239 /workspace/coverage/default/22.sram_ctrl_executable.2534526500 Jun 25 06:03:53 PM PDT 24 Jun 25 06:25:06 PM PDT 24 75347132502 ps
T240 /workspace/coverage/default/45.sram_ctrl_stress_all.2084898588 Jun 25 06:06:41 PM PDT 24 Jun 25 07:17:54 PM PDT 24 176434771238 ps
T241 /workspace/coverage/default/14.sram_ctrl_smoke.1633315226 Jun 25 06:03:06 PM PDT 24 Jun 25 06:03:11 PM PDT 24 133303072 ps
T242 /workspace/coverage/default/19.sram_ctrl_smoke.3738996328 Jun 25 06:03:34 PM PDT 24 Jun 25 06:03:50 PM PDT 24 13954130739 ps
T243 /workspace/coverage/default/25.sram_ctrl_stress_all.1763703360 Jun 25 06:04:23 PM PDT 24 Jun 25 06:25:08 PM PDT 24 38555062154 ps
T244 /workspace/coverage/default/35.sram_ctrl_multiple_keys.794956001 Jun 25 06:05:12 PM PDT 24 Jun 25 06:23:10 PM PDT 24 16568521869 ps
T245 /workspace/coverage/default/15.sram_ctrl_max_throughput.2465374172 Jun 25 06:03:16 PM PDT 24 Jun 25 06:03:20 PM PDT 24 45131228 ps
T246 /workspace/coverage/default/45.sram_ctrl_regwen.95645206 Jun 25 06:06:27 PM PDT 24 Jun 25 06:24:32 PM PDT 24 12381801613 ps
T128 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.131791766 Jun 25 06:02:32 PM PDT 24 Jun 25 06:09:22 PM PDT 24 15481837225 ps
T247 /workspace/coverage/default/18.sram_ctrl_smoke.3285312016 Jun 25 06:03:21 PM PDT 24 Jun 25 06:03:29 PM PDT 24 1043219023 ps
T248 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3320355029 Jun 25 06:02:39 PM PDT 24 Jun 25 06:02:48 PM PDT 24 1025744136 ps
T249 /workspace/coverage/default/36.sram_ctrl_max_throughput.2491124393 Jun 25 06:05:28 PM PDT 24 Jun 25 06:07:23 PM PDT 24 133594969 ps
T250 /workspace/coverage/default/30.sram_ctrl_ram_cfg.3033761440 Jun 25 06:04:39 PM PDT 24 Jun 25 06:04:42 PM PDT 24 44542806 ps
T251 /workspace/coverage/default/0.sram_ctrl_partial_access.2754686684 Jun 25 06:02:25 PM PDT 24 Jun 25 06:04:56 PM PDT 24 1335216737 ps
T252 /workspace/coverage/default/35.sram_ctrl_bijection.3132954416 Jun 25 06:05:14 PM PDT 24 Jun 25 06:06:09 PM PDT 24 3588704714 ps
T253 /workspace/coverage/default/41.sram_ctrl_regwen.4269097799 Jun 25 06:05:57 PM PDT 24 Jun 25 06:07:55 PM PDT 24 6372329150 ps
T254 /workspace/coverage/default/0.sram_ctrl_lc_escalation.3017486205 Jun 25 06:02:22 PM PDT 24 Jun 25 06:02:30 PM PDT 24 1505259541 ps
T255 /workspace/coverage/default/5.sram_ctrl_bijection.3589911041 Jun 25 06:02:40 PM PDT 24 Jun 25 06:03:31 PM PDT 24 2514733013 ps
T256 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.4184385855 Jun 25 06:06:52 PM PDT 24 Jun 25 06:11:40 PM PDT 24 10854742619 ps
T257 /workspace/coverage/default/6.sram_ctrl_multiple_keys.1019012267 Jun 25 06:02:44 PM PDT 24 Jun 25 06:30:23 PM PDT 24 10475768225 ps
T258 /workspace/coverage/default/30.sram_ctrl_alert_test.4270920613 Jun 25 06:04:38 PM PDT 24 Jun 25 06:04:41 PM PDT 24 15498870 ps
T259 /workspace/coverage/default/25.sram_ctrl_lc_escalation.2899424395 Jun 25 06:04:03 PM PDT 24 Jun 25 06:04:08 PM PDT 24 1836180953 ps
T260 /workspace/coverage/default/41.sram_ctrl_partial_access.662996402 Jun 25 06:05:48 PM PDT 24 Jun 25 06:06:06 PM PDT 24 1770949988 ps
T124 /workspace/coverage/default/7.sram_ctrl_stress_all.1531812948 Jun 25 06:02:49 PM PDT 24 Jun 25 08:08:46 PM PDT 24 40155848555 ps
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T262 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.3228616855 Jun 25 06:02:40 PM PDT 24 Jun 25 06:02:44 PM PDT 24 51110963 ps
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T264 /workspace/coverage/default/24.sram_ctrl_mem_walk.823905954 Jun 25 06:04:04 PM PDT 24 Jun 25 06:04:10 PM PDT 24 75150926 ps
T265 /workspace/coverage/default/13.sram_ctrl_lc_escalation.51042430 Jun 25 06:03:06 PM PDT 24 Jun 25 06:03:18 PM PDT 24 4375975798 ps
T266 /workspace/coverage/default/14.sram_ctrl_executable.637468033 Jun 25 06:03:06 PM PDT 24 Jun 25 06:14:17 PM PDT 24 6332682506 ps
T267 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2898073205 Jun 25 06:02:32 PM PDT 24 Jun 25 06:04:53 PM PDT 24 153539304 ps
T268 /workspace/coverage/default/20.sram_ctrl_alert_test.2957866827 Jun 25 06:03:43 PM PDT 24 Jun 25 06:03:44 PM PDT 24 36127141 ps
T269 /workspace/coverage/default/45.sram_ctrl_max_throughput.168425772 Jun 25 06:06:26 PM PDT 24 Jun 25 06:07:54 PM PDT 24 119789869 ps
T270 /workspace/coverage/default/36.sram_ctrl_partial_access.2389275665 Jun 25 06:05:25 PM PDT 24 Jun 25 06:05:39 PM PDT 24 2807993247 ps
T271 /workspace/coverage/default/27.sram_ctrl_smoke.2982624646 Jun 25 06:04:13 PM PDT 24 Jun 25 06:04:17 PM PDT 24 129264928 ps
T272 /workspace/coverage/default/13.sram_ctrl_ram_cfg.2212160582 Jun 25 06:03:07 PM PDT 24 Jun 25 06:03:09 PM PDT 24 88584724 ps
T273 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3313169776 Jun 25 06:06:06 PM PDT 24 Jun 25 06:11:20 PM PDT 24 12755306630 ps
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T274 /workspace/coverage/default/30.sram_ctrl_partial_access.544747179 Jun 25 06:04:29 PM PDT 24 Jun 25 06:04:49 PM PDT 24 1762948096 ps
T275 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1351857807 Jun 25 06:06:07 PM PDT 24 Jun 25 06:11:15 PM PDT 24 55958365044 ps
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T278 /workspace/coverage/default/12.sram_ctrl_max_throughput.4231033039 Jun 25 06:03:00 PM PDT 24 Jun 25 06:04:31 PM PDT 24 685734956 ps
T279 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.523647606 Jun 25 06:03:30 PM PDT 24 Jun 25 06:05:58 PM PDT 24 477811254 ps
T280 /workspace/coverage/default/27.sram_ctrl_stress_all.890805145 Jun 25 06:04:27 PM PDT 24 Jun 25 07:54:24 PM PDT 24 58392280329 ps
T281 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2468386679 Jun 25 06:03:19 PM PDT 24 Jun 25 06:03:25 PM PDT 24 125493426 ps
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T284 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.4248490220 Jun 25 06:03:00 PM PDT 24 Jun 25 06:03:08 PM PDT 24 385577878 ps
T285 /workspace/coverage/default/18.sram_ctrl_bijection.2398840803 Jun 25 06:03:21 PM PDT 24 Jun 25 06:04:37 PM PDT 24 6044533666 ps
T286 /workspace/coverage/default/5.sram_ctrl_regwen.1496224563 Jun 25 06:02:38 PM PDT 24 Jun 25 06:11:01 PM PDT 24 10131809097 ps
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T291 /workspace/coverage/default/12.sram_ctrl_bijection.75485246 Jun 25 06:03:01 PM PDT 24 Jun 25 06:04:09 PM PDT 24 46322068551 ps
T292 /workspace/coverage/default/10.sram_ctrl_lc_escalation.1922353750 Jun 25 06:02:58 PM PDT 24 Jun 25 06:03:08 PM PDT 24 695203285 ps
T293 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1774726737 Jun 25 06:06:41 PM PDT 24 Jun 25 06:18:20 PM PDT 24 98644065478 ps
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T295 /workspace/coverage/default/27.sram_ctrl_max_throughput.1626701415 Jun 25 06:04:12 PM PDT 24 Jun 25 06:04:54 PM PDT 24 401462193 ps
T296 /workspace/coverage/default/34.sram_ctrl_ram_cfg.579359687 Jun 25 06:05:15 PM PDT 24 Jun 25 06:05:17 PM PDT 24 106424067 ps
T297 /workspace/coverage/default/0.sram_ctrl_alert_test.1650411680 Jun 25 06:02:22 PM PDT 24 Jun 25 06:02:26 PM PDT 24 16994971 ps
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T301 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.4049203027 Jun 25 06:04:45 PM PDT 24 Jun 25 06:06:29 PM PDT 24 2088477040 ps
T302 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3960670104 Jun 25 06:02:46 PM PDT 24 Jun 25 06:03:16 PM PDT 24 210889222 ps
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T304 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.79039956 Jun 25 06:06:05 PM PDT 24 Jun 25 06:30:20 PM PDT 24 4703646458 ps
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T306 /workspace/coverage/default/8.sram_ctrl_ram_cfg.3558721611 Jun 25 06:02:49 PM PDT 24 Jun 25 06:02:54 PM PDT 24 28997697 ps
T307 /workspace/coverage/default/43.sram_ctrl_mem_walk.1879774065 Jun 25 06:06:17 PM PDT 24 Jun 25 06:06:25 PM PDT 24 473391325 ps
T308 /workspace/coverage/default/20.sram_ctrl_bijection.1502471707 Jun 25 06:03:29 PM PDT 24 Jun 25 06:04:37 PM PDT 24 3046034319 ps
T309 /workspace/coverage/default/41.sram_ctrl_mem_walk.2885971922 Jun 25 06:05:55 PM PDT 24 Jun 25 06:06:08 PM PDT 24 2999415557 ps
T69 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3901527517 Jun 25 06:06:23 PM PDT 24 Jun 25 06:06:32 PM PDT 24 1159161516 ps
T310 /workspace/coverage/default/11.sram_ctrl_regwen.3823808542 Jun 25 06:02:58 PM PDT 24 Jun 25 06:20:28 PM PDT 24 5189168200 ps
T70 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.4266451361 Jun 25 06:02:40 PM PDT 24 Jun 25 06:03:28 PM PDT 24 2127072693 ps
T311 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1383538491 Jun 25 06:05:46 PM PDT 24 Jun 25 06:10:27 PM PDT 24 6582854554 ps
T312 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2207179974 Jun 25 06:04:45 PM PDT 24 Jun 25 06:08:58 PM PDT 24 19665033211 ps
T313 /workspace/coverage/default/37.sram_ctrl_lc_escalation.978216053 Jun 25 06:05:24 PM PDT 24 Jun 25 06:05:30 PM PDT 24 2397261105 ps
T314 /workspace/coverage/default/46.sram_ctrl_lc_escalation.3443440954 Jun 25 06:06:26 PM PDT 24 Jun 25 06:06:34 PM PDT 24 611490528 ps
T315 /workspace/coverage/default/39.sram_ctrl_max_throughput.2829283871 Jun 25 06:05:38 PM PDT 24 Jun 25 06:06:42 PM PDT 24 312263573 ps
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