Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1028
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
77.30 77.30 93.05 93.05 80.33 80.33 95.01 95.01 33.33 33.33 85.51 85.51 93.51 93.51 60.33 60.33 /workspace/coverage/default/25.sram_ctrl_stress_all.3713170865
89.47 12.17 96.95 3.90 86.97 6.64 97.43 2.43 71.43 38.10 91.06 5.56 95.43 1.92 87.02 26.69 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2994434155
94.13 4.66 98.47 1.53 87.09 0.12 97.43 0.00 100.00 28.57 93.48 2.42 95.43 0.00 87.02 0.00 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.18146777
95.07 0.94 98.81 0.34 89.10 2.01 98.68 1.25 100.00 0.00 94.93 1.45 96.02 0.59 87.93 0.91 /workspace/coverage/default/0.sram_ctrl_sec_cm.3604924689
95.85 0.78 98.81 0.00 89.45 0.36 98.68 0.00 100.00 0.00 94.93 0.00 96.02 0.00 93.05 5.12 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1424602046
96.29 0.44 99.07 0.25 90.17 0.71 98.68 0.00 100.00 0.00 95.65 0.72 97.05 1.03 93.42 0.37 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2533026775
96.58 0.29 99.07 0.00 90.40 0.24 98.75 0.07 100.00 0.00 95.65 0.00 98.38 1.33 93.78 0.37 /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.623891726
96.76 0.18 99.07 0.00 90.40 0.00 98.75 0.00 100.00 0.00 95.65 0.00 98.38 0.00 95.06 1.28 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2673944727
96.92 0.16 99.07 0.00 90.52 0.12 98.82 0.07 100.00 0.00 95.65 0.00 98.38 0.00 95.98 0.91 /workspace/coverage/default/40.sram_ctrl_stress_all.883163949
97.07 0.16 99.07 0.00 90.64 0.12 98.82 0.00 100.00 0.00 95.89 0.24 99.12 0.74 95.98 0.00 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2432164557
97.20 0.13 99.15 0.08 90.64 0.00 99.65 0.83 100.00 0.00 95.89 0.00 99.12 0.00 95.98 0.00 /workspace/coverage/default/1.sram_ctrl_ram_cfg.3352520807
97.28 0.08 99.15 0.00 90.64 0.00 99.65 0.00 100.00 0.00 95.89 0.00 99.12 0.00 96.53 0.55 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.673296726
97.34 0.06 99.15 0.00 91.00 0.36 99.72 0.07 100.00 0.00 95.89 0.00 99.12 0.00 96.53 0.00 /workspace/coverage/default/0.sram_ctrl_alert_test.3089292187
97.40 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 95.89 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2683356428
97.45 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 95.89 0.00 99.12 0.00 97.26 0.37 /workspace/coverage/default/27.sram_ctrl_regwen.528645735
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.24 99.12 0.00 97.26 0.00 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3005558068
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/default/17.sram_ctrl_multiple_keys.681096009

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.428173043
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2034001373
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1640092857
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1446176366
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1499019265
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1752053893
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1001152237
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3647483308
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3140750039
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.405598257
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2542591685
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.4163464018
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.759029229
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3947707982
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2205168376
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.557086218
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.998067530
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2288256599
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3240772736
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1588269394
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2494411953
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3668503024
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3361453933
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1463444687
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1053012613
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.979550546
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3279362173
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1511557246
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3923814548
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1727845289
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.837841240
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1800338469
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3327561142
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3386660046
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2162678321
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3181133146
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1643229271
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1839277999
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4101193011
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1608223872
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3914118592
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3671062193
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1898410368
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1677664844
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.831946557
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1114410306
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2556242010
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.356656414
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2451335704
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.499300763
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2917678281
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.727707836
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.825898836
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3454784563
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.4098038309
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3486642000
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.839192781
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3202373015
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2349986474
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3673164928
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1566009274
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.4003705170
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3103778603
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.4090321345
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.505263371
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2497520947
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1613540292
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3020907799
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1303195222
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2513898951
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1116649554
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.517349358
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.277159112
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.892816581
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1622113991
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1983664091
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1330716980
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1599139542
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2812656822
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4293440395
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1064644224
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1889242759
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2349847405
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2660137113
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.471914986
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2298928723
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3168603166
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.4036369874
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2499046300
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2250619919
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2913497995
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1833152393
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2203273325
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2908136032
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3813770588
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.83983712
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.4277699891
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.365644636
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.229021087
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2459819938
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.616786517
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.381195272
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4152503976
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3182637709
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2225582285
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3132001541
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3940563000
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2137694493
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1395564013
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.16269403
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2628205021
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2730191891
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2513550095
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.4228934129
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2507478606
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3145420446
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3882591168
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.27526977
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.4071548732
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.931703603
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.820771575
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.4067540326
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.4218373475
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3918072604
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.299056947
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4044602536
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.639168162
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.229283971
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2368492567
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2487594868
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1446012092
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2879685932
/workspace/coverage/default/0.sram_ctrl_bijection.3833316995
/workspace/coverage/default/0.sram_ctrl_executable.1877033237
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2330131911
/workspace/coverage/default/0.sram_ctrl_max_throughput.2500768734
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3010391971
/workspace/coverage/default/0.sram_ctrl_mem_walk.164423272
/workspace/coverage/default/0.sram_ctrl_multiple_keys.560808571
/workspace/coverage/default/0.sram_ctrl_partial_access.4219890533
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1554597800
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2975848722
/workspace/coverage/default/0.sram_ctrl_regwen.2234315644
/workspace/coverage/default/0.sram_ctrl_smoke.135775278
/workspace/coverage/default/0.sram_ctrl_stress_all.1578729532
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.938524634
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1340362605
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.175602945
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2198302408
/workspace/coverage/default/1.sram_ctrl_alert_test.3218302292
/workspace/coverage/default/1.sram_ctrl_bijection.1616638079
/workspace/coverage/default/1.sram_ctrl_executable.2959392936
/workspace/coverage/default/1.sram_ctrl_lc_escalation.558382371
/workspace/coverage/default/1.sram_ctrl_max_throughput.1023754320
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2861974084
/workspace/coverage/default/1.sram_ctrl_mem_walk.256359690
/workspace/coverage/default/1.sram_ctrl_multiple_keys.651008931
/workspace/coverage/default/1.sram_ctrl_partial_access.2239248840
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1644377990
/workspace/coverage/default/1.sram_ctrl_regwen.2905843630
/workspace/coverage/default/1.sram_ctrl_sec_cm.1299715703
/workspace/coverage/default/1.sram_ctrl_smoke.3570660549
/workspace/coverage/default/1.sram_ctrl_stress_all.2235030000
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.480378867
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.125609830
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2542301999
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1658542613
/workspace/coverage/default/10.sram_ctrl_alert_test.2250246871
/workspace/coverage/default/10.sram_ctrl_bijection.626835849
/workspace/coverage/default/10.sram_ctrl_executable.4118677451
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2362196990
/workspace/coverage/default/10.sram_ctrl_max_throughput.2166574659
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.445630583
/workspace/coverage/default/10.sram_ctrl_mem_walk.3495968146
/workspace/coverage/default/10.sram_ctrl_multiple_keys.4172054749
/workspace/coverage/default/10.sram_ctrl_partial_access.408319664
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3029872573
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2137325688
/workspace/coverage/default/10.sram_ctrl_regwen.2157737773
/workspace/coverage/default/10.sram_ctrl_smoke.3306076548
/workspace/coverage/default/10.sram_ctrl_stress_all.1534242405
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.4238088452
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.138998466
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3550258009
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.363601843
/workspace/coverage/default/11.sram_ctrl_alert_test.2594474277
/workspace/coverage/default/11.sram_ctrl_bijection.3274423597
/workspace/coverage/default/11.sram_ctrl_executable.2109592445
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1985834278
/workspace/coverage/default/11.sram_ctrl_max_throughput.2047635809
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1855522364
/workspace/coverage/default/11.sram_ctrl_mem_walk.3079237777
/workspace/coverage/default/11.sram_ctrl_multiple_keys.264126703
/workspace/coverage/default/11.sram_ctrl_partial_access.573763533
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2525510362
/workspace/coverage/default/11.sram_ctrl_ram_cfg.249608336
/workspace/coverage/default/11.sram_ctrl_regwen.4020341492
/workspace/coverage/default/11.sram_ctrl_smoke.1523704107
/workspace/coverage/default/11.sram_ctrl_stress_all.3738596953
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2536742434
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3543102734
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1268363703
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3303024551
/workspace/coverage/default/12.sram_ctrl_alert_test.3105088732
/workspace/coverage/default/12.sram_ctrl_bijection.4172811664
/workspace/coverage/default/12.sram_ctrl_executable.4043810712
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3602320550
/workspace/coverage/default/12.sram_ctrl_max_throughput.3976615524
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.3895080201
/workspace/coverage/default/12.sram_ctrl_mem_walk.3206836429
/workspace/coverage/default/12.sram_ctrl_multiple_keys.4286747193
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/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1038646103
/workspace/coverage/default/43.sram_ctrl_mem_walk.3277754513
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2294831804
/workspace/coverage/default/43.sram_ctrl_partial_access.1320680490
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1650094503
/workspace/coverage/default/43.sram_ctrl_ram_cfg.976051983
/workspace/coverage/default/43.sram_ctrl_regwen.392262895
/workspace/coverage/default/43.sram_ctrl_smoke.2977337610
/workspace/coverage/default/43.sram_ctrl_stress_all.485872506
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3359014328
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1316914870
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1000692524
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2361000384
/workspace/coverage/default/44.sram_ctrl_alert_test.984398103
/workspace/coverage/default/44.sram_ctrl_bijection.407256422
/workspace/coverage/default/44.sram_ctrl_executable.3317878806
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2318117708
/workspace/coverage/default/44.sram_ctrl_max_throughput.1168025696
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1703756611
/workspace/coverage/default/44.sram_ctrl_mem_walk.3463059777
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1459558055
/workspace/coverage/default/44.sram_ctrl_partial_access.3018376664
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3681565772
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2719068770
/workspace/coverage/default/44.sram_ctrl_regwen.669316108
/workspace/coverage/default/44.sram_ctrl_smoke.3360731253
/workspace/coverage/default/44.sram_ctrl_stress_all.3321107393
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3696603489
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1939724941
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1644308470
/workspace/coverage/default/45.sram_ctrl_alert_test.2130088508
/workspace/coverage/default/45.sram_ctrl_bijection.463742126
/workspace/coverage/default/45.sram_ctrl_executable.2511633329
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2446380951
/workspace/coverage/default/45.sram_ctrl_max_throughput.2161351126
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2838463878
/workspace/coverage/default/45.sram_ctrl_mem_walk.944726682
/workspace/coverage/default/45.sram_ctrl_multiple_keys.763528762
/workspace/coverage/default/45.sram_ctrl_partial_access.48763350
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3444758895
/workspace/coverage/default/45.sram_ctrl_ram_cfg.728688041
/workspace/coverage/default/45.sram_ctrl_regwen.1830388978
/workspace/coverage/default/45.sram_ctrl_smoke.2776488139
/workspace/coverage/default/45.sram_ctrl_stress_all.106076795
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1301010006
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.214559211
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2199256040
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3120695268
/workspace/coverage/default/46.sram_ctrl_alert_test.1529416690
/workspace/coverage/default/46.sram_ctrl_bijection.1892450964
/workspace/coverage/default/46.sram_ctrl_executable.348433173
/workspace/coverage/default/46.sram_ctrl_lc_escalation.574022414
/workspace/coverage/default/46.sram_ctrl_max_throughput.2576179907
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2361559024
/workspace/coverage/default/46.sram_ctrl_mem_walk.2556475522
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1226600702
/workspace/coverage/default/46.sram_ctrl_partial_access.3734787528
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1778951751
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3765127914
/workspace/coverage/default/46.sram_ctrl_regwen.1969555908
/workspace/coverage/default/46.sram_ctrl_smoke.706488419
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3221892853
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4090426628
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1011214162
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3361507104
/workspace/coverage/default/47.sram_ctrl_alert_test.3210562633
/workspace/coverage/default/47.sram_ctrl_bijection.2477842556
/workspace/coverage/default/47.sram_ctrl_executable.813525183
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3956140017
/workspace/coverage/default/47.sram_ctrl_max_throughput.3728891557
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.632420452
/workspace/coverage/default/47.sram_ctrl_mem_walk.2260315419
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2766721846
/workspace/coverage/default/47.sram_ctrl_partial_access.709410262
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3261750930
/workspace/coverage/default/47.sram_ctrl_ram_cfg.4222006247
/workspace/coverage/default/47.sram_ctrl_regwen.1527106218
/workspace/coverage/default/47.sram_ctrl_smoke.1502349247
/workspace/coverage/default/47.sram_ctrl_stress_all.3217842891
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.508348544
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.55544422
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2242756749
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.62819887
/workspace/coverage/default/48.sram_ctrl_alert_test.3980197804
/workspace/coverage/default/48.sram_ctrl_bijection.1675326349
/workspace/coverage/default/48.sram_ctrl_executable.3093604369
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3200960887
/workspace/coverage/default/48.sram_ctrl_max_throughput.916461448
/workspace/coverage/default/48.sram_ctrl_mem_walk.3188291388
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4109472748
/workspace/coverage/default/48.sram_ctrl_partial_access.751910941
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3938062725
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1656040905
/workspace/coverage/default/48.sram_ctrl_regwen.1091930708
/workspace/coverage/default/48.sram_ctrl_smoke.498786237
/workspace/coverage/default/48.sram_ctrl_stress_all.431106443
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.4088619378
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2650640804
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2940585303
/workspace/coverage/default/49.sram_ctrl_alert_test.1549438379
/workspace/coverage/default/49.sram_ctrl_bijection.910549626
/workspace/coverage/default/49.sram_ctrl_executable.72382395
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2569434567
/workspace/coverage/default/49.sram_ctrl_max_throughput.1128401941
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.382642895
/workspace/coverage/default/49.sram_ctrl_mem_walk.3523691832
/workspace/coverage/default/49.sram_ctrl_multiple_keys.284526141
/workspace/coverage/default/49.sram_ctrl_partial_access.63073954
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3392581514
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3090950138
/workspace/coverage/default/49.sram_ctrl_regwen.4072774043
/workspace/coverage/default/49.sram_ctrl_smoke.1018669781
/workspace/coverage/default/49.sram_ctrl_stress_all.832623700
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2669825859
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3639193406
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1512932099
/workspace/coverage/default/5.sram_ctrl_alert_test.1917078987
/workspace/coverage/default/5.sram_ctrl_bijection.1147100525
/workspace/coverage/default/5.sram_ctrl_executable.3280091823
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3184730054
/workspace/coverage/default/5.sram_ctrl_max_throughput.4153568586
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2771708086
/workspace/coverage/default/5.sram_ctrl_mem_walk.1326767346
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3749202352
/workspace/coverage/default/5.sram_ctrl_partial_access.4050299386
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3895672394
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4147048498
/workspace/coverage/default/5.sram_ctrl_regwen.4002612595
/workspace/coverage/default/5.sram_ctrl_smoke.1052505537
/workspace/coverage/default/5.sram_ctrl_stress_all.4018158531
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3189941220
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2011940605
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.276166691
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2873118106
/workspace/coverage/default/6.sram_ctrl_alert_test.2447115668
/workspace/coverage/default/6.sram_ctrl_bijection.2068673930
/workspace/coverage/default/6.sram_ctrl_executable.1818602586
/workspace/coverage/default/6.sram_ctrl_lc_escalation.545824968
/workspace/coverage/default/6.sram_ctrl_max_throughput.594730950
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1490039379
/workspace/coverage/default/6.sram_ctrl_mem_walk.4278480766
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3346103731
/workspace/coverage/default/6.sram_ctrl_partial_access.1418404637
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3995933037
/workspace/coverage/default/6.sram_ctrl_ram_cfg.105486803
/workspace/coverage/default/6.sram_ctrl_regwen.4009340942
/workspace/coverage/default/6.sram_ctrl_smoke.616721747
/workspace/coverage/default/6.sram_ctrl_stress_all.1746290984
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2605212781
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.685587630
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2896638467
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1029073818
/workspace/coverage/default/7.sram_ctrl_alert_test.3364628182
/workspace/coverage/default/7.sram_ctrl_bijection.1576926145
/workspace/coverage/default/7.sram_ctrl_executable.443228646
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1190809811
/workspace/coverage/default/7.sram_ctrl_max_throughput.4277008370
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.659309400
/workspace/coverage/default/7.sram_ctrl_mem_walk.1214581056
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3145500250
/workspace/coverage/default/7.sram_ctrl_partial_access.2848129791
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1602921651
/workspace/coverage/default/7.sram_ctrl_regwen.483061252
/workspace/coverage/default/7.sram_ctrl_smoke.3375470925
/workspace/coverage/default/7.sram_ctrl_stress_all.845037486
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3218698528
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.97341655
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1188283101
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2663479498
/workspace/coverage/default/8.sram_ctrl_alert_test.1845829865
/workspace/coverage/default/8.sram_ctrl_bijection.1237555432
/workspace/coverage/default/8.sram_ctrl_executable.2777614712
/workspace/coverage/default/8.sram_ctrl_lc_escalation.513518675
/workspace/coverage/default/8.sram_ctrl_max_throughput.421590725
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1235485511
/workspace/coverage/default/8.sram_ctrl_mem_walk.4089099318
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1742786432
/workspace/coverage/default/8.sram_ctrl_partial_access.1915455716
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1793573884
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2669244866
/workspace/coverage/default/8.sram_ctrl_regwen.3210734827
/workspace/coverage/default/8.sram_ctrl_smoke.1150469994
/workspace/coverage/default/8.sram_ctrl_stress_all.2977758917
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.402204311
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3589833624
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.761768197
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3875944859
/workspace/coverage/default/9.sram_ctrl_alert_test.80005249
/workspace/coverage/default/9.sram_ctrl_bijection.3481151942
/workspace/coverage/default/9.sram_ctrl_executable.1400187538
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3268399954
/workspace/coverage/default/9.sram_ctrl_max_throughput.3889126209
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3122364886
/workspace/coverage/default/9.sram_ctrl_mem_walk.1051648768
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3302493147
/workspace/coverage/default/9.sram_ctrl_partial_access.111720600
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1086397738
/workspace/coverage/default/9.sram_ctrl_ram_cfg.1760134547
/workspace/coverage/default/9.sram_ctrl_regwen.2688039339
/workspace/coverage/default/9.sram_ctrl_smoke.1823363545
/workspace/coverage/default/9.sram_ctrl_stress_all.667347157
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.856690350
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2617781017
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.101177962



Total test records in report: 1028
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/25.sram_ctrl_stress_all.3713170865 Jun 30 04:59:31 PM PDT 24 Jun 30 05:57:24 PM PDT 24 200480237773 ps
T2 /workspace/coverage/default/46.sram_ctrl_ram_cfg.3765127914 Jun 30 05:02:21 PM PDT 24 Jun 30 05:02:22 PM PDT 24 73719345 ps
T3 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.2820624371 Jun 30 04:58:31 PM PDT 24 Jun 30 05:04:32 PM PDT 24 21521234838 ps
T10 /workspace/coverage/default/27.sram_ctrl_alert_test.816467356 Jun 30 04:59:40 PM PDT 24 Jun 30 04:59:41 PM PDT 24 21819658 ps
T5 /workspace/coverage/default/27.sram_ctrl_bijection.1371512345 Jun 30 04:59:37 PM PDT 24 Jun 30 04:59:57 PM PDT 24 322116038 ps
T4 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.9576682 Jun 30 04:58:54 PM PDT 24 Jun 30 04:59:35 PM PDT 24 104294368 ps
T6 /workspace/coverage/default/25.sram_ctrl_mem_walk.2471868199 Jun 30 04:59:33 PM PDT 24 Jun 30 04:59:45 PM PDT 24 596771446 ps
T11 /workspace/coverage/default/46.sram_ctrl_alert_test.1529416690 Jun 30 05:02:21 PM PDT 24 Jun 30 05:02:22 PM PDT 24 42031686 ps
T12 /workspace/coverage/default/17.sram_ctrl_multiple_keys.681096009 Jun 30 04:58:34 PM PDT 24 Jun 30 05:11:18 PM PDT 24 3519621667 ps
T7 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.309477973 Jun 30 04:59:02 PM PDT 24 Jun 30 04:59:08 PM PDT 24 155038349 ps
T39 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2533026775 Jun 30 05:02:44 PM PDT 24 Jun 30 05:02:49 PM PDT 24 65518287 ps
T17 /workspace/coverage/default/8.sram_ctrl_bijection.1237555432 Jun 30 04:57:53 PM PDT 24 Jun 30 04:58:11 PM PDT 24 7437647653 ps
T21 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.66407952 Jun 30 04:58:32 PM PDT 24 Jun 30 04:58:42 PM PDT 24 245861530 ps
T22 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3111382001 Jun 30 05:01:42 PM PDT 24 Jun 30 05:03:55 PM PDT 24 580905302 ps
T55 /workspace/coverage/default/20.sram_ctrl_max_throughput.1688040025 Jun 30 04:58:55 PM PDT 24 Jun 30 05:00:45 PM PDT 24 131009054 ps
T40 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.3875944859 Jun 30 04:58:00 PM PDT 24 Jun 30 05:15:47 PM PDT 24 2430687465 ps
T53 /workspace/coverage/default/5.sram_ctrl_smoke.1052505537 Jun 30 04:57:43 PM PDT 24 Jun 30 04:57:53 PM PDT 24 256624120 ps
T43 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.1908607346 Jun 30 05:00:16 PM PDT 24 Jun 30 05:00:20 PM PDT 24 114159681 ps
T8 /workspace/coverage/default/39.sram_ctrl_lc_escalation.3280973624 Jun 30 05:01:19 PM PDT 24 Jun 30 05:01:22 PM PDT 24 1343803200 ps
T59 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.1653864558 Jun 30 05:00:40 PM PDT 24 Jun 30 05:02:32 PM PDT 24 2588912753 ps
T27 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1656040905 Jun 30 05:02:46 PM PDT 24 Jun 30 05:02:47 PM PDT 24 27255462 ps
T60 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.584589560 Jun 30 04:59:33 PM PDT 24 Jun 30 05:00:02 PM PDT 24 98794669 ps
T61 /workspace/coverage/default/10.sram_ctrl_mem_walk.3495968146 Jun 30 04:58:00 PM PDT 24 Jun 30 04:58:05 PM PDT 24 76420783 ps
T13 /workspace/coverage/default/33.sram_ctrl_alert_test.3847490842 Jun 30 05:00:35 PM PDT 24 Jun 30 05:00:36 PM PDT 24 12926732 ps
T9 /workspace/coverage/default/24.sram_ctrl_lc_escalation.2360049846 Jun 30 04:59:17 PM PDT 24 Jun 30 04:59:26 PM PDT 24 2577112508 ps
T18 /workspace/coverage/default/30.sram_ctrl_stress_all.3180445730 Jun 30 05:00:00 PM PDT 24 Jun 30 05:31:27 PM PDT 24 33668257150 ps
T62 /workspace/coverage/default/16.sram_ctrl_lc_escalation.3631048867 Jun 30 04:58:32 PM PDT 24 Jun 30 04:58:40 PM PDT 24 2318632773 ps
T44 /workspace/coverage/default/45.sram_ctrl_mem_walk.944726682 Jun 30 05:02:12 PM PDT 24 Jun 30 05:02:25 PM PDT 24 1762799377 ps
T67 /workspace/coverage/default/23.sram_ctrl_lc_escalation.1732403276 Jun 30 04:59:09 PM PDT 24 Jun 30 04:59:15 PM PDT 24 388147526 ps
T14 /workspace/coverage/default/0.sram_ctrl_sec_cm.3604924689 Jun 30 04:57:22 PM PDT 24 Jun 30 04:57:27 PM PDT 24 982593541 ps
T26 /workspace/coverage/default/18.sram_ctrl_executable.705272754 Jun 30 04:58:39 PM PDT 24 Jun 30 04:59:02 PM PDT 24 915732450 ps
T31 /workspace/coverage/default/49.sram_ctrl_alert_test.1549438379 Jun 30 05:02:53 PM PDT 24 Jun 30 05:02:55 PM PDT 24 17616970 ps
T32 /workspace/coverage/default/32.sram_ctrl_mem_walk.3181936694 Jun 30 05:00:23 PM PDT 24 Jun 30 05:00:32 PM PDT 24 593672285 ps
T33 /workspace/coverage/default/28.sram_ctrl_mem_walk.689546394 Jun 30 04:59:46 PM PDT 24 Jun 30 04:59:56 PM PDT 24 174522739 ps
T34 /workspace/coverage/default/34.sram_ctrl_alert_test.1823002724 Jun 30 05:00:33 PM PDT 24 Jun 30 05:00:34 PM PDT 24 144779023 ps
T35 /workspace/coverage/default/27.sram_ctrl_partial_access.2068334822 Jun 30 04:59:41 PM PDT 24 Jun 30 04:59:50 PM PDT 24 149374983 ps
T36 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2673944727 Jun 30 04:57:49 PM PDT 24 Jun 30 05:02:07 PM PDT 24 43748774231 ps
T37 /workspace/coverage/default/20.sram_ctrl_multiple_keys.3076875709 Jun 30 04:58:47 PM PDT 24 Jun 30 05:06:16 PM PDT 24 13195478084 ps
T38 /workspace/coverage/default/19.sram_ctrl_bijection.2225255094 Jun 30 04:58:49 PM PDT 24 Jun 30 04:59:21 PM PDT 24 5799100448 ps
T25 /workspace/coverage/default/10.sram_ctrl_regwen.2157737773 Jun 30 04:58:00 PM PDT 24 Jun 30 05:04:32 PM PDT 24 21263460502 ps
T23 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2994434155 Jun 30 05:02:56 PM PDT 24 Jun 30 05:08:09 PM PDT 24 1181435362 ps
T71 /workspace/coverage/default/2.sram_ctrl_partial_access.3680570549 Jun 30 04:57:28 PM PDT 24 Jun 30 04:57:32 PM PDT 24 71087161 ps
T48 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.3497058101 Jun 30 04:58:15 PM PDT 24 Jun 30 04:58:18 PM PDT 24 135142138 ps
T72 /workspace/coverage/default/30.sram_ctrl_bijection.2650003003 Jun 30 05:00:00 PM PDT 24 Jun 30 05:00:55 PM PDT 24 9265267935 ps
T73 /workspace/coverage/default/13.sram_ctrl_multiple_keys.185561939 Jun 30 04:58:09 PM PDT 24 Jun 30 05:16:59 PM PDT 24 44742634292 ps
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T76 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.3107614757 Jun 30 05:01:38 PM PDT 24 Jun 30 05:07:56 PM PDT 24 7768628457 ps
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T105 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1107932955 Jun 30 04:57:34 PM PDT 24 Jun 30 05:00:06 PM PDT 24 3061837385 ps
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T155 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1697376004 Jun 30 04:57:36 PM PDT 24 Jun 30 05:01:24 PM PDT 24 4577883374 ps
T149 /workspace/coverage/default/33.sram_ctrl_bijection.322216902 Jun 30 05:00:28 PM PDT 24 Jun 30 05:01:20 PM PDT 24 18090517757 ps
T156 /workspace/coverage/default/2.sram_ctrl_max_throughput.3669102454 Jun 30 04:57:29 PM PDT 24 Jun 30 04:57:31 PM PDT 24 131680132 ps
T24 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1114711097 Jun 30 04:58:47 PM PDT 24 Jun 30 05:00:14 PM PDT 24 1197521539 ps
T19 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.402204311 Jun 30 04:57:50 PM PDT 24 Jun 30 04:59:06 PM PDT 24 365736852 ps
T157 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.2533729249 Jun 30 05:00:51 PM PDT 24 Jun 30 05:02:05 PM PDT 24 607236065 ps
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T54 /workspace/coverage/default/21.sram_ctrl_mem_walk.3946290125 Jun 30 04:59:04 PM PDT 24 Jun 30 04:59:10 PM PDT 24 99753351 ps
T78 /workspace/coverage/default/24.sram_ctrl_regwen.471447263 Jun 30 04:59:19 PM PDT 24 Jun 30 05:11:50 PM PDT 24 7083277999 ps
T20 /workspace/coverage/default/38.sram_ctrl_stress_all.4087408957 Jun 30 05:01:12 PM PDT 24 Jun 30 05:10:06 PM PDT 24 11593455027 ps
T145 /workspace/coverage/default/7.sram_ctrl_stress_all.845037486 Jun 30 04:57:48 PM PDT 24 Jun 30 05:32:53 PM PDT 24 6423594827 ps
T148 /workspace/coverage/default/11.sram_ctrl_multiple_keys.264126703 Jun 30 04:58:02 PM PDT 24 Jun 30 05:18:06 PM PDT 24 24701017346 ps
T159 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3693347837 Jun 30 04:57:41 PM PDT 24 Jun 30 04:57:47 PM PDT 24 1849100225 ps
T28 /workspace/coverage/default/29.sram_ctrl_ram_cfg.3132433037 Jun 30 04:59:53 PM PDT 24 Jun 30 04:59:55 PM PDT 24 80328773 ps
T41 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2491291106 Jun 30 05:01:27 PM PDT 24 Jun 30 05:10:49 PM PDT 24 6727018889 ps
T93 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.556181705 Jun 30 04:59:32 PM PDT 24 Jun 30 04:59:36 PM PDT 24 348477150 ps
T160 /workspace/coverage/default/7.sram_ctrl_max_throughput.4277008370 Jun 30 04:57:50 PM PDT 24 Jun 30 04:58:53 PM PDT 24 213951507 ps
T147 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3268399954 Jun 30 04:58:00 PM PDT 24 Jun 30 04:58:06 PM PDT 24 666508401 ps
T161 /workspace/coverage/default/12.sram_ctrl_smoke.417627354 Jun 30 04:58:01 PM PDT 24 Jun 30 04:59:38 PM PDT 24 551005533 ps
T139 /workspace/coverage/default/27.sram_ctrl_regwen.528645735 Jun 30 04:59:40 PM PDT 24 Jun 30 05:28:47 PM PDT 24 15657068651 ps
T162 /workspace/coverage/default/11.sram_ctrl_mem_walk.3079237777 Jun 30 04:58:02 PM PDT 24 Jun 30 04:58:11 PM PDT 24 647323649 ps
T141 /workspace/coverage/default/40.sram_ctrl_stress_all.883163949 Jun 30 05:01:27 PM PDT 24 Jun 30 05:41:31 PM PDT 24 168953612721 ps
T49 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.281713332 Jun 30 04:59:02 PM PDT 24 Jun 30 05:00:29 PM PDT 24 2079339812 ps
T163 /workspace/coverage/default/42.sram_ctrl_partial_access.12512945 Jun 30 05:01:41 PM PDT 24 Jun 30 05:02:56 PM PDT 24 186557294 ps
T42 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.2873118106 Jun 30 04:57:40 PM PDT 24 Jun 30 05:09:02 PM PDT 24 5373102659 ps
T164 /workspace/coverage/default/25.sram_ctrl_bijection.3278945371 Jun 30 04:59:27 PM PDT 24 Jun 30 04:59:54 PM PDT 24 1253519794 ps
T56 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1726630369 Jun 30 05:01:43 PM PDT 24 Jun 30 05:10:09 PM PDT 24 1371481908 ps
T165 /workspace/coverage/default/48.sram_ctrl_alert_test.3980197804 Jun 30 05:02:46 PM PDT 24 Jun 30 05:02:47 PM PDT 24 24654630 ps
T166 /workspace/coverage/default/4.sram_ctrl_smoke.2964874058 Jun 30 04:57:35 PM PDT 24 Jun 30 04:57:45 PM PDT 24 127164252 ps
T167 /workspace/coverage/default/37.sram_ctrl_multiple_keys.4008304238 Jun 30 05:00:58 PM PDT 24 Jun 30 05:15:05 PM PDT 24 66837831158 ps
T168 /workspace/coverage/default/11.sram_ctrl_partial_access.573763533 Jun 30 04:57:59 PM PDT 24 Jun 30 04:58:00 PM PDT 24 66335165 ps
T142 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.498319326 Jun 30 04:58:32 PM PDT 24 Jun 30 05:06:56 PM PDT 24 18677843413 ps
T169 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.3965271839 Jun 30 04:59:34 PM PDT 24 Jun 30 05:03:40 PM PDT 24 9646130846 ps
T170 /workspace/coverage/default/1.sram_ctrl_lc_escalation.558382371 Jun 30 04:57:22 PM PDT 24 Jun 30 04:57:24 PM PDT 24 282858722 ps
T171 /workspace/coverage/default/17.sram_ctrl_regwen.3754863002 Jun 30 04:58:41 PM PDT 24 Jun 30 05:08:08 PM PDT 24 40682372827 ps
T172 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3174471854 Jun 30 04:58:02 PM PDT 24 Jun 30 04:58:09 PM PDT 24 76979575 ps
T140 /workspace/coverage/default/47.sram_ctrl_regwen.1527106218 Jun 30 05:02:30 PM PDT 24 Jun 30 05:15:46 PM PDT 24 3106808400 ps
T173 /workspace/coverage/default/18.sram_ctrl_bijection.2537487857 Jun 30 04:58:44 PM PDT 24 Jun 30 04:59:19 PM PDT 24 8711002974 ps
T94 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.3132787270 Jun 30 04:58:32 PM PDT 24 Jun 30 05:13:43 PM PDT 24 3211866236 ps
T143 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1644377990 Jun 30 04:57:22 PM PDT 24 Jun 30 05:03:08 PM PDT 24 13023183803 ps
T174 /workspace/coverage/default/43.sram_ctrl_mem_walk.3277754513 Jun 30 05:01:50 PM PDT 24 Jun 30 05:01:56 PM PDT 24 187923752 ps
T175 /workspace/coverage/default/45.sram_ctrl_multiple_keys.763528762 Jun 30 05:02:06 PM PDT 24 Jun 30 05:07:42 PM PDT 24 1845049017 ps
T50 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2605212781 Jun 30 04:57:44 PM PDT 24 Jun 30 04:58:59 PM PDT 24 3544641611 ps
T176 /workspace/coverage/default/32.sram_ctrl_multiple_keys.3449756870 Jun 30 05:00:20 PM PDT 24 Jun 30 05:10:22 PM PDT 24 15563602347 ps
T177 /workspace/coverage/default/1.sram_ctrl_ram_cfg.3352520807 Jun 30 04:57:28 PM PDT 24 Jun 30 04:57:30 PM PDT 24 129011769 ps
T95 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2861974084 Jun 30 04:57:28 PM PDT 24 Jun 30 04:57:33 PM PDT 24 124068755 ps
T178 /workspace/coverage/default/33.sram_ctrl_smoke.4133672922 Jun 30 05:00:23 PM PDT 24 Jun 30 05:00:38 PM PDT 24 2517184099 ps
T179 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.1784439013 Jun 30 04:58:48 PM PDT 24 Jun 30 05:05:43 PM PDT 24 26158538175 ps
T180 /workspace/coverage/default/11.sram_ctrl_smoke.1523704107 Jun 30 04:58:02 PM PDT 24 Jun 30 04:58:05 PM PDT 24 41580898 ps
T51 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.18146777 Jun 30 04:58:49 PM PDT 24 Jun 30 04:58:53 PM PDT 24 151599566 ps
T181 /workspace/coverage/default/2.sram_ctrl_stress_all.2955743775 Jun 30 04:57:31 PM PDT 24 Jun 30 05:38:00 PM PDT 24 14982947348 ps
T182 /workspace/coverage/default/44.sram_ctrl_executable.3317878806 Jun 30 05:01:59 PM PDT 24 Jun 30 05:16:45 PM PDT 24 10238176660 ps
T183 /workspace/coverage/default/1.sram_ctrl_multiple_keys.651008931 Jun 30 04:57:21 PM PDT 24 Jun 30 05:01:30 PM PDT 24 3340890001 ps
T184 /workspace/coverage/default/18.sram_ctrl_partial_access.728483278 Jun 30 04:58:41 PM PDT 24 Jun 30 04:58:52 PM PDT 24 207131901 ps
T185 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.1469937623 Jun 30 04:58:06 PM PDT 24 Jun 30 04:59:46 PM PDT 24 1049421588 ps
T186 /workspace/coverage/default/15.sram_ctrl_alert_test.1271027135 Jun 30 04:58:32 PM PDT 24 Jun 30 04:58:33 PM PDT 24 50192585 ps
T187 /workspace/coverage/default/29.sram_ctrl_partial_access.3844729429 Jun 30 04:59:54 PM PDT 24 Jun 30 05:00:23 PM PDT 24 376898221 ps
T188 /workspace/coverage/default/31.sram_ctrl_max_throughput.1376970772 Jun 30 05:00:10 PM PDT 24 Jun 30 05:00:14 PM PDT 24 84001596 ps
T189 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.1293545412 Jun 30 05:01:20 PM PDT 24 Jun 30 05:04:49 PM PDT 24 2118941723 ps
T190 /workspace/coverage/default/5.sram_ctrl_bijection.1147100525 Jun 30 04:57:44 PM PDT 24 Jun 30 04:58:11 PM PDT 24 9487996649 ps
T191 /workspace/coverage/default/4.sram_ctrl_bijection.548616863 Jun 30 04:57:35 PM PDT 24 Jun 30 04:58:59 PM PDT 24 5000935127 ps
T57 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3917726755 Jun 30 04:59:11 PM PDT 24 Jun 30 05:08:33 PM PDT 24 6509535787 ps
T192 /workspace/coverage/default/24.sram_ctrl_partial_access.2564736075 Jun 30 04:59:17 PM PDT 24 Jun 30 05:00:36 PM PDT 24 168681510 ps
T193 /workspace/coverage/default/20.sram_ctrl_lc_escalation.2115136905 Jun 30 04:58:55 PM PDT 24 Jun 30 04:58:57 PM PDT 24 324560168 ps
T194 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.3696603489 Jun 30 05:01:59 PM PDT 24 Jun 30 05:07:09 PM PDT 24 3273756340 ps
T195 /workspace/coverage/default/16.sram_ctrl_mem_walk.4014497124 Jun 30 04:58:33 PM PDT 24 Jun 30 04:58:40 PM PDT 24 3744686433 ps
T196 /workspace/coverage/default/31.sram_ctrl_bijection.282349338 Jun 30 05:00:08 PM PDT 24 Jun 30 05:01:03 PM PDT 24 2566594880 ps
T197 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1431445312 Jun 30 04:58:15 PM PDT 24 Jun 30 05:09:57 PM PDT 24 2079540118 ps
T198 /workspace/coverage/default/44.sram_ctrl_lc_escalation.2318117708 Jun 30 05:01:59 PM PDT 24 Jun 30 05:02:07 PM PDT 24 625195579 ps
T199 /workspace/coverage/default/15.sram_ctrl_multiple_keys.272750561 Jun 30 04:58:25 PM PDT 24 Jun 30 05:17:00 PM PDT 24 71610871889 ps
T200 /workspace/coverage/default/0.sram_ctrl_alert_test.3089292187 Jun 30 04:57:22 PM PDT 24 Jun 30 04:57:23 PM PDT 24 15692161 ps
T201 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.138998466 Jun 30 04:57:54 PM PDT 24 Jun 30 05:03:23 PM PDT 24 22482383969 ps
T202 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3938062725 Jun 30 05:02:39 PM PDT 24 Jun 30 05:10:46 PM PDT 24 26886621386 ps
T58 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2657467441 Jun 30 05:00:33 PM PDT 24 Jun 30 05:05:23 PM PDT 24 968233286 ps
T203 /workspace/coverage/default/21.sram_ctrl_smoke.208874977 Jun 30 04:59:00 PM PDT 24 Jun 30 04:59:51 PM PDT 24 427592192 ps
T204 /workspace/coverage/default/9.sram_ctrl_regwen.2688039339 Jun 30 04:57:59 PM PDT 24 Jun 30 05:22:42 PM PDT 24 28291620080 ps
T205 /workspace/coverage/default/44.sram_ctrl_bijection.407256422 Jun 30 05:02:01 PM PDT 24 Jun 30 05:02:41 PM PDT 24 3539732944 ps
T206 /workspace/coverage/default/15.sram_ctrl_ram_cfg.2806723246 Jun 30 04:58:26 PM PDT 24 Jun 30 04:58:27 PM PDT 24 33004221 ps
T207 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3928075205 Jun 30 05:00:00 PM PDT 24 Jun 30 05:00:11 PM PDT 24 275823127 ps
T208 /workspace/coverage/default/47.sram_ctrl_smoke.1502349247 Jun 30 05:02:22 PM PDT 24 Jun 30 05:02:37 PM PDT 24 6892848686 ps
T209 /workspace/coverage/default/12.sram_ctrl_bijection.4172811664 Jun 30 04:58:06 PM PDT 24 Jun 30 04:58:55 PM PDT 24 16829145572 ps
T210 /workspace/coverage/default/31.sram_ctrl_regwen.942115452 Jun 30 05:00:08 PM PDT 24 Jun 30 05:03:23 PM PDT 24 21248614962 ps
T211 /workspace/coverage/default/45.sram_ctrl_ram_cfg.728688041 Jun 30 05:02:07 PM PDT 24 Jun 30 05:02:08 PM PDT 24 48312177 ps
T212 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.1644308470 Jun 30 05:02:07 PM PDT 24 Jun 30 05:04:52 PM PDT 24 669688460 ps
T213 /workspace/coverage/default/40.sram_ctrl_alert_test.663023171 Jun 30 05:01:26 PM PDT 24 Jun 30 05:01:28 PM PDT 24 37583390 ps
T214 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.3233569613 Jun 30 05:00:00 PM PDT 24 Jun 30 05:00:03 PM PDT 24 151804914 ps
T215 /workspace/coverage/default/0.sram_ctrl_smoke.135775278 Jun 30 04:57:22 PM PDT 24 Jun 30 04:57:36 PM PDT 24 2474091643 ps
T216 /workspace/coverage/default/22.sram_ctrl_alert_test.327288845 Jun 30 04:59:09 PM PDT 24 Jun 30 04:59:10 PM PDT 24 17391057 ps
T146 /workspace/coverage/default/8.sram_ctrl_regwen.3210734827 Jun 30 04:57:51 PM PDT 24 Jun 30 05:02:11 PM PDT 24 7286919877 ps
T217 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.1754478011 Jun 30 04:59:45 PM PDT 24 Jun 30 05:04:08 PM PDT 24 41979506097 ps
T218 /workspace/coverage/default/27.sram_ctrl_ram_cfg.1483679364 Jun 30 04:59:40 PM PDT 24 Jun 30 04:59:41 PM PDT 24 42813853 ps
T219 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3261750930 Jun 30 05:02:30 PM PDT 24 Jun 30 05:07:57 PM PDT 24 4463353532 ps
T220 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.2135279701 Jun 30 04:58:10 PM PDT 24 Jun 30 04:58:17 PM PDT 24 187649502 ps
T221 /workspace/coverage/default/25.sram_ctrl_multiple_keys.3905320641 Jun 30 04:59:17 PM PDT 24 Jun 30 05:23:29 PM PDT 24 3293282750 ps
T222 /workspace/coverage/default/40.sram_ctrl_executable.4085835076 Jun 30 05:01:27 PM PDT 24 Jun 30 05:13:31 PM PDT 24 1895699342 ps
T223 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.4290036244 Jun 30 04:59:25 PM PDT 24 Jun 30 05:09:01 PM PDT 24 3317414521 ps
T224 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.902470630 Jun 30 04:59:02 PM PDT 24 Jun 30 05:09:08 PM PDT 24 107638255868 ps
T225 /workspace/coverage/default/8.sram_ctrl_mem_walk.4089099318 Jun 30 04:57:50 PM PDT 24 Jun 30 04:57:57 PM PDT 24 473821955 ps
T226 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3444758895 Jun 30 05:02:04 PM PDT 24 Jun 30 05:08:07 PM PDT 24 62473134549 ps
T227 /workspace/coverage/default/23.sram_ctrl_partial_access.2362792818 Jun 30 04:59:09 PM PDT 24 Jun 30 04:59:29 PM PDT 24 1175569312 ps
T228 /workspace/coverage/default/49.sram_ctrl_executable.72382395 Jun 30 05:02:54 PM PDT 24 Jun 30 05:13:46 PM PDT 24 14003494720 ps
T69 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.584455335 Jun 30 05:00:56 PM PDT 24 Jun 30 05:03:38 PM PDT 24 1901199574 ps
T118 /workspace/coverage/default/29.sram_ctrl_mem_walk.3794264814 Jun 30 04:59:54 PM PDT 24 Jun 30 05:00:00 PM PDT 24 292484450 ps
T119 /workspace/coverage/default/31.sram_ctrl_ram_cfg.3525248205 Jun 30 05:00:15 PM PDT 24 Jun 30 05:00:16 PM PDT 24 58381590 ps
T120 /workspace/coverage/default/25.sram_ctrl_regwen.1321832334 Jun 30 04:59:32 PM PDT 24 Jun 30 05:15:31 PM PDT 24 41515250896 ps
T121 /workspace/coverage/default/1.sram_ctrl_bijection.1616638079 Jun 30 04:57:20 PM PDT 24 Jun 30 04:58:38 PM PDT 24 3469302214 ps
T122 /workspace/coverage/default/40.sram_ctrl_ram_cfg.2842399346 Jun 30 05:01:27 PM PDT 24 Jun 30 05:01:28 PM PDT 24 71975242 ps
T123 /workspace/coverage/default/30.sram_ctrl_regwen.1752012802 Jun 30 05:00:05 PM PDT 24 Jun 30 05:17:26 PM PDT 24 36239581200 ps
T124 /workspace/coverage/default/46.sram_ctrl_regwen.1969555908 Jun 30 05:02:20 PM PDT 24 Jun 30 05:15:22 PM PDT 24 48712404212 ps
T125 /workspace/coverage/default/5.sram_ctrl_mem_walk.1326767346 Jun 30 04:57:41 PM PDT 24 Jun 30 04:57:51 PM PDT 24 1075828560 ps
T126 /workspace/coverage/default/1.sram_ctrl_mem_walk.256359690 Jun 30 04:57:29 PM PDT 24 Jun 30 04:57:40 PM PDT 24 723331418 ps
T229 /workspace/coverage/default/47.sram_ctrl_max_throughput.3728891557 Jun 30 05:02:29 PM PDT 24 Jun 30 05:04:40 PM PDT 24 154698452 ps
T230 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2739890691 Jun 30 04:58:03 PM PDT 24 Jun 30 05:02:40 PM PDT 24 21898811402 ps
T231 /workspace/coverage/default/14.sram_ctrl_ram_cfg.2872183015 Jun 30 04:58:16 PM PDT 24 Jun 30 04:58:17 PM PDT 24 47456916 ps
T232 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3589833624 Jun 30 04:57:49 PM PDT 24 Jun 30 05:01:10 PM PDT 24 8472659772 ps
T233 /workspace/coverage/default/18.sram_ctrl_lc_escalation.4039487078 Jun 30 04:58:40 PM PDT 24 Jun 30 04:58:46 PM PDT 24 971186586 ps
T234 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1111958348 Jun 30 04:57:35 PM PDT 24 Jun 30 04:57:37 PM PDT 24 111435035 ps
T235 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1493104990 Jun 30 04:59:16 PM PDT 24 Jun 30 04:59:46 PM PDT 24 95592263 ps
T70 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3359014328 Jun 30 05:01:50 PM PDT 24 Jun 30 05:10:18 PM PDT 24 6972557474 ps
T236 /workspace/coverage/default/20.sram_ctrl_stress_all.3846156316 Jun 30 04:58:59 PM PDT 24 Jun 30 05:49:24 PM PDT 24 45168004296 ps
T237 /workspace/coverage/default/6.sram_ctrl_alert_test.2447115668 Jun 30 04:57:41 PM PDT 24 Jun 30 04:57:43 PM PDT 24 15673011 ps
T238 /workspace/coverage/default/46.sram_ctrl_smoke.706488419 Jun 30 05:02:14 PM PDT 24 Jun 30 05:02:22 PM PDT 24 107054251 ps
T239 /workspace/coverage/default/32.sram_ctrl_ram_cfg.2541467737 Jun 30 05:00:22 PM PDT 24 Jun 30 05:00:24 PM PDT 24 27968232 ps
T240 /workspace/coverage/default/16.sram_ctrl_stress_all.2412540173 Jun 30 04:58:35 PM PDT 24 Jun 30 05:30:40 PM PDT 24 32487876676 ps
T241 /workspace/coverage/default/4.sram_ctrl_executable.1964317977 Jun 30 04:57:44 PM PDT 24 Jun 30 05:28:18 PM PDT 24 18157742802 ps
T242 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3221892853 Jun 30 05:02:21 PM PDT 24 Jun 30 05:08:06 PM PDT 24 2100014230 ps
T243 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.3396690103 Jun 30 04:59:38 PM PDT 24 Jun 30 04:59:48 PM PDT 24 722615300 ps
T244 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.1029073818 Jun 30 04:57:50 PM PDT 24 Jun 30 05:26:20 PM PDT 24 14113621278 ps
T52 /workspace/coverage/default/18.sram_ctrl_mem_walk.2357210145 Jun 30 04:58:39 PM PDT 24 Jun 30 04:58:51 PM PDT 24 2280263600 ps
T245 /workspace/coverage/default/34.sram_ctrl_multiple_keys.1030928208 Jun 30 05:00:34 PM PDT 24 Jun 30 05:24:19 PM PDT 24 53105135110 ps
T246 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.31713186 Jun 30 04:59:31 PM PDT 24 Jun 30 05:02:24 PM PDT 24 13386551755 ps
T247 /workspace/coverage/default/11.sram_ctrl_stress_all.3738596953 Jun 30 04:57:59 PM PDT 24 Jun 30 06:16:47 PM PDT 24 45530828053 ps
T248 /workspace/coverage/default/27.sram_ctrl_mem_walk.236796940 Jun 30 04:59:38 PM PDT 24 Jun 30 04:59:47 PM PDT 24 545631789 ps
T249 /workspace/coverage/default/21.sram_ctrl_max_throughput.936586393 Jun 30 04:59:00 PM PDT 24 Jun 30 04:59:08 PM PDT 24 119152012 ps
T250 /workspace/coverage/default/33.sram_ctrl_regwen.2464051597 Jun 30 05:00:23 PM PDT 24 Jun 30 05:15:57 PM PDT 24 2530185104 ps
T251 /workspace/coverage/default/37.sram_ctrl_mem_walk.985381411 Jun 30 05:00:56 PM PDT 24 Jun 30 05:01:02 PM PDT 24 1196815981 ps
T252 /workspace/coverage/default/35.sram_ctrl_max_throughput.3259123700 Jun 30 05:00:47 PM PDT 24 Jun 30 05:00:51 PM PDT 24 178992423 ps
T253 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.1232300044 Jun 30 05:00:57 PM PDT 24 Jun 30 05:16:22 PM PDT 24 2837907527 ps
T254 /workspace/coverage/default/28.sram_ctrl_multiple_keys.1873547124 Jun 30 04:59:45 PM PDT 24 Jun 30 05:13:23 PM PDT 24 13246675643 ps
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T256 /workspace/coverage/default/5.sram_ctrl_max_throughput.4153568586 Jun 30 04:57:45 PM PDT 24 Jun 30 04:58:26 PM PDT 24 1293254183 ps
T257 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.4160044464 Jun 30 05:00:33 PM PDT 24 Jun 30 05:01:59 PM PDT 24 243925783 ps
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T260 /workspace/coverage/default/40.sram_ctrl_max_throughput.4237727345 Jun 30 05:01:26 PM PDT 24 Jun 30 05:01:39 PM PDT 24 192042041 ps
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T262 /workspace/coverage/default/8.sram_ctrl_ram_cfg.2669244866 Jun 30 04:57:51 PM PDT 24 Jun 30 04:57:53 PM PDT 24 61791969 ps
T263 /workspace/coverage/default/49.sram_ctrl_multiple_keys.284526141 Jun 30 05:02:46 PM PDT 24 Jun 30 05:11:20 PM PDT 24 6252692000 ps
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T265 /workspace/coverage/default/16.sram_ctrl_ram_cfg.901218853 Jun 30 04:58:34 PM PDT 24 Jun 30 04:58:36 PM PDT 24 140852703 ps
T15 /workspace/coverage/default/2.sram_ctrl_sec_cm.2050162579 Jun 30 04:57:36 PM PDT 24 Jun 30 04:57:39 PM PDT 24 1034178372 ps
T109 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1745251349 Jun 30 04:59:32 PM PDT 24 Jun 30 05:01:00 PM PDT 24 10037295716 ps
T266 /workspace/coverage/default/1.sram_ctrl_max_throughput.1023754320 Jun 30 04:57:22 PM PDT 24 Jun 30 04:57:39 PM PDT 24 146034184 ps
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T269 /workspace/coverage/default/14.sram_ctrl_partial_access.1438105969 Jun 30 04:58:17 PM PDT 24 Jun 30 04:58:19 PM PDT 24 35167600 ps
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T271 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2070101510 Jun 30 05:01:38 PM PDT 24 Jun 30 05:08:19 PM PDT 24 18178510162 ps
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T273 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.1793467512 Jun 30 05:01:35 PM PDT 24 Jun 30 05:02:30 PM PDT 24 1039017848 ps
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T281 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.3059559874 Jun 30 04:59:33 PM PDT 24 Jun 30 05:09:57 PM PDT 24 2583827673 ps
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T289 /workspace/coverage/default/31.sram_ctrl_lc_escalation.623191983 Jun 30 05:00:10 PM PDT 24 Jun 30 05:00:18 PM PDT 24 1340399349 ps
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T291 /workspace/coverage/default/7.sram_ctrl_lc_escalation.1190809811 Jun 30 04:57:49 PM PDT 24 Jun 30 04:57:55 PM PDT 24 875294151 ps
T292 /workspace/coverage/default/44.sram_ctrl_partial_access.3018376664 Jun 30 05:01:58 PM PDT 24 Jun 30 05:02:12 PM PDT 24 752559506 ps
T293 /workspace/coverage/default/21.sram_ctrl_ram_cfg.3719525634 Jun 30 04:59:04 PM PDT 24 Jun 30 04:59:06 PM PDT 24 58786708 ps
T294 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.445630583 Jun 30 04:57:59 PM PDT 24 Jun 30 04:58:03 PM PDT 24 70075068 ps
T111 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3659514031 Jun 30 04:59:18 PM PDT 24 Jun 30 04:59:36 PM PDT 24 537028216 ps
T295 /workspace/coverage/default/37.sram_ctrl_regwen.3089598849 Jun 30 05:00:58 PM PDT 24 Jun 30 05:15:47 PM PDT 24 61476651655 ps
T296 /workspace/coverage/default/15.sram_ctrl_partial_access.1449546765 Jun 30 04:58:24 PM PDT 24 Jun 30 04:58:39 PM PDT 24 375242098 ps
T297 /workspace/coverage/default/20.sram_ctrl_bijection.1950820293 Jun 30 04:58:48 PM PDT 24 Jun 30 04:59:22 PM PDT 24 21777696203 ps
T298 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2396694948 Jun 30 04:58:39 PM PDT 24 Jun 30 04:59:27 PM PDT 24 216404025 ps
T299 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1188283101 Jun 30 04:57:50 PM PDT 24 Jun 30 04:59:15 PM PDT 24 2102417769 ps
T300 /workspace/coverage/default/34.sram_ctrl_max_throughput.1799383731 Jun 30 05:00:33 PM PDT 24 Jun 30 05:00:36 PM PDT 24 180822543 ps
T301 /workspace/coverage/default/37.sram_ctrl_executable.36865616 Jun 30 05:00:56 PM PDT 24 Jun 30 05:19:25 PM PDT 24 4799625058 ps
T302 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2199256040 Jun 30 05:02:04 PM PDT 24 Jun 30 05:04:00 PM PDT 24 275979673 ps
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