Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.98 99.16 94.27 99.72 100.00 95.95 99.12 97.62


Total tests in report: 1019
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
69.92 69.92 95.42 95.42 67.42 67.42 39.63 39.63 85.71 85.71 85.02 85.02 94.69 94.69 21.57 21.57 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.3845924751
82.01 12.08 96.19 0.76 72.75 5.33 90.33 50.69 90.48 4.76 86.71 1.69 94.84 0.15 42.78 21.21 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1333222741
88.64 6.63 97.20 1.02 79.62 6.87 91.09 0.76 90.48 0.00 88.41 1.69 96.17 1.33 77.51 34.73 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3242130656
93.82 5.18 98.73 1.53 86.85 7.23 94.31 3.22 100.00 9.52 93.72 5.31 96.46 0.29 86.65 9.14 /workspace/coverage/default/48.sram_ctrl_stress_all.942552373
95.09 1.27 99.07 0.34 89.34 2.49 97.43 3.12 100.00 0.00 95.17 1.45 97.05 0.59 87.57 0.91 /workspace/coverage/default/1.sram_ctrl_sec_cm.4219029556
95.90 0.81 99.07 0.00 89.69 0.36 97.43 0.00 100.00 0.00 95.17 0.00 97.05 0.00 92.87 5.30 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.220045625
96.51 0.61 99.07 0.00 90.28 0.59 98.27 0.83 100.00 0.00 95.65 0.48 97.05 0.00 95.25 2.38 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3478908981
96.81 0.30 99.07 0.00 90.52 0.24 98.34 0.07 100.00 0.00 95.65 0.00 98.82 1.77 95.25 0.00 /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.4011650615
96.94 0.13 99.15 0.08 90.52 0.00 99.17 0.83 100.00 0.00 95.65 0.00 98.82 0.00 95.25 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.187330943
97.07 0.13 99.15 0.00 90.64 0.12 99.17 0.00 100.00 0.00 96.14 0.48 99.12 0.29 95.25 0.00 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.1249577867
97.19 0.12 99.15 0.00 90.64 0.00 99.31 0.14 100.00 0.00 96.14 0.00 99.12 0.00 95.98 0.73 /workspace/coverage/default/49.sram_ctrl_regwen.1443348570
97.27 0.08 99.15 0.00 90.64 0.00 99.31 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.53 0.55 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1995890107
97.34 0.07 99.15 0.00 91.00 0.36 99.45 0.14 100.00 0.00 96.14 0.00 99.12 0.00 96.53 0.00 /workspace/coverage/default/12.sram_ctrl_alert_test.659991983
97.39 0.05 99.15 0.00 91.00 0.00 99.45 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1587789867
97.44 0.05 99.15 0.00 91.00 0.00 99.62 0.17 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/default/33.sram_ctrl_stress_all.2450035021
97.47 0.03 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2899418092
97.49 0.03 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3265828072
97.52 0.03 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.62 0.18 /workspace/coverage/default/1.sram_ctrl_partial_access.288768386
97.53 0.01 99.15 0.00 91.00 0.00 99.72 0.10 100.00 0.00 96.14 0.00 99.12 0.00 97.62 0.00 /workspace/coverage/default/45.sram_ctrl_lc_escalation.370500585


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2496712392
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.329173793
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2498340601
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2557323647
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1641436887
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1033575313
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.73855086
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3516267649
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3399487053
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.809090905
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3454443077
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1219909156
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1471901177
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.398954738
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2952170922
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1810672901
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1302467670
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3971538453
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.4188967318
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.91926069
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3808355478
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1658246971
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4208554288
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2679404984
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.492955326
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.735152986
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3371457204
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3964284640
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2542551781
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3315876513
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1784731692
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2665237056
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2564228297
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1470285297
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2700447318
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.554704608
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3472510532
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1132585551
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1793613641
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4046754733
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.4024221991
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3054782538
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3902642653
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.584737424
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1185119894
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1525696314
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4155679263
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.5876038
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3593059355
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1201799920
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.988300704
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1874280902
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3602355172
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1130430073
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3797923421
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2013098149
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3535479119
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2304294030
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.748998122
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2491176482
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2969592037
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1477563577
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3513927402
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2463796067
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2683076541
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2615578640
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2699291535
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4088201178
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.633467652
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1959619918
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1360533773
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3096336282
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3076602685
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1780008525
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3382726746
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.197807048
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2756458614
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3387735476
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.484836097
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1400274518
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.500076532
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2649222237
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.4177619306
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.845048440
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3999376798
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.404849489
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2954093777
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3172882424
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2423430407
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3178492706
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3085032569
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3028319385
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3876885095
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1243730490
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.905637074
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.4287480264
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2155094126
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.318390750
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2682797812
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3797864793
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2340128480
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3399319181
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3271753894
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2786452446
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2135847663
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.513884307
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.500528326
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1612479711
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2697764337
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.4156860588
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1612207650
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1148660678
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.871306673
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2430934370
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1631913908
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2419322961
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2584795831
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.980258779
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1036377474
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2611923791
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3349237636
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.673056468
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.941607874
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3050442463
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2160152361
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2032003722
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.4075139201
/workspace/coverage/default/0.sram_ctrl_alert_test.3970129270
/workspace/coverage/default/0.sram_ctrl_bijection.4112557500
/workspace/coverage/default/0.sram_ctrl_executable.1465308391
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1679247214
/workspace/coverage/default/0.sram_ctrl_max_throughput.1553331466
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2610886094
/workspace/coverage/default/0.sram_ctrl_mem_walk.2011708269
/workspace/coverage/default/0.sram_ctrl_multiple_keys.153014398
/workspace/coverage/default/0.sram_ctrl_partial_access.55448581
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2347699370
/workspace/coverage/default/0.sram_ctrl_regwen.2153467780
/workspace/coverage/default/0.sram_ctrl_sec_cm.1912324634
/workspace/coverage/default/0.sram_ctrl_smoke.4161031449
/workspace/coverage/default/0.sram_ctrl_stress_all.2012215945
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3710189086
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3082737456
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3333435892
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3569652875
/workspace/coverage/default/1.sram_ctrl_alert_test.146250370
/workspace/coverage/default/1.sram_ctrl_bijection.1058595323
/workspace/coverage/default/1.sram_ctrl_executable.1962500560
/workspace/coverage/default/1.sram_ctrl_lc_escalation.520252035
/workspace/coverage/default/1.sram_ctrl_max_throughput.1069688304
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.633169183
/workspace/coverage/default/1.sram_ctrl_mem_walk.385119153
/workspace/coverage/default/1.sram_ctrl_multiple_keys.177021162
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.351349576
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1602944083
/workspace/coverage/default/1.sram_ctrl_regwen.3480375594
/workspace/coverage/default/1.sram_ctrl_smoke.883828128
/workspace/coverage/default/1.sram_ctrl_stress_all.4227116023
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1376951729
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1805156992
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.489093262
/workspace/coverage/default/10.sram_ctrl_alert_test.2179764769
/workspace/coverage/default/10.sram_ctrl_bijection.1606486099
/workspace/coverage/default/10.sram_ctrl_executable.1827180894
/workspace/coverage/default/10.sram_ctrl_lc_escalation.449822525
/workspace/coverage/default/10.sram_ctrl_max_throughput.774742891
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.677664957
/workspace/coverage/default/10.sram_ctrl_mem_walk.1821825879
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1285881099
/workspace/coverage/default/10.sram_ctrl_partial_access.1742231824
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.57836171
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2360627496
/workspace/coverage/default/10.sram_ctrl_regwen.2681417522
/workspace/coverage/default/10.sram_ctrl_smoke.1920205625
/workspace/coverage/default/10.sram_ctrl_stress_all.146749342
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.632724726
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.438124501
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1751308882
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2333195108
/workspace/coverage/default/11.sram_ctrl_alert_test.815648346
/workspace/coverage/default/11.sram_ctrl_bijection.2336537069
/workspace/coverage/default/11.sram_ctrl_executable.1877508084
/workspace/coverage/default/11.sram_ctrl_lc_escalation.455203925
/workspace/coverage/default/11.sram_ctrl_max_throughput.1138910391
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1364971556
/workspace/coverage/default/11.sram_ctrl_mem_walk.3695346551
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2034221072
/workspace/coverage/default/11.sram_ctrl_partial_access.2674368909
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.773775812
/workspace/coverage/default/11.sram_ctrl_ram_cfg.145138693
/workspace/coverage/default/11.sram_ctrl_regwen.1859410525
/workspace/coverage/default/11.sram_ctrl_smoke.907165346
/workspace/coverage/default/11.sram_ctrl_stress_all.2541376998
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1921066711
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1648732851
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2874355882
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.4118339602
/workspace/coverage/default/12.sram_ctrl_bijection.2666967666
/workspace/coverage/default/12.sram_ctrl_executable.3018708988
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3479212757
/workspace/coverage/default/12.sram_ctrl_max_throughput.487726042
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2640631132
/workspace/coverage/default/12.sram_ctrl_mem_walk.2900027093
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1553097696
/workspace/coverage/default/12.sram_ctrl_partial_access.56686929
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.562828342
/workspace/coverage/default/12.sram_ctrl_ram_cfg.4259954841
/workspace/coverage/default/12.sram_ctrl_regwen.3348661851
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/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1289659399
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.898761056
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1758498263
/workspace/coverage/default/44.sram_ctrl_alert_test.2086197441
/workspace/coverage/default/44.sram_ctrl_bijection.3905581029
/workspace/coverage/default/44.sram_ctrl_executable.1006911539
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1238423670
/workspace/coverage/default/44.sram_ctrl_max_throughput.1083374774
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.4097117864
/workspace/coverage/default/44.sram_ctrl_mem_walk.278766774
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1695475412
/workspace/coverage/default/44.sram_ctrl_partial_access.1752383901
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2246808972
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2034949361
/workspace/coverage/default/44.sram_ctrl_regwen.3420214740
/workspace/coverage/default/44.sram_ctrl_smoke.609580355
/workspace/coverage/default/44.sram_ctrl_stress_all.1245687936
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2469084501
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1301016395
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3822630766
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.153859284
/workspace/coverage/default/45.sram_ctrl_alert_test.977337240
/workspace/coverage/default/45.sram_ctrl_bijection.527860899
/workspace/coverage/default/45.sram_ctrl_executable.1694117582
/workspace/coverage/default/45.sram_ctrl_max_throughput.1771599600
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2426302025
/workspace/coverage/default/45.sram_ctrl_mem_walk.1199124074
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2982136210
/workspace/coverage/default/45.sram_ctrl_partial_access.409833124
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3795424677
/workspace/coverage/default/45.sram_ctrl_regwen.2384373412
/workspace/coverage/default/45.sram_ctrl_smoke.3702170057
/workspace/coverage/default/45.sram_ctrl_stress_all.2573051912
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.745464134
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3164642158
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2890793512
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1791878516
/workspace/coverage/default/46.sram_ctrl_alert_test.2825930195
/workspace/coverage/default/46.sram_ctrl_bijection.4086450403
/workspace/coverage/default/46.sram_ctrl_executable.3717838556
/workspace/coverage/default/46.sram_ctrl_lc_escalation.360575296
/workspace/coverage/default/46.sram_ctrl_max_throughput.3615768223
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2081759192
/workspace/coverage/default/46.sram_ctrl_mem_walk.1622511279
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3538479701
/workspace/coverage/default/46.sram_ctrl_partial_access.761338752
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.868685467
/workspace/coverage/default/46.sram_ctrl_ram_cfg.4038606673
/workspace/coverage/default/46.sram_ctrl_regwen.3512325704
/workspace/coverage/default/46.sram_ctrl_smoke.3654631708
/workspace/coverage/default/46.sram_ctrl_stress_all.1555835417
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3723876743
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3333247642
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1637869324
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2559813214
/workspace/coverage/default/47.sram_ctrl_alert_test.1262525524
/workspace/coverage/default/47.sram_ctrl_bijection.3095552321
/workspace/coverage/default/47.sram_ctrl_executable.3473189403
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2043862617
/workspace/coverage/default/47.sram_ctrl_max_throughput.4240574638
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2511170367
/workspace/coverage/default/47.sram_ctrl_mem_walk.514187763
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3167585239
/workspace/coverage/default/47.sram_ctrl_partial_access.3588068267
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3768614748
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1535584211
/workspace/coverage/default/47.sram_ctrl_regwen.3577089533
/workspace/coverage/default/47.sram_ctrl_smoke.140033886
/workspace/coverage/default/47.sram_ctrl_stress_all.1381154129
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.925539646
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1095119250
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2033521510
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2913683780
/workspace/coverage/default/48.sram_ctrl_alert_test.2368891320
/workspace/coverage/default/48.sram_ctrl_bijection.334446094
/workspace/coverage/default/48.sram_ctrl_executable.2703552281
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3522845283
/workspace/coverage/default/48.sram_ctrl_max_throughput.3570086786
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.174489160
/workspace/coverage/default/48.sram_ctrl_mem_walk.1651825949
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2627281197
/workspace/coverage/default/48.sram_ctrl_partial_access.2406033456
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.855046474
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3293683641
/workspace/coverage/default/48.sram_ctrl_regwen.4089923340
/workspace/coverage/default/48.sram_ctrl_smoke.1466743470
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3603723093
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2666583769
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1557682230
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3382629459
/workspace/coverage/default/49.sram_ctrl_alert_test.2426329275
/workspace/coverage/default/49.sram_ctrl_bijection.3913312270
/workspace/coverage/default/49.sram_ctrl_executable.1776458485
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4083003723
/workspace/coverage/default/49.sram_ctrl_max_throughput.3065405567
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3886346743
/workspace/coverage/default/49.sram_ctrl_mem_walk.535587904
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3027978867
/workspace/coverage/default/49.sram_ctrl_partial_access.4235769573
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.212509439
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2408046630
/workspace/coverage/default/49.sram_ctrl_smoke.2263551387
/workspace/coverage/default/49.sram_ctrl_stress_all.3030700940
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3377163454
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.51288045
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.966565266
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2441049560
/workspace/coverage/default/5.sram_ctrl_alert_test.3343461752
/workspace/coverage/default/5.sram_ctrl_bijection.1830759224
/workspace/coverage/default/5.sram_ctrl_executable.3587764148
/workspace/coverage/default/5.sram_ctrl_lc_escalation.4152163624
/workspace/coverage/default/5.sram_ctrl_max_throughput.4152442162
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3520666312
/workspace/coverage/default/5.sram_ctrl_mem_walk.1825200781
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1035231661
/workspace/coverage/default/5.sram_ctrl_partial_access.3335961543
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.4206600494
/workspace/coverage/default/5.sram_ctrl_ram_cfg.806696777
/workspace/coverage/default/5.sram_ctrl_regwen.3607492246
/workspace/coverage/default/5.sram_ctrl_smoke.1883038411
/workspace/coverage/default/5.sram_ctrl_stress_all.3528500040
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1372108932
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.942960582
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.211769131
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3747285433
/workspace/coverage/default/6.sram_ctrl_alert_test.1829551439
/workspace/coverage/default/6.sram_ctrl_bijection.2143516291
/workspace/coverage/default/6.sram_ctrl_executable.4028272963
/workspace/coverage/default/6.sram_ctrl_lc_escalation.46947806
/workspace/coverage/default/6.sram_ctrl_max_throughput.3416956160
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.653429629
/workspace/coverage/default/6.sram_ctrl_mem_walk.1359127699
/workspace/coverage/default/6.sram_ctrl_multiple_keys.426879365
/workspace/coverage/default/6.sram_ctrl_partial_access.3854317383
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1553327450
/workspace/coverage/default/6.sram_ctrl_ram_cfg.494979080
/workspace/coverage/default/6.sram_ctrl_regwen.4081092735
/workspace/coverage/default/6.sram_ctrl_smoke.74344966
/workspace/coverage/default/6.sram_ctrl_stress_all.744438823
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2387573064
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1259797296
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3249672246
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.542784184
/workspace/coverage/default/7.sram_ctrl_alert_test.1227696970
/workspace/coverage/default/7.sram_ctrl_bijection.1419777694
/workspace/coverage/default/7.sram_ctrl_executable.3599813506
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1030388348
/workspace/coverage/default/7.sram_ctrl_max_throughput.4164725862
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1449034642
/workspace/coverage/default/7.sram_ctrl_mem_walk.2877923631
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1715607935
/workspace/coverage/default/7.sram_ctrl_partial_access.41278364
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2533787236
/workspace/coverage/default/7.sram_ctrl_ram_cfg.631387851
/workspace/coverage/default/7.sram_ctrl_regwen.1857567125
/workspace/coverage/default/7.sram_ctrl_smoke.2691971967
/workspace/coverage/default/7.sram_ctrl_stress_all.3604490815
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4157038859
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3250032642
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.696454436
/workspace/coverage/default/8.sram_ctrl_alert_test.2092939767
/workspace/coverage/default/8.sram_ctrl_bijection.1006849784
/workspace/coverage/default/8.sram_ctrl_executable.1895437759
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2517893317
/workspace/coverage/default/8.sram_ctrl_max_throughput.2078610151
/workspace/coverage/default/8.sram_ctrl_mem_walk.3937314421
/workspace/coverage/default/8.sram_ctrl_multiple_keys.643088289
/workspace/coverage/default/8.sram_ctrl_partial_access.4143061190
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1896343867
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1201027712
/workspace/coverage/default/8.sram_ctrl_regwen.1626708511
/workspace/coverage/default/8.sram_ctrl_smoke.155491490
/workspace/coverage/default/8.sram_ctrl_stress_all.1264723719
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3960034533
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2031349328
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.701132572
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.882849815
/workspace/coverage/default/9.sram_ctrl_alert_test.2650457917
/workspace/coverage/default/9.sram_ctrl_bijection.2415931389
/workspace/coverage/default/9.sram_ctrl_executable.2429046800
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3598936693
/workspace/coverage/default/9.sram_ctrl_max_throughput.284561087
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3679265400
/workspace/coverage/default/9.sram_ctrl_mem_walk.1015446753
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3678095297
/workspace/coverage/default/9.sram_ctrl_partial_access.3152413980
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.365374331
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3295562321
/workspace/coverage/default/9.sram_ctrl_regwen.1829921647
/workspace/coverage/default/9.sram_ctrl_smoke.3969838406
/workspace/coverage/default/9.sram_ctrl_stress_all.1771492293
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2500204677
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1218535849
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2520204424




Total test records in report: 1019
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/37.sram_ctrl_multiple_keys.3499407516 Jul 01 11:45:13 AM PDT 24 Jul 01 11:45:30 AM PDT 24 259249729 ps
T2 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.1758498263 Jul 01 11:46:46 AM PDT 24 Jul 01 11:58:03 AM PDT 24 10509362695 ps
T3 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.773775812 Jul 01 11:39:28 AM PDT 24 Jul 01 11:44:35 AM PDT 24 4355531328 ps
T10 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1333222741 Jul 01 11:41:16 AM PDT 24 Jul 01 11:47:53 AM PDT 24 6196650799 ps
T4 /workspace/coverage/default/18.sram_ctrl_executable.153634286 Jul 01 11:41:14 AM PDT 24 Jul 01 11:42:14 AM PDT 24 9280076559 ps
T5 /workspace/coverage/default/29.sram_ctrl_partial_access.3353585342 Jul 01 11:43:26 AM PDT 24 Jul 01 11:44:20 AM PDT 24 1013451739 ps
T6 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.3845924751 Jul 01 11:38:56 AM PDT 24 Jul 01 11:39:04 AM PDT 24 378823615 ps
T11 /workspace/coverage/default/4.sram_ctrl_max_throughput.4025757510 Jul 01 11:38:02 AM PDT 24 Jul 01 11:39:16 AM PDT 24 491186893 ps
T12 /workspace/coverage/default/1.sram_ctrl_partial_access.288768386 Jul 01 11:37:15 AM PDT 24 Jul 01 11:38:21 AM PDT 24 892208000 ps
T13 /workspace/coverage/default/39.sram_ctrl_multiple_keys.2679814714 Jul 01 11:45:34 AM PDT 24 Jul 01 12:14:04 PM PDT 24 13529195598 ps
T29 /workspace/coverage/default/3.sram_ctrl_multiple_keys.3038409855 Jul 01 11:37:37 AM PDT 24 Jul 01 11:46:11 AM PDT 24 3773316465 ps
T59 /workspace/coverage/default/26.sram_ctrl_max_throughput.2837075417 Jul 01 11:42:46 AM PDT 24 Jul 01 11:43:32 AM PDT 24 110996486 ps
T33 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.678317363 Jul 01 11:42:06 AM PDT 24 Jul 01 11:47:55 AM PDT 24 4452492464 ps
T49 /workspace/coverage/default/4.sram_ctrl_mem_walk.3457806837 Jul 01 11:38:03 AM PDT 24 Jul 01 11:38:09 AM PDT 24 411667249 ps
T28 /workspace/coverage/default/10.sram_ctrl_ram_cfg.2360627496 Jul 01 11:39:24 AM PDT 24 Jul 01 11:39:25 AM PDT 24 87318261 ps
T60 /workspace/coverage/default/43.sram_ctrl_multiple_keys.2052323765 Jul 01 11:46:30 AM PDT 24 Jul 01 11:54:16 AM PDT 24 26718261193 ps
T92 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.3439708691 Jul 01 11:42:56 AM PDT 24 Jul 01 11:46:29 AM PDT 24 2120634559 ps
T7 /workspace/coverage/default/2.sram_ctrl_lc_escalation.879394310 Jul 01 11:37:28 AM PDT 24 Jul 01 11:37:37 AM PDT 24 683376662 ps
T26 /workspace/coverage/default/12.sram_ctrl_mem_walk.2900027093 Jul 01 11:39:50 AM PDT 24 Jul 01 11:40:03 AM PDT 24 989555959 ps
T48 /workspace/coverage/default/9.sram_ctrl_max_throughput.284561087 Jul 01 11:39:08 AM PDT 24 Jul 01 11:41:18 AM PDT 24 137813276 ps
T8 /workspace/coverage/default/36.sram_ctrl_lc_escalation.2104612816 Jul 01 11:45:08 AM PDT 24 Jul 01 11:45:13 AM PDT 24 1392579580 ps
T72 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3673096889 Jul 01 11:46:21 AM PDT 24 Jul 01 11:46:29 AM PDT 24 224956572 ps
T21 /workspace/coverage/default/1.sram_ctrl_bijection.1058595323 Jul 01 11:37:11 AM PDT 24 Jul 01 11:37:40 AM PDT 24 443572728 ps
T27 /workspace/coverage/default/48.sram_ctrl_mem_walk.1651825949 Jul 01 11:47:45 AM PDT 24 Jul 01 11:47:53 AM PDT 24 1146063534 ps
T36 /workspace/coverage/default/46.sram_ctrl_ram_cfg.4038606673 Jul 01 11:47:19 AM PDT 24 Jul 01 11:47:20 AM PDT 24 27928340 ps
T9 /workspace/coverage/default/16.sram_ctrl_lc_escalation.537618123 Jul 01 11:40:39 AM PDT 24 Jul 01 11:40:47 AM PDT 24 427201630 ps
T73 /workspace/coverage/default/12.sram_ctrl_partial_access.56686929 Jul 01 11:39:43 AM PDT 24 Jul 01 11:40:24 AM PDT 24 398530969 ps
T22 /workspace/coverage/default/46.sram_ctrl_regwen.3512325704 Jul 01 11:47:17 AM PDT 24 Jul 01 11:51:40 AM PDT 24 18454763038 ps
T149 /workspace/coverage/default/26.sram_ctrl_bijection.2993285909 Jul 01 11:42:47 AM PDT 24 Jul 01 11:43:38 AM PDT 24 2105224362 ps
T18 /workspace/coverage/default/1.sram_ctrl_sec_cm.4219029556 Jul 01 11:37:24 AM PDT 24 Jul 01 11:37:27 AM PDT 24 524257444 ps
T40 /workspace/coverage/default/2.sram_ctrl_multiple_keys.1133375561 Jul 01 11:37:26 AM PDT 24 Jul 01 12:04:59 PM PDT 24 32475792514 ps
T41 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.4118339602 Jul 01 11:39:48 AM PDT 24 Jul 01 11:46:53 AM PDT 24 1362694261 ps
T42 /workspace/coverage/default/21.sram_ctrl_max_throughput.4096819492 Jul 01 11:41:46 AM PDT 24 Jul 01 11:43:54 AM PDT 24 508444109 ps
T43 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.535655282 Jul 01 11:37:26 AM PDT 24 Jul 01 11:42:12 AM PDT 24 3683702151 ps
T44 /workspace/coverage/default/20.sram_ctrl_smoke.1250778115 Jul 01 11:41:24 AM PDT 24 Jul 01 11:41:33 AM PDT 24 119934172 ps
T37 /workspace/coverage/default/20.sram_ctrl_ram_cfg.1625365837 Jul 01 11:41:35 AM PDT 24 Jul 01 11:41:37 AM PDT 24 26477909 ps
T45 /workspace/coverage/default/5.sram_ctrl_bijection.1830759224 Jul 01 11:38:08 AM PDT 24 Jul 01 11:38:31 AM PDT 24 960148204 ps
T46 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3250032642 Jul 01 11:38:38 AM PDT 24 Jul 01 11:40:18 AM PDT 24 124827521 ps
T47 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.677664957 Jul 01 11:39:23 AM PDT 24 Jul 01 11:39:28 AM PDT 24 68614383 ps
T54 /workspace/coverage/default/22.sram_ctrl_mem_walk.763710457 Jul 01 11:42:06 AM PDT 24 Jul 01 11:42:17 AM PDT 24 349389526 ps
T162 /workspace/coverage/default/33.sram_ctrl_bijection.88908436 Jul 01 11:44:23 AM PDT 24 Jul 01 11:45:35 AM PDT 24 2016243889 ps
T156 /workspace/coverage/default/40.sram_ctrl_partial_access.3839965759 Jul 01 11:45:57 AM PDT 24 Jul 01 11:46:14 AM PDT 24 656022247 ps
T163 /workspace/coverage/default/45.sram_ctrl_ram_cfg.3795424677 Jul 01 11:47:01 AM PDT 24 Jul 01 11:47:02 AM PDT 24 28300891 ps
T158 /workspace/coverage/default/1.sram_ctrl_max_throughput.1069688304 Jul 01 11:37:12 AM PDT 24 Jul 01 11:38:58 AM PDT 24 148001896 ps
T97 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.928835697 Jul 01 11:40:36 AM PDT 24 Jul 01 12:00:38 PM PDT 24 14088457739 ps
T164 /workspace/coverage/default/45.sram_ctrl_smoke.3702170057 Jul 01 11:46:52 AM PDT 24 Jul 01 11:46:59 AM PDT 24 1022178476 ps
T111 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3478908981 Jul 01 11:46:58 AM PDT 24 Jul 01 11:53:11 AM PDT 24 13457423114 ps
T34 /workspace/coverage/default/11.sram_ctrl_executable.1877508084 Jul 01 11:39:32 AM PDT 24 Jul 01 11:58:15 AM PDT 24 50994416136 ps
T165 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3952485059 Jul 01 11:42:51 AM PDT 24 Jul 01 11:42:53 AM PDT 24 41400567 ps
T151 /workspace/coverage/default/27.sram_ctrl_multiple_keys.247050634 Jul 01 11:42:56 AM PDT 24 Jul 01 12:10:21 PM PDT 24 13690718997 ps
T55 /workspace/coverage/default/5.sram_ctrl_mem_walk.1825200781 Jul 01 11:38:12 AM PDT 24 Jul 01 11:38:24 AM PDT 24 2627263486 ps
T23 /workspace/coverage/default/48.sram_ctrl_stress_all.942552373 Jul 01 11:47:44 AM PDT 24 Jul 01 12:13:57 PM PDT 24 290216354445 ps
T112 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2058220801 Jul 01 11:39:43 AM PDT 24 Jul 01 11:45:29 AM PDT 24 13611817522 ps
T56 /workspace/coverage/default/24.sram_ctrl_mem_walk.1754115535 Jul 01 11:42:22 AM PDT 24 Jul 01 11:42:28 AM PDT 24 92738070 ps
T35 /workspace/coverage/default/32.sram_ctrl_regwen.2267600926 Jul 01 11:44:21 AM PDT 24 Jul 01 11:55:14 AM PDT 24 32085622939 ps
T71 /workspace/coverage/default/12.sram_ctrl_stress_all.1406280869 Jul 01 11:39:51 AM PDT 24 Jul 01 12:23:01 PM PDT 24 210306085697 ps
T166 /workspace/coverage/default/17.sram_ctrl_ram_cfg.3586698650 Jul 01 11:40:57 AM PDT 24 Jul 01 11:40:59 AM PDT 24 80557326 ps
T24 /workspace/coverage/default/49.sram_ctrl_regwen.1443348570 Jul 01 11:48:00 AM PDT 24 Jul 01 12:03:32 PM PDT 24 3832058026 ps
T98 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.1592043233 Jul 01 11:44:29 AM PDT 24 Jul 01 11:47:57 AM PDT 24 2901204637 ps
T167 /workspace/coverage/default/0.sram_ctrl_ram_cfg.187330943 Jul 01 11:37:02 AM PDT 24 Jul 01 11:37:03 AM PDT 24 273940607 ps
T30 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1372108932 Jul 01 11:38:17 AM PDT 24 Jul 01 11:40:43 AM PDT 24 751213335 ps
T76 /workspace/coverage/default/18.sram_ctrl_multiple_keys.3806884530 Jul 01 11:41:02 AM PDT 24 Jul 01 12:00:44 PM PDT 24 32754851549 ps
T77 /workspace/coverage/default/21.sram_ctrl_ram_cfg.128537559 Jul 01 11:41:58 AM PDT 24 Jul 01 11:42:02 AM PDT 24 52571156 ps
T14 /workspace/coverage/default/3.sram_ctrl_alert_test.2365543198 Jul 01 11:37:47 AM PDT 24 Jul 01 11:37:48 AM PDT 24 14166206 ps
T78 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.2357788123 Jul 01 11:41:58 AM PDT 24 Jul 01 11:56:29 AM PDT 24 2073513089 ps
T79 /workspace/coverage/default/2.sram_ctrl_executable.3573349989 Jul 01 11:37:26 AM PDT 24 Jul 01 11:49:41 AM PDT 24 8348174867 ps
T80 /workspace/coverage/default/22.sram_ctrl_bijection.1839675763 Jul 01 11:42:00 AM PDT 24 Jul 01 11:43:14 AM PDT 24 1242240148 ps
T81 /workspace/coverage/default/7.sram_ctrl_smoke.2691971967 Jul 01 11:38:37 AM PDT 24 Jul 01 11:38:40 AM PDT 24 236314540 ps
T82 /workspace/coverage/default/45.sram_ctrl_partial_access.409833124 Jul 01 11:46:56 AM PDT 24 Jul 01 11:48:20 AM PDT 24 683921823 ps
T83 /workspace/coverage/default/33.sram_ctrl_lc_escalation.380059972 Jul 01 11:44:28 AM PDT 24 Jul 01 11:44:33 AM PDT 24 747751452 ps
T99 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1364971556 Jul 01 11:39:36 AM PDT 24 Jul 01 11:39:42 AM PDT 24 166051526 ps
T153 /workspace/coverage/default/34.sram_ctrl_bijection.2224585977 Jul 01 11:44:42 AM PDT 24 Jul 01 11:45:51 AM PDT 24 8373457060 ps
T57 /workspace/coverage/default/45.sram_ctrl_mem_walk.1199124074 Jul 01 11:47:00 AM PDT 24 Jul 01 11:47:11 AM PDT 24 1756565247 ps
T154 /workspace/coverage/default/36.sram_ctrl_multiple_keys.3087272217 Jul 01 11:45:02 AM PDT 24 Jul 01 11:50:42 AM PDT 24 4614849176 ps
T25 /workspace/coverage/default/21.sram_ctrl_stress_all.4241683971 Jul 01 11:41:58 AM PDT 24 Jul 01 12:10:08 PM PDT 24 41868653929 ps
T140 /workspace/coverage/default/28.sram_ctrl_regwen.4143251502 Jul 01 11:43:19 AM PDT 24 Jul 01 11:55:08 AM PDT 24 20277567196 ps
T168 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3822630766 Jul 01 11:46:47 AM PDT 24 Jul 01 11:46:49 AM PDT 24 35617868 ps
T144 /workspace/coverage/default/3.sram_ctrl_stress_all.1997690673 Jul 01 11:37:48 AM PDT 24 Jul 01 11:56:01 AM PDT 24 9481189799 ps
T169 /workspace/coverage/default/6.sram_ctrl_lc_escalation.46947806 Jul 01 11:38:23 AM PDT 24 Jul 01 11:38:27 AM PDT 24 165755183 ps
T152 /workspace/coverage/default/25.sram_ctrl_smoke.643972512 Jul 01 11:42:25 AM PDT 24 Jul 01 11:44:56 AM PDT 24 586628883 ps
T170 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2033521510 Jul 01 11:47:29 AM PDT 24 Jul 01 11:49:54 AM PDT 24 2095932522 ps
T171 /workspace/coverage/default/3.sram_ctrl_bijection.3274535532 Jul 01 11:37:37 AM PDT 24 Jul 01 11:38:54 AM PDT 24 3378907224 ps
T172 /workspace/coverage/default/48.sram_ctrl_ram_cfg.3293683641 Jul 01 11:47:46 AM PDT 24 Jul 01 11:47:47 AM PDT 24 82665464 ps
T159 /workspace/coverage/default/31.sram_ctrl_lc_escalation.2341694271 Jul 01 11:44:04 AM PDT 24 Jul 01 11:44:11 AM PDT 24 1699096237 ps
T58 /workspace/coverage/default/27.sram_ctrl_mem_walk.788218010 Jul 01 11:43:05 AM PDT 24 Jul 01 11:43:11 AM PDT 24 345288196 ps
T139 /workspace/coverage/default/18.sram_ctrl_regwen.3624248736 Jul 01 11:41:14 AM PDT 24 Jul 01 12:02:37 PM PDT 24 26969600217 ps
T100 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.4120711760 Jul 01 11:43:29 AM PDT 24 Jul 01 12:02:00 PM PDT 24 3553507401 ps
T173 /workspace/coverage/default/23.sram_ctrl_max_throughput.1377087561 Jul 01 11:42:06 AM PDT 24 Jul 01 11:43:27 AM PDT 24 931916474 ps
T174 /workspace/coverage/default/39.sram_ctrl_ram_cfg.3335789768 Jul 01 11:45:49 AM PDT 24 Jul 01 11:45:51 AM PDT 24 90365593 ps
T113 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3541140729 Jul 01 11:39:56 AM PDT 24 Jul 01 11:46:14 AM PDT 24 26755759350 ps
T157 /workspace/coverage/default/22.sram_ctrl_multiple_keys.2017236064 Jul 01 11:41:57 AM PDT 24 Jul 01 12:10:46 PM PDT 24 52636163302 ps
T150 /workspace/coverage/default/18.sram_ctrl_bijection.1632271917 Jul 01 11:41:02 AM PDT 24 Jul 01 11:42:27 AM PDT 24 7535628640 ps
T19 /workspace/coverage/default/2.sram_ctrl_sec_cm.1012994163 Jul 01 11:37:36 AM PDT 24 Jul 01 11:37:42 AM PDT 24 1195314618 ps
T175 /workspace/coverage/default/45.sram_ctrl_max_throughput.1771599600 Jul 01 11:46:57 AM PDT 24 Jul 01 11:47:14 AM PDT 24 73033759 ps
T114 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.40955057 Jul 01 11:40:11 AM PDT 24 Jul 01 11:47:08 AM PDT 24 76606101798 ps
T176 /workspace/coverage/default/16.sram_ctrl_ram_cfg.1455188274 Jul 01 11:40:36 AM PDT 24 Jul 01 11:40:38 AM PDT 24 83169627 ps
T155 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3249672246 Jul 01 11:38:23 AM PDT 24 Jul 01 11:40:21 AM PDT 24 607387070 ps
T143 /workspace/coverage/default/19.sram_ctrl_stress_all.3754811319 Jul 01 11:41:27 AM PDT 24 Jul 01 12:26:43 PM PDT 24 37187000996 ps
T160 /workspace/coverage/default/45.sram_ctrl_bijection.527860899 Jul 01 11:46:57 AM PDT 24 Jul 01 11:48:08 AM PDT 24 12010082767 ps
T31 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3242130656 Jul 01 11:41:14 AM PDT 24 Jul 01 11:43:46 AM PDT 24 597339270 ps
T177 /workspace/coverage/default/15.sram_ctrl_max_throughput.2467760664 Jul 01 11:40:23 AM PDT 24 Jul 01 11:40:47 AM PDT 24 95526568 ps
T161 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.2823187360 Jul 01 11:44:13 AM PDT 24 Jul 01 11:51:41 AM PDT 24 2460587141 ps
T178 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.2148155198 Jul 01 11:44:57 AM PDT 24 Jul 01 11:47:01 AM PDT 24 270212324 ps
T32 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3710189086 Jul 01 11:37:01 AM PDT 24 Jul 01 11:37:26 AM PDT 24 768198270 ps
T74 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2284056608 Jul 01 11:46:05 AM PDT 24 Jul 01 11:48:19 AM PDT 24 5659067054 ps
T120 /workspace/coverage/default/15.sram_ctrl_lc_escalation.69028450 Jul 01 11:40:28 AM PDT 24 Jul 01 11:40:36 AM PDT 24 589112660 ps
T121 /workspace/coverage/default/8.sram_ctrl_regwen.1626708511 Jul 01 11:38:58 AM PDT 24 Jul 01 11:40:01 AM PDT 24 1907405064 ps
T53 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3090631080 Jul 01 11:43:02 AM PDT 24 Jul 01 11:44:35 AM PDT 24 1059934632 ps
T122 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1449034642 Jul 01 11:38:48 AM PDT 24 Jul 01 11:38:52 AM PDT 24 88511300 ps
T123 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.4043759010 Jul 01 11:41:09 AM PDT 24 Jul 01 11:42:55 AM PDT 24 604396328 ps
T124 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1218535849 Jul 01 11:39:01 AM PDT 24 Jul 01 11:41:58 AM PDT 24 7193391127 ps
T61 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1360931696 Jul 01 11:45:10 AM PDT 24 Jul 01 11:51:02 AM PDT 24 5457577773 ps
T125 /workspace/coverage/default/46.sram_ctrl_smoke.3654631708 Jul 01 11:47:07 AM PDT 24 Jul 01 11:47:21 AM PDT 24 232287139 ps
T179 /workspace/coverage/default/39.sram_ctrl_max_throughput.1676532315 Jul 01 11:45:39 AM PDT 24 Jul 01 11:46:15 AM PDT 24 305011750 ps
T180 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1557682230 Jul 01 11:47:45 AM PDT 24 Jul 01 11:47:48 AM PDT 24 44635499 ps
T181 /workspace/coverage/default/22.sram_ctrl_lc_escalation.4037852888 Jul 01 11:42:05 AM PDT 24 Jul 01 11:42:12 AM PDT 24 1334501409 ps
T15 /workspace/coverage/default/29.sram_ctrl_alert_test.4095177204 Jul 01 11:43:32 AM PDT 24 Jul 01 11:43:34 AM PDT 24 20613144 ps
T182 /workspace/coverage/default/16.sram_ctrl_smoke.4292774601 Jul 01 11:40:32 AM PDT 24 Jul 01 11:40:45 AM PDT 24 804587147 ps
T183 /workspace/coverage/default/10.sram_ctrl_smoke.1920205625 Jul 01 11:39:14 AM PDT 24 Jul 01 11:39:24 AM PDT 24 2094266216 ps
T184 /workspace/coverage/default/19.sram_ctrl_partial_access.1225514423 Jul 01 11:41:22 AM PDT 24 Jul 01 11:41:30 AM PDT 24 1605067094 ps
T148 /workspace/coverage/default/5.sram_ctrl_executable.3587764148 Jul 01 11:38:13 AM PDT 24 Jul 01 11:55:14 AM PDT 24 40163979067 ps
T185 /workspace/coverage/default/22.sram_ctrl_ram_cfg.1676266156 Jul 01 11:41:57 AM PDT 24 Jul 01 11:42:00 AM PDT 24 32376749 ps
T186 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1331623841 Jul 01 11:39:57 AM PDT 24 Jul 01 11:42:58 AM PDT 24 7192406530 ps
T187 /workspace/coverage/default/38.sram_ctrl_stress_all.3371306163 Jul 01 11:45:34 AM PDT 24 Jul 01 12:11:20 PM PDT 24 4979010719 ps
T62 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.19659180 Jul 01 11:46:42 AM PDT 24 Jul 01 11:46:50 AM PDT 24 706954401 ps
T145 /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2084152875 Jul 01 11:40:47 AM PDT 24 Jul 01 11:50:53 AM PDT 24 48827530734 ps
T188 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3678095297 Jul 01 11:39:02 AM PDT 24 Jul 01 11:53:49 AM PDT 24 3030365864 ps
T141 /workspace/coverage/default/22.sram_ctrl_executable.3924759273 Jul 01 11:41:58 AM PDT 24 Jul 01 11:51:59 AM PDT 24 6938331966 ps
T189 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.2213509918 Jul 01 11:46:09 AM PDT 24 Jul 01 12:06:43 PM PDT 24 6003901347 ps
T190 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.369365219 Jul 01 11:45:32 AM PDT 24 Jul 01 11:46:29 AM PDT 24 512543274 ps
T63 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3960034533 Jul 01 11:38:57 AM PDT 24 Jul 01 11:41:21 AM PDT 24 2569595050 ps
T191 /workspace/coverage/default/1.sram_ctrl_mem_walk.385119153 Jul 01 11:37:19 AM PDT 24 Jul 01 11:37:30 AM PDT 24 462330593 ps
T192 /workspace/coverage/default/3.sram_ctrl_lc_escalation.508357579 Jul 01 11:37:42 AM PDT 24 Jul 01 11:37:51 AM PDT 24 875171100 ps
T193 /workspace/coverage/default/25.sram_ctrl_partial_access.515542523 Jul 01 11:42:32 AM PDT 24 Jul 01 11:43:00 AM PDT 24 635910325 ps
T194 /workspace/coverage/default/5.sram_ctrl_smoke.1883038411 Jul 01 11:38:07 AM PDT 24 Jul 01 11:38:26 AM PDT 24 259246808 ps
T195 /workspace/coverage/default/17.sram_ctrl_regwen.1447220091 Jul 01 11:40:52 AM PDT 24 Jul 01 11:47:18 AM PDT 24 5466851276 ps
T196 /workspace/coverage/default/26.sram_ctrl_mem_walk.2532668886 Jul 01 11:42:50 AM PDT 24 Jul 01 11:43:02 AM PDT 24 334185230 ps
T197 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.153859284 Jul 01 11:47:02 AM PDT 24 Jul 01 11:52:56 AM PDT 24 3695155884 ps
T198 /workspace/coverage/default/38.sram_ctrl_partial_access.120603498 Jul 01 11:45:25 AM PDT 24 Jul 01 11:46:37 AM PDT 24 2323021681 ps
T199 /workspace/coverage/default/36.sram_ctrl_executable.3117080685 Jul 01 11:45:06 AM PDT 24 Jul 01 11:52:51 AM PDT 24 6541093923 ps
T146 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.1331694092 Jul 01 11:45:12 AM PDT 24 Jul 01 11:51:31 AM PDT 24 27984217125 ps
T200 /workspace/coverage/default/37.sram_ctrl_executable.99068126 Jul 01 11:45:19 AM PDT 24 Jul 01 12:00:33 PM PDT 24 7669835155 ps
T201 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1007352297 Jul 01 11:40:11 AM PDT 24 Jul 01 11:40:18 AM PDT 24 199757350 ps
T202 /workspace/coverage/default/47.sram_ctrl_lc_escalation.2043862617 Jul 01 11:47:32 AM PDT 24 Jul 01 11:47:39 AM PDT 24 2809389539 ps
T203 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.4177663349 Jul 01 11:39:57 AM PDT 24 Jul 01 11:42:24 AM PDT 24 664394750 ps
T204 /workspace/coverage/default/12.sram_ctrl_max_throughput.487726042 Jul 01 11:39:43 AM PDT 24 Jul 01 11:40:57 AM PDT 24 120471001 ps
T205 /workspace/coverage/default/33.sram_ctrl_max_throughput.1077325574 Jul 01 11:44:27 AM PDT 24 Jul 01 11:47:09 AM PDT 24 532644841 ps
T206 /workspace/coverage/default/37.sram_ctrl_stress_all.3070207036 Jul 01 11:45:24 AM PDT 24 Jul 01 12:35:56 PM PDT 24 39055591021 ps
T207 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.3983990580 Jul 01 11:44:55 AM PDT 24 Jul 01 12:04:08 PM PDT 24 10229920887 ps
T208 /workspace/coverage/default/4.sram_ctrl_bijection.3639939763 Jul 01 11:37:53 AM PDT 24 Jul 01 11:38:39 AM PDT 24 3979750524 ps
T209 /workspace/coverage/default/16.sram_ctrl_bijection.2844391322 Jul 01 11:40:32 AM PDT 24 Jul 01 11:41:03 AM PDT 24 2721203441 ps
T210 /workspace/coverage/default/43.sram_ctrl_smoke.3121444737 Jul 01 11:46:26 AM PDT 24 Jul 01 11:49:02 AM PDT 24 268232875 ps
T211 /workspace/coverage/default/18.sram_ctrl_partial_access.3932684697 Jul 01 11:41:09 AM PDT 24 Jul 01 11:41:28 AM PDT 24 1559686223 ps
T212 /workspace/coverage/default/36.sram_ctrl_partial_access.3320996423 Jul 01 11:45:01 AM PDT 24 Jul 01 11:45:33 AM PDT 24 246303035 ps
T213 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2498765283 Jul 01 11:42:57 AM PDT 24 Jul 01 11:45:27 AM PDT 24 304057744 ps
T214 /workspace/coverage/default/49.sram_ctrl_ram_cfg.2408046630 Jul 01 11:47:56 AM PDT 24 Jul 01 11:47:58 AM PDT 24 95050863 ps
T215 /workspace/coverage/default/34.sram_ctrl_regwen.1251821258 Jul 01 11:44:47 AM PDT 24 Jul 01 12:05:58 PM PDT 24 2453987304 ps
T216 /workspace/coverage/default/39.sram_ctrl_smoke.2399069764 Jul 01 11:45:35 AM PDT 24 Jul 01 11:45:47 AM PDT 24 184426679 ps
T147 /workspace/coverage/default/42.sram_ctrl_stress_all.618182622 Jul 01 11:46:25 AM PDT 24 Jul 01 12:29:10 PM PDT 24 92234005561 ps
T217 /workspace/coverage/default/17.sram_ctrl_multiple_keys.4057071839 Jul 01 11:40:48 AM PDT 24 Jul 01 12:00:59 PM PDT 24 10003338856 ps
T218 /workspace/coverage/default/17.sram_ctrl_bijection.3800709179 Jul 01 11:40:47 AM PDT 24 Jul 01 11:41:44 AM PDT 24 3280641987 ps
T219 /workspace/coverage/default/46.sram_ctrl_mem_walk.1622511279 Jul 01 11:47:20 AM PDT 24 Jul 01 11:47:31 AM PDT 24 883622565 ps
T220 /workspace/coverage/default/37.sram_ctrl_ram_cfg.3874082294 Jul 01 11:45:20 AM PDT 24 Jul 01 11:45:21 AM PDT 24 33992109 ps
T221 /workspace/coverage/default/14.sram_ctrl_partial_access.509664446 Jul 01 11:40:11 AM PDT 24 Jul 01 11:41:20 AM PDT 24 656327149 ps
T222 /workspace/coverage/default/4.sram_ctrl_multiple_keys.1937352431 Jul 01 11:37:52 AM PDT 24 Jul 01 11:59:52 AM PDT 24 57825265128 ps
T223 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.1085406194 Jul 01 11:42:11 AM PDT 24 Jul 01 11:42:18 AM PDT 24 188223536 ps
T20 /workspace/coverage/default/4.sram_ctrl_sec_cm.4009249181 Jul 01 11:38:03 AM PDT 24 Jul 01 11:38:07 AM PDT 24 880785041 ps
T16 /workspace/coverage/default/43.sram_ctrl_alert_test.1721216756 Jul 01 11:46:42 AM PDT 24 Jul 01 11:46:45 AM PDT 24 41414389 ps
T224 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.2172792740 Jul 01 11:42:06 AM PDT 24 Jul 01 11:45:00 AM PDT 24 1933779185 ps
T225 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.3258570706 Jul 01 11:41:45 AM PDT 24 Jul 01 11:42:00 AM PDT 24 75249691 ps
T226 /workspace/coverage/default/13.sram_ctrl_regwen.3599608945 Jul 01 11:40:04 AM PDT 24 Jul 01 11:57:04 AM PDT 24 95049206789 ps
T227 /workspace/coverage/default/17.sram_ctrl_lc_escalation.4276133370 Jul 01 11:40:54 AM PDT 24 Jul 01 11:40:56 AM PDT 24 204692355 ps
T228 /workspace/coverage/default/7.sram_ctrl_partial_access.41278364 Jul 01 11:38:37 AM PDT 24 Jul 01 11:38:55 AM PDT 24 645888007 ps
T17 /workspace/coverage/default/12.sram_ctrl_alert_test.659991983 Jul 01 11:39:51 AM PDT 24 Jul 01 11:39:52 AM PDT 24 14799146 ps
T229 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3027978867 Jul 01 11:47:50 AM PDT 24 Jul 01 11:57:23 AM PDT 24 6959337258 ps
T64 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.847720739 Jul 01 11:44:05 AM PDT 24 Jul 01 11:51:42 AM PDT 24 3819060635 ps
T230 /workspace/coverage/default/45.sram_ctrl_multiple_keys.2982136210 Jul 01 11:46:58 AM PDT 24 Jul 01 12:15:02 PM PDT 24 136201917277 ps
T231 /workspace/coverage/default/2.sram_ctrl_bijection.592992941 Jul 01 11:37:23 AM PDT 24 Jul 01 11:37:51 AM PDT 24 4924517980 ps
T232 /workspace/coverage/default/27.sram_ctrl_ram_cfg.252536553 Jul 01 11:43:01 AM PDT 24 Jul 01 11:43:03 AM PDT 24 26281382 ps
T233 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3373385688 Jul 01 11:42:07 AM PDT 24 Jul 01 11:42:10 AM PDT 24 100186131 ps
T234 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.855046474 Jul 01 11:47:39 AM PDT 24 Jul 01 11:54:11 AM PDT 24 33217378038 ps
T235 /workspace/coverage/default/32.sram_ctrl_max_throughput.1279465286 Jul 01 11:44:13 AM PDT 24 Jul 01 11:46:30 AM PDT 24 137350067 ps
T236 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.518938746 Jul 01 11:42:36 AM PDT 24 Jul 01 11:42:49 AM PDT 24 328417351 ps
T237 /workspace/coverage/default/7.sram_ctrl_multiple_keys.1715607935 Jul 01 11:38:36 AM PDT 24 Jul 01 12:03:14 PM PDT 24 53854826435 ps
T238 /workspace/coverage/default/15.sram_ctrl_alert_test.2495336803 Jul 01 11:40:32 AM PDT 24 Jul 01 11:40:33 AM PDT 24 68138848 ps
T239 /workspace/coverage/default/44.sram_ctrl_max_throughput.1083374774 Jul 01 11:46:46 AM PDT 24 Jul 01 11:47:24 AM PDT 24 250826983 ps
T240 /workspace/coverage/default/40.sram_ctrl_alert_test.3553069610 Jul 01 11:46:05 AM PDT 24 Jul 01 11:46:06 AM PDT 24 20235421 ps
T241 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.290735385 Jul 01 11:37:58 AM PDT 24 Jul 01 11:38:13 AM PDT 24 358279369 ps
T242 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2088715094 Jul 01 11:40:36 AM PDT 24 Jul 01 11:40:59 AM PDT 24 89787902 ps
T65 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2469084501 Jul 01 11:46:51 AM PDT 24 Jul 01 11:47:10 AM PDT 24 1028490104 ps
T243 /workspace/coverage/default/17.sram_ctrl_smoke.856710112 Jul 01 11:40:42 AM PDT 24 Jul 01 11:40:45 AM PDT 24 844509024 ps
T244 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3520666312 Jul 01 11:38:18 AM PDT 24 Jul 01 11:38:22 AM PDT 24 100656432 ps
T245 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.2426302025 Jul 01 11:47:01 AM PDT 24 Jul 01 11:47:05 AM PDT 24 398920038 ps
T246 /workspace/coverage/default/3.sram_ctrl_smoke.2247771888 Jul 01 11:37:38 AM PDT 24 Jul 01 11:38:01 AM PDT 24 6691743789 ps
T247 /workspace/coverage/default/17.sram_ctrl_alert_test.3845763211 Jul 01 11:40:57 AM PDT 24 Jul 01 11:40:59 AM PDT 24 40800443 ps
T248 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2447131946 Jul 01 11:42:40 AM PDT 24 Jul 01 11:47:01 AM PDT 24 12868271092 ps
T249 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.4097117864 Jul 01 11:46:53 AM PDT 24 Jul 01 11:46:59 AM PDT 24 272212455 ps
T250 /workspace/coverage/default/4.sram_ctrl_stress_all.4132578848 Jul 01 11:38:03 AM PDT 24 Jul 01 11:58:44 AM PDT 24 53218406200 ps
T251 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.2570290121 Jul 01 11:45:31 AM PDT 24 Jul 01 12:10:13 PM PDT 24 11097929132 ps
T252 /workspace/coverage/default/36.sram_ctrl_smoke.2880295886 Jul 01 11:45:02 AM PDT 24 Jul 01 11:45:48 AM PDT 24 811464550 ps
T253 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1338109281 Jul 01 11:37:44 AM PDT 24 Jul 01 11:43:48 AM PDT 24 9812182008 ps
T254 /workspace/coverage/default/21.sram_ctrl_lc_escalation.252035945 Jul 01 11:41:45 AM PDT 24 Jul 01 11:41:51 AM PDT 24 474631736 ps
T255 /workspace/coverage/default/27.sram_ctrl_partial_access.2771310698 Jul 01 11:42:57 AM PDT 24 Jul 01 11:44:36 AM PDT 24 2098907217 ps
T256 /workspace/coverage/default/6.sram_ctrl_bijection.2143516291 Jul 01 11:38:16 AM PDT 24 Jul 01 11:39:10 AM PDT 24 6078703198 ps
T257 /workspace/coverage/default/21.sram_ctrl_mem_walk.1685196454 Jul 01 11:41:59 AM PDT 24 Jul 01 11:42:12 AM PDT 24 786189094 ps
T258 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3986703216 Jul 01 11:44:21 AM PDT 24 Jul 01 11:44:26 AM PDT 24 107086209 ps
T259 /workspace/coverage/default/38.sram_ctrl_lc_escalation.679864088 Jul 01 11:45:32 AM PDT 24 Jul 01 11:45:43 AM PDT 24 792570882 ps
T260 /workspace/coverage/default/18.sram_ctrl_stress_all.476371138 Jul 01 11:41:15 AM PDT 24 Jul 01 12:01:31 PM PDT 24 27154294081 ps
T261 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.438124501 Jul 01 11:39:13 AM PDT 24 Jul 01 11:42:47 AM PDT 24 8759307686 ps
T262 /workspace/coverage/default/5.sram_ctrl_ram_cfg.806696777 Jul 01 11:38:13 AM PDT 24 Jul 01 11:38:15 AM PDT 24 62937365 ps
T263 /workspace/coverage/default/34.sram_ctrl_smoke.1297741370 Jul 01 11:44:38 AM PDT 24 Jul 01 11:44:50 AM PDT 24 420596356 ps
T264 /workspace/coverage/default/30.sram_ctrl_alert_test.2404941145 Jul 01 11:43:51 AM PDT 24 Jul 01 11:43:53 AM PDT 24 30946650 ps
T142 /workspace/coverage/default/15.sram_ctrl_executable.2409670089 Jul 01 11:40:28 AM PDT 24 Jul 01 12:04:19 PM PDT 24 7268173059 ps
T265 /workspace/coverage/default/3.sram_ctrl_mem_walk.1578901652 Jul 01 11:37:46 AM PDT 24 Jul 01 11:37:57 AM PDT 24 1103230150 ps
T266 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.4075139201 Jul 01 11:36:58 AM PDT 24 Jul 01 11:39:46 AM PDT 24 1069041509 ps
T267 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.3515176797 Jul 01 11:45:22 AM PDT 24 Jul 01 11:45:25 AM PDT 24 120989710 ps
T75 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.4072121991 Jul 01 11:46:15 AM PDT 24 Jul 01 11:47:11 AM PDT 24 1004327555 ps
T268 /workspace/coverage/default/0.sram_ctrl_max_throughput.1553331466 Jul 01 11:36:53 AM PDT 24 Jul 01 11:36:55 AM PDT 24 37468646 ps
T269 /workspace/coverage/default/28.sram_ctrl_mem_walk.670190523 Jul 01 11:43:22 AM PDT 24 Jul 01 11:43:30 AM PDT 24 2237982431 ps
T270 /workspace/coverage/default/23.sram_ctrl_partial_access.3110582604 Jul 01 11:42:06 AM PDT 24 Jul 01 11:42:27 AM PDT 24 14469593804 ps
T271 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1223788633 Jul 01 11:37:43 AM PDT 24 Jul 01 11:37:45 AM PDT 24 161980373 ps
T272 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2640631132 Jul 01 11:39:51 AM PDT 24 Jul 01 11:39:55 AM PDT 24 375923856 ps
T273 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2159286940 Jul 01 11:45:07 AM PDT 24 Jul 01 11:49:44 AM PDT 24 6627458830 ps
T274 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3768614748 Jul 01 11:47:23 AM PDT 24 Jul 01 11:52:48 AM PDT 24 4325586370 ps
T275 /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.562828342 Jul 01 11:39:44 AM PDT 24 Jul 01 11:47:38 AM PDT 24 18928023684 ps
T276 /workspace/coverage/default/11.sram_ctrl_ram_cfg.145138693 Jul 01 11:39:33 AM PDT 24 Jul 01 11:39:35 AM PDT 24 28295939 ps
T277 /workspace/coverage/default/44.sram_ctrl_ram_cfg.2034949361 Jul 01 11:46:47 AM PDT 24 Jul 01 11:46:48 AM PDT 24 28656822 ps
T278 /workspace/coverage/default/23.sram_ctrl_stress_all.3786795485 Jul 01 11:42:11 AM PDT 24 Jul 01 12:15:28 PM PDT 24 29335848389 ps
T279 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.866941350 Jul 01 11:42:02 AM PDT 24 Jul 01 11:42:07 AM PDT 24 88360321 ps
T280 /workspace/coverage/default/36.sram_ctrl_max_throughput.1365938339 Jul 01 11:45:07 AM PDT 24 Jul 01 11:45:09 AM PDT 24 72344304 ps
T281 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.1662799174 Jul 01 11:43:21 AM PDT 24 Jul 01 11:51:22 AM PDT 24 1597732506 ps
T282 /workspace/coverage/default/42.sram_ctrl_ram_cfg.100110818 Jul 01 11:46:30 AM PDT 24 Jul 01 11:46:32 AM PDT 24 154701895 ps
T283 /workspace/coverage/default/1.sram_ctrl_lc_escalation.520252035 Jul 01 11:37:12 AM PDT 24 Jul 01 11:37:18 AM PDT 24 657508414 ps
T284 /workspace/coverage/default/27.sram_ctrl_lc_escalation.2190939425 Jul 01 11:42:56 AM PDT 24 Jul 01 11:43:01 AM PDT 24 1173615975 ps
T285 /workspace/coverage/default/36.sram_ctrl_stress_all.2173614670 Jul 01 11:45:11 AM PDT 24 Jul 01 12:06:26 PM PDT 24 18810011016 ps
T286 /workspace/coverage/default/41.sram_ctrl_ram_cfg.3261352048 Jul 01 11:46:15 AM PDT 24 Jul 01 11:46:17 AM PDT 24 29625699 ps
T287 /workspace/coverage/default/19.sram_ctrl_ram_cfg.3610317956 Jul 01 11:41:26 AM PDT 24 Jul 01 11:41:27 AM PDT 24 85227816 ps
T288 /workspace/coverage/default/19.sram_ctrl_mem_walk.1499415602 Jul 01 11:41:25 AM PDT 24 Jul 01 11:41:31 AM PDT 24 927320365 ps
T289 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.888129008 Jul 01 11:40:31 AM PDT 24 Jul 01 11:47:41 AM PDT 24 7441894746 ps
T290 /workspace/coverage/default/32.sram_ctrl_multiple_keys.1142155680 Jul 01 11:44:10 AM PDT 24 Jul 01 12:11:41 PM PDT 24 17606816160 ps
T291 /workspace/coverage/default/41.sram_ctrl_regwen.3442445459 Jul 01 11:46:10 AM PDT 24 Jul 01 12:07:27 PM PDT 24 66983321508 ps
T292 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.701132572 Jul 01 11:38:54 AM PDT 24 Jul 01 11:38:57 AM PDT 24 50450391 ps
T293 /workspace/coverage/default/16.sram_ctrl_executable.3687602499 Jul 01 11:40:37 AM PDT 24 Jul 01 11:55:31 AM PDT 24 44710926370 ps
T294 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.2610886094 Jul 01 11:37:03 AM PDT 24 Jul 01 11:37:08 AM PDT 24 763188119 ps
T295 /workspace/coverage/default/45.sram_ctrl_lc_escalation.370500585 Jul 01 11:47:01 AM PDT 24 Jul 01 11:47:11 AM PDT 24 1075302188 ps
T296 /workspace/coverage/default/49.sram_ctrl_executable.1776458485 Jul 01 11:48:00 AM PDT 24 Jul 01 12:13:49 PM PDT 24 74397205306 ps
T297 /workspace/coverage/default/23.sram_ctrl_multiple_keys.279901783 Jul 01 11:42:02 AM PDT 24 Jul 01 11:53:29 AM PDT 24 4223039523 ps
T298 /workspace/coverage/default/5.sram_ctrl_lc_escalation.4152163624 Jul 01 11:38:12 AM PDT 24 Jul 01 11:38:16 AM PDT 24 292727183 ps
T299 /workspace/coverage/default/25.sram_ctrl_bijection.3807861399 Jul 01 11:42:32 AM PDT 24 Jul 01 11:43:32 AM PDT 24 923586098 ps
T300 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.3011244054 Jul 01 11:42:33 AM PDT 24 Jul 01 11:44:44 AM PDT 24 1322444907 ps
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