Unified Coverage Report :: Group :: sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

Group : sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_sram_ctrl_env_0.1/sram_ctrl_env_cov.sv

---

Summary for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	0	7	100.00
Crosses	10	0	10	100.00

Variables for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
subword_granularity_cp	5	0	5	100.00	100	1	1	0
subword_we_cp	2	0	2	100.00	100	1	1	2

Crosses for Group sram_ctrl_env_pkg::sram_ctrl_env_cov#(10)::subword_access_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
subword_access	10	0	10	100.00	100	1	1	0

Summary for Variable subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	5	0	5	100.00

User Defined Bins for subword_granularity_cp

Excluded/Illegal bins

NAME	COUNT	STATUS
ill_access	0	Illegal

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
word_access	44769222	1			T1	45056		T2	6142		T3	256035
triple_byte_access	2537498	1			T3	5042		T4	138		T5	109
halfword_access	3805800	1			T3	7747		T4	199		T5	171
byte_access	5081140	1			T3	10278		T4	258		T5	213
zero_access	1279409	1			T3	2586		T4	59		T5	54

---

Summary for Variable subword_we_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for subword_we_cp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

28687202

1

T1

22528

T2

2048

T3

140795

auto[1]

28785867

1

T1

22528

T2

4094

T3

140893

---

Summary for Cross subword_access

Samples crossed: subword_we_cp subword_granularity_cp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	10	0	10	100.00

Automatically Generated Cross Bins for subword_access

Bins

subword_we_cp	subword_granularity_cp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
auto[0]	word_access	22336507	1			T1	22528		T2	2048		T3	127994
auto[0]	triple_byte_access	1266691	1			T3	2530		T4	68		T5	46
auto[0]	halfword_access	1900949	1			T3	3866		T4	106		T5	84
auto[0]	byte_access	2539907	1			T3	5132		T4	129		T5	105
auto[0]	zero_access	643148	1			T3	1273		T4	31		T5	29
auto[1]	word_access	22432715	1			T1	22528		T2	4094		T3	128041
auto[1]	triple_byte_access	1270807	1			T3	2512		T4	70		T5	63
auto[1]	halfword_access	1904851	1			T3	3881		T4	93		T5	87
auto[1]	byte_access	2541233	1			T3	5146		T4	129		T5	108
auto[1]	zero_access	636261	1			T3	1313		T4	28		T5	25