Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1031
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
76.41 76.41 93.05 93.05 76.30 76.30 88.35 88.35 33.33 33.33 85.02 85.02 93.51 93.51 65.27 65.27 /workspace/coverage/default/2.sram_ctrl_stress_all.4139333775
94.04 17.64 98.73 5.68 87.68 11.37 95.56 7.21 100.00 66.67 94.44 9.42 95.43 1.92 86.47 21.21 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.703098897
95.00 0.95 98.90 0.17 88.51 0.83 95.77 0.21 100.00 0.00 95.17 0.72 95.43 0.00 91.22 4.75 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1143245415
95.71 0.71 99.07 0.17 90.28 1.78 96.53 0.76 100.00 0.00 95.89 0.72 96.02 0.59 92.14 0.91 /workspace/coverage/default/3.sram_ctrl_sec_cm.3685539573
96.17 0.47 99.07 0.00 90.28 0.00 98.47 1.94 100.00 0.00 96.14 0.24 96.02 0.00 93.24 1.10 /workspace/coverage/default/32.sram_ctrl_stress_all.317190932
96.40 0.23 99.07 0.00 90.28 0.00 98.47 0.00 100.00 0.00 96.14 0.00 96.17 0.15 94.70 1.46 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3150178482
96.59 0.18 99.07 0.00 90.40 0.12 98.72 0.24 100.00 0.00 96.14 0.00 96.90 0.74 94.88 0.18 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2881429582
96.77 0.18 99.07 0.00 90.40 0.00 98.79 0.07 100.00 0.00 96.14 0.00 98.08 1.18 94.88 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1597192174
96.92 0.15 99.07 0.00 90.40 0.00 98.79 0.00 100.00 0.00 96.14 0.00 98.97 0.88 95.06 0.18 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.90210376
97.05 0.13 99.15 0.08 90.40 0.00 99.62 0.83 100.00 0.00 96.14 0.00 98.97 0.00 95.06 0.00 /workspace/coverage/default/10.sram_ctrl_ram_cfg.4097810620
97.15 0.10 99.15 0.00 90.40 0.00 99.62 0.00 100.00 0.00 96.14 0.00 98.97 0.00 95.80 0.73 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2108663091
97.24 0.09 99.15 0.00 90.64 0.24 99.62 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.16 0.37 /workspace/coverage/default/36.sram_ctrl_stress_all.1624204028
97.32 0.08 99.15 0.00 90.64 0.00 99.62 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.71 0.55 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3608583822
97.38 0.07 99.15 0.00 91.00 0.36 99.72 0.10 100.00 0.00 96.14 0.00 98.97 0.00 96.71 0.00 /workspace/coverage/default/14.sram_ctrl_alert_test.1270690716
97.44 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.07 0.37 /workspace/coverage/default/32.sram_ctrl_executable.1593587765
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3308473938
97.49 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3091191304
97.51 0.02 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.4038463021

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3304776266
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3487178573
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.969424621
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1625323485
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1610926547
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2643719927
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3829392562
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.390102330
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3453076155
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.4128834495
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2742894070
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1723383674
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.4218031092
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.8983082
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3244222866
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2721047843
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1048285532
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.418851400
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2545457209
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.4030347414
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.271391788
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2787094272
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3460536919
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1339645491
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.165133705
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2471456821
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3424920843
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2905114784
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.510223596
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2272973883
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1711367469
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.514541367
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1916384353
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1040041248
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2436219697
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1560000218
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2079368854
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2876048225
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3700052680
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.2734716620
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2247140388
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3022979963
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3825219793
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3620060959
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1868201495
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3978046460
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3618354022
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1565433734
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3498911289
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.598446107
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.844960715
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1329820874
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2227111699
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.107750827
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.759734104
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.309988079
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2280971704
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.190323991
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3221189699
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2592560115
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.363951642
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1014240966
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4227474194
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3613098580
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2275232944
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3443011850
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3771517553
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1458760590
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3119469305
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3474106261
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.241129053
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3632948501
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.67365643
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1075631530
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1927807007
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3463172458
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2784393682
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.4108598568
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3143929558
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.4058792211
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.233849958
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3864335529
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.230886192
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.80506993
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2452687146
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3677691290
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1943014367
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.603019102
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2007863629
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.4175706802
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3802912917
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2392335614
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.28862283
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2481027048
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.29074670
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.785348296
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.142962089
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1870133683
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2191297342
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2871043947
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1190226269
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3355928063
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2612665527
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.125737121
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1267726095
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.314099138
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.4096197644
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4168905450
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1496657369
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2733972615
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1307205913
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1254428361
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1841736704
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2144111558
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.447317776
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3645269050
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1343502679
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1281635912
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.677688521
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3361183707
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3200713504
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.4247049571
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2517690422
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3224130828
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3255944450
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2358742267
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.307584600
/workspace/coverage/default/0.sram_ctrl_alert_test.3688024722
/workspace/coverage/default/0.sram_ctrl_bijection.3153373326
/workspace/coverage/default/0.sram_ctrl_executable.3636682225
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3413547290
/workspace/coverage/default/0.sram_ctrl_max_throughput.1649603204
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1229409045
/workspace/coverage/default/0.sram_ctrl_mem_walk.452862985
/workspace/coverage/default/0.sram_ctrl_multiple_keys.4089553287
/workspace/coverage/default/0.sram_ctrl_partial_access.336449510
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.81161014
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1374009434
/workspace/coverage/default/0.sram_ctrl_regwen.2368525368
/workspace/coverage/default/0.sram_ctrl_sec_cm.2687048603
/workspace/coverage/default/0.sram_ctrl_smoke.3235734697
/workspace/coverage/default/0.sram_ctrl_stress_all.2509500865
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.1591078325
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1524248049
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4090068026
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2957741656
/workspace/coverage/default/1.sram_ctrl_alert_test.1440170576
/workspace/coverage/default/1.sram_ctrl_bijection.3240430510
/workspace/coverage/default/1.sram_ctrl_executable.1008410986
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3542227718
/workspace/coverage/default/1.sram_ctrl_max_throughput.3733612025
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2821705195
/workspace/coverage/default/1.sram_ctrl_mem_walk.3743647889
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3518011333
/workspace/coverage/default/1.sram_ctrl_partial_access.700496792
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.4231583217
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2989313273
/workspace/coverage/default/1.sram_ctrl_regwen.2619267460
/workspace/coverage/default/1.sram_ctrl_sec_cm.941538464
/workspace/coverage/default/1.sram_ctrl_smoke.326877717
/workspace/coverage/default/1.sram_ctrl_stress_all.1381146936
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2326684426
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2880761873
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.4279150436
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1816360476
/workspace/coverage/default/10.sram_ctrl_alert_test.3701615787
/workspace/coverage/default/10.sram_ctrl_bijection.1703758462
/workspace/coverage/default/10.sram_ctrl_executable.4173232297
/workspace/coverage/default/10.sram_ctrl_lc_escalation.186526526
/workspace/coverage/default/10.sram_ctrl_max_throughput.2942875198
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3376685317
/workspace/coverage/default/10.sram_ctrl_mem_walk.2728854970
/workspace/coverage/default/10.sram_ctrl_multiple_keys.927474823
/workspace/coverage/default/10.sram_ctrl_partial_access.2698175767
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2966213253
/workspace/coverage/default/10.sram_ctrl_regwen.2186477145
/workspace/coverage/default/10.sram_ctrl_smoke.4228378811
/workspace/coverage/default/10.sram_ctrl_stress_all.1907023004
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2839466142
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.93011951
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2605686449
/workspace/coverage/default/11.sram_ctrl_alert_test.2227519753
/workspace/coverage/default/11.sram_ctrl_bijection.1678703023
/workspace/coverage/default/11.sram_ctrl_executable.3890752078
/workspace/coverage/default/11.sram_ctrl_lc_escalation.658629645
/workspace/coverage/default/11.sram_ctrl_max_throughput.4134974230
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1987886497
/workspace/coverage/default/11.sram_ctrl_mem_walk.3460512327
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1838300092
/workspace/coverage/default/11.sram_ctrl_partial_access.2096458956
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3539403795
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3560910045
/workspace/coverage/default/11.sram_ctrl_regwen.481007645
/workspace/coverage/default/11.sram_ctrl_smoke.2476655298
/workspace/coverage/default/11.sram_ctrl_stress_all.1962472509
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2714543248
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1869506617
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.957403795
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.4085420029
/workspace/coverage/default/12.sram_ctrl_alert_test.208734948
/workspace/coverage/default/12.sram_ctrl_bijection.1595533958
/workspace/coverage/default/12.sram_ctrl_executable.667379963
/workspace/coverage/default/12.sram_ctrl_lc_escalation.8780861
/workspace/coverage/default/12.sram_ctrl_max_throughput.352044000
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2786903582
/workspace/coverage/default/12.sram_ctrl_mem_walk.3378853756
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2527288804
/workspace/coverage/default/12.sram_ctrl_partial_access.318334309
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1049568895
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2093093013
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/workspace/coverage/default/43.sram_ctrl_mem_partial_access.891444313
/workspace/coverage/default/43.sram_ctrl_mem_walk.3403800489
/workspace/coverage/default/43.sram_ctrl_multiple_keys.111129533
/workspace/coverage/default/43.sram_ctrl_partial_access.2533561933
/workspace/coverage/default/43.sram_ctrl_ram_cfg.726125771
/workspace/coverage/default/43.sram_ctrl_regwen.1601118948
/workspace/coverage/default/43.sram_ctrl_smoke.932148003
/workspace/coverage/default/43.sram_ctrl_stress_all.4011192607
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2995117580
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3515460141
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.281365950
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1522409948
/workspace/coverage/default/44.sram_ctrl_alert_test.2613141522
/workspace/coverage/default/44.sram_ctrl_bijection.1356338573
/workspace/coverage/default/44.sram_ctrl_executable.3500816449
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1179284784
/workspace/coverage/default/44.sram_ctrl_max_throughput.2156251125
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2688404700
/workspace/coverage/default/44.sram_ctrl_mem_walk.3196735276
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3502648910
/workspace/coverage/default/44.sram_ctrl_partial_access.1949861490
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3662932291
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2648077941
/workspace/coverage/default/44.sram_ctrl_regwen.424293111
/workspace/coverage/default/44.sram_ctrl_smoke.3944157579
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3648601273
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.767540424
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.205725412
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1886721144
/workspace/coverage/default/45.sram_ctrl_alert_test.2389169063
/workspace/coverage/default/45.sram_ctrl_bijection.1259510578
/workspace/coverage/default/45.sram_ctrl_executable.626519941
/workspace/coverage/default/45.sram_ctrl_lc_escalation.88689223
/workspace/coverage/default/45.sram_ctrl_max_throughput.3003293241
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.332513203
/workspace/coverage/default/45.sram_ctrl_mem_walk.3652209826
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2779432306
/workspace/coverage/default/45.sram_ctrl_partial_access.455703838
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3095395564
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3439295658
/workspace/coverage/default/45.sram_ctrl_regwen.2588270020
/workspace/coverage/default/45.sram_ctrl_smoke.3034169352
/workspace/coverage/default/45.sram_ctrl_stress_all.495141977
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2006379249
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.791494336
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3567670756
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.748114771
/workspace/coverage/default/46.sram_ctrl_alert_test.3591352038
/workspace/coverage/default/46.sram_ctrl_bijection.152418441
/workspace/coverage/default/46.sram_ctrl_executable.3420393262
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3653601545
/workspace/coverage/default/46.sram_ctrl_max_throughput.314349722
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.826504253
/workspace/coverage/default/46.sram_ctrl_mem_walk.2746391527
/workspace/coverage/default/46.sram_ctrl_multiple_keys.76355469
/workspace/coverage/default/46.sram_ctrl_partial_access.2268433455
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2247342753
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2158392488
/workspace/coverage/default/46.sram_ctrl_regwen.3578050006
/workspace/coverage/default/46.sram_ctrl_smoke.1486883996
/workspace/coverage/default/46.sram_ctrl_stress_all.1823329554
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1990271334
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2155113279
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2992621693
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3422031565
/workspace/coverage/default/47.sram_ctrl_alert_test.2460717706
/workspace/coverage/default/47.sram_ctrl_bijection.2258496615
/workspace/coverage/default/47.sram_ctrl_executable.4207597223
/workspace/coverage/default/47.sram_ctrl_lc_escalation.24743983
/workspace/coverage/default/47.sram_ctrl_max_throughput.4091659918
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1876086540
/workspace/coverage/default/47.sram_ctrl_mem_walk.2239275111
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2453572411
/workspace/coverage/default/47.sram_ctrl_partial_access.788829992
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3800209223
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1399084397
/workspace/coverage/default/47.sram_ctrl_regwen.1763803582
/workspace/coverage/default/47.sram_ctrl_smoke.2703640613
/workspace/coverage/default/47.sram_ctrl_stress_all.3852983724
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2324698775
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3111308920
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2141879976
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.501129243
/workspace/coverage/default/48.sram_ctrl_alert_test.1401124990
/workspace/coverage/default/48.sram_ctrl_bijection.689524054
/workspace/coverage/default/48.sram_ctrl_executable.524252662
/workspace/coverage/default/48.sram_ctrl_lc_escalation.862531290
/workspace/coverage/default/48.sram_ctrl_max_throughput.2154190736
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2580815143
/workspace/coverage/default/48.sram_ctrl_mem_walk.3628187700
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3420516398
/workspace/coverage/default/48.sram_ctrl_partial_access.4240987616
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1045426737
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1594817040
/workspace/coverage/default/48.sram_ctrl_regwen.2625846830
/workspace/coverage/default/48.sram_ctrl_smoke.445149955
/workspace/coverage/default/48.sram_ctrl_stress_all.2475013335
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1245969809
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2077624072
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.849308423
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1643742033
/workspace/coverage/default/49.sram_ctrl_alert_test.3219351144
/workspace/coverage/default/49.sram_ctrl_bijection.144416733
/workspace/coverage/default/49.sram_ctrl_executable.3240138848
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3496574680
/workspace/coverage/default/49.sram_ctrl_max_throughput.2139977831
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2871923169
/workspace/coverage/default/49.sram_ctrl_mem_walk.3573006115
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2420292647
/workspace/coverage/default/49.sram_ctrl_partial_access.61619037
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.70881396
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3403690284
/workspace/coverage/default/49.sram_ctrl_regwen.3529032646
/workspace/coverage/default/49.sram_ctrl_smoke.792449803
/workspace/coverage/default/49.sram_ctrl_stress_all.1360223134
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.419745831
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3905735360
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.558156806
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1244199876
/workspace/coverage/default/5.sram_ctrl_alert_test.2425787627
/workspace/coverage/default/5.sram_ctrl_bijection.4168434227
/workspace/coverage/default/5.sram_ctrl_executable.109268013
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3956510140
/workspace/coverage/default/5.sram_ctrl_max_throughput.1179978604
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1197857863
/workspace/coverage/default/5.sram_ctrl_mem_walk.2125590430
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1242830040
/workspace/coverage/default/5.sram_ctrl_partial_access.520423995
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.58262771
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3033405326
/workspace/coverage/default/5.sram_ctrl_regwen.615965821
/workspace/coverage/default/5.sram_ctrl_smoke.2790975959
/workspace/coverage/default/5.sram_ctrl_stress_all.1994883584
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2532026817
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1748426990
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1235588198
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3505060600
/workspace/coverage/default/6.sram_ctrl_alert_test.1029580349
/workspace/coverage/default/6.sram_ctrl_bijection.1218532018
/workspace/coverage/default/6.sram_ctrl_executable.2467844927
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2279765984
/workspace/coverage/default/6.sram_ctrl_max_throughput.3466699431
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.246834476
/workspace/coverage/default/6.sram_ctrl_mem_walk.1040806034
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3112107372
/workspace/coverage/default/6.sram_ctrl_partial_access.3110461528
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4224424577
/workspace/coverage/default/6.sram_ctrl_ram_cfg.840179332
/workspace/coverage/default/6.sram_ctrl_regwen.2272713741
/workspace/coverage/default/6.sram_ctrl_smoke.3583192633
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2563646319
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.759853299
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.182129000
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1683161566
/workspace/coverage/default/7.sram_ctrl_alert_test.219007588
/workspace/coverage/default/7.sram_ctrl_bijection.393523622
/workspace/coverage/default/7.sram_ctrl_executable.3120750613
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3081552007
/workspace/coverage/default/7.sram_ctrl_max_throughput.2368387405
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1845907782
/workspace/coverage/default/7.sram_ctrl_mem_walk.3028039870
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2536784533
/workspace/coverage/default/7.sram_ctrl_partial_access.199610055
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1032353136
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1424105309
/workspace/coverage/default/7.sram_ctrl_regwen.849944630
/workspace/coverage/default/7.sram_ctrl_smoke.2507515799
/workspace/coverage/default/7.sram_ctrl_stress_all.3041725946
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.952110203
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1515807215
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2023379497
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3678164991
/workspace/coverage/default/8.sram_ctrl_alert_test.2170617151
/workspace/coverage/default/8.sram_ctrl_bijection.43623097
/workspace/coverage/default/8.sram_ctrl_executable.846287360
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3704811668
/workspace/coverage/default/8.sram_ctrl_max_throughput.2765449297
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1942106256
/workspace/coverage/default/8.sram_ctrl_mem_walk.763255766
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2103231261
/workspace/coverage/default/8.sram_ctrl_partial_access.3823445514
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2355212853
/workspace/coverage/default/8.sram_ctrl_ram_cfg.860064426
/workspace/coverage/default/8.sram_ctrl_regwen.776510691
/workspace/coverage/default/8.sram_ctrl_smoke.3185162700
/workspace/coverage/default/8.sram_ctrl_stress_all.3260741216
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1083835127
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.685726213
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1285009870
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3323426741
/workspace/coverage/default/9.sram_ctrl_alert_test.3454111283
/workspace/coverage/default/9.sram_ctrl_bijection.3048161253
/workspace/coverage/default/9.sram_ctrl_executable.4171478251
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2808604630
/workspace/coverage/default/9.sram_ctrl_max_throughput.214755944
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.180961639
/workspace/coverage/default/9.sram_ctrl_mem_walk.1319457055
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1672998377
/workspace/coverage/default/9.sram_ctrl_partial_access.3940768964
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.333524713
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3869848214
/workspace/coverage/default/9.sram_ctrl_regwen.288025335
/workspace/coverage/default/9.sram_ctrl_smoke.3065549874
/workspace/coverage/default/9.sram_ctrl_stress_all.856216857
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.726892691
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3371474353
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3393440958



Total test records in report: 1031
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/33.sram_ctrl_bijection.534144593 Jul 02 08:04:39 AM PDT 24 Jul 02 08:05:59 AM PDT 24 3353891058 ps
T2 /workspace/coverage/default/32.sram_ctrl_mem_walk.2716400299 Jul 02 08:04:33 AM PDT 24 Jul 02 08:04:57 AM PDT 24 3662098603 ps
T3 /workspace/coverage/default/19.sram_ctrl_stress_all.3044584040 Jul 02 08:04:12 AM PDT 24 Jul 02 08:25:48 AM PDT 24 101494229020 ps
T8 /workspace/coverage/default/31.sram_ctrl_ram_cfg.2763834158 Jul 02 08:04:39 AM PDT 24 Jul 02 08:04:49 AM PDT 24 81488484 ps
T4 /workspace/coverage/default/34.sram_ctrl_smoke.328254432 Jul 02 08:04:49 AM PDT 24 Jul 02 08:05:10 AM PDT 24 197969358 ps
T5 /workspace/coverage/default/5.sram_ctrl_smoke.2790975959 Jul 02 08:03:27 AM PDT 24 Jul 02 08:03:48 AM PDT 24 1169718767 ps
T9 /workspace/coverage/default/3.sram_ctrl_ram_cfg.3892107503 Jul 02 08:03:49 AM PDT 24 Jul 02 08:03:53 AM PDT 24 39596110 ps
T10 /workspace/coverage/default/9.sram_ctrl_mem_walk.1319457055 Jul 02 08:03:54 AM PDT 24 Jul 02 08:04:03 AM PDT 24 256080737 ps
T11 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.3193349692 Jul 02 08:04:14 AM PDT 24 Jul 02 08:09:09 AM PDT 24 3049532080 ps
T6 /workspace/coverage/default/2.sram_ctrl_stress_all.4139333775 Jul 02 08:03:23 AM PDT 24 Jul 02 09:26:01 AM PDT 24 257271144022 ps
T24 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2323766103 Jul 02 08:04:18 AM PDT 24 Jul 02 08:05:44 AM PDT 24 126414461 ps
T23 /workspace/coverage/default/46.sram_ctrl_max_throughput.314349722 Jul 02 08:05:31 AM PDT 24 Jul 02 08:06:26 AM PDT 24 407257851 ps
T42 /workspace/coverage/default/48.sram_ctrl_smoke.445149955 Jul 02 08:05:44 AM PDT 24 Jul 02 08:06:02 AM PDT 24 772916950 ps
T43 /workspace/coverage/default/49.sram_ctrl_smoke.792449803 Jul 02 08:05:49 AM PDT 24 Jul 02 08:05:55 AM PDT 24 51644416 ps
T74 /workspace/coverage/default/13.sram_ctrl_max_throughput.4176143390 Jul 02 08:04:07 AM PDT 24 Jul 02 08:05:49 AM PDT 24 141348020 ps
T22 /workspace/coverage/default/36.sram_ctrl_regwen.2393609533 Jul 02 08:04:57 AM PDT 24 Jul 02 08:21:01 AM PDT 24 41413830286 ps
T53 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3515460141 Jul 02 08:05:21 AM PDT 24 Jul 02 08:10:35 AM PDT 24 22586049170 ps
T25 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.873070162 Jul 02 08:05:04 AM PDT 24 Jul 02 08:07:37 AM PDT 24 6039988769 ps
T44 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.3384234053 Jul 02 08:04:06 AM PDT 24 Jul 02 08:09:47 AM PDT 24 4555172924 ps
T7 /workspace/coverage/default/44.sram_ctrl_lc_escalation.1179284784 Jul 02 08:05:24 AM PDT 24 Jul 02 08:05:36 AM PDT 24 2063981142 ps
T26 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1886171996 Jul 02 08:03:54 AM PDT 24 Jul 02 08:04:07 AM PDT 24 3278605895 ps
T12 /workspace/coverage/default/31.sram_ctrl_alert_test.3462686704 Jul 02 08:04:29 AM PDT 24 Jul 02 08:04:43 AM PDT 24 25192790 ps
T27 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.703098897 Jul 02 08:04:06 AM PDT 24 Jul 02 08:04:34 AM PDT 24 754359890 ps
T60 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3111308920 Jul 02 08:05:38 AM PDT 24 Jul 02 08:09:36 AM PDT 24 9663968944 ps
T61 /workspace/coverage/default/17.sram_ctrl_executable.3098352118 Jul 02 08:04:09 AM PDT 24 Jul 02 08:08:27 AM PDT 24 11018027986 ps
T62 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.96451812 Jul 02 08:04:34 AM PDT 24 Jul 02 08:05:53 AM PDT 24 678543205 ps
T45 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.2781589042 Jul 02 08:05:04 AM PDT 24 Jul 02 08:21:40 AM PDT 24 2719009811 ps
T63 /workspace/coverage/default/6.sram_ctrl_smoke.3583192633 Jul 02 08:03:25 AM PDT 24 Jul 02 08:03:56 AM PDT 24 1184637451 ps
T64 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2066166672 Jul 02 08:04:28 AM PDT 24 Jul 02 08:05:00 AM PDT 24 166339942 ps
T41 /workspace/coverage/default/42.sram_ctrl_partial_access.2862454779 Jul 02 08:05:15 AM PDT 24 Jul 02 08:06:00 AM PDT 24 466488727 ps
T136 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.93011951 Jul 02 08:03:48 AM PDT 24 Jul 02 08:03:52 AM PDT 24 219228991 ps
T137 /workspace/coverage/default/6.sram_ctrl_bijection.1218532018 Jul 02 08:03:43 AM PDT 24 Jul 02 08:04:33 AM PDT 24 1805556812 ps
T138 /workspace/coverage/default/5.sram_ctrl_bijection.4168434227 Jul 02 08:03:23 AM PDT 24 Jul 02 08:04:14 AM PDT 24 3415589798 ps
T18 /workspace/coverage/default/32.sram_ctrl_stress_all.317190932 Jul 02 08:04:40 AM PDT 24 Jul 02 09:22:33 AM PDT 24 64004426574 ps
T129 /workspace/coverage/default/42.sram_ctrl_executable.4289188737 Jul 02 08:05:14 AM PDT 24 Jul 02 08:22:44 AM PDT 24 15614518976 ps
T99 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3150178482 Jul 02 08:05:31 AM PDT 24 Jul 02 08:11:39 AM PDT 24 51234639742 ps
T13 /workspace/coverage/default/14.sram_ctrl_alert_test.1270690716 Jul 02 08:03:55 AM PDT 24 Jul 02 08:04:01 AM PDT 24 24759894 ps
T139 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1167752563 Jul 02 08:03:23 AM PDT 24 Jul 02 08:03:57 AM PDT 24 331479690 ps
T29 /workspace/coverage/default/10.sram_ctrl_ram_cfg.4097810620 Jul 02 08:03:53 AM PDT 24 Jul 02 08:03:58 AM PDT 24 28329912 ps
T100 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2839466142 Jul 02 08:03:38 AM PDT 24 Jul 02 08:07:36 AM PDT 24 2422460136 ps
T140 /workspace/coverage/default/38.sram_ctrl_smoke.2950570375 Jul 02 08:04:56 AM PDT 24 Jul 02 08:05:15 AM PDT 24 171606758 ps
T28 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3711080940 Jul 02 08:04:55 AM PDT 24 Jul 02 08:09:17 AM PDT 24 4139401371 ps
T50 /workspace/coverage/default/10.sram_ctrl_mem_walk.2728854970 Jul 02 08:04:01 AM PDT 24 Jul 02 08:04:19 AM PDT 24 1519071873 ps
T14 /workspace/coverage/default/35.sram_ctrl_alert_test.1661448691 Jul 02 08:04:51 AM PDT 24 Jul 02 08:05:01 AM PDT 24 14841827 ps
T101 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.545415368 Jul 02 08:05:02 AM PDT 24 Jul 02 08:08:33 AM PDT 24 46621209177 ps
T141 /workspace/coverage/default/2.sram_ctrl_multiple_keys.3852075222 Jul 02 08:03:24 AM PDT 24 Jul 02 08:21:15 AM PDT 24 35394107029 ps
T132 /workspace/coverage/default/49.sram_ctrl_multiple_keys.2420292647 Jul 02 08:05:51 AM PDT 24 Jul 02 08:26:22 AM PDT 24 18667210530 ps
T71 /workspace/coverage/default/45.sram_ctrl_lc_escalation.88689223 Jul 02 08:05:33 AM PDT 24 Jul 02 08:05:44 AM PDT 24 2229389747 ps
T142 /workspace/coverage/default/47.sram_ctrl_max_throughput.4091659918 Jul 02 08:05:39 AM PDT 24 Jul 02 08:05:43 AM PDT 24 69846488 ps
T51 /workspace/coverage/default/0.sram_ctrl_mem_walk.452862985 Jul 02 08:03:18 AM PDT 24 Jul 02 08:03:43 AM PDT 24 1360494250 ps
T143 /workspace/coverage/default/48.sram_ctrl_ram_cfg.1594817040 Jul 02 08:05:44 AM PDT 24 Jul 02 08:05:47 AM PDT 24 81088190 ps
T144 /workspace/coverage/default/37.sram_ctrl_max_throughput.2886982554 Jul 02 08:04:57 AM PDT 24 Jul 02 08:05:52 AM PDT 24 103961592 ps
T72 /workspace/coverage/default/35.sram_ctrl_regwen.2308513279 Jul 02 08:04:47 AM PDT 24 Jul 02 08:07:57 AM PDT 24 911021243 ps
T145 /workspace/coverage/default/11.sram_ctrl_alert_test.2227519753 Jul 02 08:04:01 AM PDT 24 Jul 02 08:04:13 AM PDT 24 41682959 ps
T20 /workspace/coverage/default/27.sram_ctrl_stress_all.4273500002 Jul 02 08:04:20 AM PDT 24 Jul 02 08:28:43 AM PDT 24 19603282066 ps
T146 /workspace/coverage/default/27.sram_ctrl_smoke.56847774 Jul 02 08:04:18 AM PDT 24 Jul 02 08:06:31 AM PDT 24 273297439 ps
T75 /workspace/coverage/default/25.sram_ctrl_regwen.1435989393 Jul 02 08:04:22 AM PDT 24 Jul 02 08:20:33 AM PDT 24 6171977726 ps
T147 /workspace/coverage/default/29.sram_ctrl_bijection.30418243 Jul 02 08:04:19 AM PDT 24 Jul 02 08:04:54 AM PDT 24 1203461631 ps
T148 /workspace/coverage/default/8.sram_ctrl_alert_test.2170617151 Jul 02 08:03:38 AM PDT 24 Jul 02 08:03:44 AM PDT 24 13076692 ps
T76 /workspace/coverage/default/26.sram_ctrl_regwen.4021225499 Jul 02 08:04:26 AM PDT 24 Jul 02 08:16:46 AM PDT 24 8674874709 ps
T89 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.90210376 Jul 02 08:04:32 AM PDT 24 Jul 02 08:04:49 AM PDT 24 156277102 ps
T102 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.279668662 Jul 02 08:04:15 AM PDT 24 Jul 02 08:10:16 AM PDT 24 7431128125 ps
T134 /workspace/coverage/default/20.sram_ctrl_max_throughput.3444595056 Jul 02 08:04:21 AM PDT 24 Jul 02 08:06:47 AM PDT 24 126681486 ps
T103 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.589377852 Jul 02 08:04:31 AM PDT 24 Jul 02 08:10:40 AM PDT 24 15185130576 ps
T113 /workspace/coverage/default/19.sram_ctrl_lc_escalation.2351949541 Jul 02 08:04:04 AM PDT 24 Jul 02 08:04:23 AM PDT 24 1605317465 ps
T149 /workspace/coverage/default/0.sram_ctrl_alert_test.3688024722 Jul 02 08:03:22 AM PDT 24 Jul 02 08:03:35 AM PDT 24 14681553 ps
T150 /workspace/coverage/default/2.sram_ctrl_ram_cfg.3568085471 Jul 02 08:03:19 AM PDT 24 Jul 02 08:03:36 AM PDT 24 392843807 ps
T151 /workspace/coverage/default/30.sram_ctrl_bijection.3470255799 Jul 02 08:04:28 AM PDT 24 Jul 02 08:05:33 AM PDT 24 797212311 ps
T152 /workspace/coverage/default/13.sram_ctrl_bijection.4031988193 Jul 02 08:04:09 AM PDT 24 Jul 02 08:05:07 AM PDT 24 3347991826 ps
T153 /workspace/coverage/default/42.sram_ctrl_max_throughput.1597951490 Jul 02 08:05:15 AM PDT 24 Jul 02 08:07:31 AM PDT 24 496599301 ps
T154 /workspace/coverage/default/44.sram_ctrl_max_throughput.2156251125 Jul 02 08:05:24 AM PDT 24 Jul 02 08:05:39 AM PDT 24 88448532 ps
T135 /workspace/coverage/default/13.sram_ctrl_executable.3032224860 Jul 02 08:03:48 AM PDT 24 Jul 02 08:23:20 AM PDT 24 4520537351 ps
T155 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3393440958 Jul 02 08:04:00 AM PDT 24 Jul 02 08:04:23 AM PDT 24 166043200 ps
T54 /workspace/coverage/default/3.sram_ctrl_mem_walk.376703788 Jul 02 08:03:33 AM PDT 24 Jul 02 08:03:50 AM PDT 24 730890323 ps
T131 /workspace/coverage/default/26.sram_ctrl_executable.2849326839 Jul 02 08:04:17 AM PDT 24 Jul 02 08:10:42 AM PDT 24 21368271352 ps
T156 /workspace/coverage/default/29.sram_ctrl_alert_test.2782264384 Jul 02 08:04:28 AM PDT 24 Jul 02 08:04:42 AM PDT 24 27522370 ps
T104 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3245908128 Jul 02 08:04:46 AM PDT 24 Jul 02 08:10:50 AM PDT 24 6585424424 ps
T19 /workspace/coverage/default/32.sram_ctrl_regwen.2032562669 Jul 02 08:04:34 AM PDT 24 Jul 02 08:07:16 AM PDT 24 864130012 ps
T157 /workspace/coverage/default/49.sram_ctrl_executable.3240138848 Jul 02 08:05:51 AM PDT 24 Jul 02 08:20:14 AM PDT 24 11149834278 ps
T158 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3112107372 Jul 02 08:03:27 AM PDT 24 Jul 02 08:14:20 AM PDT 24 27268476182 ps
T159 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.2663970830 Jul 02 08:05:13 AM PDT 24 Jul 02 08:09:12 AM PDT 24 44468274709 ps
T21 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1598496680 Jul 02 08:04:39 AM PDT 24 Jul 02 08:04:53 AM PDT 24 1396990572 ps
T133 /workspace/coverage/default/42.sram_ctrl_stress_all.134688693 Jul 02 08:05:20 AM PDT 24 Jul 02 08:19:57 AM PDT 24 36298650718 ps
T160 /workspace/coverage/default/47.sram_ctrl_regwen.1763803582 Jul 02 08:05:43 AM PDT 24 Jul 02 08:22:21 AM PDT 24 28081282970 ps
T161 /workspace/coverage/default/21.sram_ctrl_executable.1703310070 Jul 02 08:04:11 AM PDT 24 Jul 02 08:21:31 AM PDT 24 19248832658 ps
T55 /workspace/coverage/default/24.sram_ctrl_mem_walk.3792805052 Jul 02 08:04:03 AM PDT 24 Jul 02 08:04:25 AM PDT 24 913973294 ps
T162 /workspace/coverage/default/14.sram_ctrl_regwen.2852761475 Jul 02 08:03:58 AM PDT 24 Jul 02 08:08:45 AM PDT 24 9836027502 ps
T163 /workspace/coverage/default/1.sram_ctrl_regwen.2619267460 Jul 02 08:03:27 AM PDT 24 Jul 02 08:33:26 AM PDT 24 28942107903 ps
T164 /workspace/coverage/default/19.sram_ctrl_partial_access.2731816411 Jul 02 08:04:05 AM PDT 24 Jul 02 08:04:35 AM PDT 24 979054079 ps
T165 /workspace/coverage/default/21.sram_ctrl_lc_escalation.2023851400 Jul 02 08:04:17 AM PDT 24 Jul 02 08:04:36 AM PDT 24 452237899 ps
T56 /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.952110203 Jul 02 08:03:36 AM PDT 24 Jul 02 08:07:16 AM PDT 24 2262927768 ps
T57 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.932477460 Jul 02 08:03:58 AM PDT 24 Jul 02 08:06:07 AM PDT 24 1953680914 ps
T166 /workspace/coverage/default/2.sram_ctrl_executable.2903828389 Jul 02 08:03:19 AM PDT 24 Jul 02 08:05:15 AM PDT 24 1412147493 ps
T90 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.3269629978 Jul 02 08:04:49 AM PDT 24 Jul 02 08:05:03 AM PDT 24 134733760 ps
T52 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.684281661 Jul 02 08:05:10 AM PDT 24 Jul 02 08:12:32 AM PDT 24 3945506232 ps
T167 /workspace/coverage/default/7.sram_ctrl_ram_cfg.1424105309 Jul 02 08:03:34 AM PDT 24 Jul 02 08:03:41 AM PDT 24 59210153 ps
T168 /workspace/coverage/default/7.sram_ctrl_alert_test.219007588 Jul 02 08:03:58 AM PDT 24 Jul 02 08:04:07 AM PDT 24 68318008 ps
T15 /workspace/coverage/default/3.sram_ctrl_sec_cm.3685539573 Jul 02 08:03:45 AM PDT 24 Jul 02 08:03:49 AM PDT 24 366084607 ps
T32 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.465940038 Jul 02 08:05:16 AM PDT 24 Jul 02 08:12:36 AM PDT 24 64728291750 ps
T33 /workspace/coverage/default/14.sram_ctrl_mem_walk.4046984387 Jul 02 08:03:48 AM PDT 24 Jul 02 08:03:56 AM PDT 24 948059323 ps
T34 /workspace/coverage/default/32.sram_ctrl_executable.1593587765 Jul 02 08:04:33 AM PDT 24 Jul 02 08:22:00 AM PDT 24 13781293127 ps
T35 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.2431307732 Jul 02 08:04:32 AM PDT 24 Jul 02 08:04:47 AM PDT 24 60515024 ps
T36 /workspace/coverage/default/28.sram_ctrl_multiple_keys.2896495983 Jul 02 08:04:29 AM PDT 24 Jul 02 08:10:39 AM PDT 24 7600303373 ps
T37 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2247342753 Jul 02 08:05:32 AM PDT 24 Jul 02 08:09:35 AM PDT 24 10989960645 ps
T38 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.671133890 Jul 02 08:04:28 AM PDT 24 Jul 02 08:06:16 AM PDT 24 598501880 ps
T39 /workspace/coverage/default/26.sram_ctrl_lc_escalation.2893110498 Jul 02 08:04:25 AM PDT 24 Jul 02 08:04:40 AM PDT 24 199503739 ps
T40 /workspace/coverage/default/25.sram_ctrl_multiple_keys.3443413022 Jul 02 08:04:32 AM PDT 24 Jul 02 08:18:41 AM PDT 24 12036923715 ps
T169 /workspace/coverage/default/11.sram_ctrl_ram_cfg.3560910045 Jul 02 08:03:38 AM PDT 24 Jul 02 08:03:44 AM PDT 24 51831092 ps
T170 /workspace/coverage/default/44.sram_ctrl_mem_walk.3196735276 Jul 02 08:05:24 AM PDT 24 Jul 02 08:05:39 AM PDT 24 1262646250 ps
T171 /workspace/coverage/default/48.sram_ctrl_lc_escalation.862531290 Jul 02 08:05:48 AM PDT 24 Jul 02 08:05:54 AM PDT 24 578257786 ps
T172 /workspace/coverage/default/5.sram_ctrl_max_throughput.1179978604 Jul 02 08:03:25 AM PDT 24 Jul 02 08:05:41 AM PDT 24 1031937368 ps
T173 /workspace/coverage/default/31.sram_ctrl_stress_pipeline.1497508920 Jul 02 08:04:30 AM PDT 24 Jul 02 08:07:59 AM PDT 24 8253834689 ps
T174 /workspace/coverage/default/29.sram_ctrl_mem_walk.2387928670 Jul 02 08:04:26 AM PDT 24 Jul 02 08:04:46 AM PDT 24 237834832 ps
T175 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.333524713 Jul 02 08:03:45 AM PDT 24 Jul 02 08:08:46 AM PDT 24 90588243721 ps
T73 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.726892691 Jul 02 08:03:56 AM PDT 24 Jul 02 08:04:40 AM PDT 24 949022499 ps
T49 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2881429582 Jul 02 08:04:50 AM PDT 24 Jul 02 08:08:49 AM PDT 24 2155544266 ps
T176 /workspace/coverage/default/10.sram_ctrl_alert_test.3701615787 Jul 02 08:04:01 AM PDT 24 Jul 02 08:04:11 AM PDT 24 17990046 ps
T177 /workspace/coverage/default/42.sram_ctrl_alert_test.145782791 Jul 02 08:05:22 AM PDT 24 Jul 02 08:05:26 AM PDT 24 54470696 ps
T91 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.246834476 Jul 02 08:03:38 AM PDT 24 Jul 02 08:03:48 AM PDT 24 292053373 ps
T178 /workspace/coverage/default/1.sram_ctrl_multiple_keys.3518011333 Jul 02 08:03:18 AM PDT 24 Jul 02 08:21:57 AM PDT 24 10312979065 ps
T130 /workspace/coverage/default/17.sram_ctrl_stress_all.2045605716 Jul 02 08:04:09 AM PDT 24 Jul 02 09:16:58 AM PDT 24 82830478099 ps
T179 /workspace/coverage/default/2.sram_ctrl_smoke.1102312872 Jul 02 08:03:17 AM PDT 24 Jul 02 08:03:41 AM PDT 24 179017607 ps
T58 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.1180792829 Jul 02 08:04:29 AM PDT 24 Jul 02 08:04:47 AM PDT 24 533748089 ps
T180 /workspace/coverage/default/21.sram_ctrl_mem_walk.1691611728 Jul 02 08:04:09 AM PDT 24 Jul 02 08:04:26 AM PDT 24 283147781 ps
T47 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2006379249 Jul 02 08:05:30 AM PDT 24 Jul 02 08:06:13 AM PDT 24 1424765599 ps
T181 /workspace/coverage/default/39.sram_ctrl_mem_walk.1739153525 Jul 02 08:05:03 AM PDT 24 Jul 02 08:05:19 AM PDT 24 466549341 ps
T182 /workspace/coverage/default/47.sram_ctrl_smoke.2703640613 Jul 02 08:05:38 AM PDT 24 Jul 02 08:05:44 AM PDT 24 230169900 ps
T59 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.3013335580 Jul 02 08:04:31 AM PDT 24 Jul 02 08:04:55 AM PDT 24 355922362 ps
T46 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.3212840389 Jul 02 08:04:02 AM PDT 24 Jul 02 08:20:56 AM PDT 24 9439104098 ps
T183 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.914249973 Jul 02 08:04:33 AM PDT 24 Jul 02 08:07:58 AM PDT 24 2775261486 ps
T184 /workspace/coverage/default/15.sram_ctrl_bijection.1005925546 Jul 02 08:03:52 AM PDT 24 Jul 02 08:04:21 AM PDT 24 6389911204 ps
T185 /workspace/coverage/default/0.sram_ctrl_stress_all.2509500865 Jul 02 08:03:18 AM PDT 24 Jul 02 09:34:44 AM PDT 24 473359469245 ps
T92 /workspace/coverage/default/40.sram_ctrl_mem_partial_access.822837040 Jul 02 08:05:09 AM PDT 24 Jul 02 08:05:14 AM PDT 24 61338645 ps
T186 /workspace/coverage/default/47.sram_ctrl_bijection.2258496615 Jul 02 08:05:38 AM PDT 24 Jul 02 08:06:06 AM PDT 24 1566775795 ps
T187 /workspace/coverage/default/44.sram_ctrl_multiple_keys.3502648910 Jul 02 08:05:20 AM PDT 24 Jul 02 08:12:03 AM PDT 24 3494840322 ps
T188 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.650499207 Jul 02 08:05:00 AM PDT 24 Jul 02 08:10:04 AM PDT 24 10648117650 ps
T189 /workspace/coverage/default/14.sram_ctrl_multiple_keys.552150306 Jul 02 08:04:05 AM PDT 24 Jul 02 08:22:49 AM PDT 24 3202564431 ps
T190 /workspace/coverage/default/6.sram_ctrl_alert_test.1029580349 Jul 02 08:03:34 AM PDT 24 Jul 02 08:03:41 AM PDT 24 30824058 ps
T191 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.2952387364 Jul 02 08:04:50 AM PDT 24 Jul 02 08:09:30 AM PDT 24 2850692604 ps
T192 /workspace/coverage/default/22.sram_ctrl_executable.3855741745 Jul 02 08:04:21 AM PDT 24 Jul 02 08:04:56 AM PDT 24 383851133 ps
T193 /workspace/coverage/default/24.sram_ctrl_ram_cfg.972433474 Jul 02 08:04:20 AM PDT 24 Jul 02 08:04:34 AM PDT 24 80384823 ps
T194 /workspace/coverage/default/37.sram_ctrl_smoke.996505582 Jul 02 08:05:01 AM PDT 24 Jul 02 08:05:21 AM PDT 24 4717282531 ps
T195 /workspace/coverage/default/23.sram_ctrl_executable.206021888 Jul 02 08:04:13 AM PDT 24 Jul 02 08:10:02 AM PDT 24 4625625204 ps
T196 /workspace/coverage/default/37.sram_ctrl_alert_test.3050462378 Jul 02 08:04:56 AM PDT 24 Jul 02 08:05:05 AM PDT 24 20418527 ps
T197 /workspace/coverage/default/24.sram_ctrl_regwen.142560479 Jul 02 08:04:02 AM PDT 24 Jul 02 08:12:15 AM PDT 24 13990861424 ps
T198 /workspace/coverage/default/18.sram_ctrl_partial_access.340052592 Jul 02 08:03:59 AM PDT 24 Jul 02 08:04:11 AM PDT 24 668261701 ps
T199 /workspace/coverage/default/25.sram_ctrl_partial_access.4019119077 Jul 02 08:04:25 AM PDT 24 Jul 02 08:04:59 AM PDT 24 1069297183 ps
T93 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3678164991 Jul 02 08:03:39 AM PDT 24 Jul 02 08:16:52 AM PDT 24 36279359741 ps
T200 /workspace/coverage/default/46.sram_ctrl_executable.3420393262 Jul 02 08:05:38 AM PDT 24 Jul 02 08:10:04 AM PDT 24 430644814 ps
T201 /workspace/coverage/default/43.sram_ctrl_regwen.1601118948 Jul 02 08:05:22 AM PDT 24 Jul 02 08:11:35 AM PDT 24 1697573098 ps
T202 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1045426737 Jul 02 08:05:44 AM PDT 24 Jul 02 08:12:48 AM PDT 24 68873589577 ps
T203 /workspace/coverage/default/34.sram_ctrl_max_throughput.733309721 Jul 02 08:04:40 AM PDT 24 Jul 02 08:05:04 AM PDT 24 142295565 ps
T114 /workspace/coverage/default/36.sram_ctrl_stress_all.1624204028 Jul 02 08:04:50 AM PDT 24 Jul 02 08:55:41 AM PDT 24 160453156464 ps
T204 /workspace/coverage/default/23.sram_ctrl_bijection.567776250 Jul 02 08:04:10 AM PDT 24 Jul 02 08:05:04 AM PDT 24 3343241680 ps
T205 /workspace/coverage/default/43.sram_ctrl_bijection.3252398593 Jul 02 08:05:21 AM PDT 24 Jul 02 08:06:17 AM PDT 24 2406535887 ps
T206 /workspace/coverage/default/30.sram_ctrl_stress_all.554620192 Jul 02 08:04:45 AM PDT 24 Jul 02 08:18:51 AM PDT 24 22903418067 ps
T207 /workspace/coverage/default/48.sram_ctrl_max_throughput.2154190736 Jul 02 08:05:43 AM PDT 24 Jul 02 08:05:48 AM PDT 24 178230957 ps
T107 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3879155558 Jul 02 08:03:34 AM PDT 24 Jul 02 08:06:03 AM PDT 24 6413116414 ps
T208 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.2885426493 Jul 02 08:04:05 AM PDT 24 Jul 02 08:07:01 AM PDT 24 3648462065 ps
T209 /workspace/coverage/default/22.sram_ctrl_ram_cfg.3237023987 Jul 02 08:04:15 AM PDT 24 Jul 02 08:04:29 AM PDT 24 62507647 ps
T210 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.332513203 Jul 02 08:05:34 AM PDT 24 Jul 02 08:05:40 AM PDT 24 47312885 ps
T211 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.334540047 Jul 02 08:04:03 AM PDT 24 Jul 02 08:07:08 AM PDT 24 13198294644 ps
T212 /workspace/coverage/default/12.sram_ctrl_bijection.1595533958 Jul 02 08:03:53 AM PDT 24 Jul 02 08:05:16 AM PDT 24 13878645427 ps
T213 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.87423281 Jul 02 08:03:19 AM PDT 24 Jul 02 08:07:34 AM PDT 24 7195727758 ps
T214 /workspace/coverage/default/45.sram_ctrl_regwen.2588270020 Jul 02 08:05:34 AM PDT 24 Jul 02 08:19:21 AM PDT 24 8733427555 ps
T215 /workspace/coverage/default/1.sram_ctrl_executable.1008410986 Jul 02 08:03:27 AM PDT 24 Jul 02 08:07:39 AM PDT 24 1325426922 ps
T216 /workspace/coverage/default/3.sram_ctrl_regwen.957957659 Jul 02 08:03:37 AM PDT 24 Jul 02 08:06:52 AM PDT 24 4537455067 ps
T217 /workspace/coverage/default/32.sram_ctrl_lc_escalation.607536319 Jul 02 08:04:34 AM PDT 24 Jul 02 08:04:53 AM PDT 24 2462375062 ps
T218 /workspace/coverage/default/7.sram_ctrl_bijection.393523622 Jul 02 08:03:32 AM PDT 24 Jul 02 08:04:31 AM PDT 24 911723380 ps
T219 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1083835127 Jul 02 08:03:37 AM PDT 24 Jul 02 08:16:40 AM PDT 24 2660500938 ps
T220 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1793953099 Jul 02 08:05:09 AM PDT 24 Jul 02 08:05:58 AM PDT 24 681568949 ps
T221 /workspace/coverage/default/35.sram_ctrl_multiple_keys.1170244554 Jul 02 08:04:46 AM PDT 24 Jul 02 08:18:24 AM PDT 24 7119265353 ps
T222 /workspace/coverage/default/16.sram_ctrl_smoke.2882275209 Jul 02 08:04:06 AM PDT 24 Jul 02 08:04:27 AM PDT 24 150424379 ps
T223 /workspace/coverage/default/20.sram_ctrl_partial_access.4112179165 Jul 02 08:04:21 AM PDT 24 Jul 02 08:05:23 AM PDT 24 2562912981 ps
T224 /workspace/coverage/default/18.sram_ctrl_multiple_keys.1331389885 Jul 02 08:04:11 AM PDT 24 Jul 02 08:13:20 AM PDT 24 6720973395 ps
T225 /workspace/coverage/default/48.sram_ctrl_mem_walk.3628187700 Jul 02 08:05:49 AM PDT 24 Jul 02 08:06:03 AM PDT 24 182695109 ps
T226 /workspace/coverage/default/43.sram_ctrl_multiple_keys.111129533 Jul 02 08:05:20 AM PDT 24 Jul 02 08:11:58 AM PDT 24 28830815293 ps
T227 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.759853299 Jul 02 08:03:30 AM PDT 24 Jul 02 08:07:26 AM PDT 24 7165614765 ps
T228 /workspace/coverage/default/48.sram_ctrl_multiple_keys.3420516398 Jul 02 08:05:44 AM PDT 24 Jul 02 08:26:41 AM PDT 24 12565562927 ps
T229 /workspace/coverage/default/20.sram_ctrl_mem_walk.3273004941 Jul 02 08:04:13 AM PDT 24 Jul 02 08:04:32 AM PDT 24 551177857 ps
T230 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1869506617 Jul 02 08:04:04 AM PDT 24 Jul 02 08:08:41 AM PDT 24 5446350794 ps
T231 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.3781314946 Jul 02 08:03:24 AM PDT 24 Jul 02 08:05:27 AM PDT 24 5913390222 ps
T232 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2957741656 Jul 02 08:03:18 AM PDT 24 Jul 02 08:04:38 AM PDT 24 1107096000 ps
T233 /workspace/coverage/default/41.sram_ctrl_regwen.1364295083 Jul 02 08:05:13 AM PDT 24 Jul 02 08:10:46 AM PDT 24 1933597655 ps
T234 /workspace/coverage/default/31.sram_ctrl_smoke.2770208682 Jul 02 08:04:35 AM PDT 24 Jul 02 08:05:00 AM PDT 24 913112977 ps
T235 /workspace/coverage/default/26.sram_ctrl_alert_test.2873230615 Jul 02 08:04:21 AM PDT 24 Jul 02 08:04:35 AM PDT 24 14715043 ps
T236 /workspace/coverage/default/14.sram_ctrl_bijection.2963578223 Jul 02 08:03:54 AM PDT 24 Jul 02 08:04:25 AM PDT 24 3509566573 ps
T237 /workspace/coverage/default/6.sram_ctrl_mem_walk.1040806034 Jul 02 08:03:38 AM PDT 24 Jul 02 08:03:49 AM PDT 24 2510124072 ps
T238 /workspace/coverage/default/47.sram_ctrl_multiple_keys.2453572411 Jul 02 08:05:39 AM PDT 24 Jul 02 08:40:59 AM PDT 24 65034795261 ps
T239 /workspace/coverage/default/0.sram_ctrl_regwen.2368525368 Jul 02 08:03:19 AM PDT 24 Jul 02 08:33:47 AM PDT 24 52230863758 ps
T240 /workspace/coverage/default/16.sram_ctrl_stress_all.3801698571 Jul 02 08:04:02 AM PDT 24 Jul 02 08:36:10 AM PDT 24 55867363852 ps
T241 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.3862634753 Jul 02 08:04:16 AM PDT 24 Jul 02 08:07:59 AM PDT 24 10164409615 ps
T242 /workspace/coverage/default/35.sram_ctrl_bijection.48599185 Jul 02 08:04:46 AM PDT 24 Jul 02 08:05:53 AM PDT 24 1658611348 ps
T243 /workspace/coverage/default/26.sram_ctrl_smoke.658069258 Jul 02 08:04:25 AM PDT 24 Jul 02 08:04:45 AM PDT 24 614252311 ps
T244 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.849308423 Jul 02 08:05:44 AM PDT 24 Jul 02 08:06:17 AM PDT 24 107699652 ps
T245 /workspace/coverage/default/28.sram_ctrl_smoke.2301451512 Jul 02 08:04:27 AM PDT 24 Jul 02 08:04:52 AM PDT 24 69742122 ps
T246 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3800209223 Jul 02 08:05:40 AM PDT 24 Jul 02 08:08:44 AM PDT 24 7482097539 ps
T247 /workspace/coverage/default/30.sram_ctrl_max_throughput.3740641240 Jul 02 08:04:17 AM PDT 24 Jul 02 08:05:35 AM PDT 24 128948515 ps
T248 /workspace/coverage/default/35.sram_ctrl_access_during_key_req.2166657472 Jul 02 08:04:46 AM PDT 24 Jul 02 08:20:01 AM PDT 24 3983489598 ps
T249 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3662932291 Jul 02 08:05:26 AM PDT 24 Jul 02 08:12:25 AM PDT 24 72639493198 ps
T250 /workspace/coverage/default/13.sram_ctrl_mem_walk.2838839195 Jul 02 08:04:02 AM PDT 24 Jul 02 08:04:19 AM PDT 24 346268969 ps
T251 /workspace/coverage/default/3.sram_ctrl_alert_test.1737861062 Jul 02 08:03:37 AM PDT 24 Jul 02 08:03:43 AM PDT 24 10076493 ps
T252 /workspace/coverage/default/23.sram_ctrl_partial_access.2175630194 Jul 02 08:04:02 AM PDT 24 Jul 02 08:04:25 AM PDT 24 990107234 ps
T253 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.1197857863 Jul 02 08:03:32 AM PDT 24 Jul 02 08:03:43 AM PDT 24 107467785 ps
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T255 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.157006884 Jul 02 08:04:10 AM PDT 24 Jul 02 08:04:24 AM PDT 24 60563093 ps
T256 /workspace/coverage/default/5.sram_ctrl_multiple_keys.1242830040 Jul 02 08:03:29 AM PDT 24 Jul 02 08:19:47 AM PDT 24 56222468147 ps
T257 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.4224424577 Jul 02 08:03:37 AM PDT 24 Jul 02 08:07:33 AM PDT 24 13092193904 ps
T258 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.36972229 Jul 02 08:04:49 AM PDT 24 Jul 02 08:09:31 AM PDT 24 16188003160 ps
T259 /workspace/coverage/default/17.sram_ctrl_regwen.2026517419 Jul 02 08:04:08 AM PDT 24 Jul 02 08:18:36 AM PDT 24 7366009837 ps
T260 /workspace/coverage/default/30.sram_ctrl_ram_cfg.162927924 Jul 02 08:04:33 AM PDT 24 Jul 02 08:04:45 AM PDT 24 111355535 ps
T261 /workspace/coverage/default/22.sram_ctrl_stress_all.1811737065 Jul 02 08:04:16 AM PDT 24 Jul 02 08:12:42 AM PDT 24 75640192081 ps
T262 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.2062272979 Jul 02 08:04:22 AM PDT 24 Jul 02 08:12:51 AM PDT 24 31880644660 ps
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T263 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.1072672178 Jul 02 08:05:08 AM PDT 24 Jul 02 08:14:22 AM PDT 24 329994671289 ps
T264 /workspace/coverage/default/25.sram_ctrl_stress_all.4153121763 Jul 02 08:04:19 AM PDT 24 Jul 02 09:11:19 AM PDT 24 56063889767 ps
T265 /workspace/coverage/default/33.sram_ctrl_partial_access.2193476927 Jul 02 08:04:43 AM PDT 24 Jul 02 08:05:18 AM PDT 24 337057674 ps
T266 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2418945128 Jul 02 08:05:32 AM PDT 24 Jul 02 08:17:33 AM PDT 24 17105762278 ps
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T268 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2924094536 Jul 02 08:05:15 AM PDT 24 Jul 02 08:05:19 AM PDT 24 33718065 ps
T269 /workspace/coverage/default/5.sram_ctrl_ram_cfg.3033405326 Jul 02 08:03:22 AM PDT 24 Jul 02 08:03:35 AM PDT 24 45119950 ps
T270 /workspace/coverage/default/3.sram_ctrl_stress_all.1027695975 Jul 02 08:03:28 AM PDT 24 Jul 02 08:54:03 AM PDT 24 18880065165 ps
T271 /workspace/coverage/default/39.sram_ctrl_max_throughput.640703095 Jul 02 08:05:02 AM PDT 24 Jul 02 08:07:50 AM PDT 24 139818333 ps
T272 /workspace/coverage/default/31.sram_ctrl_bijection.1440231133 Jul 02 08:04:39 AM PDT 24 Jul 02 08:05:29 AM PDT 24 2100923963 ps
T273 /workspace/coverage/default/21.sram_ctrl_multiple_keys.3790412332 Jul 02 08:04:06 AM PDT 24 Jul 02 08:14:40 AM PDT 24 85165111937 ps
T274 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.315990611 Jul 02 08:04:29 AM PDT 24 Jul 02 08:10:46 AM PDT 24 7639184613 ps
T275 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3336881037 Jul 02 08:04:11 AM PDT 24 Jul 02 08:09:03 AM PDT 24 14629681865 ps
T276 /workspace/coverage/default/22.sram_ctrl_bijection.4262767254 Jul 02 08:04:06 AM PDT 24 Jul 02 08:05:12 AM PDT 24 3427784871 ps
T277 /workspace/coverage/default/36.sram_ctrl_multiple_keys.1139367411 Jul 02 08:04:53 AM PDT 24 Jul 02 08:19:18 AM PDT 24 2207881192 ps
T278 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1915017752 Jul 02 08:03:19 AM PDT 24 Jul 02 08:08:55 AM PDT 24 3594310312 ps
T115 /workspace/coverage/default/15.sram_ctrl_lc_escalation.613111751 Jul 02 08:03:58 AM PDT 24 Jul 02 08:04:06 AM PDT 24 73170083 ps
T279 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2808246461 Jul 02 08:04:11 AM PDT 24 Jul 02 08:04:26 AM PDT 24 45470889 ps
T280 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1514069979 Jul 02 08:05:02 AM PDT 24 Jul 02 08:34:30 AM PDT 24 20994785029 ps
T48 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1755898526 Jul 02 08:04:19 AM PDT 24 Jul 02 08:05:10 AM PDT 24 4830721371 ps
T281 /workspace/coverage/default/20.sram_ctrl_multiple_keys.2969605050 Jul 02 08:04:10 AM PDT 24 Jul 02 08:06:36 AM PDT 24 353755934 ps
T282 /workspace/coverage/default/25.sram_ctrl_mem_walk.2133586123 Jul 02 08:04:15 AM PDT 24 Jul 02 08:04:31 AM PDT 24 279627560 ps
T283 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.180961639 Jul 02 08:03:59 AM PDT 24 Jul 02 08:04:11 AM PDT 24 221313525 ps
T284 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.2900125898 Jul 02 08:03:58 AM PDT 24 Jul 02 08:04:08 AM PDT 24 98544814 ps
T285 /workspace/coverage/default/45.sram_ctrl_executable.626519941 Jul 02 08:05:32 AM PDT 24 Jul 02 08:19:46 AM PDT 24 28685291964 ps
T286 /workspace/coverage/default/8.sram_ctrl_mem_walk.763255766 Jul 02 08:03:43 AM PDT 24 Jul 02 08:03:57 AM PDT 24 2437041138 ps
T287 /workspace/coverage/default/18.sram_ctrl_mem_walk.1311980902 Jul 02 08:04:18 AM PDT 24 Jul 02 08:04:41 AM PDT 24 180513893 ps
T288 /workspace/coverage/default/9.sram_ctrl_alert_test.3454111283 Jul 02 08:03:40 AM PDT 24 Jul 02 08:03:44 AM PDT 24 41658867 ps
T289 /workspace/coverage/default/28.sram_ctrl_bijection.3076553293 Jul 02 08:04:28 AM PDT 24 Jul 02 08:05:47 AM PDT 24 6398441142 ps
T290 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.3489672268 Jul 02 08:04:12 AM PDT 24 Jul 02 08:09:28 AM PDT 24 4264154696 ps
T291 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.3376685317 Jul 02 08:03:39 AM PDT 24 Jul 02 08:03:47 AM PDT 24 217305106 ps
T292 /workspace/coverage/default/29.sram_ctrl_multiple_keys.2484469456 Jul 02 08:04:25 AM PDT 24 Jul 02 08:05:38 AM PDT 24 7150621035 ps
T293 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.3250294602 Jul 02 08:04:06 AM PDT 24 Jul 02 08:11:38 AM PDT 24 12997426500 ps
T294 /workspace/coverage/default/26.sram_ctrl_bijection.1725058217 Jul 02 08:04:24 AM PDT 24 Jul 02 08:05:55 AM PDT 24 4350893069 ps
T295 /workspace/coverage/default/27.sram_ctrl_partial_access.1599817606 Jul 02 08:04:24 AM PDT 24 Jul 02 08:04:46 AM PDT 24 903923370 ps
T296 /workspace/coverage/default/21.sram_ctrl_max_throughput.2406978769 Jul 02 08:04:06 AM PDT 24 Jul 02 08:04:21 AM PDT 24 91113754 ps
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