Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0



Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 14552799 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 61247610 1 T1 216792 T2 51475 T3 3071



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 37794119 1 T1 118845 T2 24023 T3 1024
values[0x0] 17544840 1 T1 57527 T2 14697 T3 1041
values[0x1] 20461450 1 T1 61945 T2 15137 T3 1006



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 7252130 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 68548279 1 T1 227614 T2 52695 T3 3071



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 295015 1 T1 1014 T2 207 T3 32
valid_sources[0x01] 264432 1 T1 1056 T2 194 T3 25
valid_sources[0x02] 290167 1 T1 814 T2 161 T3 4
valid_sources[0x03] 279084 1 T1 872 T2 193 T3 16
valid_sources[0x04] 297363 1 T1 745 T2 238 T3 12
valid_sources[0x05] 362016 1 T1 916 T2 216 T3 6
valid_sources[0x06] 265205 1 T1 908 T2 233 T3 9
valid_sources[0x07] 269114 1 T1 1012 T2 205 T3 18
valid_sources[0x08] 273267 1 T1 883 T2 220 T3 15
valid_sources[0x09] 297265 1 T1 761 T2 197 T3 8
valid_sources[0x0a] 280462 1 T1 813 T2 217 T3 2
valid_sources[0x0b] 292806 1 T1 1013 T2 205 T3 19
valid_sources[0x0c] 270367 1 T1 879 T2 207 T3 3
valid_sources[0x0d] 280569 1 T1 991 T2 230 T3 16
valid_sources[0x0e] 253110 1 T1 928 T2 193 T3 14
valid_sources[0x0f] 344552 1 T1 940 T2 263 T3 7
valid_sources[0x10] 272879 1 T1 1094 T2 180 T3 12
valid_sources[0x11] 271040 1 T1 1035 T2 202 T3 12
valid_sources[0x12] 263504 1 T1 740 T2 225 T3 12
valid_sources[0x13] 320062 1 T1 857 T2 196 T3 17
valid_sources[0x14] 253211 1 T1 962 T2 182 T3 10
valid_sources[0x15] 259501 1 T1 1045 T2 226 T3 11
valid_sources[0x16] 300052 1 T1 872 T2 211 T3 7
valid_sources[0x17] 260765 1 T1 937 T2 224 T3 29
valid_sources[0x18] 266815 1 T1 892 T2 203 T3 9
valid_sources[0x19] 289579 1 T1 846 T2 245 T3 15
valid_sources[0x1a] 347251 1 T1 840 T2 183 T3 4
valid_sources[0x1b] 275167 1 T1 984 T2 196 T3 17
valid_sources[0x1c] 300007 1 T1 974 T2 209 T3 11
valid_sources[0x1d] 318286 1 T1 875 T2 225 T3 19
valid_sources[0x1e] 408590 1 T1 1046 T2 157 T3 18
valid_sources[0x1f] 289174 1 T1 968 T2 187 T3 5
valid_sources[0x20] 285472 1 T1 1072 T2 192 T3 13
valid_sources[0x21] 300135 1 T1 765 T2 206 T3 20
valid_sources[0x22] 279787 1 T1 859 T2 218 T3 15
valid_sources[0x23] 256248 1 T1 964 T2 214 T3 15
valid_sources[0x24] 331528 1 T1 1061 T2 206 T3 6
valid_sources[0x25] 335471 1 T1 983 T2 206 T3 18
valid_sources[0x26] 282726 1 T1 897 T2 184 T3 11
valid_sources[0x27] 292750 1 T1 1127 T2 174 T3 2
valid_sources[0x28] 307929 1 T1 894 T2 216 T3 13
valid_sources[0x29] 287354 1 T1 898 T2 215 T3 14
valid_sources[0x2a] 271894 1 T1 1093 T2 201 T3 14
valid_sources[0x2b] 335559 1 T1 864 T2 243 T3 25
valid_sources[0x2c] 255896 1 T1 802 T2 173 T3 13
valid_sources[0x2d] 328826 1 T1 714 T2 223 T3 5
valid_sources[0x2e] 295369 1 T1 1165 T2 190 T3 9
valid_sources[0x2f] 317958 1 T1 792 T2 202 T3 10
valid_sources[0x30] 300853 1 T1 1030 T2 231 T3 14
valid_sources[0x31] 267714 1 T1 870 T2 207 T3 11
valid_sources[0x32] 277782 1 T1 1019 T2 209 T3 3
valid_sources[0x33] 287558 1 T1 982 T2 243 T3 9
valid_sources[0x34] 295441 1 T1 913 T2 192 T3 9
valid_sources[0x35] 277839 1 T1 931 T2 187 T3 8
valid_sources[0x36] 290853 1 T1 822 T2 238 T3 5
valid_sources[0x37] 307087 1 T1 974 T2 230 T3 8
valid_sources[0x38] 350601 1 T1 1002 T2 206 T3 7
valid_sources[0x39] 282639 1 T1 1048 T2 230 T3 10
valid_sources[0x3a] 288943 1 T1 920 T2 232 T3 6
valid_sources[0x3b] 320867 1 T1 986 T2 245 T3 6
valid_sources[0x3c] 286172 1 T1 874 T2 189 T3 13
valid_sources[0x3d] 295886 1 T1 928 T2 184 T3 8
valid_sources[0x3e] 285078 1 T1 905 T2 180 T3 14
valid_sources[0x3f] 264503 1 T1 870 T2 206 T3 15
valid_sources[0x40] 309237 1 T1 904 T2 226 T3 14
valid_sources[0x41] 320192 1 T1 915 T2 231 T3 10
valid_sources[0x42] 287022 1 T1 967 T2 222 T3 10
valid_sources[0x43] 290595 1 T1 1014 T2 231 T3 13
valid_sources[0x44] 340972 1 T1 885 T2 178 T3 19
valid_sources[0x45] 272046 1 T1 1025 T2 207 T3 23
valid_sources[0x46] 285378 1 T1 835 T2 257 T3 26
valid_sources[0x47] 352141 1 T1 1099 T2 215 T3 14
valid_sources[0x48] 323658 1 T1 928 T2 218 T3 3
valid_sources[0x49] 283691 1 T1 1025 T2 228 T3 6
valid_sources[0x4a] 296875 1 T1 891 T2 226 T3 10
valid_sources[0x4b] 271257 1 T1 874 T2 214 T3 10
valid_sources[0x4c] 290676 1 T1 935 T2 221 T3 5
valid_sources[0x4d] 268450 1 T1 890 T2 214 T3 17
valid_sources[0x4e] 268089 1 T1 1053 T2 240 T3 6
valid_sources[0x4f] 368711 1 T1 972 T2 205 T3 9
valid_sources[0x50] 298741 1 T1 863 T2 240 T3 13
valid_sources[0x51] 273865 1 T1 1039 T2 210 T3 17
valid_sources[0x52] 322109 1 T1 914 T2 178 T3 25
valid_sources[0x53] 368728 1 T1 917 T2 207 T3 11
valid_sources[0x54] 344644 1 T1 1018 T2 245 T3 17
valid_sources[0x55] 332575 1 T1 851 T2 172 T3 16
valid_sources[0x56] 346246 1 T1 1016 T2 178 T3 6
valid_sources[0x57] 335542 1 T1 969 T2 234 T3 4
valid_sources[0x58] 275255 1 T1 1013 T2 225 T3 21
valid_sources[0x59] 319128 1 T1 1061 T2 204 T3 11
valid_sources[0x5a] 271132 1 T1 862 T2 186 T3 7
valid_sources[0x5b] 294273 1 T1 954 T2 235 T3 11
valid_sources[0x5c] 286034 1 T1 950 T2 197 T3 5
valid_sources[0x5d] 262160 1 T1 907 T2 217 T3 12
valid_sources[0x5e] 274317 1 T1 1104 T2 209 T3 27
valid_sources[0x5f] 368037 1 T1 824 T2 208 T3 29
valid_sources[0x60] 338172 1 T1 954 T2 192 T3 12
valid_sources[0x61] 297023 1 T1 960 T2 173 T3 7
valid_sources[0x62] 347791 1 T1 1031 T2 217 T3 5
valid_sources[0x63] 301219 1 T1 859 T2 216 T3 16
valid_sources[0x64] 370652 1 T1 981 T2 156 T3 17
valid_sources[0x65] 265126 1 T1 976 T2 196 T3 14
valid_sources[0x66] 311537 1 T1 1002 T2 191 T3 11
valid_sources[0x67] 282948 1 T1 827 T2 177 T3 7
valid_sources[0x68] 287396 1 T1 951 T2 147 T3 11
valid_sources[0x69] 276474 1 T1 782 T2 220 T3 6
valid_sources[0x6a] 254705 1 T1 925 T2 209 T3 17
valid_sources[0x6b] 292204 1 T1 961 T2 244 T3 10
valid_sources[0x6c] 373355 1 T1 1058 T2 227 T3 10
valid_sources[0x6d] 277024 1 T1 934 T2 201 T3 11
valid_sources[0x6e] 310993 1 T1 897 T2 183 T3 12
valid_sources[0x6f] 297068 1 T1 907 T2 194 T3 23
valid_sources[0x70] 301133 1 T1 1014 T2 195 T3 9
valid_sources[0x71] 285777 1 T1 944 T2 182 T3 19
valid_sources[0x72] 253177 1 T1 904 T2 224 T3 2
valid_sources[0x73] 370080 1 T1 837 T2 169 T3 8
valid_sources[0x74] 255903 1 T1 835 T2 232 T3 15
valid_sources[0x75] 285013 1 T1 1030 T2 228 T3 13
valid_sources[0x76] 284392 1 T1 936 T2 210 T3 6
valid_sources[0x77] 358590 1 T1 969 T2 189 T3 13
valid_sources[0x78] 356933 1 T1 738 T2 213 T3 1
valid_sources[0x79] 296099 1 T1 872 T2 238 T3 18
valid_sources[0x7a] 297082 1 T1 1036 T2 233 T3 11
valid_sources[0x7b] 261121 1 T1 858 T2 179 T3 5
valid_sources[0x7c] 275436 1 T1 958 T2 225 T3 16
valid_sources[0x7d] 285246 1 T1 1068 T2 188 T3 8
valid_sources[0x7e] 287141 1 T1 890 T2 238 T3 3
valid_sources[0x7f] 333180 1 T1 907 T2 228 T3 10
valid_sources[0x80] 269824 1 T1 884 T2 198 T3 7



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 30522074 1 T1 108201 T2 22846 T3 1024
values[0x0] all_enables biggest_size 15360109 1 T1 54241 T2 14365 T3 1041
values[0x1] all_enables biggest_size 15365427 1 T1 54350 T2 14264 T3 1006


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 36636 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 133010 1 T1 7 T2 3492 T3 2



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 49100 1 T2 997 T6 26 T10 531
values[0x0] 58045 1 T1 10 T2 1307 T3 3
values[0x1] 62501 1 T1 9 T2 1514 T3 3



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 27817 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 141829 1 T1 7 T2 3632 T3 2



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 621 1 T2 13 T10 4 T68 2
valid_sources[0x01] 982 1 T2 12 T10 9 T21 1
valid_sources[0x02] 671 1 T2 17 T10 9 T25 5
valid_sources[0x03] 648 1 T2 24 T10 13 T25 7
valid_sources[0x04] 512 1 T2 16 T10 6 T81 1
valid_sources[0x05] 801 1 T2 15 T3 1 T10 6
valid_sources[0x06] 574 1 T2 18 T10 2 T25 3
valid_sources[0x07] 533 1 T2 12 T10 7 T40 1
valid_sources[0x08] 529 1 T2 15 T10 8 T25 11
valid_sources[0x09] 563 1 T2 16 T10 2 T79 1
valid_sources[0x0a] 882 1 T2 20 T10 14 T25 10
valid_sources[0x0b] 659 1 T1 1 T2 11 T10 14
valid_sources[0x0c] 806 1 T2 21 T10 8 T25 26
valid_sources[0x0d] 516 1 T2 21 T10 3 T25 16
valid_sources[0x0e] 713 1 T2 14 T10 8 T23 2
valid_sources[0x0f] 689 1 T2 18 T10 8 T25 6
valid_sources[0x10] 572 1 T2 7 T10 7 T25 16
valid_sources[0x11] 528 1 T2 17 T10 12 T40 6
valid_sources[0x12] 579 1 T2 11 T10 2 T25 4
valid_sources[0x13] 495 1 T1 1 T2 15 T10 6
valid_sources[0x14] 845 1 T2 24 T10 11 T23 1
valid_sources[0x15] 551 1 T2 10 T4 12 T10 4
valid_sources[0x16] 470 1 T2 14 T10 11 T25 18
valid_sources[0x17] 672 1 T2 16 T10 2 T25 9
valid_sources[0x18] 724 1 T2 12 T10 14 T154 1
valid_sources[0x19] 434 1 T2 17 T10 8 T25 2
valid_sources[0x1a] 537 1 T2 8 T10 10 T68 1
valid_sources[0x1b] 936 1 T2 13 T10 25 T25 17
valid_sources[0x1c] 817 1 T2 15 T10 2 T23 1
valid_sources[0x1d] 737 1 T2 20 T10 7 T68 3
valid_sources[0x1e] 751 1 T2 16 T10 18 T48 13
valid_sources[0x1f] 664 1 T2 11 T10 5 T25 15
valid_sources[0x20] 918 1 T2 18 T10 8 T25 9
valid_sources[0x21] 441 1 T2 14 T10 14 T25 14
valid_sources[0x22] 910 1 T1 3 T2 8 T10 21
valid_sources[0x23] 572 1 T1 1 T2 10 T10 1
valid_sources[0x24] 515 1 T2 15 T10 3 T25 18
valid_sources[0x25] 519 1 T2 13 T10 4 T25 10
valid_sources[0x26] 665 1 T2 9 T10 6 T8 53
valid_sources[0x27] 689 1 T2 24 T10 11 T68 2
valid_sources[0x28] 567 1 T2 16 T10 3 T25 3
valid_sources[0x29] 634 1 T2 9 T10 6 T25 1
valid_sources[0x2a] 568 1 T2 7 T10 4 T25 3
valid_sources[0x2b] 507 1 T2 13 T10 2 T25 5
valid_sources[0x2c] 478 1 T2 12 T10 7 T25 12
valid_sources[0x2d] 540 1 T2 12 T10 14 T42 34
valid_sources[0x2e] 679 1 T2 17 T10 5 T7 3
valid_sources[0x2f] 1092 1 T2 13 T10 9 T25 17
valid_sources[0x30] 732 1 T2 12 T10 4 T23 2
valid_sources[0x31] 672 1 T2 14 T3 1 T10 6
valid_sources[0x32] 833 1 T1 2 T2 18 T25 7
valid_sources[0x33] 551 1 T2 12 T10 7 T25 10
valid_sources[0x34] 465 1 T2 22 T10 8 T68 1
valid_sources[0x35] 471 1 T2 16 T10 6 T25 1
valid_sources[0x36] 628 1 T2 19 T10 2 T19 3
valid_sources[0x37] 507 1 T2 17 T10 9 T25 4
valid_sources[0x38] 535 1 T2 16 T10 5 T25 7
valid_sources[0x39] 650 1 T2 12 T10 4 T25 1
valid_sources[0x3a] 444 1 T2 13 T10 2 T25 6
valid_sources[0x3b] 477 1 T2 12 T10 10 T25 6
valid_sources[0x3c] 487 1 T2 8 T10 6 T25 6
valid_sources[0x3d] 1065 1 T2 17 T10 8 T25 11
valid_sources[0x3e] 456 1 T2 24 T10 4 T25 13
valid_sources[0x3f] 500 1 T2 14 T10 11 T7 2
valid_sources[0x40] 718 1 T2 15 T21 1 T56 1
valid_sources[0x41] 636 1 T2 20 T10 9 T13 7
valid_sources[0x42] 535 1 T2 13 T10 16 T23 1
valid_sources[0x43] 602 1 T2 17 T10 10 T25 2
valid_sources[0x44] 566 1 T2 21 T10 16 T25 3
valid_sources[0x45] 604 1 T2 16 T10 6 T11 1
valid_sources[0x46] 811 1 T2 19 T10 4 T25 11
valid_sources[0x47] 677 1 T2 20 T10 14 T25 1
valid_sources[0x48] 1457 1 T2 18 T10 1 T25 21
valid_sources[0x49] 482 1 T2 17 T10 7 T25 6
valid_sources[0x4a] 622 1 T2 10 T10 11 T25 3
valid_sources[0x4b] 447 1 T2 9 T10 11 T68 2
valid_sources[0x4c] 726 1 T2 18 T10 6 T25 18
valid_sources[0x4d] 695 1 T2 10 T10 5 T25 28
valid_sources[0x4e] 526 1 T2 19 T10 17 T23 3
valid_sources[0x4f] 621 1 T2 19 T10 17 T40 9
valid_sources[0x50] 807 1 T2 9 T10 14 T25 1
valid_sources[0x51] 623 1 T2 15 T10 2 T48 10
valid_sources[0x52] 494 1 T2 9 T6 6 T10 18
valid_sources[0x53] 512 1 T2 16 T10 7 T25 1
valid_sources[0x54] 501 1 T2 17 T10 2 T25 16
valid_sources[0x55] 940 1 T1 1 T2 16 T10 8
valid_sources[0x56] 473 1 T2 15 T10 13 T25 3
valid_sources[0x57] 862 1 T2 14 T10 6 T79 1
valid_sources[0x58] 572 1 T2 10 T10 5 T25 10
valid_sources[0x59] 961 1 T2 12 T10 2 T25 15
valid_sources[0x5a] 757 1 T2 15 T10 13 T43 9
valid_sources[0x5b] 456 1 T2 22 T10 16 T25 16
valid_sources[0x5c] 525 1 T2 16 T10 5 T25 1
valid_sources[0x5d] 672 1 T2 9 T10 5 T40 4
valid_sources[0x5e] 791 1 T2 12 T10 7 T25 2
valid_sources[0x5f] 626 1 T2 15 T10 3 T23 3
valid_sources[0x60] 642 1 T2 14 T10 5 T48 18
valid_sources[0x61] 672 1 T2 13 T10 6 T12 8
valid_sources[0x62] 709 1 T1 1 T2 12 T10 3
valid_sources[0x63] 720 1 T2 15 T10 10 T40 3
valid_sources[0x64] 460 1 T2 21 T10 7 T23 1
valid_sources[0x65] 1310 1 T2 6 T10 2 T25 7
valid_sources[0x66] 1027 1 T2 8 T25 6 T48 22
valid_sources[0x67] 551 1 T2 12 T10 5 T19 9
valid_sources[0x68] 760 1 T2 11 T10 11 T25 6
valid_sources[0x69] 572 1 T1 1 T2 15 T10 1
valid_sources[0x6a] 788 1 T2 20 T10 8 T25 43
valid_sources[0x6b] 671 1 T2 18 T10 4 T68 1
valid_sources[0x6c] 725 1 T2 18 T10 8 T25 7
valid_sources[0x6d] 429 1 T1 2 T2 9 T10 4
valid_sources[0x6e] 768 1 T2 13 T10 10 T25 51
valid_sources[0x6f] 652 1 T2 9 T10 1 T23 3
valid_sources[0x70] 748 1 T2 10 T10 1 T25 18
valid_sources[0x71] 871 1 T2 12 T10 7 T25 21
valid_sources[0x72] 518 1 T2 14 T10 11 T7 6
valid_sources[0x73] 567 1 T1 2 T2 20 T10 8
valid_sources[0x74] 847 1 T2 20 T10 5 T25 2
valid_sources[0x75] 699 1 T2 19 T10 11 T25 20
valid_sources[0x76] 624 1 T1 1 T2 15 T10 13
valid_sources[0x77] 587 1 T2 10 T10 4 T25 1
valid_sources[0x78] 485 1 T2 21 T10 3 T25 1
valid_sources[0x79] 446 1 T2 10 T10 7 T21 1
valid_sources[0x7a] 592 1 T2 16 T10 3 T25 1
valid_sources[0x7b] 409 1 T2 13 T10 10 T48 17
valid_sources[0x7c] 564 1 T2 20 T10 7 T25 10
valid_sources[0x7d] 583 1 T2 19 T10 4 T25 12
valid_sources[0x7e] 568 1 T2 16 T10 7 T7 6
valid_sources[0x7f] 784 1 T2 17 T10 2 T25 1
valid_sources[0x80] 678 1 T2 15 T10 7 T25 8



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 36395 1 T2 922 T6 17 T10 504
values[0x0] all_enables biggest_size 49383 1 T1 5 T2 1266 T3 2
values[0x1] all_enables biggest_size 47232 1 T1 2 T2 1304 T4 2

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%