Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1027
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
85.01 85.01 95.59 95.59 82.11 82.11 95.77 95.77 61.90 61.90 86.47 86.47 94.25 94.25 78.98 78.98 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1451424901
89.80 4.79 97.12 1.53 82.11 0.00 95.77 0.00 90.48 28.57 88.89 2.42 95.28 1.03 78.98 0.00 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1465780828
92.86 3.05 98.31 1.19 85.55 3.44 96.12 0.35 100.00 9.52 92.51 3.62 95.43 0.15 82.08 3.11 /workspace/coverage/default/25.sram_ctrl_lc_escalation.2760150642
93.89 1.03 98.56 0.25 87.20 1.66 96.12 0.00 100.00 0.00 93.48 0.97 96.31 0.88 85.56 3.47 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1244110357
94.78 0.89 98.73 0.17 87.80 0.59 96.32 0.21 100.00 0.00 94.20 0.72 96.31 0.00 90.13 4.57 /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3215988106
95.47 0.68 98.73 0.00 88.15 0.36 97.99 1.66 100.00 0.00 94.44 0.24 96.46 0.15 92.50 2.38 /workspace/coverage/default/19.sram_ctrl_executable.1137174088
96.05 0.58 98.90 0.17 89.93 1.78 98.40 0.42 100.00 0.00 95.17 0.72 97.05 0.59 92.87 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.3214383145
96.31 0.27 99.07 0.17 90.05 0.12 98.40 0.00 100.00 0.00 95.65 0.48 97.79 0.74 93.24 0.37 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2341914724
96.52 0.20 99.07 0.00 90.28 0.24 98.40 0.00 100.00 0.00 95.65 0.00 98.97 1.18 93.24 0.00 /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.613012032
96.70 0.19 99.07 0.00 90.64 0.36 98.82 0.42 100.00 0.00 95.65 0.00 98.97 0.00 93.78 0.55 /workspace/coverage/default/0.sram_ctrl_alert_test.1260419745
96.89 0.18 99.07 0.00 90.64 0.00 98.82 0.00 100.00 0.00 95.65 0.00 98.97 0.00 95.06 1.28 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1637713503
97.06 0.17 99.07 0.00 90.76 0.12 98.82 0.00 100.00 0.00 95.65 0.00 98.97 0.00 96.16 1.10 /workspace/coverage/default/34.sram_ctrl_regwen.3495526733
97.19 0.13 99.15 0.08 90.76 0.00 99.65 0.83 100.00 0.00 95.65 0.00 98.97 0.00 96.16 0.00 /workspace/coverage/default/12.sram_ctrl_ram_cfg.3293279312
97.28 0.09 99.15 0.00 90.88 0.12 99.65 0.00 100.00 0.00 96.14 0.48 98.97 0.00 96.16 0.00 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2830448633
97.35 0.07 99.15 0.00 91.00 0.12 99.65 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.53 0.37 /workspace/coverage/default/26.sram_ctrl_stress_all.2881658260
97.40 0.05 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.323178439
97.45 0.05 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.26 0.37 /workspace/coverage/default/1.sram_ctrl_regwen.2735270710
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.07 100.00 0.00 96.14 0.00 99.12 0.15 97.26 0.00 /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3961401055
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2148699284

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1467076169
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.157627802
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3351682020
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2029103266
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3915221628
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3136397552
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.197199063
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3552548745
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2139427350
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.428181754
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3559556355
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2249823861
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1764030821
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3658001920
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.4293038021
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.367748277
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2185765211
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1796963001
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3421532087
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2887328326
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3682814070
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3018627062
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2277916033
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.506809276
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2562606416
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1647348894
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2775618241
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1547869175
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.516241988
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1396931792
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1070080494
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.4017438210
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.411517966
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2408800849
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2958869712
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.314474206
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3153094020
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.4009056353
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.774061905
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4000773242
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3714585629
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.372550891
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3016419965
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1021983058
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1370222466
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.4035798137
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3977095171
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4228508059
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2863896043
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.689776876
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3549185747
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3425913697
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.706240276
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2318768326
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.733009353
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2042967745
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2786176116
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3048428860
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1930515693
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3987605127
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.989034688
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1823519029
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2122292497
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3628683810
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.579819230
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1705395443
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1938555732
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.4082977141
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4022969574
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1637026645
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2881411441
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.794445807
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.184497117
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1120163701
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.912267232
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.664521589
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.4075303249
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1923766245
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3607656490
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1448528131
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2709221510
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2637851313
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2885737622
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3963682512
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.4288354382
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1536536655
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3847359025
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1067214107
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3959232627
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3300203909
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2041503899
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1836157845
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3140705984
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2310505350
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2842584087
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2503201998
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.1675699372
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4011687890
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.4241446763
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1204594956
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.4145005588
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1280663626
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.155561269
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1809454265
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2307204449
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.34406561
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3473805614
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3647481728
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.1990518369
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1589739639
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.245372214
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3836318725
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3965740010
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.403281465
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1218302709
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3132268311
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2767431304
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1469677389
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1401247914
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3678812872
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.585061407
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4009370838
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.416259543
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2533625484
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2591184853
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3622557223
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2219690546
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.134694178
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2512047452
/workspace/coverage/default/0.sram_ctrl_bijection.194783903
/workspace/coverage/default/0.sram_ctrl_executable.3012385383
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2598680772
/workspace/coverage/default/0.sram_ctrl_max_throughput.2520648822
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.944924190
/workspace/coverage/default/0.sram_ctrl_mem_walk.2897675813
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1769754603
/workspace/coverage/default/0.sram_ctrl_partial_access.2391357700
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1267508225
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2656928599
/workspace/coverage/default/0.sram_ctrl_regwen.278185063
/workspace/coverage/default/0.sram_ctrl_smoke.1045307217
/workspace/coverage/default/0.sram_ctrl_stress_all.2741350485
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.335341740
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.400437654
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1976960642
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2224512006
/workspace/coverage/default/1.sram_ctrl_alert_test.2843871980
/workspace/coverage/default/1.sram_ctrl_bijection.1052456121
/workspace/coverage/default/1.sram_ctrl_executable.2922992619
/workspace/coverage/default/1.sram_ctrl_lc_escalation.1052295130
/workspace/coverage/default/1.sram_ctrl_max_throughput.1085886492
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1822780889
/workspace/coverage/default/1.sram_ctrl_mem_walk.1450811562
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1982934687
/workspace/coverage/default/1.sram_ctrl_partial_access.2115734109
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1520021455
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3521544101
/workspace/coverage/default/1.sram_ctrl_sec_cm.3821446460
/workspace/coverage/default/1.sram_ctrl_smoke.820319172
/workspace/coverage/default/1.sram_ctrl_stress_all.3013086311
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3943262253
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1640416273
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.732447848
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1279418901
/workspace/coverage/default/10.sram_ctrl_alert_test.496726851
/workspace/coverage/default/10.sram_ctrl_bijection.569301692
/workspace/coverage/default/10.sram_ctrl_executable.3498154861
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2212612351
/workspace/coverage/default/10.sram_ctrl_max_throughput.2476349545
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.841613063
/workspace/coverage/default/10.sram_ctrl_mem_walk.3460993332
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2728953091
/workspace/coverage/default/10.sram_ctrl_partial_access.2540470218
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1119810136
/workspace/coverage/default/10.sram_ctrl_ram_cfg.927779844
/workspace/coverage/default/10.sram_ctrl_regwen.2819841929
/workspace/coverage/default/10.sram_ctrl_smoke.3461262105
/workspace/coverage/default/10.sram_ctrl_stress_all.3639575251
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3525566162
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.877565513
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2106406895
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3352083521
/workspace/coverage/default/11.sram_ctrl_alert_test.570323342
/workspace/coverage/default/11.sram_ctrl_bijection.3898334607
/workspace/coverage/default/11.sram_ctrl_executable.3210947084
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3764553274
/workspace/coverage/default/11.sram_ctrl_max_throughput.400681272
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3510237152
/workspace/coverage/default/11.sram_ctrl_mem_walk.106930890
/workspace/coverage/default/11.sram_ctrl_multiple_keys.65947901
/workspace/coverage/default/11.sram_ctrl_partial_access.843872750
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2175957923
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3804046591
/workspace/coverage/default/11.sram_ctrl_regwen.4154623904
/workspace/coverage/default/11.sram_ctrl_smoke.2367697757
/workspace/coverage/default/11.sram_ctrl_stress_all.3171475164
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.200568552
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3653489857
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3709287263
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1243911475
/workspace/coverage/default/12.sram_ctrl_alert_test.1211624131
/workspace/coverage/default/12.sram_ctrl_bijection.977826183
/workspace/coverage/default/12.sram_ctrl_executable.3498520233
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1542927624
/workspace/coverage/default/12.sram_ctrl_max_throughput.3647155273
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.874645234
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/workspace/coverage/default/43.sram_ctrl_multiple_keys.2643792713
/workspace/coverage/default/43.sram_ctrl_partial_access.2014709734
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.4186282860
/workspace/coverage/default/43.sram_ctrl_ram_cfg.359797023
/workspace/coverage/default/43.sram_ctrl_regwen.976954848
/workspace/coverage/default/43.sram_ctrl_smoke.819177585
/workspace/coverage/default/43.sram_ctrl_stress_all.1988820165
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1884793666
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1525954382
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.894428317
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3858828569
/workspace/coverage/default/44.sram_ctrl_alert_test.4221356962
/workspace/coverage/default/44.sram_ctrl_bijection.2549030501
/workspace/coverage/default/44.sram_ctrl_executable.1331324335
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2104582277
/workspace/coverage/default/44.sram_ctrl_max_throughput.3649016781
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1928275048
/workspace/coverage/default/44.sram_ctrl_mem_walk.3346914698
/workspace/coverage/default/44.sram_ctrl_multiple_keys.4256004588
/workspace/coverage/default/44.sram_ctrl_partial_access.2071473122
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1375346384
/workspace/coverage/default/44.sram_ctrl_ram_cfg.859680859
/workspace/coverage/default/44.sram_ctrl_regwen.3621944625
/workspace/coverage/default/44.sram_ctrl_smoke.4199440211
/workspace/coverage/default/44.sram_ctrl_stress_all.1271147480
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2722386346
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2039551678
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4140376122
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.4091327812
/workspace/coverage/default/45.sram_ctrl_alert_test.4026907438
/workspace/coverage/default/45.sram_ctrl_bijection.2995804841
/workspace/coverage/default/45.sram_ctrl_executable.7769898
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1278110017
/workspace/coverage/default/45.sram_ctrl_max_throughput.749008676
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.4223516014
/workspace/coverage/default/45.sram_ctrl_mem_walk.1448230862
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4155027861
/workspace/coverage/default/45.sram_ctrl_partial_access.3261431394
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.603080029
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2463471000
/workspace/coverage/default/45.sram_ctrl_regwen.2249823912
/workspace/coverage/default/45.sram_ctrl_smoke.3396837935
/workspace/coverage/default/45.sram_ctrl_stress_all.2907946426
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2924106705
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1204045196
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3344725887
/workspace/coverage/default/46.sram_ctrl_alert_test.1547584372
/workspace/coverage/default/46.sram_ctrl_bijection.488270249
/workspace/coverage/default/46.sram_ctrl_executable.1347842411
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2566135900
/workspace/coverage/default/46.sram_ctrl_max_throughput.3337159753
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.78859401
/workspace/coverage/default/46.sram_ctrl_mem_walk.1461431475
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2908829720
/workspace/coverage/default/46.sram_ctrl_partial_access.3242414010
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3449752641
/workspace/coverage/default/46.sram_ctrl_ram_cfg.577425773
/workspace/coverage/default/46.sram_ctrl_regwen.1436312759
/workspace/coverage/default/46.sram_ctrl_smoke.1773741218
/workspace/coverage/default/46.sram_ctrl_stress_all.271828175
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.818781617
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4213656551
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3481240984
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2566383650
/workspace/coverage/default/47.sram_ctrl_alert_test.4189646145
/workspace/coverage/default/47.sram_ctrl_bijection.2597215722
/workspace/coverage/default/47.sram_ctrl_executable.3109946852
/workspace/coverage/default/47.sram_ctrl_lc_escalation.492348969
/workspace/coverage/default/47.sram_ctrl_max_throughput.2223306460
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1118016977
/workspace/coverage/default/47.sram_ctrl_mem_walk.1506821139
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1711522673
/workspace/coverage/default/47.sram_ctrl_partial_access.1837210987
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4054196394
/workspace/coverage/default/47.sram_ctrl_ram_cfg.112850812
/workspace/coverage/default/47.sram_ctrl_regwen.1070564433
/workspace/coverage/default/47.sram_ctrl_smoke.325135620
/workspace/coverage/default/47.sram_ctrl_stress_all.587354903
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3721553475
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2337564001
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.653919632
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1359890512
/workspace/coverage/default/48.sram_ctrl_alert_test.1106593013
/workspace/coverage/default/48.sram_ctrl_bijection.323634887
/workspace/coverage/default/48.sram_ctrl_executable.919764251
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2586014658
/workspace/coverage/default/48.sram_ctrl_max_throughput.162715980
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.480303230
/workspace/coverage/default/48.sram_ctrl_mem_walk.1854062376
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1086941677
/workspace/coverage/default/48.sram_ctrl_partial_access.1691246296
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2707322681
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3543269814
/workspace/coverage/default/48.sram_ctrl_regwen.322387682
/workspace/coverage/default/48.sram_ctrl_smoke.664065644
/workspace/coverage/default/48.sram_ctrl_stress_all.1185108093
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3153130969
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.486266526
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3915337057
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.4180331836
/workspace/coverage/default/49.sram_ctrl_alert_test.1163081729
/workspace/coverage/default/49.sram_ctrl_bijection.392116201
/workspace/coverage/default/49.sram_ctrl_executable.2575665017
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1079815275
/workspace/coverage/default/49.sram_ctrl_max_throughput.520047435
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1230145151
/workspace/coverage/default/49.sram_ctrl_mem_walk.3507229764
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3212412921
/workspace/coverage/default/49.sram_ctrl_partial_access.2029869884
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1202843830
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3777919260
/workspace/coverage/default/49.sram_ctrl_regwen.2101656512
/workspace/coverage/default/49.sram_ctrl_smoke.609667812
/workspace/coverage/default/49.sram_ctrl_stress_all.32263595
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3285874106
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.503232107
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1899442879
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3022918395
/workspace/coverage/default/5.sram_ctrl_alert_test.1125126625
/workspace/coverage/default/5.sram_ctrl_bijection.2591508475
/workspace/coverage/default/5.sram_ctrl_executable.2630545603
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3744004318
/workspace/coverage/default/5.sram_ctrl_max_throughput.3410322568
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1209447846
/workspace/coverage/default/5.sram_ctrl_mem_walk.1728572881
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3893290765
/workspace/coverage/default/5.sram_ctrl_partial_access.11263630
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1503824620
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2524549898
/workspace/coverage/default/5.sram_ctrl_regwen.2306748059
/workspace/coverage/default/5.sram_ctrl_smoke.3888697520
/workspace/coverage/default/5.sram_ctrl_stress_all.2907879417
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.601226691
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2578036470
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.654320841
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2058905992
/workspace/coverage/default/6.sram_ctrl_alert_test.2815830657
/workspace/coverage/default/6.sram_ctrl_bijection.1211459884
/workspace/coverage/default/6.sram_ctrl_executable.1178579875
/workspace/coverage/default/6.sram_ctrl_lc_escalation.198902654
/workspace/coverage/default/6.sram_ctrl_max_throughput.3938879516
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.292933386
/workspace/coverage/default/6.sram_ctrl_mem_walk.1181094142
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3978425254
/workspace/coverage/default/6.sram_ctrl_partial_access.1292942991
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3016514875
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2080256852
/workspace/coverage/default/6.sram_ctrl_regwen.864223065
/workspace/coverage/default/6.sram_ctrl_smoke.1087597206
/workspace/coverage/default/6.sram_ctrl_stress_all.714891824
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1099696211
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.615098062
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4293476145
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1504945389
/workspace/coverage/default/7.sram_ctrl_alert_test.1070449935
/workspace/coverage/default/7.sram_ctrl_bijection.1078021557
/workspace/coverage/default/7.sram_ctrl_executable.3936931442
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3063479551
/workspace/coverage/default/7.sram_ctrl_max_throughput.2202702824
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3688079319
/workspace/coverage/default/7.sram_ctrl_mem_walk.2220960274
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2523508032
/workspace/coverage/default/7.sram_ctrl_partial_access.1978822314
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.889476035
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2929204633
/workspace/coverage/default/7.sram_ctrl_regwen.209761963
/workspace/coverage/default/7.sram_ctrl_smoke.885814877
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2602982674
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2437653914
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2006840269
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2722965875
/workspace/coverage/default/8.sram_ctrl_alert_test.2566719989
/workspace/coverage/default/8.sram_ctrl_bijection.4276101469
/workspace/coverage/default/8.sram_ctrl_executable.2874377174
/workspace/coverage/default/8.sram_ctrl_lc_escalation.835973242
/workspace/coverage/default/8.sram_ctrl_max_throughput.1568466080
/workspace/coverage/default/8.sram_ctrl_mem_walk.318231264
/workspace/coverage/default/8.sram_ctrl_multiple_keys.698397459
/workspace/coverage/default/8.sram_ctrl_partial_access.1064703193
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2605518604
/workspace/coverage/default/8.sram_ctrl_ram_cfg.3082764559
/workspace/coverage/default/8.sram_ctrl_regwen.1728732696
/workspace/coverage/default/8.sram_ctrl_smoke.96175681
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1871828247
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2776907282
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.513030566
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1620016202
/workspace/coverage/default/9.sram_ctrl_alert_test.2548872573
/workspace/coverage/default/9.sram_ctrl_bijection.3734151836
/workspace/coverage/default/9.sram_ctrl_executable.1685068289
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2537476470
/workspace/coverage/default/9.sram_ctrl_max_throughput.2737431509
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2686437044
/workspace/coverage/default/9.sram_ctrl_mem_walk.490030784
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1531426263
/workspace/coverage/default/9.sram_ctrl_partial_access.2690828483
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3223279624
/workspace/coverage/default/9.sram_ctrl_ram_cfg.235135692
/workspace/coverage/default/9.sram_ctrl_regwen.1055042123
/workspace/coverage/default/9.sram_ctrl_smoke.2824321755
/workspace/coverage/default/9.sram_ctrl_stress_all.1571362010
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.729877288
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1818980542
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1228227736



Total test records in report: 1027
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/12.sram_ctrl_multiple_keys.3605886364 Jul 03 04:32:30 PM PDT 24 Jul 03 05:01:59 PM PDT 24 263128452219 ps
T2 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1451424901 Jul 03 04:34:00 PM PDT 24 Jul 03 04:40:00 PM PDT 24 2437384195 ps
T3 /workspace/coverage/default/31.sram_ctrl_mem_walk.1903834178 Jul 03 04:33:20 PM PDT 24 Jul 03 04:33:27 PM PDT 24 1214526009 ps
T4 /workspace/coverage/default/29.sram_ctrl_bijection.3313289387 Jul 03 04:33:02 PM PDT 24 Jul 03 04:34:23 PM PDT 24 3703559114 ps
T5 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1244110357 Jul 03 04:32:55 PM PDT 24 Jul 03 04:35:48 PM PDT 24 7484412779 ps
T9 /workspace/coverage/default/31.sram_ctrl_ram_cfg.1130198696 Jul 03 04:33:21 PM PDT 24 Jul 03 04:33:22 PM PDT 24 37554878 ps
T6 /workspace/coverage/default/39.sram_ctrl_lc_escalation.1221073543 Jul 03 04:33:28 PM PDT 24 Jul 03 04:33:35 PM PDT 24 1421133832 ps
T10 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.818781617 Jul 03 04:33:59 PM PDT 24 Jul 03 04:34:56 PM PDT 24 896574218 ps
T11 /workspace/coverage/default/43.sram_ctrl_partial_access.2014709734 Jul 03 04:33:43 PM PDT 24 Jul 03 04:33:57 PM PDT 24 2727976341 ps
T12 /workspace/coverage/default/17.sram_ctrl_alert_test.4258913799 Jul 03 04:32:49 PM PDT 24 Jul 03 04:32:50 PM PDT 24 33898980 ps
T40 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.2722965875 Jul 03 04:32:19 PM PDT 24 Jul 03 04:47:53 PM PDT 24 11111226309 ps
T20 /workspace/coverage/default/15.sram_ctrl_regwen.3897473464 Jul 03 04:32:49 PM PDT 24 Jul 03 04:57:00 PM PDT 24 13283690462 ps
T41 /workspace/coverage/default/22.sram_ctrl_mem_walk.3967507910 Jul 03 04:32:48 PM PDT 24 Jul 03 04:32:55 PM PDT 24 1380766802 ps
T13 /workspace/coverage/default/0.sram_ctrl_alert_test.1260419745 Jul 03 04:32:09 PM PDT 24 Jul 03 04:32:10 PM PDT 24 30921326 ps
T27 /workspace/coverage/default/42.sram_ctrl_ram_cfg.1031962830 Jul 03 04:33:42 PM PDT 24 Jul 03 04:33:43 PM PDT 24 40692406 ps
T7 /workspace/coverage/default/31.sram_ctrl_lc_escalation.3396934499 Jul 03 04:33:16 PM PDT 24 Jul 03 04:33:21 PM PDT 24 663825330 ps
T42 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.1504945389 Jul 03 04:32:24 PM PDT 24 Jul 03 04:59:36 PM PDT 24 4010865501 ps
T81 /workspace/coverage/default/0.sram_ctrl_mem_walk.2897675813 Jul 03 04:32:09 PM PDT 24 Jul 03 04:32:14 PM PDT 24 91304450 ps
T79 /workspace/coverage/default/38.sram_ctrl_partial_access.1984683824 Jul 03 04:33:32 PM PDT 24 Jul 03 04:33:45 PM PDT 24 404482167 ps
T8 /workspace/coverage/default/48.sram_ctrl_lc_escalation.2586014658 Jul 03 04:34:06 PM PDT 24 Jul 03 04:34:12 PM PDT 24 430844234 ps
T25 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1884793666 Jul 03 04:33:51 PM PDT 24 Jul 03 04:38:43 PM PDT 24 691331100 ps
T26 /workspace/coverage/default/38.sram_ctrl_executable.3950470843 Jul 03 04:33:27 PM PDT 24 Jul 03 04:44:19 PM PDT 24 18586792363 ps
T44 /workspace/coverage/default/19.sram_ctrl_executable.1137174088 Jul 03 04:32:44 PM PDT 24 Jul 03 04:42:45 PM PDT 24 19272567423 ps
T28 /workspace/coverage/default/40.sram_ctrl_ram_cfg.2982971460 Jul 03 04:33:37 PM PDT 24 Jul 03 04:33:38 PM PDT 24 89457584 ps
T19 /workspace/coverage/default/18.sram_ctrl_lc_escalation.457140244 Jul 03 04:32:44 PM PDT 24 Jul 03 04:32:52 PM PDT 24 1902481942 ps
T14 /workspace/coverage/default/45.sram_ctrl_alert_test.4026907438 Jul 03 04:33:57 PM PDT 24 Jul 03 04:33:58 PM PDT 24 21010819 ps
T80 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2677672632 Jul 03 04:33:43 PM PDT 24 Jul 03 04:38:09 PM PDT 24 14646717012 ps
T43 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.854647459 Jul 03 04:33:49 PM PDT 24 Jul 03 04:55:01 PM PDT 24 26093302483 ps
T54 /workspace/coverage/default/15.sram_ctrl_mem_walk.3414449724 Jul 03 04:32:37 PM PDT 24 Jul 03 04:32:49 PM PDT 24 1327957131 ps
T155 /workspace/coverage/default/6.sram_ctrl_smoke.1087597206 Jul 03 04:32:12 PM PDT 24 Jul 03 04:34:17 PM PDT 24 139757443 ps
T68 /workspace/coverage/default/25.sram_ctrl_lc_escalation.2760150642 Jul 03 04:33:01 PM PDT 24 Jul 03 04:33:09 PM PDT 24 2450689175 ps
T156 /workspace/coverage/default/20.sram_ctrl_partial_access.3632203988 Jul 03 04:33:00 PM PDT 24 Jul 03 04:33:11 PM PDT 24 1907912929 ps
T151 /workspace/coverage/default/1.sram_ctrl_partial_access.2115734109 Jul 03 04:32:22 PM PDT 24 Jul 03 04:34:44 PM PDT 24 408829812 ps
T106 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.503232107 Jul 03 04:34:10 PM PDT 24 Jul 03 04:37:14 PM PDT 24 3742405689 ps
T23 /workspace/coverage/default/47.sram_ctrl_lc_escalation.492348969 Jul 03 04:34:02 PM PDT 24 Jul 03 04:34:12 PM PDT 24 2838943044 ps
T15 /workspace/coverage/default/42.sram_ctrl_alert_test.939373012 Jul 03 04:34:06 PM PDT 24 Jul 03 04:34:07 PM PDT 24 32194426 ps
T157 /workspace/coverage/default/15.sram_ctrl_ram_cfg.2482136414 Jul 03 04:32:33 PM PDT 24 Jul 03 04:32:34 PM PDT 24 29561785 ps
T154 /workspace/coverage/default/47.sram_ctrl_alert_test.4189646145 Jul 03 04:34:03 PM PDT 24 Jul 03 04:34:04 PM PDT 24 14867585 ps
T21 /workspace/coverage/default/38.sram_ctrl_regwen.4289091593 Jul 03 04:33:23 PM PDT 24 Jul 03 04:41:47 PM PDT 24 13193235659 ps
T55 /workspace/coverage/default/5.sram_ctrl_mem_walk.1728572881 Jul 03 04:32:09 PM PDT 24 Jul 03 04:32:20 PM PDT 24 519288774 ps
T56 /workspace/coverage/default/43.sram_ctrl_mem_walk.3309010061 Jul 03 04:33:47 PM PDT 24 Jul 03 04:33:53 PM PDT 24 298866831 ps
T22 /workspace/coverage/default/34.sram_ctrl_stress_all.559423769 Jul 03 04:33:24 PM PDT 24 Jul 03 05:28:21 PM PDT 24 22710754622 ps
T48 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1871828247 Jul 03 04:32:30 PM PDT 24 Jul 03 04:36:21 PM PDT 24 1203723775 ps
T158 /workspace/coverage/default/31.sram_ctrl_alert_test.60092202 Jul 03 04:33:02 PM PDT 24 Jul 03 04:33:04 PM PDT 24 43129281 ps
T159 /workspace/coverage/default/44.sram_ctrl_smoke.4199440211 Jul 03 04:33:48 PM PDT 24 Jul 03 04:33:52 PM PDT 24 40370454 ps
T57 /workspace/coverage/default/4.sram_ctrl_mem_walk.1857573350 Jul 03 04:32:21 PM PDT 24 Jul 03 04:32:28 PM PDT 24 338752313 ps
T142 /workspace/coverage/default/10.sram_ctrl_executable.3498154861 Jul 03 04:32:41 PM PDT 24 Jul 03 04:36:29 PM PDT 24 2194867422 ps
T160 /workspace/coverage/default/22.sram_ctrl_ram_cfg.2636006312 Jul 03 04:32:55 PM PDT 24 Jul 03 04:32:56 PM PDT 24 47567051 ps
T51 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2341914724 Jul 03 04:32:58 PM PDT 24 Jul 03 04:35:08 PM PDT 24 9543555083 ps
T120 /workspace/coverage/default/29.sram_ctrl_partial_access.731972866 Jul 03 04:33:13 PM PDT 24 Jul 03 04:33:34 PM PDT 24 1067447219 ps
T121 /workspace/coverage/default/13.sram_ctrl_ram_cfg.2552956186 Jul 03 04:32:53 PM PDT 24 Jul 03 04:32:54 PM PDT 24 57819613 ps
T69 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3730314740 Jul 03 04:33:43 PM PDT 24 Jul 03 04:34:06 PM PDT 24 2554881749 ps
T107 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.2824377538 Jul 03 04:33:28 PM PDT 24 Jul 03 04:38:12 PM PDT 24 2929802157 ps
T108 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1147892861 Jul 03 04:33:42 PM PDT 24 Jul 03 04:38:34 PM PDT 24 6191202718 ps
T122 /workspace/coverage/default/33.sram_ctrl_partial_access.1960685790 Jul 03 04:33:18 PM PDT 24 Jul 03 04:33:28 PM PDT 24 2198491725 ps
T70 /workspace/coverage/default/8.sram_ctrl_lc_escalation.835973242 Jul 03 04:32:52 PM PDT 24 Jul 03 04:32:56 PM PDT 24 302743615 ps
T109 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.3288053739 Jul 03 04:33:52 PM PDT 24 Jul 03 04:38:32 PM PDT 24 10770528769 ps
T123 /workspace/coverage/default/14.sram_ctrl_lc_escalation.740960869 Jul 03 04:32:43 PM PDT 24 Jul 03 04:32:48 PM PDT 24 511417634 ps
T161 /workspace/coverage/default/36.sram_ctrl_smoke.2297326252 Jul 03 04:33:13 PM PDT 24 Jul 03 04:33:17 PM PDT 24 245238580 ps
T162 /workspace/coverage/default/45.sram_ctrl_partial_access.3261431394 Jul 03 04:33:51 PM PDT 24 Jul 03 04:34:05 PM PDT 24 1047453594 ps
T163 /workspace/coverage/default/15.sram_ctrl_max_throughput.1751694565 Jul 03 04:32:42 PM PDT 24 Jul 03 04:33:56 PM PDT 24 649816258 ps
T164 /workspace/coverage/default/49.sram_ctrl_alert_test.1163081729 Jul 03 04:34:17 PM PDT 24 Jul 03 04:34:18 PM PDT 24 19847319 ps
T145 /workspace/coverage/default/27.sram_ctrl_stress_all.2066189258 Jul 03 04:33:00 PM PDT 24 Jul 03 04:43:44 PM PDT 24 50867517345 ps
T165 /workspace/coverage/default/13.sram_ctrl_smoke.1783730667 Jul 03 04:32:35 PM PDT 24 Jul 03 04:32:50 PM PDT 24 233448666 ps
T166 /workspace/coverage/default/33.sram_ctrl_max_throughput.2177444849 Jul 03 04:33:12 PM PDT 24 Jul 03 04:34:21 PM PDT 24 212353897 ps
T152 /workspace/coverage/default/10.sram_ctrl_smoke.3461262105 Jul 03 04:32:39 PM PDT 24 Jul 03 04:33:14 PM PDT 24 1808919019 ps
T52 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3074166407 Jul 03 04:33:42 PM PDT 24 Jul 03 04:34:01 PM PDT 24 640180361 ps
T53 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1928275048 Jul 03 04:33:50 PM PDT 24 Jul 03 04:33:57 PM PDT 24 3328073387 ps
T110 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.739415645 Jul 03 04:31:58 PM PDT 24 Jul 03 04:39:18 PM PDT 24 18730422069 ps
T147 /workspace/coverage/default/40.sram_ctrl_executable.4292036832 Jul 03 04:33:41 PM PDT 24 Jul 03 05:04:11 PM PDT 24 104695910907 ps
T85 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.802743955 Jul 03 04:32:52 PM PDT 24 Jul 03 04:59:29 PM PDT 24 4760235800 ps
T111 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.4078409726 Jul 03 04:32:37 PM PDT 24 Jul 03 04:37:17 PM PDT 24 2812400757 ps
T86 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2224512006 Jul 03 04:32:25 PM PDT 24 Jul 03 04:48:04 PM PDT 24 4463287422 ps
T167 /workspace/coverage/default/36.sram_ctrl_alert_test.1550063059 Jul 03 04:33:18 PM PDT 24 Jul 03 04:33:19 PM PDT 24 13035675 ps
T168 /workspace/coverage/default/43.sram_ctrl_multiple_keys.2643792713 Jul 03 04:34:01 PM PDT 24 Jul 03 04:51:26 PM PDT 24 4063542161 ps
T143 /workspace/coverage/default/34.sram_ctrl_regwen.3495526733 Jul 03 04:33:19 PM PDT 24 Jul 03 04:44:55 PM PDT 24 5452329455 ps
T169 /workspace/coverage/default/4.sram_ctrl_smoke.729115245 Jul 03 04:32:22 PM PDT 24 Jul 03 04:32:33 PM PDT 24 2646895959 ps
T149 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3212412921 Jul 03 04:34:07 PM PDT 24 Jul 03 04:58:16 PM PDT 24 16169001768 ps
T144 /workspace/coverage/default/10.sram_ctrl_stress_all.3639575251 Jul 03 04:32:28 PM PDT 24 Jul 03 05:52:55 PM PDT 24 391796221554 ps
T128 /workspace/coverage/default/44.sram_ctrl_lc_escalation.2104582277 Jul 03 04:33:52 PM PDT 24 Jul 03 04:33:56 PM PDT 24 1838371887 ps
T150 /workspace/coverage/default/32.sram_ctrl_partial_access.2183888892 Jul 03 04:33:12 PM PDT 24 Jul 03 04:34:54 PM PDT 24 1960038454 ps
T153 /workspace/coverage/default/1.sram_ctrl_regwen.2735270710 Jul 03 04:32:21 PM PDT 24 Jul 03 05:02:27 PM PDT 24 36443118456 ps
T148 /workspace/coverage/default/7.sram_ctrl_executable.3936931442 Jul 03 04:32:16 PM PDT 24 Jul 03 04:36:26 PM PDT 24 1269646051 ps
T170 /workspace/coverage/default/46.sram_ctrl_mem_walk.1461431475 Jul 03 04:34:03 PM PDT 24 Jul 03 04:34:08 PM PDT 24 123931695 ps
T112 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1326475900 Jul 03 04:33:05 PM PDT 24 Jul 03 04:38:14 PM PDT 24 49856581201 ps
T171 /workspace/coverage/default/30.sram_ctrl_mem_walk.1768021707 Jul 03 04:33:06 PM PDT 24 Jul 03 04:33:16 PM PDT 24 141886185 ps
T172 /workspace/coverage/default/5.sram_ctrl_smoke.3888697520 Jul 03 04:32:28 PM PDT 24 Jul 03 04:35:10 PM PDT 24 661379957 ps
T87 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.2566383650 Jul 03 04:34:05 PM PDT 24 Jul 03 04:52:46 PM PDT 24 12372159741 ps
T58 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1465780828 Jul 03 04:32:30 PM PDT 24 Jul 03 04:32:37 PM PDT 24 380451698 ps
T88 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.2655981908 Jul 03 04:33:23 PM PDT 24 Jul 03 04:51:29 PM PDT 24 2829530703 ps
T173 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.2028512061 Jul 03 04:32:56 PM PDT 24 Jul 03 04:37:15 PM PDT 24 18492633334 ps
T174 /workspace/coverage/default/20.sram_ctrl_alert_test.2261292937 Jul 03 04:33:02 PM PDT 24 Jul 03 04:33:04 PM PDT 24 31511467 ps
T175 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.2722483130 Jul 03 04:33:17 PM PDT 24 Jul 03 04:37:08 PM PDT 24 4666011189 ps
T89 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.731958428 Jul 03 04:33:06 PM PDT 24 Jul 03 04:33:12 PM PDT 24 757185944 ps
T176 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1375346384 Jul 03 04:33:46 PM PDT 24 Jul 03 04:41:08 PM PDT 24 5629919601 ps
T177 /workspace/coverage/default/40.sram_ctrl_smoke.960117846 Jul 03 04:33:35 PM PDT 24 Jul 03 04:33:49 PM PDT 24 265446184 ps
T178 /workspace/coverage/default/18.sram_ctrl_alert_test.3629644457 Jul 03 04:32:53 PM PDT 24 Jul 03 04:32:54 PM PDT 24 22880857 ps
T146 /workspace/coverage/default/6.sram_ctrl_executable.1178579875 Jul 03 04:32:24 PM PDT 24 Jul 03 04:51:07 PM PDT 24 31476648350 ps
T179 /workspace/coverage/default/35.sram_ctrl_mem_walk.1401405593 Jul 03 04:33:21 PM PDT 24 Jul 03 04:33:28 PM PDT 24 232301128 ps
T59 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.992918725 Jul 03 04:32:59 PM PDT 24 Jul 03 04:41:43 PM PDT 24 2332972352 ps
T180 /workspace/coverage/default/38.sram_ctrl_bijection.2196744077 Jul 03 04:33:24 PM PDT 24 Jul 03 04:33:50 PM PDT 24 1434026424 ps
T181 /workspace/coverage/default/4.sram_ctrl_partial_access.3745742781 Jul 03 04:32:13 PM PDT 24 Jul 03 04:32:21 PM PDT 24 2340687044 ps
T182 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1204045196 Jul 03 04:33:56 PM PDT 24 Jul 03 04:36:03 PM PDT 24 162453885 ps
T183 /workspace/coverage/default/19.sram_ctrl_bijection.46547864 Jul 03 04:32:41 PM PDT 24 Jul 03 04:33:46 PM PDT 24 24271401139 ps
T184 /workspace/coverage/default/10.sram_ctrl_max_throughput.2476349545 Jul 03 04:32:31 PM PDT 24 Jul 03 04:33:25 PM PDT 24 230339300 ps
T185 /workspace/coverage/default/31.sram_ctrl_bijection.4042079377 Jul 03 04:33:11 PM PDT 24 Jul 03 04:33:59 PM PDT 24 11897891550 ps
T24 /workspace/coverage/default/22.sram_ctrl_lc_escalation.2866753607 Jul 03 04:32:59 PM PDT 24 Jul 03 04:33:07 PM PDT 24 1172077559 ps
T186 /workspace/coverage/default/13.sram_ctrl_mem_walk.1594493704 Jul 03 04:32:47 PM PDT 24 Jul 03 04:32:58 PM PDT 24 443737929 ps
T60 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2722386346 Jul 03 04:33:52 PM PDT 24 Jul 03 04:35:49 PM PDT 24 312234352 ps
T187 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3223279624 Jul 03 04:32:27 PM PDT 24 Jul 03 04:39:12 PM PDT 24 5730285841 ps
T188 /workspace/coverage/default/42.sram_ctrl_lc_escalation.1596514138 Jul 03 04:33:41 PM PDT 24 Jul 03 04:33:43 PM PDT 24 109947443 ps
T102 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.2431510744 Jul 03 04:33:27 PM PDT 24 Jul 03 04:38:13 PM PDT 24 2698062803 ps
T189 /workspace/coverage/default/47.sram_ctrl_multiple_keys.1711522673 Jul 03 04:33:58 PM PDT 24 Jul 03 04:44:52 PM PDT 24 39236579332 ps
T129 /workspace/coverage/default/41.sram_ctrl_lc_escalation.2874816222 Jul 03 04:33:40 PM PDT 24 Jul 03 04:33:48 PM PDT 24 2156992752 ps
T61 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.2625059523 Jul 03 04:32:44 PM PDT 24 Jul 03 04:32:50 PM PDT 24 344811301 ps
T190 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3986198272 Jul 03 04:32:09 PM PDT 24 Jul 03 04:32:36 PM PDT 24 421653830 ps
T191 /workspace/coverage/default/11.sram_ctrl_regwen.4154623904 Jul 03 04:32:28 PM PDT 24 Jul 03 04:42:38 PM PDT 24 19369097083 ps
T192 /workspace/coverage/default/32.sram_ctrl_lc_escalation.1668079679 Jul 03 04:33:12 PM PDT 24 Jul 03 04:33:15 PM PDT 24 119822600 ps
T193 /workspace/coverage/default/23.sram_ctrl_max_throughput.1184958468 Jul 03 04:33:15 PM PDT 24 Jul 03 04:33:36 PM PDT 24 76919752 ps
T194 /workspace/coverage/default/2.sram_ctrl_mem_walk.3403861191 Jul 03 04:32:20 PM PDT 24 Jul 03 04:32:30 PM PDT 24 150364585 ps
T195 /workspace/coverage/default/43.sram_ctrl_regwen.976954848 Jul 03 04:33:50 PM PDT 24 Jul 03 04:39:37 PM PDT 24 911782252 ps
T196 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.3069568740 Jul 03 04:32:05 PM PDT 24 Jul 03 04:32:09 PM PDT 24 310676519 ps
T197 /workspace/coverage/default/41.sram_ctrl_mem_walk.3986757069 Jul 03 04:33:42 PM PDT 24 Jul 03 04:33:47 PM PDT 24 75328339 ps
T198 /workspace/coverage/default/18.sram_ctrl_ram_cfg.2564492139 Jul 03 04:32:47 PM PDT 24 Jul 03 04:32:49 PM PDT 24 49875591 ps
T199 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.732447848 Jul 03 04:31:57 PM PDT 24 Jul 03 04:33:53 PM PDT 24 873397006 ps
T200 /workspace/coverage/default/48.sram_ctrl_ram_cfg.3543269814 Jul 03 04:34:07 PM PDT 24 Jul 03 04:34:09 PM PDT 24 48799115 ps
T201 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.513030566 Jul 03 04:32:22 PM PDT 24 Jul 03 04:32:40 PM PDT 24 120581216 ps
T202 /workspace/coverage/default/11.sram_ctrl_executable.3210947084 Jul 03 04:32:18 PM PDT 24 Jul 03 04:48:15 PM PDT 24 57939915027 ps
T203 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.2015749291 Jul 03 04:33:02 PM PDT 24 Jul 03 04:33:08 PM PDT 24 65449340 ps
T204 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.1085043021 Jul 03 04:32:58 PM PDT 24 Jul 03 04:33:02 PM PDT 24 1360690624 ps
T205 /workspace/coverage/default/9.sram_ctrl_partial_access.2690828483 Jul 03 04:32:28 PM PDT 24 Jul 03 04:33:24 PM PDT 24 524964897 ps
T206 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.926780002 Jul 03 04:33:06 PM PDT 24 Jul 03 04:37:31 PM PDT 24 11154093387 ps
T207 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.820136343 Jul 03 04:33:13 PM PDT 24 Jul 03 04:38:21 PM PDT 24 13100559263 ps
T208 /workspace/coverage/default/18.sram_ctrl_max_throughput.2751378622 Jul 03 04:32:28 PM PDT 24 Jul 03 04:33:38 PM PDT 24 120516241 ps
T209 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.889476035 Jul 03 04:32:24 PM PDT 24 Jul 03 04:40:26 PM PDT 24 102306143472 ps
T210 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3574578950 Jul 03 04:33:23 PM PDT 24 Jul 03 04:33:28 PM PDT 24 198501400 ps
T211 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.78859401 Jul 03 04:34:00 PM PDT 24 Jul 03 04:34:04 PM PDT 24 105600391 ps
T212 /workspace/coverage/default/34.sram_ctrl_lc_escalation.2485919276 Jul 03 04:33:10 PM PDT 24 Jul 03 04:33:15 PM PDT 24 4006318360 ps
T213 /workspace/coverage/default/41.sram_ctrl_stress_all.522302230 Jul 03 04:33:52 PM PDT 24 Jul 03 05:11:05 PM PDT 24 48824795300 ps
T214 /workspace/coverage/default/3.sram_ctrl_smoke.1659111218 Jul 03 04:32:17 PM PDT 24 Jul 03 04:32:18 PM PDT 24 21453198 ps
T215 /workspace/coverage/default/15.sram_ctrl_executable.3591793924 Jul 03 04:32:38 PM PDT 24 Jul 03 04:54:20 PM PDT 24 38607742563 ps
T216 /workspace/coverage/default/30.sram_ctrl_max_throughput.2386240843 Jul 03 04:33:00 PM PDT 24 Jul 03 04:33:30 PM PDT 24 615991656 ps
T217 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.333254288 Jul 03 04:32:20 PM PDT 24 Jul 03 04:37:08 PM PDT 24 2831928945 ps
T218 /workspace/coverage/default/40.sram_ctrl_max_throughput.4177935275 Jul 03 04:33:32 PM PDT 24 Jul 03 04:34:42 PM PDT 24 1152401233 ps
T219 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.3858828569 Jul 03 04:33:49 PM PDT 24 Jul 03 05:00:00 PM PDT 24 5665341559 ps
T220 /workspace/coverage/default/7.sram_ctrl_multiple_keys.2523508032 Jul 03 04:32:26 PM PDT 24 Jul 03 04:41:48 PM PDT 24 2543534118 ps
T221 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2798097833 Jul 03 04:33:17 PM PDT 24 Jul 03 04:33:23 PM PDT 24 647321358 ps
T222 /workspace/coverage/default/4.sram_ctrl_ram_cfg.2786441169 Jul 03 04:32:27 PM PDT 24 Jul 03 04:32:29 PM PDT 24 43959471 ps
T223 /workspace/coverage/default/14.sram_ctrl_alert_test.1589477739 Jul 03 04:32:29 PM PDT 24 Jul 03 04:32:31 PM PDT 24 29987798 ps
T224 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3709287263 Jul 03 04:32:28 PM PDT 24 Jul 03 04:34:59 PM PDT 24 608324845 ps
T225 /workspace/coverage/default/29.sram_ctrl_executable.1464378633 Jul 03 04:33:08 PM PDT 24 Jul 03 04:52:29 PM PDT 24 13300542934 ps
T226 /workspace/coverage/default/12.sram_ctrl_ram_cfg.3293279312 Jul 03 04:32:27 PM PDT 24 Jul 03 04:32:29 PM PDT 24 29378943 ps
T227 /workspace/coverage/default/38.sram_ctrl_alert_test.1150864186 Jul 03 04:33:33 PM PDT 24 Jul 03 04:33:34 PM PDT 24 13782365 ps
T228 /workspace/coverage/default/3.sram_ctrl_bijection.3791973967 Jul 03 04:32:31 PM PDT 24 Jul 03 04:33:05 PM PDT 24 2916935260 ps
T229 /workspace/coverage/default/29.sram_ctrl_multiple_keys.4226994548 Jul 03 04:33:13 PM PDT 24 Jul 03 04:56:41 PM PDT 24 30274181475 ps
T230 /workspace/coverage/default/38.sram_ctrl_stress_all.1338488104 Jul 03 04:33:27 PM PDT 24 Jul 03 05:18:24 PM PDT 24 15672175855 ps
T231 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1806481843 Jul 03 04:32:46 PM PDT 24 Jul 03 04:38:21 PM PDT 24 3393931226 ps
T232 /workspace/coverage/default/46.sram_ctrl_bijection.488270249 Jul 03 04:33:56 PM PDT 24 Jul 03 04:35:10 PM PDT 24 5372643148 ps
T233 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.4156983340 Jul 03 04:33:18 PM PDT 24 Jul 03 04:33:22 PM PDT 24 86191771 ps
T234 /workspace/coverage/default/14.sram_ctrl_stress_all.1806507764 Jul 03 04:32:40 PM PDT 24 Jul 03 04:51:28 PM PDT 24 22594226734 ps
T235 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.3600730663 Jul 03 04:33:21 PM PDT 24 Jul 03 04:46:06 PM PDT 24 12077581720 ps
T236 /workspace/coverage/default/35.sram_ctrl_bijection.763301900 Jul 03 04:33:25 PM PDT 24 Jul 03 04:33:52 PM PDT 24 1560388560 ps
T45 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2830448633 Jul 03 04:32:59 PM PDT 24 Jul 03 04:33:05 PM PDT 24 683037060 ps
T237 /workspace/coverage/default/16.sram_ctrl_executable.645531324 Jul 03 04:32:46 PM PDT 24 Jul 03 04:49:11 PM PDT 24 53001378113 ps
T238 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.3348862843 Jul 03 04:32:30 PM PDT 24 Jul 03 04:38:37 PM PDT 24 7304684560 ps
T239 /workspace/coverage/default/39.sram_ctrl_executable.846178140 Jul 03 04:33:34 PM PDT 24 Jul 03 04:56:06 PM PDT 24 24291586871 ps
T240 /workspace/coverage/default/1.sram_ctrl_stress_all.3013086311 Jul 03 04:31:57 PM PDT 24 Jul 03 05:40:49 PM PDT 24 12217817717 ps
T241 /workspace/coverage/default/21.sram_ctrl_smoke.1672746108 Jul 03 04:33:05 PM PDT 24 Jul 03 04:35:02 PM PDT 24 263539268 ps
T242 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3016514875 Jul 03 04:32:13 PM PDT 24 Jul 03 04:37:08 PM PDT 24 11407273266 ps
T243 /workspace/coverage/default/23.sram_ctrl_partial_access.3830216304 Jul 03 04:33:02 PM PDT 24 Jul 03 04:33:12 PM PDT 24 640493309 ps
T244 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2509331972 Jul 03 04:32:56 PM PDT 24 Jul 03 04:36:58 PM PDT 24 3370714200 ps
T245 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3688079319 Jul 03 04:32:36 PM PDT 24 Jul 03 04:32:43 PM PDT 24 680903228 ps
T246 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3056387114 Jul 03 04:33:18 PM PDT 24 Jul 03 04:39:30 PM PDT 24 18619838189 ps
T247 /workspace/coverage/default/27.sram_ctrl_ram_cfg.938417086 Jul 03 04:33:16 PM PDT 24 Jul 03 04:33:18 PM PDT 24 86585105 ps
T248 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1063522324 Jul 03 04:33:12 PM PDT 24 Jul 03 04:33:19 PM PDT 24 7316650754 ps
T249 /workspace/coverage/default/27.sram_ctrl_bijection.546369980 Jul 03 04:33:11 PM PDT 24 Jul 03 04:33:54 PM PDT 24 4555912299 ps
T250 /workspace/coverage/default/20.sram_ctrl_max_throughput.3808017840 Jul 03 04:33:03 PM PDT 24 Jul 03 04:35:20 PM PDT 24 606857234 ps
T251 /workspace/coverage/default/5.sram_ctrl_ram_cfg.2524549898 Jul 03 04:32:27 PM PDT 24 Jul 03 04:32:29 PM PDT 24 27245826 ps
T252 /workspace/coverage/default/39.sram_ctrl_smoke.133171444 Jul 03 04:33:34 PM PDT 24 Jul 03 04:35:09 PM PDT 24 1282490797 ps
T253 /workspace/coverage/default/34.sram_ctrl_ram_cfg.714098487 Jul 03 04:33:21 PM PDT 24 Jul 03 04:33:22 PM PDT 24 29518484 ps
T254 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1359890512 Jul 03 04:34:08 PM PDT 24 Jul 03 04:45:45 PM PDT 24 3214233056 ps
T255 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.421025440 Jul 03 04:34:02 PM PDT 24 Jul 03 04:34:05 PM PDT 24 402189451 ps
T256 /workspace/coverage/default/13.sram_ctrl_alert_test.4124391689 Jul 03 04:32:34 PM PDT 24 Jul 03 04:32:35 PM PDT 24 58353408 ps
T257 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2345658151 Jul 03 04:33:20 PM PDT 24 Jul 03 04:34:32 PM PDT 24 147796669 ps
T258 /workspace/coverage/default/43.sram_ctrl_alert_test.2677822851 Jul 03 04:33:54 PM PDT 24 Jul 03 04:33:55 PM PDT 24 16389889 ps
T259 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.698517619 Jul 03 04:33:13 PM PDT 24 Jul 03 04:43:40 PM PDT 24 12042896930 ps
T260 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.4265388800 Jul 03 04:33:04 PM PDT 24 Jul 03 04:33:08 PM PDT 24 531999175 ps
T261 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.2068902054 Jul 03 04:33:20 PM PDT 24 Jul 03 04:37:24 PM PDT 24 2465961960 ps
T262 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3041273193 Jul 03 04:33:16 PM PDT 24 Jul 03 04:36:03 PM PDT 24 4012541069 ps
T263 /workspace/coverage/default/26.sram_ctrl_alert_test.1893406113 Jul 03 04:33:12 PM PDT 24 Jul 03 04:33:14 PM PDT 24 14619942 ps
T264 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2605518604 Jul 03 04:32:24 PM PDT 24 Jul 03 04:38:55 PM PDT 24 33864053789 ps
T265 /workspace/coverage/default/32.sram_ctrl_max_throughput.3497540264 Jul 03 04:33:16 PM PDT 24 Jul 03 04:35:01 PM PDT 24 507663988 ps
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T322 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2783570617 Jul 03 04:32:39 PM PDT 24 Jul 03 04:37:45 PM PDT 24 8493323396 ps
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