SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.u_prim_lc_sync | 100.00 | 100.00 | 100.00 | ||||
tb.dut.u_tlul_lc_gate.u_err_en_sync | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
91.90 | 100.00 | 88.89 | 100.00 | 100.00 | 70.59 | dut |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_buffs[0].gen_bits[0].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[1].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[2].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[3].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[0].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[1].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[2].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[3].u_prim_buf | 100.00 | 100.00 | |||||
gen_flops.u_prim_flop_2sync | 100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
100.00 | 100.00 | 100.00 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
89.00 | 100.00 | 100.00 | 100.00 | 95.00 | 50.00 | u_tlul_lc_gate |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
gen_buffs[0].gen_bits[0].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[1].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[2].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[0].gen_bits[3].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[0].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[1].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[2].u_prim_buf | 100.00 | 100.00 | |||||
gen_buffs[1].gen_bits[3].u_prim_buf | 100.00 | 100.00 |
SCORE | LINE |
100.00 | 100.00 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 3 | 3 | 100.00 | |
ALWAYS | 68 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
68 | 1 | 1 | |
106 | 2 | 2 |
SCORE | LINE |
100.00 | 100.00 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 3 | 3 | 100.00 | |
ALWAYS | 84 | 0 | 0 | |
CONT_ASSIGN | 93 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
84 | unreachable | ||
85 | unreachable | ||
87 | unreachable | ||
93 | 1 | 1 | |
106 | 2 | 2 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 4 | 4 | 100.00 | 4 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 4 | 4 | 100.00 | 4 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 1790 | 1790 | 0 | 0 |
OutputsKnown_A | 672431988 | 672195728 | 0 | 0 |
gen_flops.OutputDelay_A | 336215994 | 336084313 | 0 | 2685 |
gen_no_flops.OutputDelay_A | 336215994 | 336097864 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 1790 | 1790 | 0 | 0 |
T1 | 2 | 2 | 0 | 0 |
T2 | 2 | 2 | 0 | 0 |
T3 | 2 | 2 | 0 | 0 |
T4 | 2 | 2 | 0 | 0 |
T5 | 2 | 2 | 0 | 0 |
T6 | 2 | 2 | 0 | 0 |
T9 | 2 | 2 | 0 | 0 |
T10 | 2 | 2 | 0 | 0 |
T11 | 2 | 2 | 0 | 0 |
T12 | 2 | 2 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 672431988 | 672195728 | 0 | 0 |
T1 | 379234 | 379218 | 0 | 0 |
T2 | 7412 | 7254 | 0 | 0 |
T3 | 16628 | 16514 | 0 | 0 |
T4 | 34548 | 34422 | 0 | 0 |
T5 | 67422 | 67314 | 0 | 0 |
T6 | 13414 | 13272 | 0 | 0 |
T9 | 4060 | 3938 | 0 | 0 |
T10 | 48664 | 48520 | 0 | 0 |
T11 | 8438 | 8312 | 0 | 0 |
T12 | 19190 | 19086 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 336215994 | 336084313 | 0 | 2685 |
T1 | 189617 | 189609 | 0 | 3 |
T2 | 3706 | 3624 | 0 | 3 |
T3 | 8314 | 8254 | 0 | 3 |
T4 | 17274 | 17208 | 0 | 3 |
T5 | 33711 | 33654 | 0 | 3 |
T6 | 6707 | 6621 | 0 | 3 |
T9 | 2030 | 1966 | 0 | 3 |
T10 | 24332 | 24257 | 0 | 3 |
T11 | 4219 | 4153 | 0 | 3 |
T12 | 9595 | 9540 | 0 | 3 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 336215994 | 336097864 | 0 | 0 |
T1 | 189617 | 189609 | 0 | 0 |
T2 | 3706 | 3627 | 0 | 0 |
T3 | 8314 | 8257 | 0 | 0 |
T4 | 17274 | 17211 | 0 | 0 |
T5 | 33711 | 33657 | 0 | 0 |
T6 | 6707 | 6636 | 0 | 0 |
T9 | 2030 | 1969 | 0 | 0 |
T10 | 24332 | 24260 | 0 | 0 |
T11 | 4219 | 4156 | 0 | 0 |
T12 | 9595 | 9543 | 0 | 0 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 3 | 3 | 100.00 | |
ALWAYS | 68 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
68 | 1 | 1 | |
106 | 2 | 2 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 895 | 895 | 0 | 0 |
OutputsKnown_A | 336215994 | 336097864 | 0 | 0 |
gen_flops.OutputDelay_A | 336215994 | 336084313 | 0 | 2685 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 895 | 895 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T5 | 1 | 1 | 0 | 0 |
T6 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 336215994 | 336097864 | 0 | 0 |
T1 | 189617 | 189609 | 0 | 0 |
T2 | 3706 | 3627 | 0 | 0 |
T3 | 8314 | 8257 | 0 | 0 |
T4 | 17274 | 17211 | 0 | 0 |
T5 | 33711 | 33657 | 0 | 0 |
T6 | 6707 | 6636 | 0 | 0 |
T9 | 2030 | 1969 | 0 | 0 |
T10 | 24332 | 24260 | 0 | 0 |
T11 | 4219 | 4156 | 0 | 0 |
T12 | 9595 | 9543 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 336215994 | 336084313 | 0 | 2685 |
T1 | 189617 | 189609 | 0 | 3 |
T2 | 3706 | 3624 | 0 | 3 |
T3 | 8314 | 8254 | 0 | 3 |
T4 | 17274 | 17208 | 0 | 3 |
T5 | 33711 | 33654 | 0 | 3 |
T6 | 6707 | 6621 | 0 | 3 |
T9 | 2030 | 1966 | 0 | 3 |
T10 | 24332 | 24257 | 0 | 3 |
T11 | 4219 | 4153 | 0 | 3 |
T12 | 9595 | 9540 | 0 | 3 |
Line No. | Total | Covered | Percent | |
---|---|---|---|---|
TOTAL | 3 | 3 | 100.00 | |
ALWAYS | 84 | 0 | 0 | |
CONT_ASSIGN | 93 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
CONT_ASSIGN | 106 | 1 | 1 | 100.00 |
Line No. | Covered | Statements | |
---|---|---|---|
84 | unreachable | ||
85 | unreachable | ||
87 | unreachable | ||
93 | 1 | 1 | |
106 | 2 | 2 |
Total | Attempted | Percent | Succeeded/Matched | Percent | |
---|---|---|---|---|---|
Assertions | 3 | 3 | 100.00 | 3 | 100.00 |
Cover properties | 0 | 0 | 0 | ||
Cover sequences | 0 | 0 | 0 | ||
Total | 3 | 3 | 100.00 | 3 | 100.00 |
Name | Attempts | Real Successes | Failures | Incomplete |
NumCopiesMustBeGreaterZero_A | 895 | 895 | 0 | 0 |
OutputsKnown_A | 336215994 | 336097864 | 0 | 0 |
gen_no_flops.OutputDelay_A | 336215994 | 336097864 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 895 | 895 | 0 | 0 |
T1 | 1 | 1 | 0 | 0 |
T2 | 1 | 1 | 0 | 0 |
T3 | 1 | 1 | 0 | 0 |
T4 | 1 | 1 | 0 | 0 |
T5 | 1 | 1 | 0 | 0 |
T6 | 1 | 1 | 0 | 0 |
T9 | 1 | 1 | 0 | 0 |
T10 | 1 | 1 | 0 | 0 |
T11 | 1 | 1 | 0 | 0 |
T12 | 1 | 1 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 336215994 | 336097864 | 0 | 0 |
T1 | 189617 | 189609 | 0 | 0 |
T2 | 3706 | 3627 | 0 | 0 |
T3 | 8314 | 8257 | 0 | 0 |
T4 | 17274 | 17211 | 0 | 0 |
T5 | 33711 | 33657 | 0 | 0 |
T6 | 6707 | 6636 | 0 | 0 |
T9 | 2030 | 1969 | 0 | 0 |
T10 | 24332 | 24260 | 0 | 0 |
T11 | 4219 | 4156 | 0 | 0 |
T12 | 9595 | 9543 | 0 | 0 |
Name | Attempts | Real Successes | Failures | Incomplete |
---|---|---|---|---|
Total | 336215994 | 336097864 | 0 | 0 |
T1 | 189617 | 189609 | 0 | 0 |
T2 | 3706 | 3627 | 0 | 0 |
T3 | 8314 | 8257 | 0 | 0 |
T4 | 17274 | 17211 | 0 | 0 |
T5 | 33711 | 33657 | 0 | 0 |
T6 | 6707 | 6636 | 0 | 0 |
T9 | 2030 | 1969 | 0 | 0 |
T10 | 24332 | 24260 | 0 | 0 |
T11 | 4219 | 4156 | 0 | 0 |
T12 | 9595 | 9543 | 0 | 0 |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |