Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1029
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
69.55 69.55 91.69 91.69 70.14 70.14 87.79 87.79 33.33 33.33 79.95 79.95 93.22 93.22 30.71 30.71 /workspace/coverage/default/29.sram_ctrl_lc_escalation.916881750
85.42 15.87 96.61 4.92 85.66 15.52 91.78 3.99 71.43 38.10 89.61 9.66 95.58 2.36 67.28 36.56 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1470662673
90.35 4.93 98.14 1.53 85.78 0.12 92.51 0.73 100.00 28.57 92.27 2.66 95.58 0.00 68.19 0.91 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.36132000
93.63 3.28 98.39 0.25 86.61 0.83 96.57 4.06 100.00 0.00 93.72 1.45 95.87 0.29 84.28 16.09 /workspace/coverage/default/16.sram_ctrl_executable.2001166904
94.53 0.90 98.73 0.34 88.63 2.01 97.54 0.97 100.00 0.00 95.17 1.45 96.46 0.59 85.19 0.91 /workspace/coverage/default/4.sram_ctrl_sec_cm.1709059214
95.22 0.69 98.73 0.00 89.22 0.59 97.54 0.00 100.00 0.00 95.17 0.00 96.46 0.00 89.40 4.20 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1241855064
95.87 0.66 98.98 0.25 89.22 0.00 98.58 1.04 100.00 0.00 95.41 0.24 96.61 0.15 92.32 2.93 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2208190347
96.31 0.44 99.07 0.08 90.17 0.95 98.65 0.07 100.00 0.00 95.89 0.48 96.61 0.00 93.78 1.46 /workspace/coverage/default/7.sram_ctrl_stress_all.266512553
96.51 0.20 99.07 0.00 90.17 0.00 98.72 0.07 100.00 0.00 95.89 0.00 97.79 1.18 93.97 0.18 /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2283807759
96.71 0.20 99.07 0.00 90.52 0.36 98.82 0.10 100.00 0.00 95.89 0.00 97.79 0.00 94.88 0.91 /workspace/coverage/default/22.sram_ctrl_stress_all.3185860718
96.90 0.19 99.07 0.00 90.64 0.12 98.82 0.00 100.00 0.00 95.89 0.00 98.97 1.18 94.88 0.00 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2464456546
97.05 0.16 99.07 0.00 90.64 0.00 98.82 0.00 100.00 0.00 95.89 0.00 98.97 0.00 95.98 1.10 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1560490261
97.18 0.13 99.15 0.08 90.64 0.00 99.65 0.83 100.00 0.00 95.89 0.00 98.97 0.00 95.98 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.3974659922
97.27 0.09 99.15 0.00 91.00 0.36 99.72 0.07 100.00 0.00 95.89 0.00 98.97 0.00 96.16 0.18 /workspace/coverage/default/34.sram_ctrl_alert_test.4191156007
97.32 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 95.89 0.00 98.97 0.00 96.53 0.37 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.636840304
97.37 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 95.89 0.00 98.97 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.348934257
97.43 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 95.89 0.00 98.97 0.00 97.26 0.37 /workspace/coverage/default/34.sram_ctrl_stress_all.226987458
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.24 98.97 0.00 97.26 0.00 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3417908731
97.49 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.46503103
97.51 0.02 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1025673907

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1736216974
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1710845914
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2524720498
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.252509256
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2597277238
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1444156623
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3347628591
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2833960999
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1416386234
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2177400880
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.880055745
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.465900252
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3620060004
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.373342609
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3326131073
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.811339413
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1977782433
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2131234112
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.912063414
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.643777076
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1000652361
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2572171455
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2551624523
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1275444923
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1436442983
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.811643360
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2882903030
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3930343362
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.549011739
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.921588806
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2097138672
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3605893915
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3352791494
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2347954238
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.552185391
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3662353535
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.889621504
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3140592613
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2170624594
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1907587649
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.49687446
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3188551767
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4268389627
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2942134441
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1823503375
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1262354357
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1495808458
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3828610175
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1152054314
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1059781191
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2595615468
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.160580483
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2089080518
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1568646522
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2926532817
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3731884432
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.4155032168
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1628044628
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4260988191
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1724241037
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.4210979481
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2166225177
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2209112418
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3513648974
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.854613515
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3483327680
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1566220097
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.4241090413
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3604631374
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3377807914
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3556367470
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2311881520
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1808402814
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.296805530
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.922942837
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.78881976
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.2943466745
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.66342237
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3174265943
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2680485829
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.812187447
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.4207836331
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3759256565
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1404766780
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.236814510
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1072682839
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2995859122
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1970740330
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3692563534
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3986490297
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.4279504110
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.971943455
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3057556970
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1466723941
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3426112660
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1515061062
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1080157127
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.298298296
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.137426986
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.352155856
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4261172210
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3548991102
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1081728125
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2269940273
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1790111701
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.715346153
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2425187241
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1774569285
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.812812993
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1645237511
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.646092785
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3108905299
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1796269031
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1899500937
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3239704954
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1114862127
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.4265440749
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3357447292
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1846046936
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1394741094
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4178447653
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3876905955
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1217862372
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1858148124
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1311781172
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2457004228
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3054660730
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.812447390
/workspace/coverage/default/0.sram_ctrl_alert_test.1518568918
/workspace/coverage/default/0.sram_ctrl_bijection.1258433553
/workspace/coverage/default/0.sram_ctrl_executable.2345589315
/workspace/coverage/default/0.sram_ctrl_lc_escalation.4038390740
/workspace/coverage/default/0.sram_ctrl_max_throughput.3419549110
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.586613064
/workspace/coverage/default/0.sram_ctrl_mem_walk.2201419023
/workspace/coverage/default/0.sram_ctrl_multiple_keys.870841618
/workspace/coverage/default/0.sram_ctrl_partial_access.2874312635
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4091639700
/workspace/coverage/default/0.sram_ctrl_ram_cfg.3972355846
/workspace/coverage/default/0.sram_ctrl_regwen.3935206158
/workspace/coverage/default/0.sram_ctrl_sec_cm.2089686287
/workspace/coverage/default/0.sram_ctrl_smoke.1418980585
/workspace/coverage/default/0.sram_ctrl_stress_all.1009931884
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2273615849
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1992677789
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2792363382
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.330760362
/workspace/coverage/default/1.sram_ctrl_alert_test.389151782
/workspace/coverage/default/1.sram_ctrl_bijection.436700752
/workspace/coverage/default/1.sram_ctrl_executable.1221331825
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2861824725
/workspace/coverage/default/1.sram_ctrl_max_throughput.3539228418
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1390805340
/workspace/coverage/default/1.sram_ctrl_mem_walk.1976639210
/workspace/coverage/default/1.sram_ctrl_multiple_keys.971676088
/workspace/coverage/default/1.sram_ctrl_partial_access.2353385956
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1562673856
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3621016064
/workspace/coverage/default/1.sram_ctrl_regwen.628419360
/workspace/coverage/default/1.sram_ctrl_sec_cm.269670631
/workspace/coverage/default/1.sram_ctrl_smoke.3771698236
/workspace/coverage/default/1.sram_ctrl_stress_all.1955462671
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1603679325
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2188514321
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3743862694
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2916308862
/workspace/coverage/default/10.sram_ctrl_alert_test.426203949
/workspace/coverage/default/10.sram_ctrl_bijection.2599657368
/workspace/coverage/default/10.sram_ctrl_executable.2249621405
/workspace/coverage/default/10.sram_ctrl_lc_escalation.396913790
/workspace/coverage/default/10.sram_ctrl_max_throughput.1465153038
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.545296760
/workspace/coverage/default/10.sram_ctrl_mem_walk.1497927198
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3016691195
/workspace/coverage/default/10.sram_ctrl_partial_access.3658744888
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3869707340
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3281766307
/workspace/coverage/default/10.sram_ctrl_regwen.1006857191
/workspace/coverage/default/10.sram_ctrl_smoke.3651005819
/workspace/coverage/default/10.sram_ctrl_stress_all.475667582
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3003622410
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3481276798
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.4047135346
/workspace/coverage/default/11.sram_ctrl_alert_test.3483305580
/workspace/coverage/default/11.sram_ctrl_bijection.1508634648
/workspace/coverage/default/11.sram_ctrl_executable.3733036362
/workspace/coverage/default/11.sram_ctrl_lc_escalation.175447948
/workspace/coverage/default/11.sram_ctrl_max_throughput.2865609596
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.688257884
/workspace/coverage/default/11.sram_ctrl_mem_walk.2098288124
/workspace/coverage/default/11.sram_ctrl_multiple_keys.65403138
/workspace/coverage/default/11.sram_ctrl_partial_access.2608929710
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1491103350
/workspace/coverage/default/11.sram_ctrl_regwen.1984612857
/workspace/coverage/default/11.sram_ctrl_smoke.789815156
/workspace/coverage/default/11.sram_ctrl_stress_all.2441501507
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.99477206
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4009183169
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2155749467
/workspace/coverage/default/12.sram_ctrl_alert_test.3972945174
/workspace/coverage/default/12.sram_ctrl_bijection.1102144506
/workspace/coverage/default/12.sram_ctrl_executable.3558305439
/workspace/coverage/default/12.sram_ctrl_lc_escalation.23434289
/workspace/coverage/default/12.sram_ctrl_max_throughput.3568520562
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/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3489271635
/workspace/coverage/default/43.sram_ctrl_mem_walk.3359092344
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3700754205
/workspace/coverage/default/43.sram_ctrl_partial_access.2651379094
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1198681028
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2553317840
/workspace/coverage/default/43.sram_ctrl_regwen.686362183
/workspace/coverage/default/43.sram_ctrl_smoke.3637556116
/workspace/coverage/default/43.sram_ctrl_stress_all.1521447630
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2383440181
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3944025539
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1741467513
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3967122216
/workspace/coverage/default/44.sram_ctrl_alert_test.3351862972
/workspace/coverage/default/44.sram_ctrl_bijection.2958072047
/workspace/coverage/default/44.sram_ctrl_executable.3735032498
/workspace/coverage/default/44.sram_ctrl_lc_escalation.4016767506
/workspace/coverage/default/44.sram_ctrl_max_throughput.2818868645
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1118520518
/workspace/coverage/default/44.sram_ctrl_mem_walk.3009552960
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3379458043
/workspace/coverage/default/44.sram_ctrl_partial_access.2553515729
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2371236440
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2742770924
/workspace/coverage/default/44.sram_ctrl_regwen.1345835510
/workspace/coverage/default/44.sram_ctrl_smoke.3825712164
/workspace/coverage/default/44.sram_ctrl_stress_all.4172884051
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2681215829
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2529765487
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2625697311
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.966125432
/workspace/coverage/default/45.sram_ctrl_alert_test.677883416
/workspace/coverage/default/45.sram_ctrl_bijection.2030662291
/workspace/coverage/default/45.sram_ctrl_executable.2666390220
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3794678352
/workspace/coverage/default/45.sram_ctrl_max_throughput.2085589995
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2890954193
/workspace/coverage/default/45.sram_ctrl_mem_walk.2149575491
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2929078057
/workspace/coverage/default/45.sram_ctrl_partial_access.554040217
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.311477943
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1980201246
/workspace/coverage/default/45.sram_ctrl_regwen.1288747768
/workspace/coverage/default/45.sram_ctrl_smoke.4273218440
/workspace/coverage/default/45.sram_ctrl_stress_all.3684760878
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.136612257
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2199623887
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3699082280
/workspace/coverage/default/46.sram_ctrl_alert_test.2597413210
/workspace/coverage/default/46.sram_ctrl_bijection.3282880854
/workspace/coverage/default/46.sram_ctrl_executable.3032368818
/workspace/coverage/default/46.sram_ctrl_lc_escalation.200598326
/workspace/coverage/default/46.sram_ctrl_max_throughput.3907122269
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1677662376
/workspace/coverage/default/46.sram_ctrl_mem_walk.825810498
/workspace/coverage/default/46.sram_ctrl_multiple_keys.4075897204
/workspace/coverage/default/46.sram_ctrl_partial_access.85364620
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3406391015
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2539533589
/workspace/coverage/default/46.sram_ctrl_regwen.1450855100
/workspace/coverage/default/46.sram_ctrl_smoke.2010007411
/workspace/coverage/default/46.sram_ctrl_stress_all.2382633573
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.983651745
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.281182309
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1230006088
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3722348925
/workspace/coverage/default/47.sram_ctrl_alert_test.565675033
/workspace/coverage/default/47.sram_ctrl_bijection.4253649867
/workspace/coverage/default/47.sram_ctrl_executable.3661546176
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1044695474
/workspace/coverage/default/47.sram_ctrl_max_throughput.3232084651
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2957674306
/workspace/coverage/default/47.sram_ctrl_mem_walk.3680970002
/workspace/coverage/default/47.sram_ctrl_multiple_keys.232305225
/workspace/coverage/default/47.sram_ctrl_partial_access.1882416874
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2220780355
/workspace/coverage/default/47.sram_ctrl_ram_cfg.4056927147
/workspace/coverage/default/47.sram_ctrl_regwen.860848453
/workspace/coverage/default/47.sram_ctrl_smoke.3477563204
/workspace/coverage/default/47.sram_ctrl_stress_all.2758445632
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.818834754
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2120563899
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3180575246
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.523199888
/workspace/coverage/default/48.sram_ctrl_alert_test.1453551431
/workspace/coverage/default/48.sram_ctrl_bijection.4056247646
/workspace/coverage/default/48.sram_ctrl_executable.1538061576
/workspace/coverage/default/48.sram_ctrl_lc_escalation.473824787
/workspace/coverage/default/48.sram_ctrl_max_throughput.599436697
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1294618904
/workspace/coverage/default/48.sram_ctrl_mem_walk.2838372615
/workspace/coverage/default/48.sram_ctrl_multiple_keys.49017019
/workspace/coverage/default/48.sram_ctrl_partial_access.2571561950
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.677939882
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1974959976
/workspace/coverage/default/48.sram_ctrl_regwen.1189786459
/workspace/coverage/default/48.sram_ctrl_smoke.557206689
/workspace/coverage/default/48.sram_ctrl_stress_all.935406919
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1558446919
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.244400395
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2454084296
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.685890369
/workspace/coverage/default/49.sram_ctrl_alert_test.4294543863
/workspace/coverage/default/49.sram_ctrl_bijection.296789931
/workspace/coverage/default/49.sram_ctrl_executable.2575972696
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1886827593
/workspace/coverage/default/49.sram_ctrl_max_throughput.3158589820
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3574649684
/workspace/coverage/default/49.sram_ctrl_mem_walk.1597418982
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1068596330
/workspace/coverage/default/49.sram_ctrl_partial_access.249269756
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.321817889
/workspace/coverage/default/49.sram_ctrl_ram_cfg.750730713
/workspace/coverage/default/49.sram_ctrl_regwen.2358917725
/workspace/coverage/default/49.sram_ctrl_smoke.188068794
/workspace/coverage/default/49.sram_ctrl_stress_all.4154797890
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3250913090
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.673729196
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1281706816
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2392794243
/workspace/coverage/default/5.sram_ctrl_alert_test.3435970932
/workspace/coverage/default/5.sram_ctrl_bijection.1740438386
/workspace/coverage/default/5.sram_ctrl_executable.917355949
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2330463137
/workspace/coverage/default/5.sram_ctrl_max_throughput.292283711
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.344601596
/workspace/coverage/default/5.sram_ctrl_mem_walk.1903451399
/workspace/coverage/default/5.sram_ctrl_multiple_keys.273740668
/workspace/coverage/default/5.sram_ctrl_partial_access.737778850
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.4020988808
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3511472112
/workspace/coverage/default/5.sram_ctrl_regwen.1862679198
/workspace/coverage/default/5.sram_ctrl_smoke.296944530
/workspace/coverage/default/5.sram_ctrl_stress_all.2036944891
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.269779657
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3990917971
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3900400603
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3049027488
/workspace/coverage/default/6.sram_ctrl_alert_test.3296851405
/workspace/coverage/default/6.sram_ctrl_bijection.4113585392
/workspace/coverage/default/6.sram_ctrl_executable.3901275652
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3402496007
/workspace/coverage/default/6.sram_ctrl_max_throughput.1077750968
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2459795837
/workspace/coverage/default/6.sram_ctrl_mem_walk.362212857
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3605631910
/workspace/coverage/default/6.sram_ctrl_partial_access.1605104495
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.160557182
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2987865762
/workspace/coverage/default/6.sram_ctrl_regwen.3490248514
/workspace/coverage/default/6.sram_ctrl_smoke.812356059
/workspace/coverage/default/6.sram_ctrl_stress_all.1327434808
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2462613786
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1539064857
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.310622438
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1947877532
/workspace/coverage/default/7.sram_ctrl_alert_test.2129694523
/workspace/coverage/default/7.sram_ctrl_bijection.3573944186
/workspace/coverage/default/7.sram_ctrl_executable.2744021278
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3065942292
/workspace/coverage/default/7.sram_ctrl_max_throughput.831469152
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3557205905
/workspace/coverage/default/7.sram_ctrl_mem_walk.853688552
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1656945259
/workspace/coverage/default/7.sram_ctrl_partial_access.2288852404
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3605882013
/workspace/coverage/default/7.sram_ctrl_ram_cfg.292359261
/workspace/coverage/default/7.sram_ctrl_regwen.21273224
/workspace/coverage/default/7.sram_ctrl_smoke.1256437709
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2425650978
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.434316734
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1321833390
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2045646825
/workspace/coverage/default/8.sram_ctrl_alert_test.1653951611
/workspace/coverage/default/8.sram_ctrl_bijection.1715777266
/workspace/coverage/default/8.sram_ctrl_executable.2384873889
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1655583731
/workspace/coverage/default/8.sram_ctrl_max_throughput.2466736375
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3394664357
/workspace/coverage/default/8.sram_ctrl_mem_walk.1338178888
/workspace/coverage/default/8.sram_ctrl_multiple_keys.817638258
/workspace/coverage/default/8.sram_ctrl_partial_access.1546107376
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2391958778
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2087143956
/workspace/coverage/default/8.sram_ctrl_regwen.2976151878
/workspace/coverage/default/8.sram_ctrl_smoke.3089358268
/workspace/coverage/default/8.sram_ctrl_stress_all.2224433002
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3790054746
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3425946604
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2122090048
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3381371346
/workspace/coverage/default/9.sram_ctrl_alert_test.774475224
/workspace/coverage/default/9.sram_ctrl_bijection.2012174290
/workspace/coverage/default/9.sram_ctrl_executable.3939732543
/workspace/coverage/default/9.sram_ctrl_lc_escalation.132447848
/workspace/coverage/default/9.sram_ctrl_max_throughput.3371879991
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3121503165
/workspace/coverage/default/9.sram_ctrl_mem_walk.1484013450
/workspace/coverage/default/9.sram_ctrl_multiple_keys.113787404
/workspace/coverage/default/9.sram_ctrl_partial_access.1821113266
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4038311743
/workspace/coverage/default/9.sram_ctrl_ram_cfg.729352264
/workspace/coverage/default/9.sram_ctrl_regwen.1033360866
/workspace/coverage/default/9.sram_ctrl_smoke.2224863616
/workspace/coverage/default/9.sram_ctrl_stress_all.4190258309
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.185662444
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.740849154
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3925560706



Total test records in report: 1029
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/16.sram_ctrl_executable.2001166904 Jul 04 07:15:52 PM PDT 24 Jul 04 07:33:44 PM PDT 24 38697097549 ps
T2 /workspace/coverage/default/24.sram_ctrl_ram_cfg.3050733102 Jul 04 07:16:31 PM PDT 24 Jul 04 07:16:33 PM PDT 24 37085415 ps
T3 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.389367778 Jul 04 07:17:06 PM PDT 24 Jul 04 07:17:32 PM PDT 24 332602470 ps
T4 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.344601596 Jul 04 07:15:18 PM PDT 24 Jul 04 07:15:24 PM PDT 24 179977483 ps
T9 /workspace/coverage/default/41.sram_ctrl_ram_cfg.3260714872 Jul 04 07:18:50 PM PDT 24 Jul 04 07:18:51 PM PDT 24 84632704 ps
T10 /workspace/coverage/default/29.sram_ctrl_bijection.3341006229 Jul 04 07:17:06 PM PDT 24 Jul 04 07:17:21 PM PDT 24 496580814 ps
T5 /workspace/coverage/default/25.sram_ctrl_mem_walk.3450629230 Jul 04 07:16:38 PM PDT 24 Jul 04 07:16:44 PM PDT 24 358636196 ps
T6 /workspace/coverage/default/29.sram_ctrl_lc_escalation.916881750 Jul 04 07:17:02 PM PDT 24 Jul 04 07:17:04 PM PDT 24 958165186 ps
T11 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1938900529 Jul 04 07:16:08 PM PDT 24 Jul 04 07:16:12 PM PDT 24 42640456 ps
T12 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.1979413585 Jul 04 07:18:15 PM PDT 24 Jul 04 07:18:50 PM PDT 24 208611635 ps
T24 /workspace/coverage/default/22.sram_ctrl_smoke.1998524202 Jul 04 07:16:20 PM PDT 24 Jul 04 07:16:23 PM PDT 24 147598500 ps
T26 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3425946604 Jul 04 07:15:31 PM PDT 24 Jul 04 07:19:20 PM PDT 24 8642937071 ps
T13 /workspace/coverage/default/34.sram_ctrl_alert_test.4191156007 Jul 04 07:17:45 PM PDT 24 Jul 04 07:17:46 PM PDT 24 27317198 ps
T19 /workspace/coverage/default/28.sram_ctrl_bijection.1526869131 Jul 04 07:16:53 PM PDT 24 Jul 04 07:17:49 PM PDT 24 1292554670 ps
T41 /workspace/coverage/default/27.sram_ctrl_smoke.1219351301 Jul 04 07:16:52 PM PDT 24 Jul 04 07:18:36 PM PDT 24 132076182 ps
T67 /workspace/coverage/default/38.sram_ctrl_max_throughput.3428946656 Jul 04 07:18:17 PM PDT 24 Jul 04 07:20:40 PM PDT 24 136135304 ps
T40 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2208190347 Jul 04 07:15:49 PM PDT 24 Jul 04 07:22:51 PM PDT 24 130905922507 ps
T7 /workspace/coverage/default/47.sram_ctrl_stress_all.2758445632 Jul 04 07:19:46 PM PDT 24 Jul 04 08:20:59 PM PDT 24 20978601314 ps
T39 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.1705154402 Jul 04 07:16:25 PM PDT 24 Jul 04 07:16:29 PM PDT 24 449568743 ps
T108 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2883472771 Jul 04 07:15:47 PM PDT 24 Jul 04 07:20:19 PM PDT 24 3578445037 ps
T88 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3869707340 Jul 04 07:15:37 PM PDT 24 Jul 04 07:25:04 PM PDT 24 24363069600 ps
T47 /workspace/coverage/default/21.sram_ctrl_mem_walk.132711714 Jul 04 07:16:22 PM PDT 24 Jul 04 07:16:33 PM PDT 24 190066636 ps
T66 /workspace/coverage/default/10.sram_ctrl_partial_access.3658744888 Jul 04 07:15:42 PM PDT 24 Jul 04 07:16:04 PM PDT 24 535888505 ps
T27 /workspace/coverage/default/13.sram_ctrl_ram_cfg.2093388716 Jul 04 07:15:44 PM PDT 24 Jul 04 07:15:46 PM PDT 24 31373846 ps
T144 /workspace/coverage/default/43.sram_ctrl_max_throughput.3114676528 Jul 04 07:19:09 PM PDT 24 Jul 04 07:19:19 PM PDT 24 130142243 ps
T145 /workspace/coverage/default/26.sram_ctrl_smoke.271307807 Jul 04 07:16:51 PM PDT 24 Jul 04 07:16:57 PM PDT 24 254504424 ps
T14 /workspace/coverage/default/37.sram_ctrl_alert_test.1000245382 Jul 04 07:18:15 PM PDT 24 Jul 04 07:18:17 PM PDT 24 18970286 ps
T8 /workspace/coverage/default/28.sram_ctrl_lc_escalation.2504644027 Jul 04 07:16:56 PM PDT 24 Jul 04 07:17:03 PM PDT 24 617031990 ps
T20 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.1470662673 Jul 04 07:17:45 PM PDT 24 Jul 04 07:18:03 PM PDT 24 1027589473 ps
T72 /workspace/coverage/default/40.sram_ctrl_bijection.495405207 Jul 04 07:18:29 PM PDT 24 Jul 04 07:19:38 PM PDT 24 6186986784 ps
T42 /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2634817294 Jul 04 07:15:49 PM PDT 24 Jul 04 07:38:27 PM PDT 24 4057514435 ps
T25 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1603679325 Jul 04 07:15:06 PM PDT 24 Jul 04 07:15:43 PM PDT 24 4907001702 ps
T21 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2681215829 Jul 04 07:19:23 PM PDT 24 Jul 04 07:31:43 PM PDT 24 3194566027 ps
T73 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.3904061745 Jul 04 07:17:59 PM PDT 24 Jul 04 07:18:05 PM PDT 24 306550754 ps
T22 /workspace/coverage/default/39.sram_ctrl_stress_all.2400681251 Jul 04 07:18:29 PM PDT 24 Jul 04 07:39:00 PM PDT 24 3809627945 ps
T74 /workspace/coverage/default/22.sram_ctrl_ram_cfg.427853469 Jul 04 07:16:25 PM PDT 24 Jul 04 07:16:26 PM PDT 24 26532677 ps
T75 /workspace/coverage/default/15.sram_ctrl_executable.2459801407 Jul 04 07:15:51 PM PDT 24 Jul 04 07:34:48 PM PDT 24 2397299482 ps
T76 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.1294618904 Jul 04 07:19:57 PM PDT 24 Jul 04 07:20:03 PM PDT 24 659344435 ps
T149 /workspace/coverage/default/41.sram_ctrl_bijection.983795810 Jul 04 07:18:44 PM PDT 24 Jul 04 07:19:05 PM PDT 24 1402470700 ps
T64 /workspace/coverage/default/24.sram_ctrl_regwen.3696285859 Jul 04 07:16:32 PM PDT 24 Jul 04 07:39:58 PM PDT 24 10122080284 ps
T135 /workspace/coverage/default/36.sram_ctrl_executable.3051350315 Jul 04 07:18:09 PM PDT 24 Jul 04 07:23:00 PM PDT 24 1987998826 ps
T56 /workspace/coverage/default/8.sram_ctrl_mem_walk.1338178888 Jul 04 07:15:34 PM PDT 24 Jul 04 07:15:45 PM PDT 24 1744803590 ps
T150 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1741467513 Jul 04 07:19:07 PM PDT 24 Jul 04 07:20:15 PM PDT 24 144278532 ps
T53 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2464456546 Jul 04 07:15:44 PM PDT 24 Jul 04 07:15:48 PM PDT 24 101487970 ps
T109 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4091639700 Jul 04 07:14:58 PM PDT 24 Jul 04 07:18:26 PM PDT 24 2964079364 ps
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T152 /workspace/coverage/default/3.sram_ctrl_partial_access.2444625677 Jul 04 07:15:09 PM PDT 24 Jul 04 07:15:14 PM PDT 24 253415596 ps
T153 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1230006088 Jul 04 07:19:31 PM PDT 24 Jul 04 07:22:11 PM PDT 24 201312628 ps
T45 /workspace/coverage/default/34.sram_ctrl_stress_all.226987458 Jul 04 07:17:47 PM PDT 24 Jul 04 07:56:49 PM PDT 24 28101259309 ps
T148 /workspace/coverage/default/37.sram_ctrl_multiple_keys.4244715692 Jul 04 07:18:06 PM PDT 24 Jul 04 07:25:29 PM PDT 24 30547333766 ps
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T43 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.685890369 Jul 04 07:20:03 PM PDT 24 Jul 04 07:43:10 PM PDT 24 30891100559 ps
T110 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.1464363202 Jul 04 07:16:31 PM PDT 24 Jul 04 07:19:34 PM PDT 24 11611749144 ps
T111 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.1659623540 Jul 04 07:16:41 PM PDT 24 Jul 04 07:20:12 PM PDT 24 4251390638 ps
T155 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.3979132942 Jul 04 07:16:40 PM PDT 24 Jul 04 07:16:53 PM PDT 24 276641931 ps
T112 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.952202949 Jul 04 07:15:45 PM PDT 24 Jul 04 07:19:51 PM PDT 24 2530236506 ps
T57 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.679892257 Jul 04 07:16:55 PM PDT 24 Jul 04 07:17:05 PM PDT 24 1080776099 ps
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T140 /workspace/coverage/default/20.sram_ctrl_partial_access.220019856 Jul 04 07:16:15 PM PDT 24 Jul 04 07:16:44 PM PDT 24 1732066017 ps
T54 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2931771293 Jul 04 07:17:47 PM PDT 24 Jul 04 07:17:53 PM PDT 24 206433961 ps
T159 /workspace/coverage/default/10.sram_ctrl_smoke.3651005819 Jul 04 07:15:42 PM PDT 24 Jul 04 07:15:59 PM PDT 24 7560986935 ps
T160 /workspace/coverage/default/16.sram_ctrl_ram_cfg.3844445421 Jul 04 07:15:50 PM PDT 24 Jul 04 07:15:52 PM PDT 24 85460619 ps
T55 /workspace/coverage/default/42.sram_ctrl_mem_walk.1106726906 Jul 04 07:18:59 PM PDT 24 Jul 04 07:19:12 PM PDT 24 1274463634 ps
T161 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3585491457 Jul 04 07:15:44 PM PDT 24 Jul 04 07:17:33 PM PDT 24 306702266 ps
T44 /workspace/coverage/default/19.sram_ctrl_access_during_key_req.1758696367 Jul 04 07:16:07 PM PDT 24 Jul 04 07:22:59 PM PDT 24 8157174453 ps
T23 /workspace/coverage/default/40.sram_ctrl_lc_escalation.4242211430 Jul 04 07:18:37 PM PDT 24 Jul 04 07:18:47 PM PDT 24 1129770423 ps
T65 /workspace/coverage/default/29.sram_ctrl_regwen.38675378 Jul 04 07:17:06 PM PDT 24 Jul 04 07:25:21 PM PDT 24 2351083171 ps
T46 /workspace/coverage/default/19.sram_ctrl_executable.3211920127 Jul 04 07:16:07 PM PDT 24 Jul 04 07:39:41 PM PDT 24 108032275621 ps
T77 /workspace/coverage/default/26.sram_ctrl_lc_escalation.3422765493 Jul 04 07:16:51 PM PDT 24 Jul 04 07:16:54 PM PDT 24 237059784 ps
T162 /workspace/coverage/default/41.sram_ctrl_alert_test.2693273776 Jul 04 07:18:51 PM PDT 24 Jul 04 07:18:52 PM PDT 24 17050988 ps
T103 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.3311768630 Jul 04 07:17:03 PM PDT 24 Jul 04 07:28:32 PM PDT 24 6378915811 ps
T163 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.3464518167 Jul 04 07:18:16 PM PDT 24 Jul 04 07:34:21 PM PDT 24 6945928202 ps
T164 /workspace/coverage/default/40.sram_ctrl_alert_test.3999089363 Jul 04 07:18:44 PM PDT 24 Jul 04 07:18:45 PM PDT 24 85853290 ps
T141 /workspace/coverage/default/6.sram_ctrl_stress_all.1327434808 Jul 04 07:15:24 PM PDT 24 Jul 04 08:02:22 PM PDT 24 63280867502 ps
T133 /workspace/coverage/default/4.sram_ctrl_executable.2598654174 Jul 04 07:15:12 PM PDT 24 Jul 04 07:33:54 PM PDT 24 21839563264 ps
T113 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1621363288 Jul 04 07:17:52 PM PDT 24 Jul 04 07:25:17 PM PDT 24 48083015746 ps
T78 /workspace/coverage/default/32.sram_ctrl_lc_escalation.2146305954 Jul 04 07:17:29 PM PDT 24 Jul 04 07:17:35 PM PDT 24 2327715966 ps
T136 /workspace/coverage/default/7.sram_ctrl_stress_all.266512553 Jul 04 07:15:32 PM PDT 24 Jul 04 08:29:40 PM PDT 24 74872149125 ps
T58 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1118520518 Jul 04 07:19:23 PM PDT 24 Jul 04 07:19:29 PM PDT 24 101071349 ps
T146 /workspace/coverage/default/23.sram_ctrl_regwen.2962917330 Jul 04 07:16:35 PM PDT 24 Jul 04 07:30:52 PM PDT 24 15004542769 ps
T165 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.244400395 Jul 04 07:19:47 PM PDT 24 Jul 04 07:22:51 PM PDT 24 1888341708 ps
T134 /workspace/coverage/default/35.sram_ctrl_regwen.3927361516 Jul 04 07:18:00 PM PDT 24 Jul 04 07:32:33 PM PDT 24 9470707507 ps
T147 /workspace/coverage/default/26.sram_ctrl_stress_pipeline.268047188 Jul 04 07:16:52 PM PDT 24 Jul 04 07:22:21 PM PDT 24 3443754973 ps
T166 /workspace/coverage/default/12.sram_ctrl_max_throughput.3568520562 Jul 04 07:15:43 PM PDT 24 Jul 04 07:16:15 PM PDT 24 378849339 ps
T167 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3246518218 Jul 04 07:17:01 PM PDT 24 Jul 04 07:17:06 PM PDT 24 66285862 ps
T138 /workspace/coverage/default/6.sram_ctrl_regwen.3490248514 Jul 04 07:15:24 PM PDT 24 Jul 04 07:24:59 PM PDT 24 1371796818 ps
T168 /workspace/coverage/default/36.sram_ctrl_alert_test.472766506 Jul 04 07:18:06 PM PDT 24 Jul 04 07:18:07 PM PDT 24 36577946 ps
T169 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.3779702954 Jul 04 07:15:52 PM PDT 24 Jul 04 07:18:50 PM PDT 24 3570423757 ps
T170 /workspace/coverage/default/15.sram_ctrl_alert_test.15903049 Jul 04 07:15:51 PM PDT 24 Jul 04 07:15:52 PM PDT 24 20212918 ps
T171 /workspace/coverage/default/33.sram_ctrl_ram_cfg.708202114 Jul 04 07:17:41 PM PDT 24 Jul 04 07:17:42 PM PDT 24 170552562 ps
T139 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1198681028 Jul 04 07:19:07 PM PDT 24 Jul 04 07:25:05 PM PDT 24 14424330041 ps
T59 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.4293461658 Jul 04 07:15:44 PM PDT 24 Jul 04 07:25:21 PM PDT 24 2077085606 ps
T172 /workspace/coverage/default/4.sram_ctrl_ram_cfg.2195319468 Jul 04 07:15:25 PM PDT 24 Jul 04 07:15:26 PM PDT 24 35180676 ps
T173 /workspace/coverage/default/6.sram_ctrl_ram_cfg.2987865762 Jul 04 07:15:27 PM PDT 24 Jul 04 07:15:28 PM PDT 24 34037093 ps
T174 /workspace/coverage/default/16.sram_ctrl_regwen.2999198712 Jul 04 07:15:53 PM PDT 24 Jul 04 07:18:07 PM PDT 24 11455743594 ps
T175 /workspace/coverage/default/19.sram_ctrl_regwen.315066199 Jul 04 07:16:09 PM PDT 24 Jul 04 07:31:54 PM PDT 24 6110218827 ps
T176 /workspace/coverage/default/4.sram_ctrl_smoke.3117517981 Jul 04 07:15:13 PM PDT 24 Jul 04 07:15:35 PM PDT 24 1413502357 ps
T16 /workspace/coverage/default/4.sram_ctrl_sec_cm.1709059214 Jul 04 07:15:23 PM PDT 24 Jul 04 07:15:26 PM PDT 24 849131267 ps
T30 /workspace/coverage/default/47.sram_ctrl_mem_walk.3680970002 Jul 04 07:19:46 PM PDT 24 Jul 04 07:19:57 PM PDT 24 467156538 ps
T31 /workspace/coverage/default/3.sram_ctrl_executable.93149435 Jul 04 07:15:12 PM PDT 24 Jul 04 07:39:20 PM PDT 24 4635839167 ps
T32 /workspace/coverage/default/9.sram_ctrl_multiple_keys.113787404 Jul 04 07:15:30 PM PDT 24 Jul 04 07:18:07 PM PDT 24 404634266 ps
T33 /workspace/coverage/default/22.sram_ctrl_alert_test.751784540 Jul 04 07:16:24 PM PDT 24 Jul 04 07:16:25 PM PDT 24 51692147 ps
T34 /workspace/coverage/default/18.sram_ctrl_mem_walk.519475282 Jul 04 07:16:08 PM PDT 24 Jul 04 07:16:14 PM PDT 24 241115930 ps
T35 /workspace/coverage/default/28.sram_ctrl_executable.3164901749 Jul 04 07:16:57 PM PDT 24 Jul 04 07:27:58 PM PDT 24 13245264092 ps
T36 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.677939882 Jul 04 07:19:44 PM PDT 24 Jul 04 07:21:49 PM PDT 24 11448986173 ps
T37 /workspace/coverage/default/0.sram_ctrl_mem_walk.2201419023 Jul 04 07:15:05 PM PDT 24 Jul 04 07:15:16 PM PDT 24 531087633 ps
T38 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3900400603 Jul 04 07:15:22 PM PDT 24 Jul 04 07:15:29 PM PDT 24 402088181 ps
T177 /workspace/coverage/default/43.sram_ctrl_regwen.686362183 Jul 04 07:19:07 PM PDT 24 Jul 04 07:39:47 PM PDT 24 11357881746 ps
T137 /workspace/coverage/default/22.sram_ctrl_stress_all.3185860718 Jul 04 07:16:35 PM PDT 24 Jul 04 08:42:56 PM PDT 24 207348987328 ps
T178 /workspace/coverage/default/8.sram_ctrl_bijection.1715777266 Jul 04 07:15:31 PM PDT 24 Jul 04 07:16:31 PM PDT 24 2667763291 ps
T48 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1837887953 Jul 04 07:16:12 PM PDT 24 Jul 04 07:16:33 PM PDT 24 1512244683 ps
T179 /workspace/coverage/default/28.sram_ctrl_ram_cfg.1480329358 Jul 04 07:16:59 PM PDT 24 Jul 04 07:17:00 PM PDT 24 29165876 ps
T180 /workspace/coverage/default/41.sram_ctrl_max_throughput.3329784177 Jul 04 07:18:45 PM PDT 24 Jul 04 07:18:57 PM PDT 24 62516045 ps
T181 /workspace/coverage/default/28.sram_ctrl_multiple_keys.696637741 Jul 04 07:16:54 PM PDT 24 Jul 04 07:27:16 PM PDT 24 24923547448 ps
T182 /workspace/coverage/default/13.sram_ctrl_regwen.3261418797 Jul 04 07:15:47 PM PDT 24 Jul 04 07:25:35 PM PDT 24 10855632821 ps
T183 /workspace/coverage/default/0.sram_ctrl_bijection.1258433553 Jul 04 07:15:02 PM PDT 24 Jul 04 07:15:29 PM PDT 24 1644643513 ps
T49 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.36132000 Jul 04 07:15:41 PM PDT 24 Jul 04 07:16:03 PM PDT 24 3091878511 ps
T184 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.3943605397 Jul 04 07:15:06 PM PDT 24 Jul 04 07:24:37 PM PDT 24 14762014669 ps
T185 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3180575246 Jul 04 07:19:38 PM PDT 24 Jul 04 07:20:11 PM PDT 24 94835354 ps
T186 /workspace/coverage/default/36.sram_ctrl_max_throughput.1699236584 Jul 04 07:18:09 PM PDT 24 Jul 04 07:18:17 PM PDT 24 231647384 ps
T187 /workspace/coverage/default/12.sram_ctrl_smoke.1019916305 Jul 04 07:15:39 PM PDT 24 Jul 04 07:15:59 PM PDT 24 3808727836 ps
T188 /workspace/coverage/default/43.sram_ctrl_lc_escalation.1393107473 Jul 04 07:19:08 PM PDT 24 Jul 04 07:19:15 PM PDT 24 5416840724 ps
T189 /workspace/coverage/default/3.sram_ctrl_alert_test.2966134306 Jul 04 07:15:15 PM PDT 24 Jul 04 07:15:16 PM PDT 24 21827733 ps
T190 /workspace/coverage/default/6.sram_ctrl_bijection.4113585392 Jul 04 07:15:25 PM PDT 24 Jul 04 07:15:49 PM PDT 24 6349247118 ps
T191 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.784112154 Jul 04 07:17:06 PM PDT 24 Jul 04 07:20:10 PM PDT 24 5478936941 ps
T192 /workspace/coverage/default/5.sram_ctrl_mem_walk.1903451399 Jul 04 07:15:18 PM PDT 24 Jul 04 07:15:23 PM PDT 24 74911789 ps
T193 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.136612257 Jul 04 07:19:21 PM PDT 24 Jul 04 07:24:17 PM PDT 24 11547593146 ps
T194 /workspace/coverage/default/37.sram_ctrl_mem_walk.749405854 Jul 04 07:18:17 PM PDT 24 Jul 04 07:18:27 PM PDT 24 479281000 ps
T195 /workspace/coverage/default/2.sram_ctrl_ram_cfg.693961412 Jul 04 07:15:06 PM PDT 24 Jul 04 07:15:08 PM PDT 24 104233388 ps
T196 /workspace/coverage/default/14.sram_ctrl_bijection.2091843686 Jul 04 07:15:45 PM PDT 24 Jul 04 07:16:36 PM PDT 24 8154774121 ps
T197 /workspace/coverage/default/32.sram_ctrl_stress_all.4109313372 Jul 04 07:17:33 PM PDT 24 Jul 04 07:23:02 PM PDT 24 7297353666 ps
T198 /workspace/coverage/default/45.sram_ctrl_lc_escalation.3794678352 Jul 04 07:19:24 PM PDT 24 Jul 04 07:19:31 PM PDT 24 1360592309 ps
T199 /workspace/coverage/default/14.sram_ctrl_executable.3282346213 Jul 04 07:15:44 PM PDT 24 Jul 04 07:23:11 PM PDT 24 2159298557 ps
T200 /workspace/coverage/default/14.sram_ctrl_multiple_keys.201197627 Jul 04 07:15:44 PM PDT 24 Jul 04 07:35:37 PM PDT 24 32467164041 ps
T201 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2868698706 Jul 04 07:18:58 PM PDT 24 Jul 04 07:18:59 PM PDT 24 74172471 ps
T202 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.3381371346 Jul 04 07:15:36 PM PDT 24 Jul 04 07:35:58 PM PDT 24 3763600958 ps
T203 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1677662376 Jul 04 07:19:36 PM PDT 24 Jul 04 07:19:41 PM PDT 24 1129802786 ps
T60 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1778408686 Jul 04 07:18:23 PM PDT 24 Jul 04 07:18:35 PM PDT 24 198038278 ps
T204 /workspace/coverage/default/35.sram_ctrl_lc_escalation.898941195 Jul 04 07:17:52 PM PDT 24 Jul 04 07:17:53 PM PDT 24 95696172 ps
T205 /workspace/coverage/default/27.sram_ctrl_multiple_keys.3824949726 Jul 04 07:16:51 PM PDT 24 Jul 04 07:39:49 PM PDT 24 54955799297 ps
T206 /workspace/coverage/default/8.sram_ctrl_max_throughput.2466736375 Jul 04 07:15:31 PM PDT 24 Jul 04 07:17:19 PM PDT 24 135577435 ps
T207 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3456738570 Jul 04 07:15:15 PM PDT 24 Jul 04 07:29:10 PM PDT 24 48832686507 ps
T208 /workspace/coverage/default/46.sram_ctrl_multiple_keys.4075897204 Jul 04 07:19:30 PM PDT 24 Jul 04 07:39:38 PM PDT 24 116015507725 ps
T70 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3388674442 Jul 04 07:16:51 PM PDT 24 Jul 04 07:20:36 PM PDT 24 6194654501 ps
T17 /workspace/coverage/default/1.sram_ctrl_sec_cm.269670631 Jul 04 07:15:07 PM PDT 24 Jul 04 07:15:10 PM PDT 24 115963117 ps
T209 /workspace/coverage/default/26.sram_ctrl_alert_test.4238606828 Jul 04 07:16:54 PM PDT 24 Jul 04 07:16:55 PM PDT 24 40720203 ps
T210 /workspace/coverage/default/18.sram_ctrl_alert_test.3473255737 Jul 04 07:16:06 PM PDT 24 Jul 04 07:16:07 PM PDT 24 15956850 ps
T211 /workspace/coverage/default/17.sram_ctrl_multiple_keys.3832595776 Jul 04 07:15:58 PM PDT 24 Jul 04 07:25:18 PM PDT 24 1634036731 ps
T212 /workspace/coverage/default/37.sram_ctrl_bijection.1362149284 Jul 04 07:18:16 PM PDT 24 Jul 04 07:19:28 PM PDT 24 3844673386 ps
T213 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.321817889 Jul 04 07:20:05 PM PDT 24 Jul 04 07:24:50 PM PDT 24 10961689546 ps
T214 /workspace/coverage/default/13.sram_ctrl_bijection.2522141318 Jul 04 07:15:46 PM PDT 24 Jul 04 07:16:37 PM PDT 24 3040202043 ps
T215 /workspace/coverage/default/32.sram_ctrl_multiple_keys.928528022 Jul 04 07:17:28 PM PDT 24 Jul 04 07:42:42 PM PDT 24 58193745261 ps
T216 /workspace/coverage/default/25.sram_ctrl_smoke.2984514747 Jul 04 07:16:33 PM PDT 24 Jul 04 07:16:46 PM PDT 24 1061651587 ps
T217 /workspace/coverage/default/30.sram_ctrl_lc_escalation.729667717 Jul 04 07:17:18 PM PDT 24 Jul 04 07:17:26 PM PDT 24 9456912739 ps
T218 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1207939432 Jul 04 07:16:26 PM PDT 24 Jul 04 07:18:16 PM PDT 24 228939155 ps
T219 /workspace/coverage/default/26.sram_ctrl_regwen.3515054356 Jul 04 07:16:54 PM PDT 24 Jul 04 07:19:30 PM PDT 24 13249599060 ps
T220 /workspace/coverage/default/7.sram_ctrl_alert_test.2129694523 Jul 04 07:15:31 PM PDT 24 Jul 04 07:15:32 PM PDT 24 15146177 ps
T221 /workspace/coverage/default/6.sram_ctrl_smoke.812356059 Jul 04 07:15:19 PM PDT 24 Jul 04 07:15:30 PM PDT 24 921171751 ps
T222 /workspace/coverage/default/5.sram_ctrl_regwen.1862679198 Jul 04 07:15:20 PM PDT 24 Jul 04 07:28:22 PM PDT 24 5087484831 ps
T223 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.2219285234 Jul 04 07:16:06 PM PDT 24 Jul 04 07:36:22 PM PDT 24 9901385029 ps
T224 /workspace/coverage/default/43.sram_ctrl_partial_access.2651379094 Jul 04 07:19:06 PM PDT 24 Jul 04 07:19:16 PM PDT 24 83648986 ps
T225 /workspace/coverage/default/22.sram_ctrl_regwen.1078338926 Jul 04 07:16:25 PM PDT 24 Jul 04 07:23:08 PM PDT 24 4437874273 ps
T226 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2899933286 Jul 04 07:16:54 PM PDT 24 Jul 04 07:17:23 PM PDT 24 311567706 ps
T227 /workspace/coverage/default/22.sram_ctrl_multiple_keys.1795139766 Jul 04 07:16:19 PM PDT 24 Jul 04 07:42:18 PM PDT 24 55023048735 ps
T228 /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3644536055 Jul 04 07:18:23 PM PDT 24 Jul 04 07:23:42 PM PDT 24 26405451944 ps
T229 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4038311743 Jul 04 07:15:29 PM PDT 24 Jul 04 07:22:25 PM PDT 24 86262006104 ps
T230 /workspace/coverage/default/46.sram_ctrl_mem_walk.825810498 Jul 04 07:19:37 PM PDT 24 Jul 04 07:19:50 PM PDT 24 2713976914 ps
T231 /workspace/coverage/default/35.sram_ctrl_bijection.654045343 Jul 04 07:17:53 PM PDT 24 Jul 04 07:19:04 PM PDT 24 4408350908 ps
T232 /workspace/coverage/default/23.sram_ctrl_stress_all.991811281 Jul 04 07:16:24 PM PDT 24 Jul 04 07:17:51 PM PDT 24 17277461905 ps
T233 /workspace/coverage/default/28.sram_ctrl_max_throughput.2286470636 Jul 04 07:17:01 PM PDT 24 Jul 04 07:19:15 PM PDT 24 161506891 ps
T234 /workspace/coverage/default/33.sram_ctrl_bijection.991186628 Jul 04 07:17:31 PM PDT 24 Jul 04 07:18:42 PM PDT 24 3212369051 ps
T235 /workspace/coverage/default/2.sram_ctrl_bijection.947287183 Jul 04 07:15:05 PM PDT 24 Jul 04 07:15:33 PM PDT 24 6636614759 ps
T236 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.453312265 Jul 04 07:17:25 PM PDT 24 Jul 04 07:23:48 PM PDT 24 271354687192 ps
T237 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.4090939337 Jul 04 07:15:58 PM PDT 24 Jul 04 07:22:12 PM PDT 24 15252693977 ps
T238 /workspace/coverage/default/37.sram_ctrl_regwen.131695603 Jul 04 07:18:15 PM PDT 24 Jul 04 07:30:45 PM PDT 24 1729587864 ps
T239 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1491103350 Jul 04 07:15:36 PM PDT 24 Jul 04 07:19:46 PM PDT 24 37418205428 ps
T240 /workspace/coverage/default/11.sram_ctrl_alert_test.3483305580 Jul 04 07:15:37 PM PDT 24 Jul 04 07:15:38 PM PDT 24 21422226 ps
T241 /workspace/coverage/default/18.sram_ctrl_smoke.2235043783 Jul 04 07:16:06 PM PDT 24 Jul 04 07:16:10 PM PDT 24 178845739 ps
T71 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.4093126623 Jul 04 07:18:16 PM PDT 24 Jul 04 07:23:39 PM PDT 24 5244937363 ps
T242 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.3706404598 Jul 04 07:15:12 PM PDT 24 Jul 04 07:15:15 PM PDT 24 104618073 ps
T243 /workspace/coverage/default/40.sram_ctrl_max_throughput.3299908484 Jul 04 07:18:35 PM PDT 24 Jul 04 07:18:58 PM PDT 24 423596370 ps
T244 /workspace/coverage/default/49.sram_ctrl_stress_all.4154797890 Jul 04 07:20:03 PM PDT 24 Jul 04 08:40:12 PM PDT 24 79889524723 ps
T245 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.586613064 Jul 04 07:15:01 PM PDT 24 Jul 04 07:15:08 PM PDT 24 182019682 ps
T246 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.3410429826 Jul 04 07:18:52 PM PDT 24 Jul 04 07:23:49 PM PDT 24 2808944745 ps
T247 /workspace/coverage/default/1.sram_ctrl_executable.1221331825 Jul 04 07:15:07 PM PDT 24 Jul 04 08:02:42 PM PDT 24 14743985023 ps
T248 /workspace/coverage/default/11.sram_ctrl_partial_access.2608929710 Jul 04 07:15:39 PM PDT 24 Jul 04 07:15:42 PM PDT 24 292003396 ps
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T250 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.457416729 Jul 04 07:16:52 PM PDT 24 Jul 04 07:21:30 PM PDT 24 11649102410 ps
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T252 /workspace/coverage/default/15.sram_ctrl_mem_walk.2919168124 Jul 04 07:15:53 PM PDT 24 Jul 04 07:16:04 PM PDT 24 450926646 ps
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T294 /workspace/coverage/default/37.sram_ctrl_smoke.172258298 Jul 04 07:18:07 PM PDT 24 Jul 04 07:18:44 PM PDT 24 353490297 ps
T295 /workspace/coverage/default/12.sram_ctrl_executable.3558305439 Jul 04 07:15:44 PM PDT 24 Jul 04 07:26:53 PM PDT 24 19401370536 ps
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T297 /workspace/coverage/default/35.sram_ctrl_ram_cfg.614402416 Jul 04 07:17:59 PM PDT 24 Jul 04 07:18:00 PM PDT 24 29016467 ps
T298 /workspace/coverage/default/11.sram_ctrl_multiple_keys.65403138 Jul 04 07:15:38 PM PDT 24 Jul 04 07:22:58 PM PDT 24 14808757202 ps
T299 /workspace/coverage/default/45.sram_ctrl_regwen.1288747768 Jul 04 07:19:23 PM PDT 24 Jul 04 07:25:48 PM PDT 24 10145508938 ps
T300 /workspace/coverage/default/40.sram_ctrl_executable.635429820 Jul 04 07:18:35 PM PDT 24 Jul 04 07:32:28 PM PDT 24 5943873124 ps
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T302 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.2796689740 Jul 04 07:16:14 PM PDT 24 Jul 04 07:16:18 PM PDT 24 111305280 ps
T303 /workspace/coverage/default/26.sram_ctrl_executable.497578821 Jul 04 07:16:51 PM PDT 24 Jul 04 07:25:21 PM PDT 24 9146651839 ps
T304 /workspace/coverage/default/29.sram_ctrl_multiple_keys.374933391 Jul 04 07:17:06 PM PDT 24 Jul 04 07:29:18 PM PDT 24 11289018530 ps
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T306 /workspace/coverage/default/43.sram_ctrl_smoke.3637556116 Jul 04 07:19:09 PM PDT 24 Jul 04 07:21:16 PM PDT 24 525845659 ps
T307 /workspace/coverage/default/20.sram_ctrl_smoke.205323840 Jul 04 07:16:14 PM PDT 24 Jul 04 07:16:18 PM PDT 24 157177248 ps
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