| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.4110253708 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.250718334 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.976029365 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4051917102 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1774905147 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2482124059 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2783736250 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2245365845 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.681659459 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1556345066 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.707777990 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1298184356 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1162302822 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2677323863 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.612578890 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.276442086 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1498184941 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3655518218 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2614086014 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.865587077 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2131888221 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3903496771 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.843824652 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3333675455 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3792150286 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.4099631629 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2238721598 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.674981162 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3510336449 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.344400 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3971367981 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1847875613 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.409488315 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4115854568 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.4055350801 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1578730852 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2644340153 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.407354789 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2819613618 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2972864555 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2023462379 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1956316617 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.4142793577 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1155251683 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2975589039 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1838311725 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1973986161 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.4252038313 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.385829439 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3836374016 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3950665878 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3659228098 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.149580429 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3396656294 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2015388190 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3083311781 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2595846193 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2737688335 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2160097204 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1241038742 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1201339746 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.872923247 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2987564868 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2885554263 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3072103049 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3985032680 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.964240306 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3470398043 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1251915661 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.544106998 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2598557725 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2647229339 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1291436684 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1327881256 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.727226445 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3902255795 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3019786691 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.923962480 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1890259603 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1183395554 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1142061404 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1047989282 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3960754470 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1195627626 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3878003982 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2707019225 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2069960998 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3275899262 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2201082996 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3665772748 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3308494578 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1463877856 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.70893981 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2911422280 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.818561688 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.802359817 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3534556504 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3200886561 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2310060773 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.752516934 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.3550693074 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.160552581 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.373836407 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3349717380 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2742709545 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1380433823 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1492958575 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1595332813 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2803263983 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1245204077 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3766045358 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1072101205 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.1229222120 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.810865667 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1235911235 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2172664905 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2549925335 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.214239226 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3280969803 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2852998534 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1128048919 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3530889793 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3769674861 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3033782540 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.596135185 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2101987349 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3832523496 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.4018592330 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2400244056 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3207035065 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.3959652809 |
| /workspace/coverage/default/0.sram_ctrl_bijection.1048759143 |
| /workspace/coverage/default/0.sram_ctrl_executable.3073042218 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.3147709615 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.165065491 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.3044674694 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.2821937725 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.3109771987 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.3983295490 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.394202755 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.2724355195 |
| /workspace/coverage/default/0.sram_ctrl_regwen.313976109 |
| /workspace/coverage/default/0.sram_ctrl_smoke.1508127135 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2347326525 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.800371421 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3204356929 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.3869907394 |
| /workspace/coverage/default/1.sram_ctrl_bijection.2593737103 |
| /workspace/coverage/default/1.sram_ctrl_executable.3903614358 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.644896547 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.788551515 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3462769393 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.3897695119 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.1251737842 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.1961871930 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3277679680 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.3803587348 |
| /workspace/coverage/default/1.sram_ctrl_regwen.2317602949 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.4116640539 |
| /workspace/coverage/default/1.sram_ctrl_smoke.2781662529 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.1226625257 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1917140136 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3531492275 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.3528328512 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.1048258388 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.2270424074 |
| /workspace/coverage/default/10.sram_ctrl_bijection.105736343 |
| /workspace/coverage/default/10.sram_ctrl_executable.1136865399 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.3721798265 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.3354174090 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2607511340 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.2727671068 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.1113492818 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.2508336385 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3092714535 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.3564062446 |
| /workspace/coverage/default/10.sram_ctrl_regwen.2016373980 |
| /workspace/coverage/default/10.sram_ctrl_smoke.1210588039 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.609462062 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.504170046 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2398466537 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.1684162777 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.286565495 |
| /workspace/coverage/default/11.sram_ctrl_bijection.3090307781 |
| /workspace/coverage/default/11.sram_ctrl_executable.2133848532 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.1219949179 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.4129571681 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.2595230513 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.198392163 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.4148166220 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.552590582 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2265162481 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.2740891388 |
| /workspace/coverage/default/11.sram_ctrl_regwen.2307517000 |
| /workspace/coverage/default/11.sram_ctrl_smoke.2075162970 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.3982416619 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3188220996 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.577137229 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.655214710 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.3780364208 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.1638817182 |
| /workspace/coverage/default/12.sram_ctrl_bijection.2021403860 |
| /workspace/coverage/default/12.sram_ctrl_executable.753081234 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.223202059 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.3750085037 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.1960576667 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.2659439214 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.3216565109 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.2057778608 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1524353457 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.2260377371 |
| /workspace/coverage/default/12.sram_ctrl_regwen.1500029851 |
| /workspace/coverage/default/12.sram_ctrl_smoke.53638309 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.1840390179 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.866025778 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.438505587 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.117608152 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2438408231 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.1158444236 |
| /workspace/coverage/default/13.sram_ctrl_bijection.3689872216 |
| /workspace/coverage/default/13.sram_ctrl_executable.1542966904 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.599749592 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.786832639 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.2854269082 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.2275834711 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.1424602471 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.1896362207 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.36268768 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.3624020641 |
| /workspace/coverage/default/13.sram_ctrl_regwen.3092061076 |
| /workspace/coverage/default/13.sram_ctrl_smoke.3120024626 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.3659079373 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1502426227 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2872936037 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.105231971 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.3837625894 |
| /workspace/coverage/default/14.sram_ctrl_bijection.1338655012 |
| /workspace/coverage/default/14.sram_ctrl_executable.2643538254 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.1075796928 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.939782532 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1910632859 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.1809779015 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.260196107 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.4195785627 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3212061795 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.360527501 |
| /workspace/coverage/default/14.sram_ctrl_regwen.3014840426 |
| /workspace/coverage/default/14.sram_ctrl_smoke.2016288869 |
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| /workspace/coverage/default/43.sram_ctrl_max_throughput.2265163991 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1137911657 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.2797121249 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.3602734374 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.2600289589 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.222325966 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.1380558986 |
| /workspace/coverage/default/43.sram_ctrl_regwen.121617941 |
| /workspace/coverage/default/43.sram_ctrl_smoke.556440724 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3231388984 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2591760978 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2432961279 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2446453787 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.3602443088 |
| /workspace/coverage/default/44.sram_ctrl_bijection.442615846 |
| /workspace/coverage/default/44.sram_ctrl_executable.3453652235 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.3843894074 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.1747924529 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1441281049 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.2036630845 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.3955420522 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.563424483 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2242575727 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.1829151538 |
| /workspace/coverage/default/44.sram_ctrl_regwen.1443979386 |
| /workspace/coverage/default/44.sram_ctrl_smoke.3360464270 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.3447516179 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2812700514 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.1813401844 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2190835168 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.568095781 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.1872947594 |
| /workspace/coverage/default/45.sram_ctrl_bijection.3517260433 |
| /workspace/coverage/default/45.sram_ctrl_executable.3150719990 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.2063499475 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.3129443998 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3341049712 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.3588206230 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.1706072043 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.1081684012 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1564292326 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.2529811392 |
| /workspace/coverage/default/45.sram_ctrl_regwen.2035983542 |
| /workspace/coverage/default/45.sram_ctrl_smoke.155736676 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.505005356 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2940101763 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2571521443 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2650234174 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.3045899434 |
| /workspace/coverage/default/46.sram_ctrl_bijection.253718497 |
| /workspace/coverage/default/46.sram_ctrl_executable.2369378395 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.1686432726 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.3462164647 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1859712170 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.1656194450 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.1710725457 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.1442603825 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.58430193 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.2973013240 |
| /workspace/coverage/default/46.sram_ctrl_regwen.1203730411 |
| /workspace/coverage/default/46.sram_ctrl_smoke.3831551289 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2612247189 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3366040659 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1998121281 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.1282581433 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.388003257 |
| /workspace/coverage/default/47.sram_ctrl_bijection.3229100412 |
| /workspace/coverage/default/47.sram_ctrl_executable.2874592834 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.876551200 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.501275029 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1870295310 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.1649083519 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.2399346946 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.721260975 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1174496766 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.4167109955 |
| /workspace/coverage/default/47.sram_ctrl_regwen.549315769 |
| /workspace/coverage/default/47.sram_ctrl_smoke.2201754817 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.2188546343 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.227888869 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.903406 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.681094102 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.1833817396 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.2683625321 |
| /workspace/coverage/default/48.sram_ctrl_bijection.3185433301 |
| /workspace/coverage/default/48.sram_ctrl_executable.4175962880 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.96291973 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.753894946 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2513511005 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.636556214 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.2273428232 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.1569741257 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3347557714 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.639307329 |
| /workspace/coverage/default/48.sram_ctrl_regwen.2004729284 |
| /workspace/coverage/default/48.sram_ctrl_smoke.3659290241 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.1385008947 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.2220701156 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1060614302 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.2961645430 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.448479765 |
| /workspace/coverage/default/49.sram_ctrl_bijection.4236005607 |
| /workspace/coverage/default/49.sram_ctrl_executable.2650646472 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.1290379577 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.6264358 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1547724564 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.4141983331 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.2453290078 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.89655901 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3217413637 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.643924283 |
| /workspace/coverage/default/49.sram_ctrl_regwen.2284293547 |
| /workspace/coverage/default/49.sram_ctrl_smoke.2795990861 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.2478251664 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.356209225 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.2791116250 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2514602272 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.4064404152 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.1101002723 |
| /workspace/coverage/default/5.sram_ctrl_bijection.3809161105 |
| /workspace/coverage/default/5.sram_ctrl_executable.3556633371 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.2577607401 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.151082153 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.2929827373 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.599173943 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.2328551474 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.2334557569 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3115201747 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.1745319823 |
| /workspace/coverage/default/5.sram_ctrl_regwen.1444239470 |
| /workspace/coverage/default/5.sram_ctrl_smoke.676076725 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.1592570778 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2408273993 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.2047280758 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3834862526 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.1356600278 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.376359880 |
| /workspace/coverage/default/6.sram_ctrl_bijection.56285565 |
| /workspace/coverage/default/6.sram_ctrl_executable.3777310172 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.3182924355 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.3577249949 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.2301287106 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.2996011650 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.882775194 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.2938746120 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1017361794 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.141144942 |
| /workspace/coverage/default/6.sram_ctrl_regwen.3100202426 |
| /workspace/coverage/default/6.sram_ctrl_smoke.3289901333 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.2233242579 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.2394839312 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.2105461593 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4165370597 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.4181974527 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.2357607722 |
| /workspace/coverage/default/7.sram_ctrl_bijection.4050487842 |
| /workspace/coverage/default/7.sram_ctrl_executable.2514007711 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.2246690987 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.1638581597 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.1920999935 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.3468949523 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.3042391621 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.1571358389 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.289077473 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.3850883081 |
| /workspace/coverage/default/7.sram_ctrl_regwen.3153867845 |
| /workspace/coverage/default/7.sram_ctrl_smoke.2673083130 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.1827557472 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2900804125 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.388989412 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.814309237 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.4200820867 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.2734812897 |
| /workspace/coverage/default/8.sram_ctrl_bijection.3732328917 |
| /workspace/coverage/default/8.sram_ctrl_executable.4043526719 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.205861590 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.1191091442 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2182913423 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.4292575254 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.1293720271 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.2759996508 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2124137753 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.196872159 |
| /workspace/coverage/default/8.sram_ctrl_regwen.38457677 |
| /workspace/coverage/default/8.sram_ctrl_smoke.3488235817 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.2431854160 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2672468618 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.689872283 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1833281256 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.16721678 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.2752217608 |
| /workspace/coverage/default/9.sram_ctrl_bijection.3233884314 |
| /workspace/coverage/default/9.sram_ctrl_executable.3488892522 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.184818609 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.2245104763 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3743218941 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.2128394145 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.2742869855 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.4287754239 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2304926412 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.4169752922 |
| /workspace/coverage/default/9.sram_ctrl_regwen.1463413120 |
| /workspace/coverage/default/9.sram_ctrl_smoke.2592801133 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.2684394859 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2066313023 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.2645631531 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3737038304 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/12.sram_ctrl_executable.753081234 |
|
|
Jul 06 04:53:17 PM PDT 24 |
Jul 06 05:05:17 PM PDT 24 |
16689869874 ps |
| T2 |
/workspace/coverage/default/3.sram_ctrl_stress_all.1818978638 |
|
|
Jul 06 04:52:58 PM PDT 24 |
Jul 06 05:04:49 PM PDT 24 |
4071795557 ps |
| T3 |
/workspace/coverage/default/36.sram_ctrl_alert_test.2314903033 |
|
|
Jul 06 04:55:10 PM PDT 24 |
Jul 06 04:55:11 PM PDT 24 |
16666652 ps |
| T4 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.505380281 |
|
|
Jul 06 04:52:51 PM PDT 24 |
Jul 06 04:53:03 PM PDT 24 |
2006276024 ps |
| T6 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.3304682103 |
|
|
Jul 06 04:54:15 PM PDT 24 |
Jul 06 04:59:50 PM PDT 24 |
16736093772 ps |
| T5 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.2495620173 |
|
|
Jul 06 04:54:37 PM PDT 24 |
Jul 06 05:06:36 PM PDT 24 |
10116435128 ps |
| T9 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.2076546259 |
|
|
Jul 06 04:54:47 PM PDT 24 |
Jul 06 05:15:43 PM PDT 24 |
8504320673 ps |
| T10 |
/workspace/coverage/default/39.sram_ctrl_bijection.1793099826 |
|
|
Jul 06 04:55:17 PM PDT 24 |
Jul 06 04:55:32 PM PDT 24 |
236169951 ps |
| T11 |
/workspace/coverage/default/15.sram_ctrl_executable.2833527496 |
|
|
Jul 06 04:53:35 PM PDT 24 |
Jul 06 05:02:59 PM PDT 24 |
5713809856 ps |
| T12 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1137911657 |
|
|
Jul 06 04:56:00 PM PDT 24 |
Jul 06 04:56:07 PM PDT 24 |
203494485 ps |
| T35 |
/workspace/coverage/default/30.sram_ctrl_executable.3792040327 |
|
|
Jul 06 04:54:28 PM PDT 24 |
Jul 06 05:08:25 PM PDT 24 |
2193818721 ps |
| T36 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.2559235638 |
|
|
Jul 06 04:54:43 PM PDT 24 |
Jul 06 05:07:51 PM PDT 24 |
8275592771 ps |
| T40 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.3955769211 |
|
|
Jul 06 04:53:52 PM PDT 24 |
Jul 06 04:53:55 PM PDT 24 |
111568978 ps |
| T51 |
/workspace/coverage/default/17.sram_ctrl_partial_access.3493770742 |
|
|
Jul 06 04:53:41 PM PDT 24 |
Jul 06 04:53:47 PM PDT 24 |
238415283 ps |
| T52 |
/workspace/coverage/default/27.sram_ctrl_partial_access.54801093 |
|
|
Jul 06 04:54:11 PM PDT 24 |
Jul 06 04:54:13 PM PDT 24 |
83590029 ps |
| T7 |
/workspace/coverage/default/0.sram_ctrl_stress_all.3101877881 |
|
|
Jul 06 04:52:52 PM PDT 24 |
Jul 06 05:58:49 PM PDT 24 |
10977889768 ps |
| T53 |
/workspace/coverage/default/11.sram_ctrl_executable.2133848532 |
|
|
Jul 06 04:53:18 PM PDT 24 |
Jul 06 05:02:02 PM PDT 24 |
1878524549 ps |
| T54 |
/workspace/coverage/default/47.sram_ctrl_bijection.3229100412 |
|
|
Jul 06 04:56:28 PM PDT 24 |
Jul 06 04:56:52 PM PDT 24 |
2562081785 ps |
| T21 |
/workspace/coverage/default/4.sram_ctrl_stress_all.4102745282 |
|
|
Jul 06 04:53:02 PM PDT 24 |
Jul 06 05:42:09 PM PDT 24 |
33916585271 ps |
| T8 |
/workspace/coverage/default/46.sram_ctrl_stress_all.3180689900 |
|
|
Jul 06 04:56:26 PM PDT 24 |
Jul 06 05:39:59 PM PDT 24 |
128404253182 ps |
| T24 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.4167109955 |
|
|
Jul 06 04:56:31 PM PDT 24 |
Jul 06 04:56:32 PM PDT 24 |
29283927 ps |
| T96 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2629222837 |
|
|
Jul 06 04:54:31 PM PDT 24 |
Jul 06 05:02:35 PM PDT 24 |
21983698971 ps |
| T39 |
/workspace/coverage/default/38.sram_ctrl_stress_all.2609901914 |
|
|
Jul 06 04:55:20 PM PDT 24 |
Jul 06 05:21:34 PM PDT 24 |
14998189714 ps |
| T125 |
/workspace/coverage/default/18.sram_ctrl_partial_access.3320509166 |
|
|
Jul 06 04:53:38 PM PDT 24 |
Jul 06 04:54:04 PM PDT 24 |
655012629 ps |
| T123 |
/workspace/coverage/default/46.sram_ctrl_executable.2369378395 |
|
|
Jul 06 04:56:21 PM PDT 24 |
Jul 06 05:11:11 PM PDT 24 |
10255551130 ps |
| T97 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1112130885 |
|
|
Jul 06 04:53:18 PM PDT 24 |
Jul 06 04:58:24 PM PDT 24 |
3072908451 ps |
| T20 |
/workspace/coverage/default/22.sram_ctrl_lc_escalation.316806431 |
|
|
Jul 06 04:53:50 PM PDT 24 |
Jul 06 04:53:57 PM PDT 24 |
1223702480 ps |
| T132 |
/workspace/coverage/default/21.sram_ctrl_smoke.391564926 |
|
|
Jul 06 04:53:45 PM PDT 24 |
Jul 06 04:55:12 PM PDT 24 |
134818011 ps |
| T85 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2206867695 |
|
|
Jul 06 04:55:06 PM PDT 24 |
Jul 06 04:55:11 PM PDT 24 |
99022955 ps |
| T142 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1113492818 |
|
|
Jul 06 04:53:22 PM PDT 24 |
Jul 06 05:08:43 PM PDT 24 |
34627480412 ps |
| T143 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.2598961656 |
|
|
Jul 06 04:53:35 PM PDT 24 |
Jul 06 05:08:50 PM PDT 24 |
17423036343 ps |
| T60 |
/workspace/coverage/default/20.sram_ctrl_stress_all.3656791380 |
|
|
Jul 06 04:53:46 PM PDT 24 |
Jul 06 05:17:07 PM PDT 24 |
105430885204 ps |
| T61 |
/workspace/coverage/default/40.sram_ctrl_regwen.2824335113 |
|
|
Jul 06 04:55:37 PM PDT 24 |
Jul 06 05:03:02 PM PDT 24 |
4870327045 ps |
| T98 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.800371421 |
|
|
Jul 06 04:52:48 PM PDT 24 |
Jul 06 04:58:26 PM PDT 24 |
19174532042 ps |
| T99 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3092714535 |
|
|
Jul 06 04:53:18 PM PDT 24 |
Jul 06 04:57:09 PM PDT 24 |
33809317327 ps |
| T43 |
/workspace/coverage/default/29.sram_ctrl_mem_walk.1330560907 |
|
|
Jul 06 04:54:22 PM PDT 24 |
Jul 06 04:54:32 PM PDT 24 |
709571951 ps |
| T100 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.218714051 |
|
|
Jul 06 04:55:11 PM PDT 24 |
Jul 06 04:59:19 PM PDT 24 |
11799034916 ps |
| T131 |
/workspace/coverage/default/49.sram_ctrl_smoke.2795990861 |
|
|
Jul 06 04:56:37 PM PDT 24 |
Jul 06 04:56:53 PM PDT 24 |
242956091 ps |
| T37 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1833817396 |
|
|
Jul 06 04:56:32 PM PDT 24 |
Jul 06 05:12:55 PM PDT 24 |
29604936953 ps |
| T101 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.1047854276 |
|
|
Jul 06 04:53:25 PM PDT 24 |
Jul 06 04:56:33 PM PDT 24 |
4083540338 ps |
| T144 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.3373986974 |
|
|
Jul 06 04:54:49 PM PDT 24 |
Jul 06 04:55:37 PM PDT 24 |
380001205 ps |
| T137 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3129443998 |
|
|
Jul 06 04:56:25 PM PDT 24 |
Jul 06 04:57:30 PM PDT 24 |
285332610 ps |
| T145 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.1800503159 |
|
|
Jul 06 04:53:08 PM PDT 24 |
Jul 06 04:56:21 PM PDT 24 |
2133002847 ps |
| T102 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.3531492275 |
|
|
Jul 06 04:52:50 PM PDT 24 |
Jul 06 04:56:17 PM PDT 24 |
17253087999 ps |
| T15 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.333586571 |
|
|
Jul 06 04:52:51 PM PDT 24 |
Jul 06 04:52:53 PM PDT 24 |
476775656 ps |
| T25 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.416684872 |
|
|
Jul 06 04:54:15 PM PDT 24 |
Jul 06 04:54:16 PM PDT 24 |
140146237 ps |
| T29 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.2577020638 |
|
|
Jul 06 04:53:58 PM PDT 24 |
Jul 06 04:54:03 PM PDT 24 |
376908847 ps |
| T26 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.3372110716 |
|
|
Jul 06 04:54:27 PM PDT 24 |
Jul 06 04:54:28 PM PDT 24 |
34297611 ps |
| T30 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.4237181287 |
|
|
Jul 06 04:53:35 PM PDT 24 |
Jul 06 05:01:49 PM PDT 24 |
98766981372 ps |
| T31 |
/workspace/coverage/default/14.sram_ctrl_smoke.2016288869 |
|
|
Jul 06 04:53:28 PM PDT 24 |
Jul 06 04:53:41 PM PDT 24 |
2040615000 ps |
| T32 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.3462164647 |
|
|
Jul 06 04:56:20 PM PDT 24 |
Jul 06 04:56:24 PM PDT 24 |
81218970 ps |
| T33 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.29098907 |
|
|
Jul 06 04:54:55 PM PDT 24 |
Jul 06 05:00:56 PM PDT 24 |
14541046682 ps |
| T13 |
/workspace/coverage/default/22.sram_ctrl_alert_test.2687483143 |
|
|
Jul 06 04:53:54 PM PDT 24 |
Jul 06 04:53:55 PM PDT 24 |
13846127 ps |
| T34 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.3485595964 |
|
|
Jul 06 04:54:31 PM PDT 24 |
Jul 06 04:54:34 PM PDT 24 |
163423067 ps |
| T146 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.681094102 |
|
|
Jul 06 04:56:29 PM PDT 24 |
Jul 06 04:57:45 PM PDT 24 |
1071535923 ps |
| T147 |
/workspace/coverage/default/32.sram_ctrl_partial_access.649940916 |
|
|
Jul 06 04:54:38 PM PDT 24 |
Jul 06 04:56:36 PM PDT 24 |
845077828 ps |
| T38 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3959074583 |
|
|
Jul 06 04:54:35 PM PDT 24 |
Jul 06 05:24:36 PM PDT 24 |
15734338055 ps |
| T139 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2453290078 |
|
|
Jul 06 04:56:38 PM PDT 24 |
Jul 06 04:58:58 PM PDT 24 |
5450945276 ps |
| T126 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.4190359155 |
|
|
Jul 06 04:53:43 PM PDT 24 |
Jul 06 05:10:11 PM PDT 24 |
65782971876 ps |
| T14 |
/workspace/coverage/default/42.sram_ctrl_alert_test.90907435 |
|
|
Jul 06 04:55:52 PM PDT 24 |
Jul 06 04:55:53 PM PDT 24 |
14795868 ps |
| T135 |
/workspace/coverage/default/16.sram_ctrl_smoke.2123069165 |
|
|
Jul 06 04:53:31 PM PDT 24 |
Jul 06 04:53:33 PM PDT 24 |
123186537 ps |
| T133 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.221083667 |
|
|
Jul 06 04:53:52 PM PDT 24 |
Jul 06 04:58:12 PM PDT 24 |
7784525698 ps |
| T110 |
/workspace/coverage/default/36.sram_ctrl_lc_escalation.3272352353 |
|
|
Jul 06 04:54:59 PM PDT 24 |
Jul 06 04:55:01 PM PDT 24 |
92275521 ps |
| T22 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.2075333910 |
|
|
Jul 06 04:54:59 PM PDT 24 |
Jul 06 04:55:25 PM PDT 24 |
3133615184 ps |
| T18 |
/workspace/coverage/default/31.sram_ctrl_regwen.4007724779 |
|
|
Jul 06 04:54:32 PM PDT 24 |
Jul 06 05:05:23 PM PDT 24 |
32864113972 ps |
| T66 |
/workspace/coverage/default/40.sram_ctrl_executable.1070222119 |
|
|
Jul 06 04:55:30 PM PDT 24 |
Jul 06 05:12:40 PM PDT 24 |
165595397189 ps |
| T67 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1827557472 |
|
|
Jul 06 04:53:03 PM PDT 24 |
Jul 06 05:17:57 PM PDT 24 |
10633570870 ps |
| T19 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3231388984 |
|
|
Jul 06 04:55:58 PM PDT 24 |
Jul 06 05:07:37 PM PDT 24 |
1447933365 ps |
| T68 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3837625894 |
|
|
Jul 06 04:53:23 PM PDT 24 |
Jul 06 04:53:24 PM PDT 24 |
130362792 ps |
| T69 |
/workspace/coverage/default/33.sram_ctrl_smoke.1644094475 |
|
|
Jul 06 04:54:37 PM PDT 24 |
Jul 06 04:54:51 PM PDT 24 |
437513789 ps |
| T70 |
/workspace/coverage/default/44.sram_ctrl_partial_access.563424483 |
|
|
Jul 06 04:56:03 PM PDT 24 |
Jul 06 04:56:28 PM PDT 24 |
687824714 ps |
| T71 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2446453787 |
|
|
Jul 06 04:56:05 PM PDT 24 |
Jul 06 05:00:22 PM PDT 24 |
2532532831 ps |
| T72 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.196872159 |
|
|
Jul 06 04:53:16 PM PDT 24 |
Jul 06 04:53:17 PM PDT 24 |
27931685 ps |
| T148 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.770800108 |
|
|
Jul 06 04:53:47 PM PDT 24 |
Jul 06 04:53:56 PM PDT 24 |
4119068253 ps |
| T124 |
/workspace/coverage/default/47.sram_ctrl_regwen.549315769 |
|
|
Jul 06 04:56:32 PM PDT 24 |
Jul 06 05:01:06 PM PDT 24 |
8092519981 ps |
| T149 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.2087978158 |
|
|
Jul 06 04:54:15 PM PDT 24 |
Jul 06 05:03:11 PM PDT 24 |
9308747455 ps |
| T150 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.2829746844 |
|
|
Jul 06 04:55:43 PM PDT 24 |
Jul 06 05:02:09 PM PDT 24 |
15681626381 ps |
| T134 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.4228401597 |
|
|
Jul 06 04:53:39 PM PDT 24 |
Jul 06 04:53:46 PM PDT 24 |
2802195331 ps |
| T44 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.4141983331 |
|
|
Jul 06 04:56:43 PM PDT 24 |
Jul 06 04:56:49 PM PDT 24 |
945132047 ps |
| T86 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.3888203134 |
|
|
Jul 06 04:54:30 PM PDT 24 |
Jul 06 05:09:34 PM PDT 24 |
14739570729 ps |
| T129 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.1135163618 |
|
|
Jul 06 04:54:39 PM PDT 24 |
Jul 06 04:55:12 PM PDT 24 |
188099664 ps |
| T151 |
/workspace/coverage/default/3.sram_ctrl_bijection.481225380 |
|
|
Jul 06 04:53:05 PM PDT 24 |
Jul 06 04:54:13 PM PDT 24 |
6457246364 ps |
| T136 |
/workspace/coverage/default/12.sram_ctrl_alert_test.1638817182 |
|
|
Jul 06 04:53:33 PM PDT 24 |
Jul 06 04:53:34 PM PDT 24 |
30075316 ps |
| T45 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.2275834711 |
|
|
Jul 06 04:53:21 PM PDT 24 |
Jul 06 04:53:33 PM PDT 24 |
629977003 ps |
| T152 |
/workspace/coverage/default/20.sram_ctrl_regwen.829372741 |
|
|
Jul 06 04:53:42 PM PDT 24 |
Jul 06 05:18:34 PM PDT 24 |
18735294956 ps |
| T153 |
/workspace/coverage/default/1.sram_ctrl_bijection.2593737103 |
|
|
Jul 06 04:52:49 PM PDT 24 |
Jul 06 04:53:27 PM PDT 24 |
6377165126 ps |
| T154 |
/workspace/coverage/default/16.sram_ctrl_alert_test.2566332546 |
|
|
Jul 06 04:53:39 PM PDT 24 |
Jul 06 04:53:41 PM PDT 24 |
34457977 ps |
| T87 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1663078967 |
|
|
Jul 06 04:52:55 PM PDT 24 |
Jul 06 04:52:58 PM PDT 24 |
157628902 ps |
| T155 |
/workspace/coverage/default/20.sram_ctrl_partial_access.587661848 |
|
|
Jul 06 04:53:45 PM PDT 24 |
Jul 06 04:55:08 PM PDT 24 |
702363060 ps |
| T138 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.10529701 |
|
|
Jul 06 04:55:29 PM PDT 24 |
Jul 06 04:59:47 PM PDT 24 |
17086767698 ps |
| T46 |
/workspace/coverage/default/41.sram_ctrl_mem_walk.3453754557 |
|
|
Jul 06 04:55:40 PM PDT 24 |
Jul 06 04:55:46 PM PDT 24 |
353455413 ps |
| T88 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.4248563164 |
|
|
Jul 06 04:53:32 PM PDT 24 |
Jul 06 05:13:00 PM PDT 24 |
2779726596 ps |
| T47 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.3607029872 |
|
|
Jul 06 04:54:16 PM PDT 24 |
Jul 06 04:54:22 PM PDT 24 |
663145724 ps |
| T156 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.1444525160 |
|
|
Jul 06 04:53:42 PM PDT 24 |
Jul 06 04:53:48 PM PDT 24 |
81051912 ps |
| T157 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1960576667 |
|
|
Jul 06 04:53:15 PM PDT 24 |
Jul 06 04:53:21 PM PDT 24 |
568965384 ps |
| T158 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.545662455 |
|
|
Jul 06 04:53:59 PM PDT 24 |
Jul 06 04:55:50 PM PDT 24 |
241046730 ps |
| T159 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.1438614803 |
|
|
Jul 06 04:54:04 PM PDT 24 |
Jul 06 04:54:25 PM PDT 24 |
289284425 ps |
| T160 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.786832639 |
|
|
Jul 06 04:53:19 PM PDT 24 |
Jul 06 04:53:20 PM PDT 24 |
121579410 ps |
| T140 |
/workspace/coverage/default/38.sram_ctrl_regwen.2382632755 |
|
|
Jul 06 04:55:18 PM PDT 24 |
Jul 06 05:12:27 PM PDT 24 |
17262374067 ps |
| T141 |
/workspace/coverage/default/17.sram_ctrl_executable.1469410392 |
|
|
Jul 06 04:53:31 PM PDT 24 |
Jul 06 05:06:31 PM PDT 24 |
2017617020 ps |
| T161 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.3063177050 |
|
|
Jul 06 04:54:26 PM PDT 24 |
Jul 06 04:55:11 PM PDT 24 |
95042005 ps |
| T162 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3217413637 |
|
|
Jul 06 04:56:46 PM PDT 24 |
Jul 06 05:00:38 PM PDT 24 |
3174399725 ps |
| T163 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.371756156 |
|
|
Jul 06 04:53:48 PM PDT 24 |
Jul 06 04:56:21 PM PDT 24 |
1595161766 ps |
| T128 |
/workspace/coverage/default/24.sram_ctrl_stress_all.2938668867 |
|
|
Jul 06 04:53:58 PM PDT 24 |
Jul 06 05:13:31 PM PDT 24 |
18424209749 ps |
| T164 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2399346946 |
|
|
Jul 06 04:56:27 PM PDT 24 |
Jul 06 05:09:48 PM PDT 24 |
3260356425 ps |
| T165 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.4109243656 |
|
|
Jul 06 04:55:36 PM PDT 24 |
Jul 06 04:55:43 PM PDT 24 |
236480592 ps |
| T166 |
/workspace/coverage/default/39.sram_ctrl_stress_all.3480879876 |
|
|
Jul 06 04:55:30 PM PDT 24 |
Jul 06 06:27:44 PM PDT 24 |
13559667336 ps |
| T167 |
/workspace/coverage/default/40.sram_ctrl_max_throughput.3120004788 |
|
|
Jul 06 04:55:28 PM PDT 24 |
Jul 06 04:55:31 PM PDT 24 |
42285532 ps |
| T130 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.2400672158 |
|
|
Jul 06 04:52:53 PM PDT 24 |
Jul 06 05:14:44 PM PDT 24 |
42897432911 ps |
| T168 |
/workspace/coverage/default/27.sram_ctrl_smoke.3097356295 |
|
|
Jul 06 04:54:07 PM PDT 24 |
Jul 06 04:54:13 PM PDT 24 |
346181495 ps |
| T169 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1208599323 |
|
|
Jul 06 04:53:53 PM PDT 24 |
Jul 06 05:00:05 PM PDT 24 |
13869067972 ps |
| T170 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.16721678 |
|
|
Jul 06 04:53:17 PM PDT 24 |
Jul 06 05:16:39 PM PDT 24 |
27096284696 ps |
| T171 |
/workspace/coverage/default/1.sram_ctrl_alert_test.2149631807 |
|
|
Jul 06 04:52:55 PM PDT 24 |
Jul 06 04:52:57 PM PDT 24 |
47672359 ps |
| T172 |
/workspace/coverage/default/13.sram_ctrl_executable.1542966904 |
|
|
Jul 06 04:53:37 PM PDT 24 |
Jul 06 05:03:34 PM PDT 24 |
28984340630 ps |
| T173 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1859712170 |
|
|
Jul 06 04:56:27 PM PDT 24 |
Jul 06 04:56:31 PM PDT 24 |
123889504 ps |
| T174 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2265162481 |
|
|
Jul 06 04:53:20 PM PDT 24 |
Jul 06 05:00:01 PM PDT 24 |
50078705332 ps |
| T175 |
/workspace/coverage/default/29.sram_ctrl_partial_access_b2b.3917126433 |
|
|
Jul 06 04:54:16 PM PDT 24 |
Jul 06 05:00:46 PM PDT 24 |
5391216117 ps |
| T176 |
/workspace/coverage/default/45.sram_ctrl_executable.3150719990 |
|
|
Jul 06 04:56:17 PM PDT 24 |
Jul 06 05:19:52 PM PDT 24 |
32028467695 ps |
| T177 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.4079112686 |
|
|
Jul 06 04:55:03 PM PDT 24 |
Jul 06 04:55:07 PM PDT 24 |
440914861 ps |
| T178 |
/workspace/coverage/default/0.sram_ctrl_bijection.1048759143 |
|
|
Jul 06 04:52:45 PM PDT 24 |
Jul 06 04:53:50 PM PDT 24 |
18914532703 ps |
| T127 |
/workspace/coverage/default/15.sram_ctrl_stress_all.4038061676 |
|
|
Jul 06 04:53:41 PM PDT 24 |
Jul 06 05:45:44 PM PDT 24 |
179832441180 ps |
| T179 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.2696596024 |
|
|
Jul 06 04:53:47 PM PDT 24 |
Jul 06 04:53:53 PM PDT 24 |
590649494 ps |
| T23 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.860082869 |
|
|
Jul 06 04:53:41 PM PDT 24 |
Jul 06 04:56:43 PM PDT 24 |
2757309003 ps |
| T180 |
/workspace/coverage/default/4.sram_ctrl_regwen.1129296773 |
|
|
Jul 06 04:52:55 PM PDT 24 |
Jul 06 05:05:55 PM PDT 24 |
6447628654 ps |
| T181 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1995248190 |
|
|
Jul 06 04:53:41 PM PDT 24 |
Jul 06 04:58:24 PM PDT 24 |
3784716602 ps |
| T182 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.62774056 |
|
|
Jul 06 04:54:04 PM PDT 24 |
Jul 06 04:54:06 PM PDT 24 |
29616160 ps |
| T183 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.1295669997 |
|
|
Jul 06 04:55:48 PM PDT 24 |
Jul 06 04:56:05 PM PDT 24 |
253570145 ps |
| T184 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.2844813714 |
|
|
Jul 06 04:54:31 PM PDT 24 |
Jul 06 04:54:43 PM PDT 24 |
1314214357 ps |
| T48 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.2238154009 |
|
|
Jul 06 04:53:41 PM PDT 24 |
Jul 06 04:55:15 PM PDT 24 |
4466611747 ps |
| T185 |
/workspace/coverage/default/26.sram_ctrl_partial_access.3128933201 |
|
|
Jul 06 04:54:04 PM PDT 24 |
Jul 06 04:54:25 PM PDT 24 |
990906868 ps |
| T186 |
/workspace/coverage/default/27.sram_ctrl_alert_test.4126251252 |
|
|
Jul 06 04:54:15 PM PDT 24 |
Jul 06 04:54:16 PM PDT 24 |
143611786 ps |
| T41 |
/workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.524611600 |
|
|
Jul 06 04:53:30 PM PDT 24 |
Jul 06 04:54:02 PM PDT 24 |
1849766472 ps |
| T187 |
/workspace/coverage/default/35.sram_ctrl_executable.2660646616 |
|
|
Jul 06 04:54:55 PM PDT 24 |
Jul 06 05:06:08 PM PDT 24 |
28072987351 ps |
| T188 |
/workspace/coverage/default/23.sram_ctrl_mem_walk.20834012 |
|
|
Jul 06 04:53:54 PM PDT 24 |
Jul 06 04:54:08 PM PDT 24 |
6296791005 ps |
| T189 |
/workspace/coverage/default/34.sram_ctrl_alert_test.675885993 |
|
|
Jul 06 04:54:51 PM PDT 24 |
Jul 06 04:54:52 PM PDT 24 |
12541622 ps |
| T190 |
/workspace/coverage/default/41.sram_ctrl_executable.2784413083 |
|
|
Jul 06 04:55:39 PM PDT 24 |
Jul 06 05:09:51 PM PDT 24 |
1808511542 ps |
| T191 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.2029699105 |
|
|
Jul 06 04:52:55 PM PDT 24 |
Jul 06 04:52:57 PM PDT 24 |
36833442 ps |
| T192 |
/workspace/coverage/default/5.sram_ctrl_regwen.1444239470 |
|
|
Jul 06 04:53:12 PM PDT 24 |
Jul 06 05:02:43 PM PDT 24 |
5323671325 ps |
| T193 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4165370597 |
|
|
Jul 06 04:52:57 PM PDT 24 |
Jul 06 04:53:00 PM PDT 24 |
54610255 ps |
| T194 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3538635725 |
|
|
Jul 06 04:53:48 PM PDT 24 |
Jul 06 04:53:50 PM PDT 24 |
148174674 ps |
| T195 |
/workspace/coverage/default/2.sram_ctrl_bijection.1082913668 |
|
|
Jul 06 04:52:51 PM PDT 24 |
Jul 06 04:53:40 PM PDT 24 |
3056300390 ps |
| T196 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.2727671068 |
|
|
Jul 06 04:53:21 PM PDT 24 |
Jul 06 04:53:27 PM PDT 24 |
352634813 ps |
| T197 |
/workspace/coverage/default/41.sram_ctrl_max_throughput.1787852766 |
|
|
Jul 06 04:55:39 PM PDT 24 |
Jul 06 04:56:07 PM PDT 24 |
808555941 ps |
| T198 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.3109771987 |
|
|
Jul 06 04:52:49 PM PDT 24 |
Jul 06 05:12:21 PM PDT 24 |
24344626627 ps |
| T199 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.644896547 |
|
|
Jul 06 04:52:52 PM PDT 24 |
Jul 06 04:52:58 PM PDT 24 |
371476913 ps |
| T200 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.3904123118 |
|
|
Jul 06 04:55:08 PM PDT 24 |
Jul 06 04:56:52 PM PDT 24 |
260314897 ps |
| T201 |
/workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.2755159125 |
|
|
Jul 06 04:53:40 PM PDT 24 |
Jul 06 04:55:26 PM PDT 24 |
231858853 ps |
| T202 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3358259049 |
|
|
Jul 06 04:54:27 PM PDT 24 |
Jul 06 04:59:00 PM PDT 24 |
7382760345 ps |
| T203 |
/workspace/coverage/default/25.sram_ctrl_bijection.317888958 |
|
|
Jul 06 04:54:02 PM PDT 24 |
Jul 06 04:54:46 PM PDT 24 |
26778222145 ps |
| T204 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2529811392 |
|
|
Jul 06 04:56:16 PM PDT 24 |
Jul 06 04:56:17 PM PDT 24 |
53024620 ps |
| T205 |
/workspace/coverage/default/31.sram_ctrl_smoke.606714054 |
|
|
Jul 06 04:54:28 PM PDT 24 |
Jul 06 04:54:50 PM PDT 24 |
160212759 ps |
| T206 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.2129897062 |
|
|
Jul 06 04:54:16 PM PDT 24 |
Jul 06 04:58:15 PM PDT 24 |
10251954667 ps |
| T207 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.500170374 |
|
|
Jul 06 04:53:53 PM PDT 24 |
Jul 06 05:02:11 PM PDT 24 |
13998914689 ps |
| T208 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.3404186811 |
|
|
Jul 06 04:54:16 PM PDT 24 |
Jul 06 04:57:07 PM PDT 24 |
1890139912 ps |
| T209 |
/workspace/coverage/default/2.sram_ctrl_smoke.2052650728 |
|
|
Jul 06 04:53:09 PM PDT 24 |
Jul 06 04:53:18 PM PDT 24 |
919469705 ps |
| T49 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3341049712 |
|
|
Jul 06 04:56:25 PM PDT 24 |
Jul 06 04:56:28 PM PDT 24 |
74768287 ps |
| T210 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.576498301 |
|
|
Jul 06 04:53:32 PM PDT 24 |
Jul 06 05:01:27 PM PDT 24 |
5040794462 ps |
| T211 |
/workspace/coverage/default/10.sram_ctrl_stress_all.609462062 |
|
|
Jul 06 04:53:16 PM PDT 24 |
Jul 06 05:12:44 PM PDT 24 |
279173956895 ps |
| T212 |
/workspace/coverage/default/32.sram_ctrl_executable.2828297616 |
|
|
Jul 06 04:54:37 PM PDT 24 |
Jul 06 04:59:26 PM PDT 24 |
1236696620 ps |
| T213 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.2624231324 |
|
|
Jul 06 04:53:55 PM PDT 24 |
Jul 06 04:53:56 PM PDT 24 |
55902060 ps |
| T214 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.1502426227 |
|
|
Jul 06 04:53:24 PM PDT 24 |
Jul 06 04:57:17 PM PDT 24 |
4338831575 ps |
| T50 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3359727597 |
|
|
Jul 06 04:53:51 PM PDT 24 |
Jul 06 05:03:04 PM PDT 24 |
6548187542 ps |
| T215 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3042391621 |
|
|
Jul 06 04:53:05 PM PDT 24 |
Jul 06 05:06:51 PM PDT 24 |
61976491973 ps |
| T216 |
/workspace/coverage/default/48.sram_ctrl_bijection.3185433301 |
|
|
Jul 06 04:56:38 PM PDT 24 |
Jul 06 04:57:30 PM PDT 24 |
22254482694 ps |
| T217 |
/workspace/coverage/default/7.sram_ctrl_regwen.3153867845 |
|
|
Jul 06 04:53:15 PM PDT 24 |
Jul 06 05:09:13 PM PDT 24 |
46820983413 ps |
| T218 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.1349156419 |
|
|
Jul 06 04:53:30 PM PDT 24 |
Jul 06 04:57:43 PM PDT 24 |
2575345448 ps |
| T219 |
/workspace/coverage/default/25.sram_ctrl_stress_all.3229641185 |
|
|
Jul 06 04:54:02 PM PDT 24 |
Jul 06 05:14:56 PM PDT 24 |
16338412836 ps |
| T220 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.1563378683 |
|
|
Jul 06 04:53:57 PM PDT 24 |
Jul 06 04:58:51 PM PDT 24 |
13202941559 ps |
| T221 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.583404428 |
|
|
Jul 06 04:53:58 PM PDT 24 |
Jul 06 04:53:59 PM PDT 24 |
31466457 ps |
| T222 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.1075796928 |
|
|
Jul 06 04:53:19 PM PDT 24 |
Jul 06 04:53:26 PM PDT 24 |
507173110 ps |
| T223 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.4064404152 |
|
|
Jul 06 04:53:09 PM PDT 24 |
Jul 06 05:05:21 PM PDT 24 |
14164618912 ps |
| T224 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2645631531 |
|
|
Jul 06 04:53:07 PM PDT 24 |
Jul 06 04:56:03 PM PDT 24 |
7349066975 ps |
| T225 |
/workspace/coverage/default/33.sram_ctrl_bijection.3086495170 |
|
|
Jul 06 04:54:42 PM PDT 24 |
Jul 06 04:55:50 PM PDT 24 |
5886832279 ps |
| T226 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2856053754 |
|
|
Jul 06 04:54:16 PM PDT 24 |
Jul 06 04:54:26 PM PDT 24 |
181508654 ps |
| T227 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2347113948 |
|
|
Jul 06 04:55:47 PM PDT 24 |
Jul 06 04:55:48 PM PDT 24 |
84777720 ps |
| T228 |
/workspace/coverage/default/7.sram_ctrl_smoke.2673083130 |
|
|
Jul 06 04:53:19 PM PDT 24 |
Jul 06 04:53:24 PM PDT 24 |
42277510 ps |
| T229 |
/workspace/coverage/default/8.sram_ctrl_stress_all.2431854160 |
|
|
Jul 06 04:53:07 PM PDT 24 |
Jul 06 05:26:43 PM PDT 24 |
113137690920 ps |
| T230 |
/workspace/coverage/default/1.sram_ctrl_smoke.2781662529 |
|
|
Jul 06 04:52:53 PM PDT 24 |
Jul 06 04:52:56 PM PDT 24 |
294892541 ps |
| T231 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.4246750072 |
|
|
Jul 06 04:54:56 PM PDT 24 |
Jul 06 04:55:00 PM PDT 24 |
3364007775 ps |
| T232 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.3442572554 |
|
|
Jul 06 04:54:17 PM PDT 24 |
Jul 06 04:55:56 PM PDT 24 |
118503332 ps |
| T233 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.1424602471 |
|
|
Jul 06 04:53:16 PM PDT 24 |
Jul 06 05:05:25 PM PDT 24 |
6365362232 ps |
| T234 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1356600278 |
|
|
Jul 06 04:53:17 PM PDT 24 |
Jul 06 05:09:29 PM PDT 24 |
13109423128 ps |
| T235 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2653864314 |
|
|
Jul 06 04:53:47 PM PDT 24 |
Jul 06 04:54:01 PM PDT 24 |
2230428467 ps |
| T236 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.64419047 |
|
|
Jul 06 04:54:43 PM PDT 24 |
Jul 06 04:54:44 PM PDT 24 |
34151179 ps |
| T237 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.2878567587 |
|
|
Jul 06 04:54:15 PM PDT 24 |
Jul 06 05:15:34 PM PDT 24 |
5683967002 ps |
| T238 |
/workspace/coverage/default/35.sram_ctrl_smoke.976500867 |
|
|
Jul 06 04:54:47 PM PDT 24 |
Jul 06 04:57:16 PM PDT 24 |
7645953846 ps |
| T239 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2975997405 |
|
|
Jul 06 04:54:48 PM PDT 24 |
Jul 06 04:54:54 PM PDT 24 |
601658847 ps |
| T240 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3147709615 |
|
|
Jul 06 04:52:50 PM PDT 24 |
Jul 06 04:52:56 PM PDT 24 |
354833484 ps |
| T241 |
/workspace/coverage/default/22.sram_ctrl_smoke.24239026 |
|
|
Jul 06 04:53:48 PM PDT 24 |
Jul 06 04:53:51 PM PDT 24 |
157633563 ps |
| T242 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.1632107792 |
|
|
Jul 06 04:53:41 PM PDT 24 |
Jul 06 04:53:46 PM PDT 24 |
52506136 ps |
| T243 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2105461593 |
|
|
Jul 06 04:53:07 PM PDT 24 |
Jul 06 04:57:44 PM PDT 24 |
2708683929 ps |
| T244 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.93358322 |
|
|
Jul 06 04:54:22 PM PDT 24 |
Jul 06 04:54:37 PM PDT 24 |
278167189 ps |
| T245 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.352192759 |
|
|
Jul 06 04:53:36 PM PDT 24 |
Jul 06 04:57:14 PM PDT 24 |
4549623187 ps |
| T246 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.205861590 |
|
|
Jul 06 04:53:04 PM PDT 24 |
Jul 06 04:53:12 PM PDT 24 |
661365625 ps |
| T247 |
/workspace/coverage/default/29.sram_ctrl_executable.3865918605 |
|
|
Jul 06 04:54:20 PM PDT 24 |
Jul 06 05:00:29 PM PDT 24 |
20687812303 ps |
| T248 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.4147894140 |
|
|
Jul 06 04:53:47 PM PDT 24 |
Jul 06 05:00:29 PM PDT 24 |
11921689291 ps |
| T249 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.4181974527 |
|
|
Jul 06 04:53:02 PM PDT 24 |
Jul 06 05:12:31 PM PDT 24 |
3641070992 ps |
| T250 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.157123701 |
|
|
Jul 06 04:54:15 PM PDT 24 |
Jul 06 04:59:40 PM PDT 24 |
14261021219 ps |
| T251 |
/workspace/coverage/default/5.sram_ctrl_smoke.676076725 |
|
|
Jul 06 04:53:02 PM PDT 24 |
Jul 06 04:53:15 PM PDT 24 |
520707972 ps |
| T252 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2237016907 |
|
|
Jul 06 04:54:16 PM PDT 24 |
Jul 06 04:55:57 PM PDT 24 |
288631016 ps |
| T253 |
/workspace/coverage/default/46.sram_ctrl_smoke.3831551289 |
|
|
Jul 06 04:56:25 PM PDT 24 |
Jul 06 04:58:46 PM PDT 24 |
747650832 ps |
| T254 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.2972729538 |
|
|
Jul 06 04:55:00 PM PDT 24 |
Jul 06 05:01:18 PM PDT 24 |
11167480399 ps |
| T255 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.2269414387 |
|
|
Jul 06 04:53:31 PM PDT 24 |
Jul 06 04:53:38 PM PDT 24 |
968256150 ps |
| T256 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.2026755247 |
|
|
Jul 06 04:53:47 PM PDT 24 |
Jul 06 04:53:49 PM PDT 24 |
31166085 ps |
| T257 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.4169752922 |
|
|
Jul 06 04:53:20 PM PDT 24 |
Jul 06 04:53:21 PM PDT 24 |
43305850 ps |
| T258 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.968838801 |
|
|
Jul 06 04:55:36 PM PDT 24 |
Jul 06 04:55:37 PM PDT 24 |
96705618 ps |
| T259 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.58430193 |
|
|
Jul 06 04:56:21 PM PDT 24 |
Jul 06 05:01:39 PM PDT 24 |
11956631785 ps |
| T260 |
/workspace/coverage/default/7.sram_ctrl_bijection.4050487842 |
|
|
Jul 06 04:53:16 PM PDT 24 |
Jul 06 04:54:04 PM PDT 24 |
2335621679 ps |
| T261 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1896204023 |
|
|
Jul 06 04:53:40 PM PDT 24 |
Jul 06 05:15:29 PM PDT 24 |
3620561508 ps |
| T262 |
/workspace/coverage/default/47.sram_ctrl_smoke.2201754817 |
|
|
Jul 06 04:56:27 PM PDT 24 |
Jul 06 04:57:34 PM PDT 24 |
6295658644 ps |
| T62 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.4230402556 |
|
|
Jul 06 04:54:26 PM PDT 24 |
Jul 06 04:58:48 PM PDT 24 |
1955766354 ps |
| T63 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.227888869 |
|
|
Jul 06 04:56:33 PM PDT 24 |
Jul 06 04:57:42 PM PDT 24 |
3768845563 ps |
| T263 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.2252545970 |
|
|
Jul 06 04:55:00 PM PDT 24 |
Jul 06 04:55:01 PM PDT 24 |
42293062 ps |
| T264 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1809779015 |
|
|
Jul 06 04:53:28 PM PDT 24 |
Jul 06 04:53:34 PM PDT 24 |
1375644135 ps |
| T265 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3780364208 |
|
|
Jul 06 04:53:22 PM PDT 24 |
Jul 06 04:54:04 PM PDT 24 |
1349558627 ps |
| T64 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3348077570 |
|
|
Jul 06 04:55:37 PM PDT 24 |
Jul 06 04:59:42 PM PDT 24 |
554270121 ps |
| T266 |
/workspace/coverage/default/18.sram_ctrl_executable.3523279370 |
|
|
Jul 06 04:53:40 PM PDT 24 |
Jul 06 05:24:56 PM PDT 24 |
5210992679 ps |
| T267 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2577607401 |
|
|
Jul 06 04:53:18 PM PDT 24 |
Jul 06 04:53:25 PM PDT 24 |
1452538151 ps |
| T268 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2571521443 |
|
|
Jul 06 04:56:16 PM PDT 24 |
Jul 06 04:56:33 PM PDT 24 |
295077519 ps |
| T269 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2821937725 |
|
|
Jul 06 04:52:56 PM PDT 24 |
Jul 06 04:53:02 PM PDT 24 |
971487676 ps |
| T270 |
/workspace/coverage/default/9.sram_ctrl_regwen.1463413120 |
|
|
Jul 06 04:53:07 PM PDT 24 |
Jul 06 05:14:16 PM PDT 24 |
11666991607 ps |
| T271 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.639307329 |
|
|
Jul 06 04:56:38 PM PDT 24 |
Jul 06 04:56:39 PM PDT 24 |
28098050 ps |
| T272 |
/workspace/coverage/default/29.sram_ctrl_regwen.2421608575 |
|
|
Jul 06 04:54:20 PM PDT 24 |
Jul 06 04:55:04 PM PDT 24 |
7852982893 ps |
| T273 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.165065491 |
|
|
Jul 06 04:52:55 PM PDT 24 |
Jul 06 04:53:09 PM PDT 24 |
268522696 ps |
| T274 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.171361640 |
|
|
Jul 06 04:54:26 PM PDT 24 |
Jul 06 05:07:50 PM PDT 24 |
11083890878 ps |
| T275 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.2256907401 |
|
|
Jul 06 04:54:09 PM PDT 24 |
Jul 06 04:54:20 PM PDT 24 |
3280275509 ps |
| T276 |
/workspace/coverage/default/17.sram_ctrl_alert_test.3945174471 |
|
|
Jul 06 04:53:31 PM PDT 24 |
Jul 06 04:53:32 PM PDT 24 |
25745796 ps |
| T277 |
/workspace/coverage/default/11.sram_ctrl_regwen.2307517000 |
|
|
Jul 06 04:53:16 PM PDT 24 |
Jul 06 05:02:34 PM PDT 24 |
24052212726 ps |
| T278 |
/workspace/coverage/default/37.sram_ctrl_partial_access.3750102228 |
|
|
Jul 06 04:55:04 PM PDT 24 |
Jul 06 04:56:32 PM PDT 24 |
806734282 ps |
| T279 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1652185532 |
|
|
Jul 06 04:54:09 PM PDT 24 |
Jul 06 04:54:13 PM PDT 24 |
193438692 ps |
| T280 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.3357678738 |
|
|
Jul 06 04:53:31 PM PDT 24 |
Jul 06 04:54:00 PM PDT 24 |
535465533 ps |
| T281 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.515239480 |
|
|
Jul 06 04:54:36 PM PDT 24 |
Jul 06 04:54:37 PM PDT 24 |
95296326 ps |
| T282 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.2950998005 |
|
|
Jul 06 04:54:36 PM PDT 24 |
Jul 06 04:57:01 PM PDT 24 |
135718721 ps |
| T283 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3947735845 |
|
|
Jul 06 04:54:06 PM PDT 24 |
Jul 06 04:54:24 PM PDT 24 |
343779109 ps |
| T284 |
/workspace/coverage/default/28.sram_ctrl_stress_all.2178650297 |
|
|
Jul 06 04:54:18 PM PDT 24 |
Jul 06 05:35:48 PM PDT 24 |
110607301710 ps |
| T285 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.1179842531 |
|
|
Jul 06 04:53:48 PM PDT 24 |
Jul 06 04:53:49 PM PDT 24 |
34534253 ps |
| T65 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1367726459 |
|
|
Jul 06 04:55:04 PM PDT 24 |
Jul 06 04:55:30 PM PDT 24 |
974936888 ps |
| T286 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.814309237 |
|
|
Jul 06 04:53:18 PM PDT 24 |
Jul 06 04:53:19 PM PDT 24 |
122093375 ps |
| T287 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3743218941 |
|
|
Jul 06 04:53:10 PM PDT 24 |
Jul 06 04:53:14 PM PDT 24 |
110022723 ps |
| T288 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.3944860308 |
|
|
Jul 06 04:54:04 PM PDT 24 |
Jul 06 04:54:11 PM PDT 24 |
1331110367 ps |
| T289 |
/workspace/coverage/default/33.sram_ctrl_stress_all.2033606809 |
|
|
Jul 06 04:54:50 PM PDT 24 |
Jul 06 06:09:28 PM PDT 24 |
222985993553 ps |
| T290 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.135113124 |
|
|
Jul 06 04:54:59 PM PDT 24 |
Jul 06 04:55:10 PM PDT 24 |
354846134 ps |
| T291 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.1794511295 |
|
|
Jul 06 04:54:21 PM PDT 24 |
Jul 06 05:03:41 PM PDT 24 |
1965760433 ps |
| T292 |
/workspace/coverage/default/36.sram_ctrl_regwen.3383203370 |
|
|
Jul 06 04:55:07 PM PDT 24 |
Jul 06 05:12:50 PM PDT 24 |
14317385786 ps |
| T293 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.968273072 |
|
|
Jul 06 04:53:58 PM PDT 24 |
Jul 06 04:54:01 PM PDT 24 |
84767098 ps |
| T294 |
/workspace/coverage/default/22.sram_ctrl_bijection.2646892615 |
|
|
Jul 06 04:53:47 PM PDT 24 |
Jul 06 04:54:43 PM PDT 24 |
9659500222 ps |
| T295 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.4059971184 |
|
|
Jul 06 04:53:53 PM PDT 24 |
Jul 06 04:53:54 PM PDT 24 |
129613822 ps |
| T296 |
/workspace/coverage/default/40.sram_ctrl_smoke.4157911557 |
|
|
Jul 06 04:55:30 PM PDT 24 |
Jul 06 04:55:38 PM PDT 24 |
319532634 ps |
| T297 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1442603825 |
|
|
Jul 06 04:56:21 PM PDT 24 |
Jul 06 04:56:30 PM PDT 24 |
422607871 ps |
| T298 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.209742202 |
|
|
Jul 06 04:54:55 PM PDT 24 |
Jul 06 04:55:16 PM PDT 24 |
138626092 ps |