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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1018
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T305 /workspace/coverage/default/39.sram_ctrl_smoke.1175651062 Jul 07 05:42:57 PM PDT 24 Jul 07 05:43:35 PM PDT 24 847592724 ps
T306 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3223350651 Jul 07 05:42:11 PM PDT 24 Jul 07 05:43:39 PM PDT 24 130889641 ps
T307 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.3263043181 Jul 07 05:41:10 PM PDT 24 Jul 07 05:41:16 PM PDT 24 162109422 ps
T308 /workspace/coverage/default/14.sram_ctrl_smoke.298176236 Jul 07 05:41:23 PM PDT 24 Jul 07 05:41:39 PM PDT 24 2678253288 ps
T309 /workspace/coverage/default/45.sram_ctrl_partial_access.2156188603 Jul 07 05:43:33 PM PDT 24 Jul 07 05:43:44 PM PDT 24 198777502 ps
T310 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.4139124074 Jul 07 05:42:29 PM PDT 24 Jul 07 05:42:35 PM PDT 24 1821585895 ps
T311 /workspace/coverage/default/17.sram_ctrl_multiple_keys.730790737 Jul 07 05:41:37 PM PDT 24 Jul 07 05:44:39 PM PDT 24 8274665521 ps
T312 /workspace/coverage/default/48.sram_ctrl_smoke.3969142952 Jul 07 05:43:49 PM PDT 24 Jul 07 05:45:00 PM PDT 24 924084039 ps
T313 /workspace/coverage/default/47.sram_ctrl_alert_test.1444766097 Jul 07 05:43:48 PM PDT 24 Jul 07 05:43:49 PM PDT 24 14388622 ps
T314 /workspace/coverage/default/8.sram_ctrl_smoke.4289228671 Jul 07 05:40:57 PM PDT 24 Jul 07 05:43:38 PM PDT 24 733517463 ps
T315 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.47793818 Jul 07 05:42:26 PM PDT 24 Jul 07 05:42:29 PM PDT 24 186206448 ps
T316 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1779495987 Jul 07 05:42:11 PM PDT 24 Jul 07 05:43:45 PM PDT 24 772512137 ps
T317 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3018587254 Jul 07 05:43:04 PM PDT 24 Jul 07 05:43:35 PM PDT 24 107637359 ps
T318 /workspace/coverage/default/20.sram_ctrl_bijection.3304551316 Jul 07 05:41:20 PM PDT 24 Jul 07 05:42:19 PM PDT 24 5212321730 ps
T319 /workspace/coverage/default/15.sram_ctrl_executable.1895680007 Jul 07 05:41:30 PM PDT 24 Jul 07 05:53:32 PM PDT 24 39202448273 ps
T320 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3938702333 Jul 07 05:40:43 PM PDT 24 Jul 07 05:44:19 PM PDT 24 8052041831 ps
T321 /workspace/coverage/default/0.sram_ctrl_lc_escalation.2235088824 Jul 07 05:40:42 PM PDT 24 Jul 07 05:40:52 PM PDT 24 1919104438 ps
T322 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3937150079 Jul 07 05:43:01 PM PDT 24 Jul 07 05:47:05 PM PDT 24 9860077831 ps
T323 /workspace/coverage/default/7.sram_ctrl_bijection.1514140554 Jul 07 05:41:23 PM PDT 24 Jul 07 05:42:50 PM PDT 24 15010731424 ps
T324 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.129221642 Jul 07 05:42:50 PM PDT 24 Jul 07 05:43:11 PM PDT 24 341503013 ps
T325 /workspace/coverage/default/4.sram_ctrl_bijection.1108283574 Jul 07 05:40:53 PM PDT 24 Jul 07 05:41:26 PM PDT 24 1877684973 ps
T326 /workspace/coverage/default/4.sram_ctrl_ram_cfg.1279006811 Jul 07 05:40:50 PM PDT 24 Jul 07 05:40:52 PM PDT 24 28803711 ps
T327 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.480429625 Jul 07 05:41:18 PM PDT 24 Jul 07 05:44:19 PM PDT 24 6795286721 ps
T328 /workspace/coverage/default/4.sram_ctrl_stress_all.591805609 Jul 07 05:41:04 PM PDT 24 Jul 07 06:17:04 PM PDT 24 8138992006 ps
T18 /workspace/coverage/default/1.sram_ctrl_sec_cm.3030539122 Jul 07 05:40:42 PM PDT 24 Jul 07 05:40:48 PM PDT 24 662921775 ps
T329 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3564457875 Jul 07 05:41:28 PM PDT 24 Jul 07 05:45:13 PM PDT 24 11857517121 ps
T330 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2544901021 Jul 07 05:43:01 PM PDT 24 Jul 07 05:43:26 PM PDT 24 99724644 ps
T331 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2984837326 Jul 07 05:41:23 PM PDT 24 Jul 07 05:41:30 PM PDT 24 696121856 ps
T332 /workspace/coverage/default/9.sram_ctrl_mem_walk.4073282286 Jul 07 05:41:25 PM PDT 24 Jul 07 05:41:36 PM PDT 24 1852293806 ps
T333 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.2698468754 Jul 07 05:42:21 PM PDT 24 Jul 07 05:47:55 PM PDT 24 18259122507 ps
T334 /workspace/coverage/default/15.sram_ctrl_max_throughput.2994005633 Jul 07 05:41:25 PM PDT 24 Jul 07 05:41:29 PM PDT 24 280078522 ps
T335 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.751725325 Jul 07 05:42:11 PM PDT 24 Jul 07 05:42:17 PM PDT 24 235798332 ps
T336 /workspace/coverage/default/37.sram_ctrl_smoke.2859365222 Jul 07 05:42:51 PM PDT 24 Jul 07 05:43:11 PM PDT 24 1081911480 ps
T337 /workspace/coverage/default/46.sram_ctrl_stress_all.124274012 Jul 07 05:43:45 PM PDT 24 Jul 07 06:21:30 PM PDT 24 32771104124 ps
T338 /workspace/coverage/default/2.sram_ctrl_alert_test.3017473257 Jul 07 05:41:09 PM PDT 24 Jul 07 05:41:10 PM PDT 24 43442906 ps
T339 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2883949473 Jul 07 05:42:50 PM PDT 24 Jul 07 05:44:59 PM PDT 24 662659697 ps
T340 /workspace/coverage/default/19.sram_ctrl_multiple_keys.2820140253 Jul 07 05:41:24 PM PDT 24 Jul 07 05:44:18 PM PDT 24 4217837113 ps
T341 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.152352017 Jul 07 05:41:13 PM PDT 24 Jul 07 05:43:59 PM PDT 24 1782394909 ps
T342 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.3738948089 Jul 07 05:41:32 PM PDT 24 Jul 07 05:41:36 PM PDT 24 60608531 ps
T343 /workspace/coverage/default/44.sram_ctrl_regwen.3790352350 Jul 07 05:43:29 PM PDT 24 Jul 07 05:55:12 PM PDT 24 6965093346 ps
T344 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.174971760 Jul 07 05:43:34 PM PDT 24 Jul 07 05:45:26 PM PDT 24 4906265963 ps
T345 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.3030814741 Jul 07 05:43:55 PM PDT 24 Jul 07 05:53:06 PM PDT 24 6785586801 ps
T346 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1156990998 Jul 07 05:40:55 PM PDT 24 Jul 07 05:41:20 PM PDT 24 390391333 ps
T347 /workspace/coverage/default/18.sram_ctrl_executable.1128379554 Jul 07 05:41:36 PM PDT 24 Jul 07 06:01:03 PM PDT 24 98128381099 ps
T348 /workspace/coverage/default/19.sram_ctrl_partial_access.3766138340 Jul 07 05:41:28 PM PDT 24 Jul 07 05:41:48 PM PDT 24 903112975 ps
T349 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1092042622 Jul 07 05:41:30 PM PDT 24 Jul 07 05:41:33 PM PDT 24 172214270 ps
T350 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.1159897673 Jul 07 05:41:39 PM PDT 24 Jul 07 05:41:45 PM PDT 24 497207178 ps
T351 /workspace/coverage/default/14.sram_ctrl_alert_test.2709773096 Jul 07 05:41:31 PM PDT 24 Jul 07 05:41:33 PM PDT 24 16270425 ps
T352 /workspace/coverage/default/25.sram_ctrl_regwen.4279233758 Jul 07 05:41:55 PM PDT 24 Jul 07 06:04:15 PM PDT 24 46079869186 ps
T353 /workspace/coverage/default/31.sram_ctrl_stress_all.3258412259 Jul 07 05:42:22 PM PDT 24 Jul 07 06:12:09 PM PDT 24 97730007697 ps
T354 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.1657899948 Jul 07 05:41:07 PM PDT 24 Jul 07 05:41:10 PM PDT 24 221549994 ps
T19 /workspace/coverage/default/0.sram_ctrl_sec_cm.3919966713 Jul 07 05:40:49 PM PDT 24 Jul 07 05:40:51 PM PDT 24 106263851 ps
T355 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.4270997366 Jul 07 05:42:21 PM PDT 24 Jul 07 05:47:58 PM PDT 24 3447769978 ps
T356 /workspace/coverage/default/16.sram_ctrl_ram_cfg.2892210940 Jul 07 05:41:34 PM PDT 24 Jul 07 05:41:36 PM PDT 24 43041342 ps
T357 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.401420002 Jul 07 05:41:31 PM PDT 24 Jul 07 05:49:32 PM PDT 24 79110115318 ps
T358 /workspace/coverage/default/20.sram_ctrl_max_throughput.600527318 Jul 07 05:41:27 PM PDT 24 Jul 07 05:43:20 PM PDT 24 249399629 ps
T359 /workspace/coverage/default/22.sram_ctrl_regwen.1354973929 Jul 07 05:41:30 PM PDT 24 Jul 07 06:02:17 PM PDT 24 13296304446 ps
T360 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.4043685327 Jul 07 05:42:35 PM PDT 24 Jul 07 05:47:47 PM PDT 24 12371847023 ps
T361 /workspace/coverage/default/49.sram_ctrl_alert_test.3874951638 Jul 07 05:44:07 PM PDT 24 Jul 07 05:44:08 PM PDT 24 14105801 ps
T362 /workspace/coverage/default/28.sram_ctrl_lc_escalation.986100113 Jul 07 05:42:02 PM PDT 24 Jul 07 05:42:10 PM PDT 24 692966205 ps
T363 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.3332194890 Jul 07 05:41:18 PM PDT 24 Jul 07 05:45:07 PM PDT 24 12382674615 ps
T364 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1632713972 Jul 07 05:41:06 PM PDT 24 Jul 07 05:56:39 PM PDT 24 20864495666 ps
T365 /workspace/coverage/default/41.sram_ctrl_stress_all.1680324880 Jul 07 05:43:08 PM PDT 24 Jul 07 06:26:15 PM PDT 24 114822461753 ps
T366 /workspace/coverage/default/38.sram_ctrl_multiple_keys.2114722100 Jul 07 05:42:51 PM PDT 24 Jul 07 05:53:46 PM PDT 24 4058812261 ps
T367 /workspace/coverage/default/13.sram_ctrl_max_throughput.1101413701 Jul 07 05:41:20 PM PDT 24 Jul 07 05:41:25 PM PDT 24 187702993 ps
T368 /workspace/coverage/default/26.sram_ctrl_multiple_keys.4083028422 Jul 07 05:41:46 PM PDT 24 Jul 07 05:56:40 PM PDT 24 29321247766 ps
T369 /workspace/coverage/default/8.sram_ctrl_bijection.3733512574 Jul 07 05:41:32 PM PDT 24 Jul 07 05:42:07 PM PDT 24 2426688602 ps
T370 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3113763799 Jul 07 05:41:15 PM PDT 24 Jul 07 05:41:18 PM PDT 24 115301617 ps
T371 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3290978998 Jul 07 05:41:08 PM PDT 24 Jul 07 05:45:46 PM PDT 24 2898634031 ps
T372 /workspace/coverage/default/27.sram_ctrl_smoke.695820174 Jul 07 05:42:01 PM PDT 24 Jul 07 05:42:06 PM PDT 24 682256103 ps
T373 /workspace/coverage/default/30.sram_ctrl_regwen.1741555680 Jul 07 05:42:11 PM PDT 24 Jul 07 05:56:36 PM PDT 24 4670415301 ps
T374 /workspace/coverage/default/1.sram_ctrl_ram_cfg.216971249 Jul 07 05:40:41 PM PDT 24 Jul 07 05:40:46 PM PDT 24 80670113 ps
T375 /workspace/coverage/default/42.sram_ctrl_mem_walk.2075166115 Jul 07 05:43:12 PM PDT 24 Jul 07 05:43:23 PM PDT 24 782717491 ps
T376 /workspace/coverage/default/35.sram_ctrl_partial_access.4212792181 Jul 07 05:42:33 PM PDT 24 Jul 07 05:43:08 PM PDT 24 427423447 ps
T377 /workspace/coverage/default/35.sram_ctrl_stress_all.3213150664 Jul 07 05:42:35 PM PDT 24 Jul 07 06:07:46 PM PDT 24 41640734151 ps
T378 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.1620288939 Jul 07 05:41:38 PM PDT 24 Jul 07 05:45:06 PM PDT 24 4080670089 ps
T379 /workspace/coverage/default/15.sram_ctrl_mem_walk.3934786265 Jul 07 05:41:36 PM PDT 24 Jul 07 05:41:46 PM PDT 24 268451527 ps
T380 /workspace/coverage/default/9.sram_ctrl_ram_cfg.786198272 Jul 07 05:41:26 PM PDT 24 Jul 07 05:41:27 PM PDT 24 53539201 ps
T381 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.1860174778 Jul 07 05:40:35 PM PDT 24 Jul 07 05:45:01 PM PDT 24 14221714786 ps
T382 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.1405217272 Jul 07 05:41:26 PM PDT 24 Jul 07 05:41:29 PM PDT 24 292168456 ps
T383 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.1918940751 Jul 07 05:43:14 PM PDT 24 Jul 07 05:55:35 PM PDT 24 2139899241 ps
T384 /workspace/coverage/default/23.sram_ctrl_ram_cfg.1318354144 Jul 07 05:41:52 PM PDT 24 Jul 07 05:41:53 PM PDT 24 77059169 ps
T385 /workspace/coverage/default/44.sram_ctrl_mem_walk.3871898997 Jul 07 05:43:30 PM PDT 24 Jul 07 05:43:36 PM PDT 24 894342803 ps
T386 /workspace/coverage/default/47.sram_ctrl_smoke.3512142842 Jul 07 05:43:44 PM PDT 24 Jul 07 05:45:44 PM PDT 24 273659907 ps
T387 /workspace/coverage/default/27.sram_ctrl_ram_cfg.1396274364 Jul 07 05:41:57 PM PDT 24 Jul 07 05:41:58 PM PDT 24 81682374 ps
T388 /workspace/coverage/default/20.sram_ctrl_alert_test.288207080 Jul 07 05:41:27 PM PDT 24 Jul 07 05:41:28 PM PDT 24 22686819 ps
T389 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1452315923 Jul 07 05:42:24 PM PDT 24 Jul 07 05:42:30 PM PDT 24 556359809 ps
T390 /workspace/coverage/default/42.sram_ctrl_max_throughput.2020436247 Jul 07 05:43:15 PM PDT 24 Jul 07 05:45:03 PM PDT 24 156939499 ps
T391 /workspace/coverage/default/11.sram_ctrl_executable.3609849272 Jul 07 05:41:31 PM PDT 24 Jul 07 05:51:40 PM PDT 24 29257726124 ps
T392 /workspace/coverage/default/11.sram_ctrl_alert_test.2438159313 Jul 07 05:41:27 PM PDT 24 Jul 07 05:41:28 PM PDT 24 14216715 ps
T393 /workspace/coverage/default/40.sram_ctrl_ram_cfg.2089172351 Jul 07 05:43:03 PM PDT 24 Jul 07 05:43:04 PM PDT 24 123023738 ps
T394 /workspace/coverage/default/10.sram_ctrl_partial_access.2117213957 Jul 07 05:41:25 PM PDT 24 Jul 07 05:42:29 PM PDT 24 170529436 ps
T395 /workspace/coverage/default/9.sram_ctrl_executable.1827817246 Jul 07 05:41:33 PM PDT 24 Jul 07 06:07:13 PM PDT 24 81582158761 ps
T396 /workspace/coverage/default/38.sram_ctrl_smoke.3223780209 Jul 07 05:42:49 PM PDT 24 Jul 07 05:42:50 PM PDT 24 329022410 ps
T397 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2420616377 Jul 07 05:43:30 PM PDT 24 Jul 07 05:55:08 PM PDT 24 12840049647 ps
T398 /workspace/coverage/default/38.sram_ctrl_bijection.3206581670 Jul 07 05:42:51 PM PDT 24 Jul 07 05:43:40 PM PDT 24 746862064 ps
T399 /workspace/coverage/default/31.sram_ctrl_executable.1638126084 Jul 07 05:42:20 PM PDT 24 Jul 07 05:54:49 PM PDT 24 11169060712 ps
T400 /workspace/coverage/default/5.sram_ctrl_partial_access.2471026908 Jul 07 05:41:08 PM PDT 24 Jul 07 05:41:26 PM PDT 24 4310915140 ps
T401 /workspace/coverage/default/29.sram_ctrl_partial_access.2030888002 Jul 07 05:42:04 PM PDT 24 Jul 07 05:42:08 PM PDT 24 522053348 ps
T402 /workspace/coverage/default/1.sram_ctrl_smoke.3056685614 Jul 07 05:40:41 PM PDT 24 Jul 07 05:40:47 PM PDT 24 87316228 ps
T403 /workspace/coverage/default/5.sram_ctrl_multiple_keys.4226234081 Jul 07 05:41:08 PM PDT 24 Jul 07 05:59:45 PM PDT 24 13409152622 ps
T404 /workspace/coverage/default/10.sram_ctrl_ram_cfg.3068445697 Jul 07 05:41:09 PM PDT 24 Jul 07 05:41:11 PM PDT 24 74189241 ps
T405 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1910176211 Jul 07 05:43:33 PM PDT 24 Jul 07 05:47:00 PM PDT 24 9449466100 ps
T406 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.3497281119 Jul 07 05:41:11 PM PDT 24 Jul 07 05:52:52 PM PDT 24 3341600872 ps
T407 /workspace/coverage/default/39.sram_ctrl_lc_escalation.235737515 Jul 07 05:42:58 PM PDT 24 Jul 07 05:43:07 PM PDT 24 643791344 ps
T113 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1459557249 Jul 07 05:41:20 PM PDT 24 Jul 07 05:41:44 PM PDT 24 1562116665 ps
T408 /workspace/coverage/default/1.sram_ctrl_stress_all.1885774538 Jul 07 05:40:43 PM PDT 24 Jul 07 06:15:02 PM PDT 24 149709230615 ps
T409 /workspace/coverage/default/48.sram_ctrl_partial_access.1399852351 Jul 07 05:43:48 PM PDT 24 Jul 07 05:43:55 PM PDT 24 261900776 ps
T410 /workspace/coverage/default/33.sram_ctrl_multiple_keys.916467670 Jul 07 05:42:17 PM PDT 24 Jul 07 05:58:32 PM PDT 24 18002783394 ps
T411 /workspace/coverage/default/35.sram_ctrl_executable.242883815 Jul 07 05:42:29 PM PDT 24 Jul 07 06:10:05 PM PDT 24 67786221063 ps
T412 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.1409186701 Jul 07 05:41:27 PM PDT 24 Jul 07 05:58:11 PM PDT 24 2592468380 ps
T413 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.1767603548 Jul 07 05:41:50 PM PDT 24 Jul 07 05:44:22 PM PDT 24 592004682 ps
T414 /workspace/coverage/default/1.sram_ctrl_executable.2659404591 Jul 07 05:40:51 PM PDT 24 Jul 07 06:03:02 PM PDT 24 4540770202 ps
T415 /workspace/coverage/default/46.sram_ctrl_regwen.2933738817 Jul 07 05:43:41 PM PDT 24 Jul 07 05:54:28 PM PDT 24 1838736680 ps
T416 /workspace/coverage/default/17.sram_ctrl_stress_all.976258559 Jul 07 05:41:31 PM PDT 24 Jul 07 05:45:02 PM PDT 24 6838483577 ps
T417 /workspace/coverage/default/41.sram_ctrl_regwen.198687440 Jul 07 05:43:09 PM PDT 24 Jul 07 05:46:09 PM PDT 24 355578799 ps
T418 /workspace/coverage/default/18.sram_ctrl_ram_cfg.742802806 Jul 07 05:41:27 PM PDT 24 Jul 07 05:41:29 PM PDT 24 28243803 ps
T419 /workspace/coverage/default/2.sram_ctrl_regwen.4043830104 Jul 07 05:40:57 PM PDT 24 Jul 07 05:47:03 PM PDT 24 5646368174 ps
T420 /workspace/coverage/default/36.sram_ctrl_ram_cfg.2508199904 Jul 07 05:42:40 PM PDT 24 Jul 07 05:42:41 PM PDT 24 81503414 ps
T421 /workspace/coverage/default/43.sram_ctrl_max_throughput.2371667435 Jul 07 05:43:18 PM PDT 24 Jul 07 05:44:42 PM PDT 24 461717720 ps
T422 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1764651649 Jul 07 05:41:26 PM PDT 24 Jul 07 05:55:57 PM PDT 24 7139597012 ps
T423 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.133228629 Jul 07 05:41:26 PM PDT 24 Jul 07 05:44:22 PM PDT 24 28496871469 ps
T424 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3244116248 Jul 07 05:41:17 PM PDT 24 Jul 07 05:41:19 PM PDT 24 338353285 ps
T425 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.2226445952 Jul 07 05:42:34 PM PDT 24 Jul 07 05:42:39 PM PDT 24 55465517 ps
T426 /workspace/coverage/default/10.sram_ctrl_multiple_keys.3834520572 Jul 07 05:41:12 PM PDT 24 Jul 07 05:49:00 PM PDT 24 1943235222 ps
T427 /workspace/coverage/default/42.sram_ctrl_bijection.2061646751 Jul 07 05:43:14 PM PDT 24 Jul 07 05:44:06 PM PDT 24 784763497 ps
T428 /workspace/coverage/default/49.sram_ctrl_mem_walk.3131470338 Jul 07 05:44:03 PM PDT 24 Jul 07 05:44:09 PM PDT 24 274048174 ps
T429 /workspace/coverage/default/9.sram_ctrl_partial_access.1574843107 Jul 07 05:41:20 PM PDT 24 Jul 07 05:43:38 PM PDT 24 217143699 ps
T430 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.4179221734 Jul 07 05:41:26 PM PDT 24 Jul 07 05:43:36 PM PDT 24 2917788376 ps
T431 /workspace/coverage/default/37.sram_ctrl_executable.3647872993 Jul 07 05:42:52 PM PDT 24 Jul 07 06:01:45 PM PDT 24 13448095427 ps
T432 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3978925925 Jul 07 05:41:11 PM PDT 24 Jul 07 05:46:17 PM PDT 24 9166279033 ps
T433 /workspace/coverage/default/34.sram_ctrl_regwen.1232775706 Jul 07 05:42:28 PM PDT 24 Jul 07 05:59:41 PM PDT 24 47797830615 ps
T434 /workspace/coverage/default/42.sram_ctrl_lc_escalation.3144103338 Jul 07 05:43:12 PM PDT 24 Jul 07 05:43:22 PM PDT 24 10100883303 ps
T435 /workspace/coverage/default/2.sram_ctrl_executable.2256859469 Jul 07 05:40:52 PM PDT 24 Jul 07 05:44:26 PM PDT 24 13242461606 ps
T436 /workspace/coverage/default/32.sram_ctrl_max_throughput.720583533 Jul 07 05:42:20 PM PDT 24 Jul 07 05:43:13 PM PDT 24 108222410 ps
T437 /workspace/coverage/default/45.sram_ctrl_regwen.4020286433 Jul 07 05:43:33 PM PDT 24 Jul 07 06:03:24 PM PDT 24 44356189495 ps
T438 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.985739587 Jul 07 05:42:02 PM PDT 24 Jul 07 05:49:47 PM PDT 24 35517703396 ps
T439 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2600388569 Jul 07 05:41:59 PM PDT 24 Jul 07 05:45:37 PM PDT 24 11099278575 ps
T440 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.430927256 Jul 07 05:42:01 PM PDT 24 Jul 07 06:00:58 PM PDT 24 6803252853 ps
T441 /workspace/coverage/default/25.sram_ctrl_bijection.3812853474 Jul 07 05:41:57 PM PDT 24 Jul 07 05:43:21 PM PDT 24 5218065998 ps
T442 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1651878728 Jul 07 05:43:25 PM PDT 24 Jul 07 05:43:30 PM PDT 24 268880717 ps
T443 /workspace/coverage/default/15.sram_ctrl_ram_cfg.2521147334 Jul 07 05:41:34 PM PDT 24 Jul 07 05:41:35 PM PDT 24 78247725 ps
T444 /workspace/coverage/default/10.sram_ctrl_executable.4130429229 Jul 07 05:41:21 PM PDT 24 Jul 07 06:05:03 PM PDT 24 17909858227 ps
T445 /workspace/coverage/default/39.sram_ctrl_partial_access.1829511730 Jul 07 05:42:53 PM PDT 24 Jul 07 05:43:03 PM PDT 24 3037986644 ps
T446 /workspace/coverage/default/46.sram_ctrl_bijection.2679896970 Jul 07 05:43:32 PM PDT 24 Jul 07 05:44:35 PM PDT 24 4044962623 ps
T447 /workspace/coverage/default/42.sram_ctrl_stress_all.3691835249 Jul 07 05:43:19 PM PDT 24 Jul 07 06:13:53 PM PDT 24 66698331896 ps
T448 /workspace/coverage/default/1.sram_ctrl_regwen.2080296723 Jul 07 05:40:52 PM PDT 24 Jul 07 05:53:39 PM PDT 24 2247438310 ps
T449 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1554659109 Jul 07 05:43:12 PM PDT 24 Jul 07 05:44:37 PM PDT 24 147256240 ps
T450 /workspace/coverage/default/34.sram_ctrl_lc_escalation.2712635948 Jul 07 05:42:27 PM PDT 24 Jul 07 05:42:33 PM PDT 24 436411184 ps
T451 /workspace/coverage/default/19.sram_ctrl_smoke.3631377283 Jul 07 05:41:30 PM PDT 24 Jul 07 05:41:34 PM PDT 24 64625594 ps
T452 /workspace/coverage/default/19.sram_ctrl_alert_test.2751473931 Jul 07 05:41:26 PM PDT 24 Jul 07 05:41:28 PM PDT 24 21308238 ps
T453 /workspace/coverage/default/28.sram_ctrl_partial_access.2419989699 Jul 07 05:42:06 PM PDT 24 Jul 07 05:42:11 PM PDT 24 157413778 ps
T454 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.1492372064 Jul 07 05:43:36 PM PDT 24 Jul 07 05:43:42 PM PDT 24 342028658 ps
T455 /workspace/coverage/default/39.sram_ctrl_ram_cfg.1727796462 Jul 07 05:43:01 PM PDT 24 Jul 07 05:43:02 PM PDT 24 77735330 ps
T456 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.989386600 Jul 07 05:41:05 PM PDT 24 Jul 07 05:44:54 PM PDT 24 42198494443 ps
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T458 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.342614498 Jul 07 05:41:12 PM PDT 24 Jul 07 05:41:15 PM PDT 24 166626277 ps
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T465 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1918142747 Jul 07 05:43:42 PM PDT 24 Jul 07 05:43:45 PM PDT 24 139524009 ps
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T480 /workspace/coverage/default/5.sram_ctrl_executable.2210910606 Jul 07 05:41:09 PM PDT 24 Jul 07 05:46:58 PM PDT 24 13829053302 ps
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T492 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2583997224 Jul 07 05:41:34 PM PDT 24 Jul 07 05:48:11 PM PDT 24 74937150825 ps
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T496 /workspace/coverage/default/5.sram_ctrl_ram_cfg.1363098706 Jul 07 05:41:17 PM PDT 24 Jul 07 05:41:18 PM PDT 24 51173177 ps
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T506 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2853019746 Jul 07 05:41:32 PM PDT 24 Jul 07 05:52:08 PM PDT 24 91656605558 ps
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T508 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1907235374 Jul 07 05:43:13 PM PDT 24 Jul 07 05:46:55 PM PDT 24 2293612412 ps
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T510 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.4064983422 Jul 07 05:41:20 PM PDT 24 Jul 07 05:43:22 PM PDT 24 152795067 ps
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T514 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.2431586812 Jul 07 05:41:26 PM PDT 24 Jul 07 05:42:11 PM PDT 24 123517710 ps
T515 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.381929860 Jul 07 05:42:11 PM PDT 24 Jul 07 05:42:21 PM PDT 24 497273816 ps
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T521 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2572192257 Jul 07 05:42:20 PM PDT 24 Jul 07 05:43:49 PM PDT 24 1021425082 ps
T522 /workspace/coverage/default/38.sram_ctrl_ram_cfg.3485666668 Jul 07 05:42:51 PM PDT 24 Jul 07 05:42:52 PM PDT 24 118541697 ps
T523 /workspace/coverage/default/36.sram_ctrl_executable.4262224545 Jul 07 05:42:37 PM PDT 24 Jul 07 06:01:45 PM PDT 24 14333089946 ps
T524 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.352880272 Jul 07 05:41:58 PM PDT 24 Jul 07 05:47:54 PM PDT 24 18555355712 ps
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T526 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.3002344686 Jul 07 05:43:14 PM PDT 24 Jul 07 05:57:19 PM PDT 24 14428634710 ps
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T528 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2874911733 Jul 07 05:42:06 PM PDT 24 Jul 07 05:43:55 PM PDT 24 1921410531 ps
T529 /workspace/coverage/default/24.sram_ctrl_mem_walk.173827520 Jul 07 05:41:50 PM PDT 24 Jul 07 05:41:56 PM PDT 24 1045793794 ps
T530 /workspace/coverage/default/46.sram_ctrl_alert_test.4240713677 Jul 07 05:43:41 PM PDT 24 Jul 07 05:43:43 PM PDT 24 13589196 ps
T531 /workspace/coverage/default/23.sram_ctrl_mem_walk.3307715318 Jul 07 05:41:32 PM PDT 24 Jul 07 05:41:43 PM PDT 24 473804370 ps
T532 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.908732090 Jul 07 05:41:24 PM PDT 24 Jul 07 05:46:01 PM PDT 24 7098539891 ps
T533 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2885447927 Jul 07 05:41:12 PM PDT 24 Jul 07 05:44:23 PM PDT 24 30592275495 ps
T534 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.1604488995 Jul 07 05:43:02 PM PDT 24 Jul 07 05:43:13 PM PDT 24 285381388 ps
T535 /workspace/coverage/default/7.sram_ctrl_max_throughput.3566689213 Jul 07 05:41:18 PM PDT 24 Jul 07 05:41:22 PM PDT 24 383001923 ps
T536 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1190371256 Jul 07 05:41:34 PM PDT 24 Jul 07 05:43:40 PM PDT 24 163096849 ps
T537 /workspace/coverage/default/36.sram_ctrl_stress_all.824397869 Jul 07 05:42:41 PM PDT 24 Jul 07 06:49:47 PM PDT 24 49813573765 ps
T538 /workspace/coverage/default/24.sram_ctrl_executable.1405016995 Jul 07 05:41:44 PM PDT 24 Jul 07 05:57:00 PM PDT 24 13183864321 ps
T539 /workspace/coverage/default/28.sram_ctrl_multiple_keys.1211799245 Jul 07 05:41:59 PM PDT 24 Jul 07 05:46:41 PM PDT 24 46264383615 ps
T540 /workspace/coverage/default/45.sram_ctrl_max_throughput.1706493169 Jul 07 05:43:33 PM PDT 24 Jul 07 05:43:50 PM PDT 24 316382198 ps
T541 /workspace/coverage/default/28.sram_ctrl_alert_test.4119679774 Jul 07 05:42:05 PM PDT 24 Jul 07 05:42:06 PM PDT 24 23870181 ps
T542 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.566138584 Jul 07 05:41:28 PM PDT 24 Jul 07 05:42:28 PM PDT 24 219283646 ps
T543 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.4047078418 Jul 07 05:40:51 PM PDT 24 Jul 07 05:47:55 PM PDT 24 17441143047 ps
T544 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1953936449 Jul 07 05:41:14 PM PDT 24 Jul 07 05:48:53 PM PDT 24 38824621377 ps
T545 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2379427227 Jul 07 05:43:31 PM PDT 24 Jul 07 05:49:48 PM PDT 24 20409818836 ps
T546 /workspace/coverage/default/14.sram_ctrl_lc_escalation.3203694672 Jul 07 05:41:25 PM PDT 24 Jul 07 05:41:33 PM PDT 24 749043903 ps
T547 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.654479326 Jul 07 05:41:32 PM PDT 24 Jul 07 05:44:23 PM PDT 24 3598820500 ps
T548 /workspace/coverage/default/38.sram_ctrl_stress_all.2233025231 Jul 07 05:42:56 PM PDT 24 Jul 07 06:35:45 PM PDT 24 22329665680 ps
T549 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.3163412464 Jul 07 05:42:06 PM PDT 24 Jul 07 05:42:10 PM PDT 24 96793436 ps
T550 /workspace/coverage/default/5.sram_ctrl_alert_test.4128412630 Jul 07 05:41:14 PM PDT 24 Jul 07 05:41:21 PM PDT 24 15391219 ps
T551 /workspace/coverage/default/3.sram_ctrl_max_throughput.4291003677 Jul 07 05:41:06 PM PDT 24 Jul 07 05:42:21 PM PDT 24 451609063 ps
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