| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1218437711 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.4119798663 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3435912615 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1574682999 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1956186329 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.691466655 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.215560318 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.283221772 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.745576145 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3510835734 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.591834667 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1106925610 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.464208953 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.4093734168 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3189865892 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2881030507 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3963513306 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2653755048 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.4185079004 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.187196433 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.609158188 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2558918801 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1651659105 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.952783754 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.316455717 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3281412058 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.846315989 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3183903054 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2972501506 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2172462835 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2112612561 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.124196559 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1870773486 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1760811160 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.600439635 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3599493931 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.135850742 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3481320912 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3415321934 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3370103293 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2151022480 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3834466648 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1922453660 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2988499820 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1552212854 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1836264006 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.811922580 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3878603767 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.4235416352 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.944876379 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.509601446 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2961988938 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2853855436 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.129573155 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2810279483 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3639831038 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.786640799 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1272721335 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.892598275 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2152617817 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2192396881 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4106560457 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1812788976 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2724467422 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1174345512 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3677049081 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2052287597 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1550220018 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2084412495 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2481174161 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1352378814 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1741418400 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3531671096 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1444184513 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2758832117 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.4171302832 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.590657277 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.3374740601 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1799026689 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2462604854 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2428921535 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1058656017 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1794553939 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2125136933 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.141588470 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3386632889 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.841893424 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.147184605 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.730345153 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3654773783 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1727157429 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1962359892 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2731920025 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.4168926728 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.507043322 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2095391021 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1620915007 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2427571848 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2598856257 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3242957061 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3726718248 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.764643201 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2758085945 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.652860331 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2684610977 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2507066652 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3468839363 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1581346306 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3223882238 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.649313876 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2853142122 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1345852611 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3134258310 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.909305546 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.288217752 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2386602643 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.811077009 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2890083910 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1870036741 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2911116402 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.888701727 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3829536794 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2019020792 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1191607378 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.542189137 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2865582044 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.3762098607 |
| /workspace/coverage/default/0.sram_ctrl_bijection.3372756238 |
| /workspace/coverage/default/0.sram_ctrl_executable.690969785 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.2235088824 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.3024217372 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1486095244 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.1051740908 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.2862771589 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.1153145434 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1017347195 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.1349144760 |
| /workspace/coverage/default/0.sram_ctrl_regwen.1140973730 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.3919966713 |
| /workspace/coverage/default/0.sram_ctrl_smoke.2950611799 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.2339558154 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2396228599 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1381699074 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3751746134 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.110366152 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.4226661206 |
| /workspace/coverage/default/1.sram_ctrl_bijection.3977469637 |
| /workspace/coverage/default/1.sram_ctrl_executable.2659404591 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.4153072167 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.1199035168 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.410277803 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.2904761570 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.1632713972 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.3149362971 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3938702333 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.216971249 |
| /workspace/coverage/default/1.sram_ctrl_regwen.2080296723 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.3030539122 |
| /workspace/coverage/default/1.sram_ctrl_smoke.3056685614 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.1885774538 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3290978998 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1156990998 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.3760377296 |
| /workspace/coverage/default/10.sram_ctrl_bijection.10463446 |
| /workspace/coverage/default/10.sram_ctrl_executable.4130429229 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.2617044876 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.2833034629 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.3523742162 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.214929605 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.3834520572 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.2117213957 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.133228629 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.3068445697 |
| /workspace/coverage/default/10.sram_ctrl_regwen.3715768147 |
| /workspace/coverage/default/10.sram_ctrl_smoke.4148322286 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.1331487263 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.1033570054 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.566138584 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.67945192 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.2438159313 |
| /workspace/coverage/default/11.sram_ctrl_bijection.4250754733 |
| /workspace/coverage/default/11.sram_ctrl_executable.3609849272 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.135788758 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.2123110181 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.339386368 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.2735745390 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.168814023 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.3486415835 |
| /workspace/coverage/default/11.sram_ctrl_regwen.3253800493 |
| /workspace/coverage/default/11.sram_ctrl_smoke.2283664804 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.1987674621 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2571773477 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.790274140 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2883042382 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.1944599983 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.2556517631 |
| /workspace/coverage/default/12.sram_ctrl_bijection.4149689453 |
| /workspace/coverage/default/12.sram_ctrl_executable.1146633429 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.1689309964 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.4236563673 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2984837326 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.653127057 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.411140335 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.1803110803 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1984247309 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.3768140552 |
| /workspace/coverage/default/12.sram_ctrl_regwen.2736162512 |
| /workspace/coverage/default/12.sram_ctrl_smoke.4240991437 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.2340673293 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.418890092 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.4064983422 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.320840700 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.4282489549 |
| /workspace/coverage/default/13.sram_ctrl_bijection.3260821533 |
| /workspace/coverage/default/13.sram_ctrl_executable.3287787689 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.2981882081 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.1101413701 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.2617612739 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.3850056187 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.1587189469 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.2589893513 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1436158882 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.2714800140 |
| /workspace/coverage/default/13.sram_ctrl_regwen.2886198983 |
| /workspace/coverage/default/13.sram_ctrl_smoke.2682106875 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.3495355364 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.655966841 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2773221627 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.2241291277 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.2709773096 |
| /workspace/coverage/default/14.sram_ctrl_bijection.2002030751 |
| /workspace/coverage/default/14.sram_ctrl_executable.2413496733 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.3203694672 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.3612259756 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.1092042622 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.666338943 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.4159958872 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.3769514094 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3917115837 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.1055670406 |
| /workspace/coverage/default/14.sram_ctrl_regwen.3210400627 |
| /workspace/coverage/default/14.sram_ctrl_smoke.298176236 |
| /workspace/coverage/default/14.sram_ctrl_stress_all.3426194708 |
| /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.908732090 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.2890195326 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.749910657 |
| /workspace/coverage/default/15.sram_ctrl_access_during_key_req.1578988821 |
| /workspace/coverage/default/15.sram_ctrl_alert_test.148101544 |
| /workspace/coverage/default/15.sram_ctrl_bijection.1014802418 |
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| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2390112147 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2626803351 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2420616377 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.1881152550 |
| /workspace/coverage/default/44.sram_ctrl_bijection.4274497228 |
| /workspace/coverage/default/44.sram_ctrl_executable.694832885 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.670909306 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.1063578351 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1651878728 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.3871898997 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.2497771935 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.3973166775 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2317821078 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.1478581606 |
| /workspace/coverage/default/44.sram_ctrl_regwen.3790352350 |
| /workspace/coverage/default/44.sram_ctrl_smoke.413834213 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.4265379842 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2087628159 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.2711867446 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1613765596 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.4007800591 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.416307588 |
| /workspace/coverage/default/45.sram_ctrl_bijection.1216905925 |
| /workspace/coverage/default/45.sram_ctrl_executable.3665714216 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.1104071041 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.1706493169 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.1492372064 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.2780454924 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.2509418726 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.2156188603 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2379427227 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.505690087 |
| /workspace/coverage/default/45.sram_ctrl_regwen.4020286433 |
| /workspace/coverage/default/45.sram_ctrl_smoke.593328033 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.3354422764 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.174971760 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.451286469 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.831472399 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.1492824870 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.4240713677 |
| /workspace/coverage/default/46.sram_ctrl_bijection.2679896970 |
| /workspace/coverage/default/46.sram_ctrl_executable.402497092 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.3604215001 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.3208480767 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1918142747 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.964448754 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.1000137029 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.2668499131 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1964942406 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.1994200817 |
| /workspace/coverage/default/46.sram_ctrl_regwen.2933738817 |
| /workspace/coverage/default/46.sram_ctrl_smoke.1476011437 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.124274012 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2385649554 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1910176211 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2903153073 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3493243942 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.1444766097 |
| /workspace/coverage/default/47.sram_ctrl_bijection.3126083629 |
| /workspace/coverage/default/47.sram_ctrl_executable.2258067767 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.1069925154 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.145821229 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.3172225719 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.3820005447 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.3688680283 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.1550038201 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1220171396 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.2168009198 |
| /workspace/coverage/default/47.sram_ctrl_regwen.1994907602 |
| /workspace/coverage/default/47.sram_ctrl_smoke.3512142842 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.646369753 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.1605821583 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.768318770 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.3030814741 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.1234274504 |
| /workspace/coverage/default/48.sram_ctrl_bijection.2930980211 |
| /workspace/coverage/default/48.sram_ctrl_executable.479973548 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.352815544 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.278811911 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3346556948 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.2225610857 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.4047540388 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.1399852351 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3936541413 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.3541282003 |
| /workspace/coverage/default/48.sram_ctrl_regwen.2543190703 |
| /workspace/coverage/default/48.sram_ctrl_smoke.3969142952 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.502810630 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.976615437 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.34406575 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2017564822 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.2600890297 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.3874951638 |
| /workspace/coverage/default/49.sram_ctrl_bijection.2201388076 |
| /workspace/coverage/default/49.sram_ctrl_executable.1580959863 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.2197973233 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.2114254501 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.3472310951 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.3131470338 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.1610314707 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.2866783839 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2004385284 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.1184416834 |
| /workspace/coverage/default/49.sram_ctrl_regwen.2824127034 |
| /workspace/coverage/default/49.sram_ctrl_smoke.2016793144 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.2968216472 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1859340370 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.3381404546 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3678808458 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.3497281119 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.4128412630 |
| /workspace/coverage/default/5.sram_ctrl_bijection.2089225847 |
| /workspace/coverage/default/5.sram_ctrl_executable.2210910606 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.4056585389 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.1430096876 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3682135941 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.3193694612 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.4226234081 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.2471026908 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2573518991 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.1363098706 |
| /workspace/coverage/default/5.sram_ctrl_regwen.808815584 |
| /workspace/coverage/default/5.sram_ctrl_smoke.3025650106 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.1958161553 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.824719690 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.627572145 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.275980671 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.1177869617 |
| /workspace/coverage/default/6.sram_ctrl_bijection.3802178291 |
| /workspace/coverage/default/6.sram_ctrl_executable.2215306144 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.1157824824 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.2721845201 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.4029938603 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.1667716691 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.1205885999 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.3247843343 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1953936449 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.3020523953 |
| /workspace/coverage/default/6.sram_ctrl_regwen.3757158716 |
| /workspace/coverage/default/6.sram_ctrl_smoke.863366668 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.3012203805 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3316635819 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.1192149133 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.77762807 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3582101072 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.4158573648 |
| /workspace/coverage/default/7.sram_ctrl_bijection.1514140554 |
| /workspace/coverage/default/7.sram_ctrl_executable.146372699 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.2278938880 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.3566689213 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3113763799 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.316168865 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.2756842404 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.4133095627 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.480429625 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.3546865102 |
| /workspace/coverage/default/7.sram_ctrl_regwen.473431022 |
| /workspace/coverage/default/7.sram_ctrl_smoke.3941103224 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.1913158607 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3779719647 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.989386600 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2011564571 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3837839977 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.419815378 |
| /workspace/coverage/default/8.sram_ctrl_bijection.3733512574 |
| /workspace/coverage/default/8.sram_ctrl_executable.3386839331 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.1219165195 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.419579208 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.3263043181 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.2293512428 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.2817347387 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.3989359241 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2885447927 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.55401666 |
| /workspace/coverage/default/8.sram_ctrl_regwen.2421903404 |
| /workspace/coverage/default/8.sram_ctrl_smoke.4289228671 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.77645147 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.152352017 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3244116248 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.1764651649 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.1549190831 |
| /workspace/coverage/default/9.sram_ctrl_bijection.1599539627 |
| /workspace/coverage/default/9.sram_ctrl_executable.1827817246 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.3789616349 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.2255696806 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.342614498 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.4073282286 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.3818452530 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.1574843107 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3978925925 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.786198272 |
| /workspace/coverage/default/9.sram_ctrl_regwen.1809901417 |
| /workspace/coverage/default/9.sram_ctrl_smoke.2362258941 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.4233229528 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1459557249 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.3448314150 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3098458050 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/6.sram_ctrl_partial_access.3247843343 |
|
|
Jul 07 05:41:14 PM PDT 24 |
Jul 07 05:41:27 PM PDT 24 |
687221528 ps |
| T2 |
/workspace/coverage/default/31.sram_ctrl_mem_walk.669673731 |
|
|
Jul 07 05:42:18 PM PDT 24 |
Jul 07 05:42:24 PM PDT 24 |
924552191 ps |
| T3 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1621918367 |
|
|
Jul 07 05:43:14 PM PDT 24 |
Jul 07 05:47:28 PM PDT 24 |
3365176900 ps |
| T4 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.316168865 |
|
|
Jul 07 05:41:28 PM PDT 24 |
Jul 07 05:41:43 PM PDT 24 |
8859652027 ps |
| T9 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.964448754 |
|
|
Jul 07 05:43:38 PM PDT 24 |
Jul 07 05:43:44 PM PDT 24 |
913386873 ps |
| T5 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.1459365847 |
|
|
Jul 07 05:42:35 PM PDT 24 |
Jul 07 05:42:37 PM PDT 24 |
45476222 ps |
| T10 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.653127057 |
|
|
Jul 07 05:41:33 PM PDT 24 |
Jul 07 05:41:43 PM PDT 24 |
178832347 ps |
| T11 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.3777791092 |
|
|
Jul 07 05:41:32 PM PDT 24 |
Jul 07 05:41:34 PM PDT 24 |
40454907 ps |
| T12 |
/workspace/coverage/default/26.sram_ctrl_regwen.1869153019 |
|
|
Jul 07 05:42:00 PM PDT 24 |
Jul 07 06:04:34 PM PDT 24 |
22836462392 ps |
| T13 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.655966841 |
|
|
Jul 07 05:41:23 PM PDT 24 |
Jul 07 05:46:34 PM PDT 24 |
6265590001 ps |
| T25 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2011564571 |
|
|
Jul 07 05:41:16 PM PDT 24 |
Jul 07 05:41:19 PM PDT 24 |
43408625 ps |
| T27 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.1278170438 |
|
|
Jul 07 05:41:31 PM PDT 24 |
Jul 07 06:02:07 PM PDT 24 |
12559354252 ps |
| T43 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.2500202895 |
|
|
Jul 07 05:42:08 PM PDT 24 |
Jul 07 06:09:10 PM PDT 24 |
18140660083 ps |
| T42 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1205885999 |
|
|
Jul 07 05:41:05 PM PDT 24 |
Jul 07 05:52:19 PM PDT 24 |
45086435879 ps |
| T20 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.2718021502 |
|
|
Jul 07 05:41:35 PM PDT 24 |
Jul 07 05:42:04 PM PDT 24 |
1467626671 ps |
| T44 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.293316189 |
|
|
Jul 07 05:40:45 PM PDT 24 |
Jul 07 06:00:14 PM PDT 24 |
2305341744 ps |
| T21 |
/workspace/coverage/default/27.sram_ctrl_regwen.4196157611 |
|
|
Jul 07 05:42:02 PM PDT 24 |
Jul 07 06:10:07 PM PDT 24 |
4679017816 ps |
| T59 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.981319455 |
|
|
Jul 07 05:42:11 PM PDT 24 |
Jul 07 05:48:24 PM PDT 24 |
35760518068 ps |
| T60 |
/workspace/coverage/default/1.sram_ctrl_bijection.3977469637 |
|
|
Jul 07 05:40:39 PM PDT 24 |
Jul 07 05:41:14 PM PDT 24 |
2055910566 ps |
| T29 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.1649842924 |
|
|
Jul 07 05:41:49 PM PDT 24 |
Jul 07 05:41:50 PM PDT 24 |
79498238 ps |
| T14 |
/workspace/coverage/default/45.sram_ctrl_alert_test.416307588 |
|
|
Jul 07 05:43:39 PM PDT 24 |
Jul 07 05:43:40 PM PDT 24 |
41356222 ps |
| T61 |
/workspace/coverage/default/46.sram_ctrl_partial_access.2668499131 |
|
|
Jul 07 05:43:33 PM PDT 24 |
Jul 07 05:43:47 PM PDT 24 |
729636692 ps |
| T62 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.1989058910 |
|
|
Jul 07 05:42:52 PM PDT 24 |
Jul 07 05:50:33 PM PDT 24 |
33159917170 ps |
| T63 |
/workspace/coverage/default/27.sram_ctrl_bijection.1983771170 |
|
|
Jul 07 05:42:02 PM PDT 24 |
Jul 07 05:43:11 PM PDT 24 |
15397035618 ps |
| T30 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.1153495595 |
|
|
Jul 07 05:42:27 PM PDT 24 |
Jul 07 05:42:28 PM PDT 24 |
131455242 ps |
| T68 |
/workspace/coverage/default/5.sram_ctrl_smoke.3025650106 |
|
|
Jul 07 05:41:12 PM PDT 24 |
Jul 07 05:41:16 PM PDT 24 |
524208666 ps |
| T67 |
/workspace/coverage/default/16.sram_ctrl_multiple_keys.225478862 |
|
|
Jul 07 05:41:33 PM PDT 24 |
Jul 07 05:54:37 PM PDT 24 |
6964883474 ps |
| T24 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.3526418286 |
|
|
Jul 07 05:42:26 PM PDT 24 |
Jul 07 05:44:51 PM PDT 24 |
1591106547 ps |
| T148 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.3086672288 |
|
|
Jul 07 05:41:36 PM PDT 24 |
Jul 07 05:56:34 PM PDT 24 |
3213745782 ps |
| T28 |
/workspace/coverage/default/49.sram_ctrl_regwen.2824127034 |
|
|
Jul 07 05:44:04 PM PDT 24 |
Jul 07 05:55:34 PM PDT 24 |
10655679008 ps |
| T150 |
/workspace/coverage/default/19.sram_ctrl_bijection.3448991010 |
|
|
Jul 07 05:41:27 PM PDT 24 |
Jul 07 05:42:15 PM PDT 24 |
12689960750 ps |
| T146 |
/workspace/coverage/default/35.sram_ctrl_multiple_keys.570671523 |
|
|
Jul 07 05:42:30 PM PDT 24 |
Jul 07 05:57:40 PM PDT 24 |
12890594043 ps |
| T6 |
/workspace/coverage/default/30.sram_ctrl_lc_escalation.792800978 |
|
|
Jul 07 05:42:11 PM PDT 24 |
Jul 07 05:42:21 PM PDT 24 |
2341660216 ps |
| T147 |
/workspace/coverage/default/13.sram_ctrl_executable.3287787689 |
|
|
Jul 07 05:41:25 PM PDT 24 |
Jul 07 05:41:48 PM PDT 24 |
95385034 ps |
| T7 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2968216472 |
|
|
Jul 07 05:44:03 PM PDT 24 |
Jul 07 05:59:54 PM PDT 24 |
14255358570 ps |
| T8 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.3165966925 |
|
|
Jul 07 05:41:28 PM PDT 24 |
Jul 07 05:41:38 PM PDT 24 |
798790305 ps |
| T159 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2244346344 |
|
|
Jul 07 05:41:30 PM PDT 24 |
Jul 07 05:43:37 PM PDT 24 |
596407712 ps |
| T105 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3917115837 |
|
|
Jul 07 05:41:31 PM PDT 24 |
Jul 07 05:50:20 PM PDT 24 |
81317449723 ps |
| T106 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.1072273078 |
|
|
Jul 07 05:41:38 PM PDT 24 |
Jul 07 05:48:07 PM PDT 24 |
5359899906 ps |
| T46 |
/workspace/coverage/default/47.sram_ctrl_executable.2258067767 |
|
|
Jul 07 05:43:44 PM PDT 24 |
Jul 07 05:56:28 PM PDT 24 |
44390759207 ps |
| T107 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1381699074 |
|
|
Jul 07 05:40:41 PM PDT 24 |
Jul 07 05:47:29 PM PDT 24 |
16406866409 ps |
| T22 |
/workspace/coverage/default/48.sram_ctrl_regwen.2543190703 |
|
|
Jul 07 05:43:52 PM PDT 24 |
Jul 07 05:44:20 PM PDT 24 |
986116617 ps |
| T23 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.3800924843 |
|
|
Jul 07 05:42:07 PM PDT 24 |
Jul 07 05:42:18 PM PDT 24 |
1696772610 ps |
| T108 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.1513371502 |
|
|
Jul 07 05:41:48 PM PDT 24 |
Jul 07 05:44:38 PM PDT 24 |
3426173598 ps |
| T160 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3768140552 |
|
|
Jul 07 05:41:34 PM PDT 24 |
Jul 07 05:41:36 PM PDT 24 |
83999711 ps |
| T47 |
/workspace/coverage/default/2.sram_ctrl_stress_all.3941626851 |
|
|
Jul 07 05:40:44 PM PDT 24 |
Jul 07 06:23:17 PM PDT 24 |
40050775944 ps |
| T161 |
/workspace/coverage/default/14.sram_ctrl_partial_access.3769514094 |
|
|
Jul 07 05:41:26 PM PDT 24 |
Jul 07 05:41:43 PM PDT 24 |
3196636301 ps |
| T162 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1153145434 |
|
|
Jul 07 05:40:38 PM PDT 24 |
Jul 07 05:40:42 PM PDT 24 |
287970451 ps |
| T74 |
/workspace/coverage/default/8.sram_ctrl_stress_all.77645147 |
|
|
Jul 07 05:41:14 PM PDT 24 |
Jul 07 06:07:08 PM PDT 24 |
59118247802 ps |
| T157 |
/workspace/coverage/default/23.sram_ctrl_partial_access.2347886605 |
|
|
Jul 07 05:41:35 PM PDT 24 |
Jul 07 05:42:41 PM PDT 24 |
2304263808 ps |
| T54 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.3820005447 |
|
|
Jul 07 05:43:45 PM PDT 24 |
Jul 07 05:43:51 PM PDT 24 |
242105437 ps |
| T163 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.3526562359 |
|
|
Jul 07 05:42:52 PM PDT 24 |
Jul 07 05:43:07 PM PDT 24 |
129105900 ps |
| T139 |
/workspace/coverage/default/27.sram_ctrl_executable.953449090 |
|
|
Jul 07 05:41:57 PM PDT 24 |
Jul 07 06:03:52 PM PDT 24 |
28555855497 ps |
| T109 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.2688666165 |
|
|
Jul 07 05:42:20 PM PDT 24 |
Jul 07 05:45:52 PM PDT 24 |
3079219504 ps |
| T164 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.3612259756 |
|
|
Jul 07 05:41:22 PM PDT 24 |
Jul 07 05:43:51 PM PDT 24 |
135104137 ps |
| T155 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4047540388 |
|
|
Jul 07 05:43:48 PM PDT 24 |
Jul 07 06:05:02 PM PDT 24 |
108640537256 ps |
| T15 |
/workspace/coverage/default/22.sram_ctrl_alert_test.3268468782 |
|
|
Jul 07 05:41:36 PM PDT 24 |
Jul 07 05:41:38 PM PDT 24 |
19875222 ps |
| T165 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.421855801 |
|
|
Jul 07 05:41:26 PM PDT 24 |
Jul 07 05:42:08 PM PDT 24 |
98044669 ps |
| T26 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.2666774509 |
|
|
Jul 07 05:41:52 PM PDT 24 |
Jul 07 05:42:44 PM PDT 24 |
1545724137 ps |
| T110 |
/workspace/coverage/default/16.sram_ctrl_stress_pipeline.4224247211 |
|
|
Jul 07 05:41:39 PM PDT 24 |
Jul 07 05:47:53 PM PDT 24 |
14900581802 ps |
| T45 |
/workspace/coverage/default/40.sram_ctrl_access_during_key_req.3511861887 |
|
|
Jul 07 05:43:04 PM PDT 24 |
Jul 07 06:06:24 PM PDT 24 |
15799772713 ps |
| T16 |
/workspace/coverage/default/9.sram_ctrl_alert_test.1549190831 |
|
|
Jul 07 05:41:21 PM PDT 24 |
Jul 07 05:41:22 PM PDT 24 |
22044534 ps |
| T166 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2740333286 |
|
|
Jul 07 05:41:50 PM PDT 24 |
Jul 07 05:48:40 PM PDT 24 |
17517759935 ps |
| T167 |
/workspace/coverage/default/30.sram_ctrl_alert_test.1865123710 |
|
|
Jul 07 05:42:11 PM PDT 24 |
Jul 07 05:42:12 PM PDT 24 |
28009091 ps |
| T168 |
/workspace/coverage/default/34.sram_ctrl_stress_pipeline.3008112982 |
|
|
Jul 07 05:42:26 PM PDT 24 |
Jul 07 05:46:10 PM PDT 24 |
4770430210 ps |
| T55 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.986150314 |
|
|
Jul 07 05:40:55 PM PDT 24 |
Jul 07 05:41:01 PM PDT 24 |
95986998 ps |
| T169 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.3370270777 |
|
|
Jul 07 05:42:18 PM PDT 24 |
Jul 07 05:42:19 PM PDT 24 |
77777388 ps |
| T170 |
/workspace/coverage/default/23.sram_ctrl_alert_test.2927176913 |
|
|
Jul 07 05:41:34 PM PDT 24 |
Jul 07 05:41:36 PM PDT 24 |
42890309 ps |
| T171 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.3208480767 |
|
|
Jul 07 05:43:40 PM PDT 24 |
Jul 07 05:45:40 PM PDT 24 |
128468441 ps |
| T172 |
/workspace/coverage/default/18.sram_ctrl_regwen.2067521113 |
|
|
Jul 07 05:41:31 PM PDT 24 |
Jul 07 05:49:36 PM PDT 24 |
12034292557 ps |
| T173 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.4161979380 |
|
|
Jul 07 05:40:43 PM PDT 24 |
Jul 07 06:01:16 PM PDT 24 |
72648946968 ps |
| T129 |
/workspace/coverage/default/28.sram_ctrl_stress_all.1688656798 |
|
|
Jul 07 05:42:05 PM PDT 24 |
Jul 07 06:42:16 PM PDT 24 |
45075126311 ps |
| T174 |
/workspace/coverage/default/5.sram_ctrl_bijection.2089225847 |
|
|
Jul 07 05:41:05 PM PDT 24 |
Jul 07 05:41:51 PM PDT 24 |
2809806103 ps |
| T143 |
/workspace/coverage/default/43.sram_ctrl_regwen.2256966043 |
|
|
Jul 07 05:43:17 PM PDT 24 |
Jul 07 05:50:11 PM PDT 24 |
11169000590 ps |
| T92 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2617612739 |
|
|
Jul 07 05:41:28 PM PDT 24 |
Jul 07 05:41:31 PM PDT 24 |
107413444 ps |
| T175 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.1199035168 |
|
|
Jul 07 05:40:45 PM PDT 24 |
Jul 07 05:41:52 PM PDT 24 |
219946422 ps |
| T56 |
/workspace/coverage/default/20.sram_ctrl_mem_walk.2745511303 |
|
|
Jul 07 05:41:28 PM PDT 24 |
Jul 07 05:41:35 PM PDT 24 |
100719685 ps |
| T93 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.1478489255 |
|
|
Jul 07 05:41:29 PM PDT 24 |
Jul 07 05:41:33 PM PDT 24 |
89981378 ps |
| T176 |
/workspace/coverage/default/40.sram_ctrl_partial_access.3788147983 |
|
|
Jul 07 05:43:01 PM PDT 24 |
Jul 07 05:45:27 PM PDT 24 |
218436030 ps |
| T177 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.4279725367 |
|
|
Jul 07 05:41:04 PM PDT 24 |
Jul 07 05:41:08 PM PDT 24 |
940563977 ps |
| T178 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.2721845201 |
|
|
Jul 07 05:41:10 PM PDT 24 |
Jul 07 05:42:22 PM PDT 24 |
432672148 ps |
| T156 |
/workspace/coverage/default/17.sram_ctrl_bijection.414568712 |
|
|
Jul 07 05:41:17 PM PDT 24 |
Jul 07 05:42:20 PM PDT 24 |
4317834529 ps |
| T158 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.77762807 |
|
|
Jul 07 05:41:13 PM PDT 24 |
Jul 07 05:43:11 PM PDT 24 |
368527050 ps |
| T179 |
/workspace/coverage/default/20.sram_ctrl_stress_all.584270400 |
|
|
Jul 07 05:41:35 PM PDT 24 |
Jul 07 05:49:35 PM PDT 24 |
4594416658 ps |
| T180 |
/workspace/coverage/default/48.sram_ctrl_alert_test.1234274504 |
|
|
Jul 07 05:43:57 PM PDT 24 |
Jul 07 05:43:58 PM PDT 24 |
14924274 ps |
| T181 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2773221627 |
|
|
Jul 07 05:41:23 PM PDT 24 |
Jul 07 05:41:28 PM PDT 24 |
168150652 ps |
| T151 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1219165195 |
|
|
Jul 07 05:41:24 PM PDT 24 |
Jul 07 05:41:30 PM PDT 24 |
430417571 ps |
| T182 |
/workspace/coverage/default/15.sram_ctrl_alert_test.148101544 |
|
|
Jul 07 05:41:34 PM PDT 24 |
Jul 07 05:41:36 PM PDT 24 |
21865093 ps |
| T183 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.3610615170 |
|
|
Jul 07 05:42:51 PM PDT 24 |
Jul 07 05:42:52 PM PDT 24 |
28052936 ps |
| T152 |
/workspace/coverage/default/23.sram_ctrl_multiple_keys.3826937795 |
|
|
Jul 07 05:41:39 PM PDT 24 |
Jul 07 05:54:21 PM PDT 24 |
25878715746 ps |
| T184 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.687741120 |
|
|
Jul 07 05:41:43 PM PDT 24 |
Jul 07 05:41:49 PM PDT 24 |
54609314 ps |
| T53 |
/workspace/coverage/default/42.sram_ctrl_mem_partial_access.2268117873 |
|
|
Jul 07 05:43:10 PM PDT 24 |
Jul 07 05:43:16 PM PDT 24 |
180657412 ps |
| T185 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.781606959 |
|
|
Jul 07 05:42:11 PM PDT 24 |
Jul 07 05:42:13 PM PDT 24 |
83394905 ps |
| T186 |
/workspace/coverage/default/10.sram_ctrl_alert_test.3663743713 |
|
|
Jul 07 05:41:14 PM PDT 24 |
Jul 07 05:41:15 PM PDT 24 |
106951241 ps |
| T149 |
/workspace/coverage/default/41.sram_ctrl_lc_escalation.867292860 |
|
|
Jul 07 05:43:08 PM PDT 24 |
Jul 07 05:43:17 PM PDT 24 |
798124743 ps |
| T187 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1994200817 |
|
|
Jul 07 05:43:39 PM PDT 24 |
Jul 07 05:43:40 PM PDT 24 |
81058877 ps |
| T52 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.3825651289 |
|
|
Jul 07 05:42:22 PM PDT 24 |
Jul 07 05:42:29 PM PDT 24 |
660735477 ps |
| T94 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.4007800591 |
|
|
Jul 07 05:43:30 PM PDT 24 |
Jul 07 05:52:37 PM PDT 24 |
1583177627 ps |
| T188 |
/workspace/coverage/default/24.sram_ctrl_alert_test.3895498433 |
|
|
Jul 07 05:41:41 PM PDT 24 |
Jul 07 05:41:42 PM PDT 24 |
15544876 ps |
| T189 |
/workspace/coverage/default/49.sram_ctrl_smoke.2016793144 |
|
|
Jul 07 05:43:57 PM PDT 24 |
Jul 07 05:45:06 PM PDT 24 |
474782330 ps |
| T190 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1610314707 |
|
|
Jul 07 05:43:59 PM PDT 24 |
Jul 07 06:08:33 PM PDT 24 |
25516614042 ps |
| T144 |
/workspace/coverage/default/34.sram_ctrl_executable.679113092 |
|
|
Jul 07 05:42:33 PM PDT 24 |
Jul 07 05:55:48 PM PDT 24 |
33776037785 ps |
| T191 |
/workspace/coverage/default/12.sram_ctrl_regwen.2736162512 |
|
|
Jul 07 05:41:25 PM PDT 24 |
Jul 07 05:57:18 PM PDT 24 |
8473125318 ps |
| T192 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.194796437 |
|
|
Jul 07 05:42:58 PM PDT 24 |
Jul 07 05:52:39 PM PDT 24 |
21535933790 ps |
| T193 |
/workspace/coverage/default/29.sram_ctrl_alert_test.853302472 |
|
|
Jul 07 05:42:13 PM PDT 24 |
Jul 07 05:42:14 PM PDT 24 |
14086486 ps |
| T154 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.4023807776 |
|
|
Jul 07 05:43:04 PM PDT 24 |
Jul 07 05:47:01 PM PDT 24 |
2627019999 ps |
| T194 |
/workspace/coverage/default/18.sram_ctrl_max_throughput.2398901681 |
|
|
Jul 07 05:41:25 PM PDT 24 |
Jul 07 05:42:49 PM PDT 24 |
243960357 ps |
| T141 |
/workspace/coverage/default/48.sram_ctrl_executable.479973548 |
|
|
Jul 07 05:43:54 PM PDT 24 |
Jul 07 05:55:31 PM PDT 24 |
8401189830 ps |
| T142 |
/workspace/coverage/default/17.sram_ctrl_executable.4019930737 |
|
|
Jul 07 05:41:38 PM PDT 24 |
Jul 07 05:50:38 PM PDT 24 |
12769815686 ps |
| T195 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.451286469 |
|
|
Jul 07 05:43:34 PM PDT 24 |
Jul 07 05:49:30 PM PDT 24 |
7942689485 ps |
| T196 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.135788758 |
|
|
Jul 07 05:41:29 PM PDT 24 |
Jul 07 05:41:34 PM PDT 24 |
754759885 ps |
| T197 |
/workspace/coverage/default/20.sram_ctrl_smoke.1976852920 |
|
|
Jul 07 05:41:31 PM PDT 24 |
Jul 07 05:41:33 PM PDT 24 |
213871786 ps |
| T198 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.3006096671 |
|
|
Jul 07 05:42:19 PM PDT 24 |
Jul 07 05:42:25 PM PDT 24 |
1882920656 ps |
| T199 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1069925154 |
|
|
Jul 07 05:43:48 PM PDT 24 |
Jul 07 05:43:57 PM PDT 24 |
884464354 ps |
| T200 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.918202424 |
|
|
Jul 07 05:41:19 PM PDT 24 |
Jul 07 05:43:09 PM PDT 24 |
478500592 ps |
| T95 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.320840700 |
|
|
Jul 07 05:41:33 PM PDT 24 |
Jul 07 05:56:16 PM PDT 24 |
20587092137 ps |
| T201 |
/workspace/coverage/default/11.sram_ctrl_smoke.2283664804 |
|
|
Jul 07 05:41:18 PM PDT 24 |
Jul 07 05:41:35 PM PDT 24 |
789636320 ps |
| T153 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.2519919240 |
|
|
Jul 07 05:41:58 PM PDT 24 |
Jul 07 05:42:06 PM PDT 24 |
4882496030 ps |
| T202 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.979416765 |
|
|
Jul 07 05:42:03 PM PDT 24 |
Jul 07 05:42:25 PM PDT 24 |
160610748 ps |
| T96 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.4211224316 |
|
|
Jul 07 05:41:37 PM PDT 24 |
Jul 07 05:54:01 PM PDT 24 |
8924421238 ps |
| T203 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3166833653 |
|
|
Jul 07 05:41:57 PM PDT 24 |
Jul 07 05:42:00 PM PDT 24 |
50631088 ps |
| T204 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.1829814869 |
|
|
Jul 07 05:40:40 PM PDT 24 |
Jul 07 05:45:14 PM PDT 24 |
98405960381 ps |
| T205 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.214929605 |
|
|
Jul 07 05:41:12 PM PDT 24 |
Jul 07 05:41:21 PM PDT 24 |
465744183 ps |
| T206 |
/workspace/coverage/default/4.sram_ctrl_executable.1524188603 |
|
|
Jul 07 05:40:54 PM PDT 24 |
Jul 07 06:06:05 PM PDT 24 |
4102438786 ps |
| T207 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.4108103218 |
|
|
Jul 07 05:41:33 PM PDT 24 |
Jul 07 05:41:34 PM PDT 24 |
27941062 ps |
| T208 |
/workspace/coverage/default/38.sram_ctrl_lc_escalation.2975723701 |
|
|
Jul 07 05:42:49 PM PDT 24 |
Jul 07 05:43:00 PM PDT 24 |
5308314734 ps |
| T51 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.342384394 |
|
|
Jul 07 05:43:18 PM PDT 24 |
Jul 07 05:43:21 PM PDT 24 |
198767668 ps |
| T209 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.2616526654 |
|
|
Jul 07 05:40:48 PM PDT 24 |
Jul 07 05:40:55 PM PDT 24 |
231265844 ps |
| T210 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3936541413 |
|
|
Jul 07 05:43:51 PM PDT 24 |
Jul 07 05:49:38 PM PDT 24 |
57081107200 ps |
| T211 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.4191088288 |
|
|
Jul 07 05:42:34 PM PDT 24 |
Jul 07 05:46:29 PM PDT 24 |
9951774504 ps |
| T212 |
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2711867446 |
|
|
Jul 07 05:43:22 PM PDT 24 |
Jul 07 05:47:03 PM PDT 24 |
11522219405 ps |
| T213 |
/workspace/coverage/default/1.sram_ctrl_partial_access.3149362971 |
|
|
Jul 07 05:40:40 PM PDT 24 |
Jul 07 05:40:52 PM PDT 24 |
321210608 ps |
| T145 |
/workspace/coverage/default/9.sram_ctrl_regwen.1809901417 |
|
|
Jul 07 05:41:40 PM PDT 24 |
Jul 07 05:55:10 PM PDT 24 |
9206490772 ps |
| T214 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.3868117734 |
|
|
Jul 07 05:40:43 PM PDT 24 |
Jul 07 05:51:49 PM PDT 24 |
2978807004 ps |
| T215 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.4166554456 |
|
|
Jul 07 05:42:51 PM PDT 24 |
Jul 07 05:46:44 PM PDT 24 |
6113582722 ps |
| T216 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.919589250 |
|
|
Jul 07 05:41:28 PM PDT 24 |
Jul 07 05:46:07 PM PDT 24 |
2919772374 ps |
| T217 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.275980671 |
|
|
Jul 07 05:41:14 PM PDT 24 |
Jul 07 05:49:18 PM PDT 24 |
10735205433 ps |
| T17 |
/workspace/coverage/default/3.sram_ctrl_sec_cm.4052623572 |
|
|
Jul 07 05:41:14 PM PDT 24 |
Jul 07 05:41:16 PM PDT 24 |
110278093 ps |
| T33 |
/workspace/coverage/default/25.sram_ctrl_smoke.2826893592 |
|
|
Jul 07 05:41:49 PM PDT 24 |
Jul 07 05:42:02 PM PDT 24 |
729148516 ps |
| T34 |
/workspace/coverage/default/9.sram_ctrl_stress_all.4233229528 |
|
|
Jul 07 05:41:25 PM PDT 24 |
Jul 07 06:21:57 PM PDT 24 |
38758722476 ps |
| T35 |
/workspace/coverage/default/29.sram_ctrl_smoke.3031229817 |
|
|
Jul 07 05:42:09 PM PDT 24 |
Jul 07 05:44:37 PM PDT 24 |
2789861516 ps |
| T36 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2617044876 |
|
|
Jul 07 05:41:12 PM PDT 24 |
Jul 07 05:41:17 PM PDT 24 |
1322089739 ps |
| T37 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3472310951 |
|
|
Jul 07 05:44:05 PM PDT 24 |
Jul 07 05:44:11 PM PDT 24 |
369976661 ps |
| T38 |
/workspace/coverage/default/28.sram_ctrl_executable.1315854698 |
|
|
Jul 07 05:42:06 PM PDT 24 |
Jul 07 05:47:07 PM PDT 24 |
57590903144 ps |
| T39 |
/workspace/coverage/default/18.sram_ctrl_bijection.2071305062 |
|
|
Jul 07 05:41:28 PM PDT 24 |
Jul 07 05:42:39 PM PDT 24 |
1187691097 ps |
| T40 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.145821229 |
|
|
Jul 07 05:43:41 PM PDT 24 |
Jul 07 05:46:06 PM PDT 24 |
542515846 ps |
| T41 |
/workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.112357521 |
|
|
Jul 07 05:43:16 PM PDT 24 |
Jul 07 05:48:32 PM PDT 24 |
6363648872 ps |
| T218 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.2952570018 |
|
|
Jul 07 05:42:34 PM PDT 24 |
Jul 07 05:46:29 PM PDT 24 |
10542572666 ps |
| T219 |
/workspace/coverage/default/16.sram_ctrl_partial_access.1938662440 |
|
|
Jul 07 05:41:29 PM PDT 24 |
Jul 07 05:42:15 PM PDT 24 |
534012487 ps |
| T220 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3760377296 |
|
|
Jul 07 05:41:18 PM PDT 24 |
Jul 07 06:12:37 PM PDT 24 |
13237066453 ps |
| T48 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.875809785 |
|
|
Jul 07 05:41:37 PM PDT 24 |
Jul 07 05:41:54 PM PDT 24 |
2092600346 ps |
| T118 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.194113162 |
|
|
Jul 07 05:41:55 PM PDT 24 |
Jul 07 05:43:00 PM PDT 24 |
212416901 ps |
| T119 |
/workspace/coverage/default/44.sram_ctrl_executable.694832885 |
|
|
Jul 07 05:43:26 PM PDT 24 |
Jul 07 06:02:31 PM PDT 24 |
109387811758 ps |
| T120 |
/workspace/coverage/default/37.sram_ctrl_stress_pipeline.1542065258 |
|
|
Jul 07 05:42:53 PM PDT 24 |
Jul 07 05:48:03 PM PDT 24 |
12083299418 ps |
| T121 |
/workspace/coverage/default/0.sram_ctrl_alert_test.3762098607 |
|
|
Jul 07 05:40:45 PM PDT 24 |
Jul 07 05:40:49 PM PDT 24 |
47537448 ps |
| T122 |
/workspace/coverage/default/8.sram_ctrl_alert_test.419815378 |
|
|
Jul 07 05:41:14 PM PDT 24 |
Jul 07 05:41:16 PM PDT 24 |
52030377 ps |
| T123 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2970226291 |
|
|
Jul 07 05:42:18 PM PDT 24 |
Jul 07 05:42:19 PM PDT 24 |
34477831 ps |
| T124 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2756842404 |
|
|
Jul 07 05:41:17 PM PDT 24 |
Jul 07 06:06:32 PM PDT 24 |
40739892341 ps |
| T125 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.700555666 |
|
|
Jul 07 05:41:34 PM PDT 24 |
Jul 07 05:50:26 PM PDT 24 |
64882765701 ps |
| T126 |
/workspace/coverage/default/41.sram_ctrl_executable.38807531 |
|
|
Jul 07 05:43:10 PM PDT 24 |
Jul 07 05:50:00 PM PDT 24 |
9344021609 ps |
| T221 |
/workspace/coverage/default/28.sram_ctrl_ram_cfg.113401333 |
|
|
Jul 07 05:42:03 PM PDT 24 |
Jul 07 05:42:04 PM PDT 24 |
84009321 ps |
| T222 |
/workspace/coverage/default/34.sram_ctrl_stress_all.1966943254 |
|
|
Jul 07 05:42:28 PM PDT 24 |
Jul 07 06:31:36 PM PDT 24 |
32023130479 ps |
| T140 |
/workspace/coverage/default/26.sram_ctrl_stress_all.2469465173 |
|
|
Jul 07 05:41:59 PM PDT 24 |
Jul 07 06:39:09 PM PDT 24 |
21087957179 ps |
| T223 |
/workspace/coverage/default/37.sram_ctrl_stress_all.2409803914 |
|
|
Jul 07 05:42:51 PM PDT 24 |
Jul 07 06:21:44 PM PDT 24 |
126886206763 ps |
| T224 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.1033090382 |
|
|
Jul 07 05:41:34 PM PDT 24 |
Jul 07 05:41:35 PM PDT 24 |
86777502 ps |
| T225 |
/workspace/coverage/default/7.sram_ctrl_stress_all.1913158607 |
|
|
Jul 07 05:41:19 PM PDT 24 |
Jul 07 07:12:40 PM PDT 24 |
161592798444 ps |
| T226 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.915720986 |
|
|
Jul 07 05:43:13 PM PDT 24 |
Jul 07 05:43:14 PM PDT 24 |
41536824 ps |
| T227 |
/workspace/coverage/default/46.sram_ctrl_executable.402497092 |
|
|
Jul 07 05:43:41 PM PDT 24 |
Jul 07 05:49:49 PM PDT 24 |
1261558821 ps |
| T228 |
/workspace/coverage/default/33.sram_ctrl_executable.457142326 |
|
|
Jul 07 05:42:21 PM PDT 24 |
Jul 07 05:57:58 PM PDT 24 |
3731825411 ps |
| T229 |
/workspace/coverage/default/21.sram_ctrl_executable.2203445313 |
|
|
Jul 07 05:41:26 PM PDT 24 |
Jul 07 05:53:28 PM PDT 24 |
13266691422 ps |
| T230 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.2695260780 |
|
|
Jul 07 05:41:05 PM PDT 24 |
Jul 07 05:45:06 PM PDT 24 |
4762824690 ps |
| T231 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.3280334750 |
|
|
Jul 07 05:42:55 PM PDT 24 |
Jul 07 05:45:47 PM PDT 24 |
2097033386 ps |
| T232 |
/workspace/coverage/default/26.sram_ctrl_partial_access.1771051038 |
|
|
Jul 07 05:41:55 PM PDT 24 |
Jul 07 05:42:15 PM PDT 24 |
3460948589 ps |
| T233 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3098458050 |
|
|
Jul 07 05:41:15 PM PDT 24 |
Jul 07 05:43:33 PM PDT 24 |
1168367704 ps |
| T234 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.2702637953 |
|
|
Jul 07 05:41:31 PM PDT 24 |
Jul 07 05:41:35 PM PDT 24 |
84556317 ps |
| T235 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.3781156539 |
|
|
Jul 07 05:41:28 PM PDT 24 |
Jul 07 05:41:35 PM PDT 24 |
1255410205 ps |
| T236 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.159470184 |
|
|
Jul 07 05:42:13 PM PDT 24 |
Jul 07 05:42:15 PM PDT 24 |
145835080 ps |
| T237 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3216345275 |
|
|
Jul 07 05:41:50 PM PDT 24 |
Jul 07 05:49:00 PM PDT 24 |
16716267107 ps |
| T238 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2004385284 |
|
|
Jul 07 05:44:04 PM PDT 24 |
Jul 07 05:49:15 PM PDT 24 |
13434780994 ps |
| T239 |
/workspace/coverage/default/30.sram_ctrl_bijection.1799298854 |
|
|
Jul 07 05:42:08 PM PDT 24 |
Jul 07 05:43:03 PM PDT 24 |
3481688635 ps |
| T240 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2339558154 |
|
|
Jul 07 05:40:42 PM PDT 24 |
Jul 07 06:36:17 PM PDT 24 |
45276481201 ps |
| T241 |
/workspace/coverage/default/12.sram_ctrl_executable.1146633429 |
|
|
Jul 07 05:41:37 PM PDT 24 |
Jul 07 05:54:35 PM PDT 24 |
49452410446 ps |
| T242 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.2817347387 |
|
|
Jul 07 05:41:26 PM PDT 24 |
Jul 07 06:04:49 PM PDT 24 |
59784462292 ps |
| T243 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3069018422 |
|
|
Jul 07 05:42:26 PM PDT 24 |
Jul 07 05:42:28 PM PDT 24 |
55690537 ps |
| T244 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.954532927 |
|
|
Jul 07 05:42:13 PM PDT 24 |
Jul 07 05:42:47 PM PDT 24 |
368792299 ps |
| T245 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.1587189469 |
|
|
Jul 07 05:41:34 PM PDT 24 |
Jul 07 05:43:40 PM PDT 24 |
4202473757 ps |
| T246 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.3858828219 |
|
|
Jul 07 05:42:20 PM PDT 24 |
Jul 07 05:45:38 PM PDT 24 |
8069812425 ps |
| T247 |
/workspace/coverage/default/27.sram_ctrl_alert_test.4232034735 |
|
|
Jul 07 05:42:00 PM PDT 24 |
Jul 07 05:42:01 PM PDT 24 |
14418645 ps |
| T248 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.67945192 |
|
|
Jul 07 05:41:29 PM PDT 24 |
Jul 07 05:52:05 PM PDT 24 |
1648060891 ps |
| T249 |
/workspace/coverage/default/44.sram_ctrl_alert_test.1881152550 |
|
|
Jul 07 05:43:31 PM PDT 24 |
Jul 07 05:43:32 PM PDT 24 |
14661342 ps |
| T250 |
/workspace/coverage/default/11.sram_ctrl_stress_all.1987674621 |
|
|
Jul 07 05:41:21 PM PDT 24 |
Jul 07 06:34:55 PM PDT 24 |
21097583706 ps |
| T251 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.1667716691 |
|
|
Jul 07 05:41:11 PM PDT 24 |
Jul 07 05:41:25 PM PDT 24 |
1318011305 ps |
| T57 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2046932213 |
|
|
Jul 07 05:41:25 PM PDT 24 |
Jul 07 05:46:00 PM PDT 24 |
2315214078 ps |
| T252 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.3643312236 |
|
|
Jul 07 05:42:50 PM PDT 24 |
Jul 07 05:43:01 PM PDT 24 |
579736727 ps |
| T253 |
/workspace/coverage/default/21.sram_ctrl_partial_access.2523055820 |
|
|
Jul 07 05:41:33 PM PDT 24 |
Jul 07 05:41:45 PM PDT 24 |
873604841 ps |
| T254 |
/workspace/coverage/default/19.sram_ctrl_ram_cfg.942722301 |
|
|
Jul 07 05:41:35 PM PDT 24 |
Jul 07 05:41:37 PM PDT 24 |
80996515 ps |
| T255 |
/workspace/coverage/default/41.sram_ctrl_smoke.3984753624 |
|
|
Jul 07 05:43:00 PM PDT 24 |
Jul 07 05:43:02 PM PDT 24 |
160909650 ps |
| T71 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.752025178 |
|
|
Jul 07 05:41:36 PM PDT 24 |
Jul 07 05:42:32 PM PDT 24 |
4599397917 ps |
| T256 |
/workspace/coverage/default/38.sram_ctrl_alert_test.681566655 |
|
|
Jul 07 05:42:57 PM PDT 24 |
Jul 07 05:42:58 PM PDT 24 |
11038771 ps |
| T257 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.3050369546 |
|
|
Jul 07 05:43:11 PM PDT 24 |
Jul 07 05:53:32 PM PDT 24 |
1452708414 ps |
| T258 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.1261381809 |
|
|
Jul 07 05:42:41 PM PDT 24 |
Jul 07 05:42:45 PM PDT 24 |
99031194 ps |
| T259 |
/workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2096871610 |
|
|
Jul 07 05:41:28 PM PDT 24 |
Jul 07 05:42:10 PM PDT 24 |
114709537 ps |
| T260 |
/workspace/coverage/default/12.sram_ctrl_bijection.4149689453 |
|
|
Jul 07 05:41:32 PM PDT 24 |
Jul 07 05:42:01 PM PDT 24 |
455172049 ps |
| T261 |
/workspace/coverage/default/43.sram_ctrl_lc_escalation.156360380 |
|
|
Jul 07 05:43:15 PM PDT 24 |
Jul 07 05:43:23 PM PDT 24 |
689662381 ps |
| T58 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.2773012903 |
|
|
Jul 07 05:40:50 PM PDT 24 |
Jul 07 05:53:13 PM PDT 24 |
4024585073 ps |
| T262 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.419579208 |
|
|
Jul 07 05:41:23 PM PDT 24 |
Jul 07 05:42:38 PM PDT 24 |
216359301 ps |
| T263 |
/workspace/coverage/default/20.sram_ctrl_regwen.1400121119 |
|
|
Jul 07 05:41:30 PM PDT 24 |
Jul 07 06:09:51 PM PDT 24 |
6325092253 ps |
| T264 |
/workspace/coverage/default/4.sram_ctrl_smoke.3907137297 |
|
|
Jul 07 05:40:46 PM PDT 24 |
Jul 07 05:41:05 PM PDT 24 |
774688634 ps |
| T72 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.3285517989 |
|
|
Jul 07 05:42:52 PM PDT 24 |
Jul 07 06:01:00 PM PDT 24 |
4000198497 ps |
| T265 |
/workspace/coverage/default/28.sram_ctrl_max_throughput.1356563795 |
|
|
Jul 07 05:41:59 PM PDT 24 |
Jul 07 05:43:33 PM PDT 24 |
137973983 ps |
| T266 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3989359241 |
|
|
Jul 07 05:41:22 PM PDT 24 |
Jul 07 05:41:32 PM PDT 24 |
427593309 ps |
| T267 |
/workspace/coverage/default/10.sram_ctrl_regwen.3715768147 |
|
|
Jul 07 05:41:17 PM PDT 24 |
Jul 07 05:48:55 PM PDT 24 |
1933917296 ps |
| T268 |
/workspace/coverage/default/30.sram_ctrl_smoke.1034374598 |
|
|
Jul 07 05:42:12 PM PDT 24 |
Jul 07 05:42:20 PM PDT 24 |
145557191 ps |
| T269 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.293094316 |
|
|
Jul 07 05:42:51 PM PDT 24 |
Jul 07 05:43:00 PM PDT 24 |
519590378 ps |
| T270 |
/workspace/coverage/default/26.sram_ctrl_alert_test.1836806700 |
|
|
Jul 07 05:42:03 PM PDT 24 |
Jul 07 05:42:04 PM PDT 24 |
11953121 ps |
| T271 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.1327547539 |
|
|
Jul 07 05:43:00 PM PDT 24 |
Jul 07 05:57:58 PM PDT 24 |
6046960928 ps |
| T272 |
/workspace/coverage/default/29.sram_ctrl_multiple_keys.2696500813 |
|
|
Jul 07 05:42:04 PM PDT 24 |
Jul 07 05:58:05 PM PDT 24 |
14342733130 ps |
| T273 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.4015976280 |
|
|
Jul 07 05:41:56 PM PDT 24 |
Jul 07 05:42:05 PM PDT 24 |
778731955 ps |
| T274 |
/workspace/coverage/default/25.sram_ctrl_partial_access.872210303 |
|
|
Jul 07 05:41:46 PM PDT 24 |
Jul 07 05:44:43 PM PDT 24 |
435883727 ps |
| T275 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3682135941 |
|
|
Jul 07 05:40:55 PM PDT 24 |
Jul 07 05:41:00 PM PDT 24 |
172584031 ps |
| T276 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3493243942 |
|
|
Jul 07 05:43:44 PM PDT 24 |
Jul 07 05:45:28 PM PDT 24 |
2209089664 ps |
| T277 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.4114186385 |
|
|
Jul 07 05:41:34 PM PDT 24 |
Jul 07 05:41:41 PM PDT 24 |
322294173 ps |
| T278 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.679471819 |
|
|
Jul 07 05:42:38 PM PDT 24 |
Jul 07 05:42:43 PM PDT 24 |
381153186 ps |
| T73 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.976615437 |
|
|
Jul 07 05:43:55 PM PDT 24 |
Jul 07 05:45:09 PM PDT 24 |
1960960860 ps |
| T279 |
/workspace/coverage/default/35.sram_ctrl_regwen.1634755954 |
|
|
Jul 07 05:42:32 PM PDT 24 |
Jul 07 05:44:12 PM PDT 24 |
3868998160 ps |
| T280 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.790274140 |
|
|
Jul 07 05:41:34 PM PDT 24 |
Jul 07 05:46:46 PM PDT 24 |
6142138965 ps |
| T281 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.618930842 |
|
|
Jul 07 05:40:59 PM PDT 24 |
Jul 07 05:41:00 PM PDT 24 |
191385515 ps |
| T282 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2017564822 |
|
|
Jul 07 05:43:57 PM PDT 24 |
Jul 07 05:45:49 PM PDT 24 |
1004617733 ps |
| T283 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.3274145483 |
|
|
Jul 07 05:41:52 PM PDT 24 |
Jul 07 05:44:34 PM PDT 24 |
3130363277 ps |
| T284 |
/workspace/coverage/default/4.sram_ctrl_partial_access.3383968941 |
|
|
Jul 07 05:41:11 PM PDT 24 |
Jul 07 05:41:20 PM PDT 24 |
828835439 ps |
| T285 |
/workspace/coverage/default/41.sram_ctrl_partial_access.2884213538 |
|
|
Jul 07 05:43:05 PM PDT 24 |
Jul 07 05:44:05 PM PDT 24 |
158491938 ps |
| T286 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3088304422 |
|
|
Jul 07 05:41:59 PM PDT 24 |
Jul 07 05:42:31 PM PDT 24 |
4293567760 ps |
| T287 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.3582116671 |
|
|
Jul 07 05:43:01 PM PDT 24 |
Jul 07 05:43:07 PM PDT 24 |
864056057 ps |
| T288 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.1794043541 |
|
|
Jul 07 05:41:43 PM PDT 24 |
Jul 07 05:41:50 PM PDT 24 |
1037795985 ps |
| T289 |
/workspace/coverage/default/18.sram_ctrl_partial_access.272161350 |
|
|
Jul 07 05:41:32 PM PDT 24 |
Jul 07 05:41:51 PM PDT 24 |
803581093 ps |
| T290 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2776216650 |
|
|
Jul 07 05:43:09 PM PDT 24 |
Jul 07 05:48:08 PM PDT 24 |
4134593595 ps |
| T291 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.3798817881 |
|
|
Jul 07 05:42:53 PM PDT 24 |
Jul 07 05:42:56 PM PDT 24 |
383746193 ps |
| T292 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.229960013 |
|
|
Jul 07 05:41:00 PM PDT 24 |
Jul 07 05:49:35 PM PDT 24 |
2650698218 ps |
| T293 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2883042382 |
|
|
Jul 07 05:41:31 PM PDT 24 |
Jul 07 05:43:30 PM PDT 24 |
327111118 ps |
| T294 |
/workspace/coverage/default/34.sram_ctrl_bijection.3452045029 |
|
|
Jul 07 05:42:24 PM PDT 24 |
Jul 07 05:43:34 PM PDT 24 |
24452912692 ps |
| T295 |
/workspace/coverage/default/37.sram_ctrl_regwen.1411132537 |
|
|
Jul 07 05:42:55 PM PDT 24 |
Jul 07 05:48:01 PM PDT 24 |
15253206834 ps |
| T296 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.2509418726 |
|
|
Jul 07 05:43:37 PM PDT 24 |
Jul 07 06:00:52 PM PDT 24 |
13575696336 ps |
| T297 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2063673919 |
|
|
Jul 07 05:41:31 PM PDT 24 |
Jul 07 05:41:37 PM PDT 24 |
541222324 ps |
| T298 |
/workspace/coverage/default/41.sram_ctrl_bijection.628755092 |
|
|
Jul 07 05:43:01 PM PDT 24 |
Jul 07 05:43:58 PM PDT 24 |
12471845919 ps |
| T299 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3688680283 |
|
|
Jul 07 05:43:42 PM PDT 24 |
Jul 07 05:56:58 PM PDT 24 |
13894596511 ps |
| T300 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.1578988821 |
|
|
Jul 07 05:41:21 PM PDT 24 |
Jul 07 05:56:25 PM PDT 24 |
10583432216 ps |
| T301 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2317821078 |
|
|
Jul 07 05:43:21 PM PDT 24 |
Jul 07 05:48:11 PM PDT 24 |
58736020052 ps |
| T302 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.352815544 |
|
|
Jul 07 05:43:54 PM PDT 24 |
Jul 07 05:43:59 PM PDT 24 |
381236752 ps |
| T303 |
/workspace/coverage/default/40.sram_ctrl_stress_all.3852015155 |
|
|
Jul 07 05:43:00 PM PDT 24 |
Jul 07 06:18:08 PM PDT 24 |
30667024375 ps |
| T304 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.3193694612 |
|
|
Jul 07 05:41:04 PM PDT 24 |
Jul 07 05:41:10 PM PDT 24 |
103763399 ps |