Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

T309 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.4220044859 Jul 11 05:15:05 PM PDT 24 Jul 11 05:18:40 PM PDT 24 39223748733 ps
T310 /workspace/coverage/default/35.sram_ctrl_stress_all.3817346307 Jul 11 05:16:57 PM PDT 24 Jul 11 05:51:27 PM PDT 24 15774790124 ps
T311 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.1115219182 Jul 11 05:15:51 PM PDT 24 Jul 11 05:19:02 PM PDT 24 2081105228 ps
T312 /workspace/coverage/default/39.sram_ctrl_regwen.2845596094 Jul 11 05:17:51 PM PDT 24 Jul 11 05:22:48 PM PDT 24 64682043603 ps
T313 /workspace/coverage/default/47.sram_ctrl_mem_walk.2118998901 Jul 11 05:17:54 PM PDT 24 Jul 11 05:18:08 PM PDT 24 1772762906 ps
T314 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.1876575385 Jul 11 05:13:28 PM PDT 24 Jul 11 05:26:10 PM PDT 24 3739769160 ps
T315 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.3274951156 Jul 11 04:58:55 PM PDT 24 Jul 11 05:12:33 PM PDT 24 3571847281 ps
T316 /workspace/coverage/default/34.sram_ctrl_mem_walk.753355304 Jul 11 05:19:47 PM PDT 24 Jul 11 05:19:54 PM PDT 24 284056219 ps
T317 /workspace/coverage/default/4.sram_ctrl_lc_escalation.3258601906 Jul 11 05:12:34 PM PDT 24 Jul 11 05:12:38 PM PDT 24 274804627 ps
T318 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.3223212713 Jul 11 05:16:46 PM PDT 24 Jul 11 05:27:32 PM PDT 24 4551823603 ps
T319 /workspace/coverage/default/34.sram_ctrl_ram_cfg.97423487 Jul 11 05:24:34 PM PDT 24 Jul 11 05:24:38 PM PDT 24 28782885 ps
T320 /workspace/coverage/default/32.sram_ctrl_multiple_keys.358640379 Jul 11 05:16:33 PM PDT 24 Jul 11 05:36:21 PM PDT 24 18568732191 ps
T321 /workspace/coverage/default/49.sram_ctrl_partial_access.611584568 Jul 11 05:18:02 PM PDT 24 Jul 11 05:18:13 PM PDT 24 1411915320 ps
T322 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.370322771 Jul 11 05:17:45 PM PDT 24 Jul 11 05:17:53 PM PDT 24 213449411 ps
T323 /workspace/coverage/default/12.sram_ctrl_multiple_keys.127156848 Jul 11 05:13:41 PM PDT 24 Jul 11 05:30:03 PM PDT 24 8215272321 ps
T324 /workspace/coverage/default/0.sram_ctrl_stress_all.3297274127 Jul 11 04:58:46 PM PDT 24 Jul 11 05:35:14 PM PDT 24 4454635954 ps
T325 /workspace/coverage/default/24.sram_ctrl_executable.2709261321 Jul 11 05:14:54 PM PDT 24 Jul 11 05:21:39 PM PDT 24 21078105953 ps
T326 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.433741603 Jul 11 05:14:51 PM PDT 24 Jul 11 05:22:50 PM PDT 24 11098150193 ps
T327 /workspace/coverage/default/49.sram_ctrl_stress_all.194824190 Jul 11 05:18:07 PM PDT 24 Jul 11 06:35:34 PM PDT 24 12562287137 ps
T328 /workspace/coverage/default/44.sram_ctrl_lc_escalation.1752635235 Jul 11 05:17:31 PM PDT 24 Jul 11 05:17:38 PM PDT 24 1907863953 ps
T329 /workspace/coverage/default/7.sram_ctrl_ram_cfg.3307251594 Jul 11 05:13:07 PM PDT 24 Jul 11 05:13:09 PM PDT 24 108468280 ps
T330 /workspace/coverage/default/27.sram_ctrl_max_throughput.1920034845 Jul 11 05:15:55 PM PDT 24 Jul 11 05:18:31 PM PDT 24 531164709 ps
T331 /workspace/coverage/default/37.sram_ctrl_regwen.2436947667 Jul 11 05:17:18 PM PDT 24 Jul 11 05:37:17 PM PDT 24 3580028933 ps
T332 /workspace/coverage/default/39.sram_ctrl_multiple_keys.4070626118 Jul 11 05:17:26 PM PDT 24 Jul 11 05:33:57 PM PDT 24 14317614693 ps
T333 /workspace/coverage/default/28.sram_ctrl_regwen.3346692900 Jul 11 05:15:58 PM PDT 24 Jul 11 05:30:24 PM PDT 24 14810029642 ps
T334 /workspace/coverage/default/30.sram_ctrl_regwen.2012642002 Jul 11 05:16:28 PM PDT 24 Jul 11 05:27:54 PM PDT 24 8397053719 ps
T335 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.729315210 Jul 11 05:14:26 PM PDT 24 Jul 11 05:20:38 PM PDT 24 7233585832 ps
T336 /workspace/coverage/default/26.sram_ctrl_bijection.2336714299 Jul 11 05:15:15 PM PDT 24 Jul 11 05:16:04 PM PDT 24 8711728087 ps
T337 /workspace/coverage/default/2.sram_ctrl_lc_escalation.2506157016 Jul 11 04:58:51 PM PDT 24 Jul 11 04:59:01 PM PDT 24 798514766 ps
T338 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.4139820381 Jul 11 05:15:11 PM PDT 24 Jul 11 05:26:45 PM PDT 24 5041953415 ps
T339 /workspace/coverage/default/28.sram_ctrl_lc_escalation.493335911 Jul 11 05:15:50 PM PDT 24 Jul 11 05:15:59 PM PDT 24 1375001528 ps
T340 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2482993519 Jul 11 05:14:09 PM PDT 24 Jul 11 05:22:56 PM PDT 24 90896597735 ps
T341 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2244984866 Jul 11 05:17:51 PM PDT 24 Jul 11 05:25:49 PM PDT 24 35319978814 ps
T342 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.184846271 Jul 11 05:13:53 PM PDT 24 Jul 11 05:14:00 PM PDT 24 180195097 ps
T343 /workspace/coverage/default/23.sram_ctrl_partial_access.4120490994 Jul 11 05:15:06 PM PDT 24 Jul 11 05:16:56 PM PDT 24 849219367 ps
T344 /workspace/coverage/default/20.sram_ctrl_partial_access.589064756 Jul 11 05:14:41 PM PDT 24 Jul 11 05:14:44 PM PDT 24 223009251 ps
T345 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.2909707985 Jul 11 04:58:58 PM PDT 24 Jul 11 05:20:58 PM PDT 24 3924533132 ps
T346 /workspace/coverage/default/35.sram_ctrl_smoke.1701037708 Jul 11 05:38:56 PM PDT 24 Jul 11 05:40:05 PM PDT 24 570717294 ps
T347 /workspace/coverage/default/2.sram_ctrl_partial_access.2060914975 Jul 11 04:58:53 PM PDT 24 Jul 11 04:58:55 PM PDT 24 195867912 ps
T348 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2104125666 Jul 11 05:17:26 PM PDT 24 Jul 11 05:22:10 PM PDT 24 40014536919 ps
T349 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3136962648 Jul 11 05:13:54 PM PDT 24 Jul 11 05:17:38 PM PDT 24 450667730 ps
T350 /workspace/coverage/default/21.sram_ctrl_max_throughput.2742072225 Jul 11 05:14:47 PM PDT 24 Jul 11 05:15:12 PM PDT 24 84276760 ps
T351 /workspace/coverage/default/28.sram_ctrl_ram_cfg.2108496104 Jul 11 05:15:58 PM PDT 24 Jul 11 05:15:59 PM PDT 24 95890342 ps
T352 /workspace/coverage/default/43.sram_ctrl_executable.1778450484 Jul 11 05:17:24 PM PDT 24 Jul 11 05:28:05 PM PDT 24 6071623638 ps
T353 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3482800331 Jul 11 05:13:52 PM PDT 24 Jul 11 05:15:01 PM PDT 24 343488915 ps
T354 /workspace/coverage/default/19.sram_ctrl_bijection.2494977170 Jul 11 05:14:31 PM PDT 24 Jul 11 05:15:20 PM PDT 24 2202109786 ps
T355 /workspace/coverage/default/21.sram_ctrl_lc_escalation.944644350 Jul 11 05:15:05 PM PDT 24 Jul 11 05:15:11 PM PDT 24 1293493125 ps
T356 /workspace/coverage/default/0.sram_ctrl_executable.798906783 Jul 11 04:58:45 PM PDT 24 Jul 11 05:04:06 PM PDT 24 944073935 ps
T357 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3468619782 Jul 11 05:12:53 PM PDT 24 Jul 11 05:13:00 PM PDT 24 415365058 ps
T17 /workspace/coverage/default/1.sram_ctrl_sec_cm.641941293 Jul 11 04:59:01 PM PDT 24 Jul 11 04:59:05 PM PDT 24 535701586 ps
T358 /workspace/coverage/default/0.sram_ctrl_regwen.602509211 Jul 11 04:58:44 PM PDT 24 Jul 11 05:07:42 PM PDT 24 1927612909 ps
T359 /workspace/coverage/default/18.sram_ctrl_executable.3046270578 Jul 11 05:14:19 PM PDT 24 Jul 11 05:39:06 PM PDT 24 39120029223 ps
T360 /workspace/coverage/default/32.sram_ctrl_stress_all.3662308339 Jul 11 05:16:36 PM PDT 24 Jul 11 05:50:30 PM PDT 24 63280269326 ps
T361 /workspace/coverage/default/2.sram_ctrl_stress_all.2185066916 Jul 11 04:58:49 PM PDT 24 Jul 11 05:11:50 PM PDT 24 4587824754 ps
T362 /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3653800801 Jul 11 05:12:39 PM PDT 24 Jul 11 05:19:33 PM PDT 24 21220505699 ps
T363 /workspace/coverage/default/12.sram_ctrl_alert_test.172335781 Jul 11 05:13:40 PM PDT 24 Jul 11 05:13:42 PM PDT 24 13228978 ps
T364 /workspace/coverage/default/21.sram_ctrl_bijection.324969353 Jul 11 05:14:45 PM PDT 24 Jul 11 05:15:10 PM PDT 24 483670233 ps
T365 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.2834371344 Jul 11 05:14:40 PM PDT 24 Jul 11 05:18:41 PM PDT 24 2511018782 ps
T366 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.664955796 Jul 11 05:13:33 PM PDT 24 Jul 11 05:14:00 PM PDT 24 3006829006 ps
T367 /workspace/coverage/default/10.sram_ctrl_stress_all.161428 Jul 11 05:13:30 PM PDT 24 Jul 11 05:35:14 PM PDT 24 38988659881 ps
T368 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.853738215 Jul 11 05:16:55 PM PDT 24 Jul 11 05:24:03 PM PDT 24 4870497876 ps
T369 /workspace/coverage/default/45.sram_ctrl_stress_all.2639713913 Jul 11 05:18:02 PM PDT 24 Jul 11 05:44:58 PM PDT 24 58978806205 ps
T370 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2779528140 Jul 11 05:14:55 PM PDT 24 Jul 11 05:17:04 PM PDT 24 309820735 ps
T371 /workspace/coverage/default/19.sram_ctrl_stress_all.2638938035 Jul 11 05:14:45 PM PDT 24 Jul 11 06:01:59 PM PDT 24 75949466046 ps
T372 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.2891660720 Jul 11 05:14:12 PM PDT 24 Jul 11 05:29:58 PM PDT 24 2828345849 ps
T373 /workspace/coverage/default/17.sram_ctrl_bijection.2922691568 Jul 11 05:14:17 PM PDT 24 Jul 11 05:14:55 PM PDT 24 1901434217 ps
T374 /workspace/coverage/default/38.sram_ctrl_stress_all.580474522 Jul 11 05:17:19 PM PDT 24 Jul 11 05:55:46 PM PDT 24 33001646344 ps
T375 /workspace/coverage/default/34.sram_ctrl_smoke.1381024998 Jul 11 05:16:53 PM PDT 24 Jul 11 05:19:02 PM PDT 24 608525284 ps
T376 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.4097063123 Jul 11 05:17:20 PM PDT 24 Jul 11 05:30:10 PM PDT 24 1641993360 ps
T377 /workspace/coverage/default/45.sram_ctrl_access_during_key_req.343346864 Jul 11 05:17:40 PM PDT 24 Jul 11 05:27:38 PM PDT 24 3966204217 ps
T378 /workspace/coverage/default/15.sram_ctrl_mem_walk.95162158 Jul 11 05:14:10 PM PDT 24 Jul 11 05:14:16 PM PDT 24 456581198 ps
T379 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1057944230 Jul 11 05:13:48 PM PDT 24 Jul 11 05:16:20 PM PDT 24 4189723102 ps
T380 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.2847620971 Jul 11 05:17:21 PM PDT 24 Jul 11 05:21:08 PM PDT 24 2287698522 ps
T381 /workspace/coverage/default/44.sram_ctrl_partial_access.951145919 Jul 11 05:17:32 PM PDT 24 Jul 11 05:19:36 PM PDT 24 4039912349 ps
T382 /workspace/coverage/default/11.sram_ctrl_max_throughput.99702668 Jul 11 05:13:31 PM PDT 24 Jul 11 05:13:43 PM PDT 24 76350661 ps
T383 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.589768245 Jul 11 05:17:52 PM PDT 24 Jul 11 05:22:20 PM PDT 24 3937783005 ps
T384 /workspace/coverage/default/19.sram_ctrl_alert_test.4223719584 Jul 11 05:14:44 PM PDT 24 Jul 11 05:14:46 PM PDT 24 12027528 ps
T385 /workspace/coverage/default/4.sram_ctrl_stress_all.402813603 Jul 11 05:12:20 PM PDT 24 Jul 11 06:15:58 PM PDT 24 19603720737 ps
T386 /workspace/coverage/default/45.sram_ctrl_mem_partial_access.1415137776 Jul 11 05:17:41 PM PDT 24 Jul 11 05:17:48 PM PDT 24 605406796 ps
T387 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3881935892 Jul 11 05:18:14 PM PDT 24 Jul 11 05:18:17 PM PDT 24 33109607 ps
T388 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3837574739 Jul 11 05:17:45 PM PDT 24 Jul 11 05:23:06 PM PDT 24 11025249358 ps
T389 /workspace/coverage/default/39.sram_ctrl_lc_escalation.1038148014 Jul 11 05:17:20 PM PDT 24 Jul 11 05:17:24 PM PDT 24 335165550 ps
T390 /workspace/coverage/default/3.sram_ctrl_alert_test.268569875 Jul 11 04:58:57 PM PDT 24 Jul 11 04:58:58 PM PDT 24 37119444 ps
T391 /workspace/coverage/default/32.sram_ctrl_partial_access.2440638031 Jul 11 05:16:57 PM PDT 24 Jul 11 05:17:19 PM PDT 24 3953760157 ps
T392 /workspace/coverage/default/32.sram_ctrl_ram_cfg.1825201917 Jul 11 05:16:37 PM PDT 24 Jul 11 05:16:38 PM PDT 24 36325380 ps
T393 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.4179388473 Jul 11 04:58:58 PM PDT 24 Jul 11 05:07:28 PM PDT 24 7740015494 ps
T394 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.190338035 Jul 11 05:18:08 PM PDT 24 Jul 11 05:18:12 PM PDT 24 63108465 ps
T395 /workspace/coverage/default/36.sram_ctrl_lc_escalation.3778400122 Jul 11 05:17:01 PM PDT 24 Jul 11 05:17:07 PM PDT 24 509457237 ps
T396 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.1637323692 Jul 11 05:15:51 PM PDT 24 Jul 11 05:15:57 PM PDT 24 441552678 ps
T397 /workspace/coverage/default/11.sram_ctrl_stress_all.2362162373 Jul 11 05:13:37 PM PDT 24 Jul 11 05:41:51 PM PDT 24 24461137764 ps
T398 /workspace/coverage/default/42.sram_ctrl_regwen.3583351644 Jul 11 05:17:45 PM PDT 24 Jul 11 05:29:35 PM PDT 24 16713692812 ps
T399 /workspace/coverage/default/31.sram_ctrl_multiple_keys.4121337431 Jul 11 05:16:28 PM PDT 24 Jul 11 05:36:05 PM PDT 24 15298887906 ps
T400 /workspace/coverage/default/42.sram_ctrl_multiple_keys.395229065 Jul 11 05:17:48 PM PDT 24 Jul 11 05:30:45 PM PDT 24 8789840661 ps
T401 /workspace/coverage/default/39.sram_ctrl_max_throughput.1786353944 Jul 11 05:17:10 PM PDT 24 Jul 11 05:18:25 PM PDT 24 107980873 ps
T402 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3765818659 Jul 11 05:13:34 PM PDT 24 Jul 11 05:21:37 PM PDT 24 46253742369 ps
T403 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.160056051 Jul 11 05:17:51 PM PDT 24 Jul 11 05:22:52 PM PDT 24 1334960637 ps
T404 /workspace/coverage/default/14.sram_ctrl_smoke.806201810 Jul 11 05:13:52 PM PDT 24 Jul 11 05:13:55 PM PDT 24 203698146 ps
T405 /workspace/coverage/default/37.sram_ctrl_stress_all.3244190586 Jul 11 05:17:05 PM PDT 24 Jul 11 05:44:06 PM PDT 24 105510893610 ps
T406 /workspace/coverage/default/5.sram_ctrl_max_throughput.2679207406 Jul 11 05:12:24 PM PDT 24 Jul 11 05:13:17 PM PDT 24 547419873 ps
T407 /workspace/coverage/default/45.sram_ctrl_alert_test.2903894271 Jul 11 05:17:41 PM PDT 24 Jul 11 05:17:43 PM PDT 24 50319316 ps
T408 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.2520489536 Jul 11 05:16:18 PM PDT 24 Jul 11 05:21:32 PM PDT 24 6367546302 ps
T409 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2797328350 Jul 11 05:15:54 PM PDT 24 Jul 11 05:16:07 PM PDT 24 147033431 ps
T410 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.975271894 Jul 11 04:58:53 PM PDT 24 Jul 11 04:58:59 PM PDT 24 91937287 ps
T411 /workspace/coverage/default/33.sram_ctrl_regwen.407323342 Jul 11 05:16:42 PM PDT 24 Jul 11 05:36:45 PM PDT 24 45678692761 ps
T412 /workspace/coverage/default/32.sram_ctrl_executable.1964452679 Jul 11 05:16:55 PM PDT 24 Jul 11 05:26:36 PM PDT 24 7498900586 ps
T413 /workspace/coverage/default/49.sram_ctrl_alert_test.2010073157 Jul 11 05:18:06 PM PDT 24 Jul 11 05:18:08 PM PDT 24 22111409 ps
T414 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.4271736755 Jul 11 05:18:01 PM PDT 24 Jul 11 05:18:08 PM PDT 24 365405264 ps
T415 /workspace/coverage/default/40.sram_ctrl_regwen.2748370548 Jul 11 05:17:15 PM PDT 24 Jul 11 05:24:21 PM PDT 24 966714026 ps
T416 /workspace/coverage/default/31.sram_ctrl_alert_test.2626004533 Jul 11 05:16:55 PM PDT 24 Jul 11 05:16:56 PM PDT 24 11677168 ps
T417 /workspace/coverage/default/28.sram_ctrl_partial_access.3477974597 Jul 11 05:15:51 PM PDT 24 Jul 11 05:16:01 PM PDT 24 702647241 ps
T418 /workspace/coverage/default/46.sram_ctrl_regwen.2629614776 Jul 11 05:17:50 PM PDT 24 Jul 11 05:42:49 PM PDT 24 17339128092 ps
T419 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.3189020998 Jul 11 05:16:22 PM PDT 24 Jul 11 05:19:20 PM PDT 24 3234224282 ps
T420 /workspace/coverage/default/13.sram_ctrl_executable.3990780479 Jul 11 05:13:54 PM PDT 24 Jul 11 05:24:49 PM PDT 24 3013026755 ps
T421 /workspace/coverage/default/17.sram_ctrl_max_throughput.2490169801 Jul 11 05:14:18 PM PDT 24 Jul 11 05:14:22 PM PDT 24 47714115 ps
T422 /workspace/coverage/default/41.sram_ctrl_partial_access.2312382965 Jul 11 05:17:53 PM PDT 24 Jul 11 05:18:08 PM PDT 24 195225952 ps
T423 /workspace/coverage/default/36.sram_ctrl_bijection.4288741427 Jul 11 05:17:25 PM PDT 24 Jul 11 05:17:58 PM PDT 24 2402625120 ps
T424 /workspace/coverage/default/20.sram_ctrl_bijection.4113382424 Jul 11 05:14:56 PM PDT 24 Jul 11 05:15:13 PM PDT 24 3193071312 ps
T425 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.3193777355 Jul 11 04:58:42 PM PDT 24 Jul 11 04:58:47 PM PDT 24 166937426 ps
T426 /workspace/coverage/default/35.sram_ctrl_lc_escalation.1121726668 Jul 11 05:16:50 PM PDT 24 Jul 11 05:16:56 PM PDT 24 606855518 ps
T427 /workspace/coverage/default/12.sram_ctrl_smoke.73106476 Jul 11 05:13:43 PM PDT 24 Jul 11 05:13:52 PM PDT 24 455292643 ps
T428 /workspace/coverage/default/2.sram_ctrl_mem_walk.1342636309 Jul 11 04:59:09 PM PDT 24 Jul 11 04:59:21 PM PDT 24 1829773731 ps
T429 /workspace/coverage/default/9.sram_ctrl_ram_cfg.1343078919 Jul 11 05:13:14 PM PDT 24 Jul 11 05:13:16 PM PDT 24 42512802 ps
T430 /workspace/coverage/default/3.sram_ctrl_smoke.733557093 Jul 11 04:58:48 PM PDT 24 Jul 11 04:58:51 PM PDT 24 76819241 ps
T431 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.1826043004 Jul 11 05:14:23 PM PDT 24 Jul 11 05:19:37 PM PDT 24 6372568785 ps
T432 /workspace/coverage/default/15.sram_ctrl_lc_escalation.3988462228 Jul 11 05:14:10 PM PDT 24 Jul 11 05:14:19 PM PDT 24 8283398210 ps
T433 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.4228232408 Jul 11 04:58:39 PM PDT 24 Jul 11 05:01:13 PM PDT 24 3534274142 ps
T434 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1175157492 Jul 11 05:13:33 PM PDT 24 Jul 11 05:19:32 PM PDT 24 30444759785 ps
T435 /workspace/coverage/default/6.sram_ctrl_lc_escalation.4093050143 Jul 11 05:12:52 PM PDT 24 Jul 11 05:13:02 PM PDT 24 2754729766 ps
T436 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2047371946 Jul 11 05:18:12 PM PDT 24 Jul 11 05:21:40 PM PDT 24 2653430436 ps
T437 /workspace/coverage/default/40.sram_ctrl_multiple_keys.3642879016 Jul 11 05:17:21 PM PDT 24 Jul 11 05:26:53 PM PDT 24 66713782458 ps
T438 /workspace/coverage/default/24.sram_ctrl_stress_all.1466676182 Jul 11 05:14:59 PM PDT 24 Jul 11 05:35:42 PM PDT 24 100738511274 ps
T439 /workspace/coverage/default/30.sram_ctrl_ram_cfg.427232363 Jul 11 05:16:28 PM PDT 24 Jul 11 05:16:30 PM PDT 24 82370023 ps
T440 /workspace/coverage/default/35.sram_ctrl_regwen.423571268 Jul 11 05:16:51 PM PDT 24 Jul 11 05:34:28 PM PDT 24 12569301935 ps
T441 /workspace/coverage/default/38.sram_ctrl_max_throughput.3188017217 Jul 11 05:17:39 PM PDT 24 Jul 11 05:20:18 PM PDT 24 342679104 ps
T442 /workspace/coverage/default/35.sram_ctrl_max_throughput.3936124545 Jul 11 05:16:49 PM PDT 24 Jul 11 05:18:51 PM PDT 24 1088330895 ps
T443 /workspace/coverage/default/12.sram_ctrl_regwen.3364181202 Jul 11 05:13:51 PM PDT 24 Jul 11 05:27:03 PM PDT 24 13805049496 ps
T444 /workspace/coverage/default/46.sram_ctrl_executable.1385392006 Jul 11 05:18:14 PM PDT 24 Jul 11 05:42:01 PM PDT 24 49545539187 ps
T445 /workspace/coverage/default/30.sram_ctrl_multiple_keys.1054756706 Jul 11 05:16:18 PM PDT 24 Jul 11 05:25:44 PM PDT 24 4678051799 ps
T446 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3713919856 Jul 11 05:18:02 PM PDT 24 Jul 11 05:29:17 PM PDT 24 14321894641 ps
T447 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.778985641 Jul 11 05:17:15 PM PDT 24 Jul 11 05:17:21 PM PDT 24 121798967 ps
T448 /workspace/coverage/default/27.sram_ctrl_smoke.669165514 Jul 11 05:15:20 PM PDT 24 Jul 11 05:15:23 PM PDT 24 244987282 ps
T449 /workspace/coverage/default/45.sram_ctrl_ram_cfg.873360962 Jul 11 05:17:40 PM PDT 24 Jul 11 05:17:42 PM PDT 24 43011038 ps
T450 /workspace/coverage/default/14.sram_ctrl_ram_cfg.979659928 Jul 11 05:13:53 PM PDT 24 Jul 11 05:13:55 PM PDT 24 71849197 ps
T451 /workspace/coverage/default/18.sram_ctrl_bijection.1890580723 Jul 11 05:14:26 PM PDT 24 Jul 11 05:16:13 PM PDT 24 64865409955 ps
T452 /workspace/coverage/default/9.sram_ctrl_executable.2907005894 Jul 11 05:13:07 PM PDT 24 Jul 11 05:26:26 PM PDT 24 10386984987 ps
T453 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3911343480 Jul 11 05:13:05 PM PDT 24 Jul 11 05:18:59 PM PDT 24 18406051628 ps
T454 /workspace/coverage/default/48.sram_ctrl_multiple_keys.434202221 Jul 11 05:17:56 PM PDT 24 Jul 11 05:22:09 PM PDT 24 4159914302 ps
T455 /workspace/coverage/default/26.sram_ctrl_smoke.1474502111 Jul 11 05:15:57 PM PDT 24 Jul 11 05:16:55 PM PDT 24 433280359 ps
T456 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.383716465 Jul 11 05:17:50 PM PDT 24 Jul 11 05:25:41 PM PDT 24 19228469531 ps
T457 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.605855396 Jul 11 05:16:59 PM PDT 24 Jul 11 05:21:59 PM PDT 24 5049769539 ps
T458 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.2229956034 Jul 11 05:15:10 PM PDT 24 Jul 11 05:15:14 PM PDT 24 346356260 ps
T459 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2569363717 Jul 11 05:16:53 PM PDT 24 Jul 11 05:17:49 PM PDT 24 107841633 ps
T460 /workspace/coverage/default/1.sram_ctrl_mem_walk.2480219859 Jul 11 04:58:42 PM PDT 24 Jul 11 04:58:52 PM PDT 24 1192771987 ps
T461 /workspace/coverage/default/13.sram_ctrl_lc_escalation.525046940 Jul 11 05:13:53 PM PDT 24 Jul 11 05:14:03 PM PDT 24 1285462311 ps
T462 /workspace/coverage/default/38.sram_ctrl_regwen.1154013980 Jul 11 05:17:39 PM PDT 24 Jul 11 05:32:56 PM PDT 24 25640066701 ps
T463 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.326562977 Jul 11 05:13:07 PM PDT 24 Jul 11 05:24:15 PM PDT 24 27719960234 ps
T464 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.192926503 Jul 11 05:13:28 PM PDT 24 Jul 11 05:42:13 PM PDT 24 9359095266 ps
T465 /workspace/coverage/default/29.sram_ctrl_ram_cfg.3623461793 Jul 11 05:16:06 PM PDT 24 Jul 11 05:16:08 PM PDT 24 47471329 ps
T466 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1109794657 Jul 11 05:17:08 PM PDT 24 Jul 11 05:38:05 PM PDT 24 5465183855 ps
T467 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.3270928552 Jul 11 04:59:01 PM PDT 24 Jul 11 05:00:24 PM PDT 24 1634181160 ps
T468 /workspace/coverage/default/11.sram_ctrl_partial_access.2854423650 Jul 11 05:13:28 PM PDT 24 Jul 11 05:13:44 PM PDT 24 291782494 ps
T469 /workspace/coverage/default/14.sram_ctrl_regwen.2161750159 Jul 11 05:13:53 PM PDT 24 Jul 11 05:24:45 PM PDT 24 1970012751 ps
T470 /workspace/coverage/default/1.sram_ctrl_multiple_keys.1804245663 Jul 11 04:59:03 PM PDT 24 Jul 11 05:14:02 PM PDT 24 56800895193 ps
T471 /workspace/coverage/default/23.sram_ctrl_regwen.3487984927 Jul 11 05:14:54 PM PDT 24 Jul 11 05:25:17 PM PDT 24 10328762893 ps
T472 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.630245602 Jul 11 05:15:05 PM PDT 24 Jul 11 05:18:52 PM PDT 24 5658640992 ps
T473 /workspace/coverage/default/27.sram_ctrl_multiple_keys.57885863 Jul 11 05:15:22 PM PDT 24 Jul 11 05:23:30 PM PDT 24 12832154823 ps
T474 /workspace/coverage/default/12.sram_ctrl_max_throughput.2419772025 Jul 11 05:13:29 PM PDT 24 Jul 11 05:14:03 PM PDT 24 110530439 ps
T475 /workspace/coverage/default/26.sram_ctrl_regwen.2267805506 Jul 11 05:15:15 PM PDT 24 Jul 11 05:27:43 PM PDT 24 8364903070 ps
T476 /workspace/coverage/default/6.sram_ctrl_partial_access.2622012523 Jul 11 05:12:55 PM PDT 24 Jul 11 05:13:04 PM PDT 24 604124695 ps
T477 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.4246568468 Jul 11 05:12:24 PM PDT 24 Jul 11 05:14:56 PM PDT 24 24147487040 ps
T478 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1622282710 Jul 11 04:58:59 PM PDT 24 Jul 11 05:06:21 PM PDT 24 79246088533 ps
T479 /workspace/coverage/default/19.sram_ctrl_regwen.3103132846 Jul 11 05:14:31 PM PDT 24 Jul 11 05:32:40 PM PDT 24 15647087696 ps
T480 /workspace/coverage/default/43.sram_ctrl_alert_test.3033915975 Jul 11 05:17:32 PM PDT 24 Jul 11 05:17:34 PM PDT 24 17939147 ps
T481 /workspace/coverage/default/5.sram_ctrl_stress_all.2831909290 Jul 11 05:12:33 PM PDT 24 Jul 11 05:37:25 PM PDT 24 23035493494 ps
T482 /workspace/coverage/default/39.sram_ctrl_partial_access.3336277078 Jul 11 05:17:17 PM PDT 24 Jul 11 05:19:20 PM PDT 24 1998422247 ps
T483 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.2254469704 Jul 11 05:14:52 PM PDT 24 Jul 11 05:19:17 PM PDT 24 4217131221 ps
T484 /workspace/coverage/default/43.sram_ctrl_bijection.1016019199 Jul 11 05:17:24 PM PDT 24 Jul 11 05:18:25 PM PDT 24 975752183 ps
T485 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.1595962289 Jul 11 05:16:03 PM PDT 24 Jul 11 05:19:16 PM PDT 24 3867080477 ps
T486 /workspace/coverage/default/14.sram_ctrl_max_throughput.3192467227 Jul 11 05:13:51 PM PDT 24 Jul 11 05:14:43 PM PDT 24 109927343 ps
T487 /workspace/coverage/default/33.sram_ctrl_max_throughput.3547289729 Jul 11 05:16:47 PM PDT 24 Jul 11 05:17:18 PM PDT 24 164787755 ps
T488 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.444782838 Jul 11 05:13:06 PM PDT 24 Jul 11 05:16:53 PM PDT 24 9165666636 ps
T489 /workspace/coverage/default/7.sram_ctrl_bijection.2566543806 Jul 11 05:13:09 PM PDT 24 Jul 11 05:13:39 PM PDT 24 1345816041 ps
T490 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2033236510 Jul 11 05:13:30 PM PDT 24 Jul 11 05:20:33 PM PDT 24 16464179131 ps
T491 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1285850559 Jul 11 05:15:11 PM PDT 24 Jul 11 05:18:09 PM PDT 24 31010012558 ps
T492 /workspace/coverage/default/34.sram_ctrl_stress_all.1085912216 Jul 11 05:46:34 PM PDT 24 Jul 11 06:29:20 PM PDT 24 42243223667 ps
T493 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2047542031 Jul 11 05:14:23 PM PDT 24 Jul 11 05:14:54 PM PDT 24 1302100193 ps
T494 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1261795680 Jul 11 05:18:01 PM PDT 24 Jul 11 05:21:41 PM PDT 24 19341476613 ps
T495 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1264209460 Jul 11 05:13:41 PM PDT 24 Jul 11 05:13:43 PM PDT 24 75928536 ps
T496 /workspace/coverage/default/43.sram_ctrl_multiple_keys.3983109435 Jul 11 05:17:45 PM PDT 24 Jul 11 05:32:04 PM PDT 24 21513938527 ps
T497 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2985596994 Jul 11 05:12:24 PM PDT 24 Jul 11 05:16:15 PM PDT 24 3231170801 ps
T498 /workspace/coverage/default/12.sram_ctrl_executable.1536265762 Jul 11 05:13:39 PM PDT 24 Jul 11 05:32:28 PM PDT 24 38174448777 ps
T499 /workspace/coverage/default/48.sram_ctrl_ram_cfg.4274889149 Jul 11 05:18:01 PM PDT 24 Jul 11 05:18:03 PM PDT 24 29892638 ps
T500 /workspace/coverage/default/20.sram_ctrl_mem_walk.2546263893 Jul 11 05:14:44 PM PDT 24 Jul 11 05:14:51 PM PDT 24 927024809 ps
T501 /workspace/coverage/default/43.sram_ctrl_max_throughput.2212690735 Jul 11 05:17:28 PM PDT 24 Jul 11 05:17:34 PM PDT 24 56352052 ps
T502 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1975199177 Jul 11 05:16:06 PM PDT 24 Jul 11 05:16:25 PM PDT 24 318229146 ps
T503 /workspace/coverage/default/3.sram_ctrl_stress_all.2159060986 Jul 11 04:58:58 PM PDT 24 Jul 11 05:07:50 PM PDT 24 51561931266 ps
T504 /workspace/coverage/default/36.sram_ctrl_regwen.1880976298 Jul 11 05:16:56 PM PDT 24 Jul 11 05:34:36 PM PDT 24 9018139223 ps
T505 /workspace/coverage/default/38.sram_ctrl_partial_access.446060619 Jul 11 05:17:25 PM PDT 24 Jul 11 05:18:10 PM PDT 24 1042209567 ps
T506 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2655949004 Jul 11 05:18:14 PM PDT 24 Jul 11 05:18:36 PM PDT 24 343986530 ps
T507 /workspace/coverage/default/4.sram_ctrl_ram_cfg.543383015 Jul 11 05:12:15 PM PDT 24 Jul 11 05:12:16 PM PDT 24 103159864 ps
T508 /workspace/coverage/default/40.sram_ctrl_stress_all.1990370033 Jul 11 05:17:16 PM PDT 24 Jul 11 06:22:48 PM PDT 24 28988089320 ps
T509 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1524909701 Jul 11 05:17:25 PM PDT 24 Jul 11 05:17:29 PM PDT 24 195206911 ps
T510 /workspace/coverage/default/8.sram_ctrl_max_throughput.2172310776 Jul 11 05:12:56 PM PDT 24 Jul 11 05:13:58 PM PDT 24 392177963 ps
T511 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2568598325 Jul 11 05:15:05 PM PDT 24 Jul 11 05:21:24 PM PDT 24 15003343890 ps
T512 /workspace/coverage/default/44.sram_ctrl_alert_test.3758430302 Jul 11 05:17:37 PM PDT 24 Jul 11 05:17:38 PM PDT 24 34465968 ps
T513 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.185931548 Jul 11 05:17:44 PM PDT 24 Jul 11 05:17:49 PM PDT 24 153346015 ps
T514 /workspace/coverage/default/13.sram_ctrl_smoke.1925244749 Jul 11 05:13:53 PM PDT 24 Jul 11 05:14:33 PM PDT 24 2938349137 ps
T515 /workspace/coverage/default/29.sram_ctrl_bijection.2253919240 Jul 11 05:15:59 PM PDT 24 Jul 11 05:16:34 PM PDT 24 1474411696 ps
T516 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.565956131 Jul 11 05:16:38 PM PDT 24 Jul 11 05:16:42 PM PDT 24 157206102 ps
T517 /workspace/coverage/default/3.sram_ctrl_regwen.899110386 Jul 11 04:58:54 PM PDT 24 Jul 11 04:59:23 PM PDT 24 1421454092 ps
T518 /workspace/coverage/default/7.sram_ctrl_executable.1313283532 Jul 11 05:13:11 PM PDT 24 Jul 11 05:25:33 PM PDT 24 9424749363 ps
T519 /workspace/coverage/default/6.sram_ctrl_smoke.1620736040 Jul 11 05:12:28 PM PDT 24 Jul 11 05:12:41 PM PDT 24 211520331 ps
T520 /workspace/coverage/default/1.sram_ctrl_regwen.1181440082 Jul 11 04:58:44 PM PDT 24 Jul 11 05:03:40 PM PDT 24 4840600276 ps
T521 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2205409777 Jul 11 05:17:38 PM PDT 24 Jul 11 05:27:10 PM PDT 24 40684237085 ps
T522 /workspace/coverage/default/35.sram_ctrl_executable.3956662562 Jul 11 05:17:11 PM PDT 24 Jul 11 05:27:08 PM PDT 24 10358600216 ps
T523 /workspace/coverage/default/41.sram_ctrl_executable.1800181358 Jul 11 05:17:53 PM PDT 24 Jul 11 05:34:13 PM PDT 24 11379488732 ps
T524 /workspace/coverage/default/49.sram_ctrl_mem_walk.694428445 Jul 11 05:18:08 PM PDT 24 Jul 11 05:18:21 PM PDT 24 7341246513 ps
T525 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.1933250110 Jul 11 05:12:42 PM PDT 24 Jul 11 05:15:27 PM PDT 24 1705022293 ps
T526 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3525053300 Jul 11 05:13:23 PM PDT 24 Jul 11 05:13:29 PM PDT 24 190215359 ps
T527 /workspace/coverage/default/49.sram_ctrl_ram_cfg.301165041 Jul 11 05:18:07 PM PDT 24 Jul 11 05:18:09 PM PDT 24 76384099 ps
T528 /workspace/coverage/default/25.sram_ctrl_stress_all.1037310512 Jul 11 05:15:12 PM PDT 24 Jul 11 05:40:28 PM PDT 24 36069932731 ps
T529 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.1562083032 Jul 11 05:12:13 PM PDT 24 Jul 11 05:34:44 PM PDT 24 3583690372 ps
T530 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1557741874 Jul 11 05:17:23 PM PDT 24 Jul 11 05:17:29 PM PDT 24 150193583 ps
T531 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.4038982230 Jul 11 05:14:49 PM PDT 24 Jul 11 05:15:34 PM PDT 24 616090189 ps
T532 /workspace/coverage/default/43.sram_ctrl_stress_all.1169695120 Jul 11 05:17:47 PM PDT 24 Jul 11 05:20:18 PM PDT 24 1830740498 ps
T533 /workspace/coverage/default/27.sram_ctrl_lc_escalation.1231478581 Jul 11 05:15:58 PM PDT 24 Jul 11 05:16:09 PM PDT 24 3029360717 ps
T534 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.235953710 Jul 11 05:19:47 PM PDT 24 Jul 11 05:25:08 PM PDT 24 996781241 ps
T535 /workspace/coverage/default/47.sram_ctrl_lc_escalation.4248449630 Jul 11 05:17:48 PM PDT 24 Jul 11 05:17:57 PM PDT 24 596993199 ps
T536 /workspace/coverage/default/6.sram_ctrl_max_throughput.2495031671 Jul 11 05:12:36 PM PDT 24 Jul 11 05:14:50 PM PDT 24 140828575 ps
T537 /workspace/coverage/default/4.sram_ctrl_alert_test.3293403468 Jul 11 05:12:44 PM PDT 24 Jul 11 05:12:46 PM PDT 24 37547363 ps
T538 /workspace/coverage/default/47.sram_ctrl_multiple_keys.3238102197 Jul 11 05:17:48 PM PDT 24 Jul 11 05:41:26 PM PDT 24 30405435059 ps
T539 /workspace/coverage/default/38.sram_ctrl_mem_walk.2160055311 Jul 11 05:17:22 PM PDT 24 Jul 11 05:17:28 PM PDT 24 419805936 ps
T540 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3617310637 Jul 11 05:14:02 PM PDT 24 Jul 11 05:14:23 PM PDT 24 165133308 ps
T541 /workspace/coverage/default/22.sram_ctrl_lc_escalation.1743790797 Jul 11 05:14:50 PM PDT 24 Jul 11 05:14:54 PM PDT 24 229621261 ps
T542 /workspace/coverage/default/18.sram_ctrl_alert_test.3013239279 Jul 11 05:14:28 PM PDT 24 Jul 11 05:14:31 PM PDT 24 14283406 ps
T543 /workspace/coverage/default/14.sram_ctrl_partial_access.611663808 Jul 11 05:14:00 PM PDT 24 Jul 11 05:14:04 PM PDT 24 151595528 ps
T544 /workspace/coverage/default/8.sram_ctrl_mem_walk.1121684347 Jul 11 05:13:21 PM PDT 24 Jul 11 05:13:28 PM PDT 24 456259470 ps
T545 /workspace/coverage/default/21.sram_ctrl_smoke.755630447 Jul 11 05:14:56 PM PDT 24 Jul 11 05:15:00 PM PDT 24 134928445 ps
T546 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3331916131 Jul 11 04:58:59 PM PDT 24 Jul 11 04:59:05 PM PDT 24 88850658 ps
T547 /workspace/coverage/default/33.sram_ctrl_mem_walk.12318726 Jul 11 05:16:57 PM PDT 24 Jul 11 05:17:09 PM PDT 24 657603102 ps
T548 /workspace/coverage/default/6.sram_ctrl_mem_walk.1565202035 Jul 11 05:12:56 PM PDT 24 Jul 11 05:13:02 PM PDT 24 291504993 ps
T549 /workspace/coverage/default/44.sram_ctrl_bijection.1689211990 Jul 11 05:17:37 PM PDT 24 Jul 11 05:18:28 PM PDT 24 15586269874 ps
T550 /workspace/coverage/default/21.sram_ctrl_stress_all.1528754460 Jul 11 05:14:55 PM PDT 24 Jul 11 06:38:01 PM PDT 24 32359156264 ps
T551 /workspace/coverage/default/36.sram_ctrl_executable.2930352400 Jul 11 05:16:57 PM PDT 24 Jul 11 05:37:21 PM PDT 24 15344076575 ps
T552 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.708394487 Jul 11 05:12:29 PM PDT 24 Jul 11 05:13:05 PM PDT 24 1347325004 ps
T18 /workspace/coverage/default/3.sram_ctrl_sec_cm.1146455070 Jul 11 04:59:07 PM PDT 24 Jul 11 04:59:11 PM PDT 24 329194008 ps
T553 /workspace/coverage/default/42.sram_ctrl_stress_all.2056828817 Jul 11 05:17:54 PM PDT 24 Jul 11 06:31:44 PM PDT 24 56748339638 ps
T554 /workspace/coverage/default/30.sram_ctrl_bijection.4233680940 Jul 11 05:16:16 PM PDT 24 Jul 11 05:17:34 PM PDT 24 18096498248 ps
T555 /workspace/coverage/default/19.sram_ctrl_multiple_keys.3447235724 Jul 11 05:14:32 PM PDT 24 Jul 11 05:23:52 PM PDT 24 35215770474 ps
T556 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.1000050441 Jul 11 05:18:13 PM PDT 24 Jul 11 05:18:20 PM PDT 24 600935051 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%