Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14006724	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

59405083

1

T1

89982

T3

30500

T4

103424

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	36604158	1			T1	49738		T3	84056		T4	51486
values[0x0]	16999348	1			T1	23656		T3	28254		T4	28602
values[0x1]	19808301	1			T1	25650		T3	55374		T4	29776

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6979378	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

66432429

1

T1

94479

T3

99451

T4

106634

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	257285	1			T3	670		T4	424		T11	190
valid_sources[0x01]	277346	1			T3	604		T4	428		T11	197
valid_sources[0x02]	250709	1			T3	622		T4	308		T11	181
valid_sources[0x03]	263608	1			T3	646		T4	375		T11	188
valid_sources[0x04]	257727	1			T3	680		T4	501		T11	201
valid_sources[0x05]	313959	1			T1	38678		T3	611		T4	479
valid_sources[0x06]	418835	1			T3	666		T4	354		T11	186
valid_sources[0x07]	279704	1			T3	684		T4	405		T11	184
valid_sources[0x08]	262940	1			T3	635		T4	492		T11	190
valid_sources[0x09]	257719	1			T3	670		T4	424		T11	190
valid_sources[0x0a]	288943	1			T3	682		T4	426		T11	204
valid_sources[0x0b]	262201	1			T3	670		T4	469		T11	210
valid_sources[0x0c]	266676	1			T3	650		T4	355		T11	189
valid_sources[0x0d]	328557	1			T3	641		T4	497		T11	194
valid_sources[0x0e]	332897	1			T3	604		T4	395		T11	213
valid_sources[0x0f]	264620	1			T3	680		T4	466		T11	206
valid_sources[0x10]	284900	1			T3	649		T4	479		T11	209
valid_sources[0x11]	316279	1			T3	647		T4	415		T11	214
valid_sources[0x12]	317954	1			T3	635		T4	477		T11	203
valid_sources[0x13]	258920	1			T3	663		T4	414		T11	194
valid_sources[0x14]	299917	1			T3	645		T4	413		T11	191
valid_sources[0x15]	280019	1			T3	613		T4	426		T11	175
valid_sources[0x16]	304878	1			T3	661		T4	449		T11	185
valid_sources[0x17]	305414	1			T3	668		T4	486		T11	202
valid_sources[0x18]	259830	1			T3	722		T4	368		T11	200
valid_sources[0x19]	260057	1			T3	676		T4	515		T11	189
valid_sources[0x1a]	286111	1			T3	663		T4	396		T11	195
valid_sources[0x1b]	306275	1			T3	640		T4	387		T11	209
valid_sources[0x1c]	254512	1			T3	679		T4	452		T11	198
valid_sources[0x1d]	301207	1			T3	648		T4	451		T11	176
valid_sources[0x1e]	258510	1			T3	658		T4	441		T11	207
valid_sources[0x1f]	302781	1			T3	652		T4	440		T11	188
valid_sources[0x20]	327404	1			T3	638		T4	350		T11	195
valid_sources[0x21]	263794	1			T3	658		T4	464		T11	178
valid_sources[0x22]	278343	1			T3	612		T4	539		T11	186
valid_sources[0x23]	276247	1			T3	657		T4	326		T11	218
valid_sources[0x24]	307977	1			T3	671		T4	480		T11	171
valid_sources[0x25]	268458	1			T3	607		T4	335		T11	211
valid_sources[0x26]	324560	1			T3	613		T4	417		T11	189
valid_sources[0x27]	272732	1			T3	643		T4	361		T11	180
valid_sources[0x28]	257813	1			T3	664		T4	413		T11	218
valid_sources[0x29]	261947	1			T3	694		T4	402		T11	181
valid_sources[0x2a]	271091	1			T3	647		T4	429		T11	222
valid_sources[0x2b]	251548	1			T3	708		T4	476		T11	220
valid_sources[0x2c]	276637	1			T3	650		T4	401		T11	211
valid_sources[0x2d]	334260	1			T3	660		T4	437		T11	184
valid_sources[0x2e]	275627	1			T3	710		T4	435		T11	187
valid_sources[0x2f]	289745	1			T3	691		T4	339		T11	190
valid_sources[0x30]	260648	1			T3	657		T4	401		T11	187
valid_sources[0x31]	262666	1			T3	672		T4	481		T11	222
valid_sources[0x32]	319312	1			T3	640		T4	378		T11	210
valid_sources[0x33]	257879	1			T3	637		T4	351		T11	229
valid_sources[0x34]	316415	1			T3	653		T4	492		T11	197
valid_sources[0x35]	263834	1			T3	707		T4	390		T11	209
valid_sources[0x36]	257318	1			T3	672		T4	383		T11	197
valid_sources[0x37]	278442	1			T3	660		T4	488		T11	180
valid_sources[0x38]	293596	1			T3	693		T4	344		T11	203
valid_sources[0x39]	275866	1			T3	717		T4	332		T11	191
valid_sources[0x3a]	288537	1			T1	18683		T3	626		T4	373
valid_sources[0x3b]	263022	1			T3	659		T4	302		T11	237
valid_sources[0x3c]	305733	1			T3	662		T4	364		T11	198
valid_sources[0x3d]	356678	1			T3	619		T4	374		T11	199
valid_sources[0x3e]	320065	1			T3	610		T4	400		T11	203
valid_sources[0x3f]	323712	1			T3	687		T4	475		T11	211
valid_sources[0x40]	283109	1			T3	632		T4	489		T11	188
valid_sources[0x41]	269197	1			T3	708		T4	377		T11	198
valid_sources[0x42]	261913	1			T3	618		T4	520		T11	168
valid_sources[0x43]	309996	1			T3	671		T4	491		T11	194
valid_sources[0x44]	305491	1			T3	576		T4	455		T11	187
valid_sources[0x45]	276189	1			T3	667		T4	459		T11	195
valid_sources[0x46]	264864	1			T3	644		T4	505		T11	204
valid_sources[0x47]	262047	1			T3	673		T4	418		T11	213
valid_sources[0x48]	290947	1			T3	635		T4	359		T11	201
valid_sources[0x49]	253739	1			T3	662		T4	404		T11	221
valid_sources[0x4a]	264355	1			T3	588		T4	360		T11	230
valid_sources[0x4b]	274533	1			T3	646		T4	362		T11	178
valid_sources[0x4c]	294781	1			T3	696		T4	493		T11	203
valid_sources[0x4d]	274308	1			T3	614		T4	482		T11	218
valid_sources[0x4e]	297111	1			T3	666		T4	456		T11	198
valid_sources[0x4f]	261848	1			T3	622		T4	439		T11	174
valid_sources[0x50]	277837	1			T3	626		T4	417		T11	219
valid_sources[0x51]	265622	1			T3	633		T4	438		T11	197
valid_sources[0x52]	282720	1			T3	639		T4	446		T11	201
valid_sources[0x53]	271130	1			T3	600		T4	482		T11	175
valid_sources[0x54]	268508	1			T3	736		T4	343		T11	227
valid_sources[0x55]	291961	1			T3	676		T4	445		T11	189
valid_sources[0x56]	309308	1			T3	619		T4	376		T11	175
valid_sources[0x57]	264505	1			T3	688		T4	468		T11	198
valid_sources[0x58]	272021	1			T3	618		T4	440		T11	208
valid_sources[0x59]	276190	1			T3	670		T4	449		T11	187
valid_sources[0x5a]	304670	1			T3	609		T4	375		T11	180
valid_sources[0x5b]	249584	1			T3	638		T4	404		T11	200
valid_sources[0x5c]	255776	1			T3	626		T4	494		T11	206
valid_sources[0x5d]	287289	1			T3	716		T4	529		T11	188
valid_sources[0x5e]	288090	1			T3	690		T4	415		T11	204
valid_sources[0x5f]	279788	1			T3	680		T4	361		T11	209
valid_sources[0x60]	287189	1			T1	2533		T3	672		T4	441
valid_sources[0x61]	258814	1			T3	662		T4	481		T11	196
valid_sources[0x62]	365373	1			T3	660		T4	494		T11	207
valid_sources[0x63]	300301	1			T3	648		T4	309		T11	186
valid_sources[0x64]	266268	1			T3	629		T4	428		T11	223
valid_sources[0x65]	273554	1			T3	666		T4	431		T11	191
valid_sources[0x66]	368762	1			T3	668		T4	639		T11	214
valid_sources[0x67]	265860	1			T3	641		T4	375		T11	222
valid_sources[0x68]	281257	1			T3	644		T4	362		T11	205
valid_sources[0x69]	306871	1			T3	664		T4	400		T11	207
valid_sources[0x6a]	306531	1			T3	669		T4	412		T11	218
valid_sources[0x6b]	329397	1			T3	615		T4	419		T11	197
valid_sources[0x6c]	260747	1			T3	644		T4	377		T11	219
valid_sources[0x6d]	289798	1			T3	639		T4	505		T11	210
valid_sources[0x6e]	277492	1			T3	667		T4	406		T11	215
valid_sources[0x6f]	287265	1			T3	646		T4	348		T11	237
valid_sources[0x70]	362172	1			T3	722		T4	352		T11	177
valid_sources[0x71]	280578	1			T3	610		T4	498		T11	185
valid_sources[0x72]	285547	1			T3	563		T4	377		T11	190
valid_sources[0x73]	282815	1			T3	757		T4	442		T11	179
valid_sources[0x74]	288554	1			T3	713		T4	412		T11	230
valid_sources[0x75]	260480	1			T3	675		T4	461		T11	200
valid_sources[0x76]	254612	1			T3	650		T4	503		T11	183
valid_sources[0x77]	325837	1			T3	626		T4	402		T11	218
valid_sources[0x78]	257784	1			T3	721		T4	432		T11	190
valid_sources[0x79]	331140	1			T3	678		T4	450		T11	207
valid_sources[0x7a]	265803	1			T3	633		T4	350		T11	210
valid_sources[0x7b]	286783	1			T3	634		T4	441		T11	196
valid_sources[0x7c]	287567	1			T3	648		T4	422		T11	191
valid_sources[0x7d]	358811	1			T3	630		T4	380		T11	204
valid_sources[0x7e]	264218	1			T3	559		T4	534		T11	216
valid_sources[0x7f]	325101	1			T3	701		T4	377		T11	191
valid_sources[0x80]	272191	1			T3	632		T4	404		T11	221

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

29606048

1

T1

45278

T3

15203

T4

48279

values[0x0]

all_enables

biggest_size

14897276

1

T1

22275

T3

7747

T4

27607

values[0x1]

all_enables

biggest_size

14901759

1

T1

22429

T3

7550

T4

27538

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	36507	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

126497

1

T1

2

T2

1

T4

6446

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	47887	1			T4	1748		T20	27		T24	175
values[0x0]	55660	1			T1	7		T2	1		T3	2
values[0x1]	59457	1			T1	2		T3	1		T4	2663

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27647	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

135357

1

T1

2

T2

1

T4

6665

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	632	1			T4	42		T20	1		T25	5
valid_sources[0x01]	665	1			T4	16		T12	12		T20	1
valid_sources[0x02]	659	1			T4	14		T24	1		T25	2
valid_sources[0x03]	511	1			T4	9		T25	12		T140	1
valid_sources[0x04]	541	1			T4	39		T6	2		T25	5
valid_sources[0x05]	520	1			T4	43		T25	5		T53	4
valid_sources[0x06]	627	1			T3	1		T4	48		T25	14
valid_sources[0x07]	490	1			T4	34		T20	1		T25	3
valid_sources[0x08]	587	1			T4	15		T24	5		T25	7
valid_sources[0x09]	477	1			T4	41		T25	5		T53	9
valid_sources[0x0a]	478	1			T4	65		T24	9		T21	1
valid_sources[0x0b]	521	1			T4	59		T21	1		T25	10
valid_sources[0x0c]	817	1			T4	22		T21	1		T25	17
valid_sources[0x0d]	988	1			T4	4		T14	1		T20	1
valid_sources[0x0e]	686	1			T4	10		T11	8		T25	6
valid_sources[0x0f]	490	1			T4	35		T25	10		T119	1
valid_sources[0x10]	404	1			T4	10		T20	2		T24	3
valid_sources[0x11]	510	1			T14	1		T25	9		T50	3
valid_sources[0x12]	533	1			T20	1		T24	7		T25	5
valid_sources[0x13]	627	1			T4	26		T25	8		T42	1
valid_sources[0x14]	1192	1			T4	43		T25	11		T42	1
valid_sources[0x15]	481	1			T4	16		T25	9		T135	1
valid_sources[0x16]	572	1			T4	38		T20	1		T25	13
valid_sources[0x17]	445	1			T4	71		T20	2		T24	1
valid_sources[0x18]	499	1			T4	23		T14	1		T25	5
valid_sources[0x19]	576	1			T4	42		T11	1		T20	1
valid_sources[0x1a]	448	1			T4	10		T38	2		T25	8
valid_sources[0x1b]	428	1			T4	48		T25	11		T119	4
valid_sources[0x1c]	508	1			T4	1		T25	9		T53	4
valid_sources[0x1d]	562	1			T4	11		T24	5		T25	4
valid_sources[0x1e]	426	1			T4	16		T25	5		T61	1
valid_sources[0x1f]	566	1			T4	7		T21	1		T25	11
valid_sources[0x20]	990	1			T4	8		T25	4		T42	1
valid_sources[0x21]	649	1			T4	38		T20	1		T25	8
valid_sources[0x22]	603	1			T4	1		T14	1		T20	1
valid_sources[0x23]	574	1			T4	9		T24	8		T25	8
valid_sources[0x24]	942	1			T4	38		T20	1		T25	9
valid_sources[0x25]	611	1			T4	11		T24	3		T21	3
valid_sources[0x26]	638	1			T4	15		T20	1		T24	18
valid_sources[0x27]	502	1			T4	17		T25	13		T50	12
valid_sources[0x28]	578	1			T4	5		T25	11		T42	1
valid_sources[0x29]	727	1			T4	66		T20	1		T25	9
valid_sources[0x2a]	479	1			T4	22		T20	1		T25	8
valid_sources[0x2b]	493	1			T4	47		T20	1		T24	1
valid_sources[0x2c]	594	1			T4	29		T25	4		T50	63
valid_sources[0x2d]	639	1			T4	5		T20	1		T24	1
valid_sources[0x2e]	537	1			T4	7		T20	2		T21	1
valid_sources[0x2f]	417	1			T4	2		T25	5		T141	1
valid_sources[0x30]	717	1			T4	12		T24	5		T25	10
valid_sources[0x31]	839	1			T4	49		T20	1		T24	9
valid_sources[0x32]	763	1			T4	63		T25	4		T142	1
valid_sources[0x33]	518	1			T4	60		T11	1		T20	2
valid_sources[0x34]	666	1			T4	27		T21	2		T25	7
valid_sources[0x35]	429	1			T1	1		T4	51		T21	3
valid_sources[0x36]	1013	1			T4	15		T24	14		T25	6
valid_sources[0x37]	783	1			T4	21		T14	1		T25	7
valid_sources[0x38]	523	1			T4	57		T21	1		T25	8
valid_sources[0x39]	580	1			T4	1		T20	1		T21	4
valid_sources[0x3a]	899	1			T4	57		T20	1		T24	4
valid_sources[0x3b]	499	1			T4	22		T25	2		T44	1
valid_sources[0x3c]	1434	1			T4	10		T14	1		T24	13
valid_sources[0x3d]	934	1			T4	1		T25	9		T61	2
valid_sources[0x3e]	515	1			T4	12		T25	10		T135	1
valid_sources[0x3f]	587	1			T4	16		T20	1		T21	2
valid_sources[0x40]	504	1			T4	37		T20	1		T24	1
valid_sources[0x41]	740	1			T4	51		T24	28		T25	15
valid_sources[0x42]	625	1			T25	9		T50	38		T61	1
valid_sources[0x43]	635	1			T4	21		T20	1		T25	6
valid_sources[0x44]	520	1			T4	13		T24	1		T25	5
valid_sources[0x45]	695	1			T4	35		T20	1		T24	3
valid_sources[0x46]	569	1			T4	5		T25	11		T44	1
valid_sources[0x47]	518	1			T4	36		T24	4		T25	10
valid_sources[0x48]	554	1			T4	20		T20	3		T25	13
valid_sources[0x49]	1203	1			T4	63		T20	1		T25	18
valid_sources[0x4a]	536	1			T4	27		T24	2		T25	17
valid_sources[0x4b]	1001	1			T4	99		T24	10		T25	13
valid_sources[0x4c]	537	1			T4	1		T24	25		T25	7
valid_sources[0x4d]	560	1			T4	48		T21	1		T25	7
valid_sources[0x4e]	513	1			T20	1		T25	7		T50	8
valid_sources[0x4f]	495	1			T2	1		T4	52		T20	3
valid_sources[0x50]	623	1			T4	9		T25	10		T50	33
valid_sources[0x51]	517	1			T24	33		T25	6		T44	1
valid_sources[0x52]	455	1			T4	43		T24	1		T25	11
valid_sources[0x53]	763	1			T4	33		T20	1		T25	12
valid_sources[0x54]	641	1			T4	22		T24	18		T25	11
valid_sources[0x55]	652	1			T4	18		T25	9		T61	2
valid_sources[0x56]	555	1			T4	8		T21	1		T25	8
valid_sources[0x57]	799	1			T4	4		T25	11		T140	1
valid_sources[0x58]	453	1			T4	8		T25	9		T50	29
valid_sources[0x59]	498	1			T4	45		T25	9		T50	3
valid_sources[0x5a]	517	1			T4	3		T25	9		T50	1
valid_sources[0x5b]	697	1			T4	42		T21	2		T25	6
valid_sources[0x5c]	658	1			T4	2		T25	6		T50	1
valid_sources[0x5d]	469	1			T4	21		T25	12		T143	2
valid_sources[0x5e]	571	1			T4	27		T39	1		T25	6
valid_sources[0x5f]	440	1			T4	31		T14	1		T20	2
valid_sources[0x60]	428	1			T4	31		T24	11		T21	2
valid_sources[0x61]	405	1			T4	21		T20	2		T43	3
valid_sources[0x62]	960	1			T4	18		T20	1		T25	5
valid_sources[0x63]	675	1			T4	74		T39	1		T25	4
valid_sources[0x64]	675	1			T4	16		T21	3		T25	6
valid_sources[0x65]	715	1			T4	57		T25	13		T22	2
valid_sources[0x66]	1087	1			T4	46		T20	1		T25	8
valid_sources[0x67]	492	1			T4	1		T21	8		T25	11
valid_sources[0x68]	735	1			T4	6		T11	1		T20	1
valid_sources[0x69]	1498	1			T4	42		T25	12		T22	3
valid_sources[0x6a]	609	1			T4	51		T25	7		T143	1
valid_sources[0x6b]	589	1			T4	53		T24	10		T25	12
valid_sources[0x6c]	572	1			T4	38		T25	6		T53	9
valid_sources[0x6d]	780	1			T4	89		T24	2		T25	8
valid_sources[0x6e]	413	1			T4	40		T25	4		T50	3
valid_sources[0x6f]	589	1			T4	25		T20	1		T24	7
valid_sources[0x70]	893	1			T4	49		T21	1		T25	14
valid_sources[0x71]	944	1			T4	35		T20	1		T24	1
valid_sources[0x72]	625	1			T4	31		T14	2		T21	3
valid_sources[0x73]	455	1			T4	53		T11	1		T20	1
valid_sources[0x74]	445	1			T4	56		T20	1		T24	2
valid_sources[0x75]	777	1			T4	5		T20	1		T21	2
valid_sources[0x76]	478	1			T4	35		T14	1		T20	4
valid_sources[0x77]	512	1			T4	45		T25	9		T50	2
valid_sources[0x78]	858	1			T4	35		T25	2		T50	17
valid_sources[0x79]	797	1			T4	83		T20	2		T24	3
valid_sources[0x7a]	770	1			T4	6		T20	2		T21	1
valid_sources[0x7b]	398	1			T4	1		T11	1		T14	1
valid_sources[0x7c]	529	1			T4	4		T25	13		T50	94
valid_sources[0x7d]	618	1			T4	48		T20	1		T25	19
valid_sources[0x7e]	742	1			T4	14		T20	1		T25	12
valid_sources[0x7f]	564	1			T4	1		T11	1		T20	2
valid_sources[0x80]	554	1			T4	5		T14	2		T20	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

34870

1

T4

1653

T20

15

T24

148

values[0x0]

all_enables

biggest_size

47021

1

T1

1

T2

1

T4

2401

values[0x1]

all_enables

biggest_size

44606

1

T1

1

T4

2392

T11

3