Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1022
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
84.09 84.09 95.68 95.68 80.33 80.33 93.41 93.41 61.90 61.90 85.75 85.75 94.40 94.40 77.15 77.15 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3341059718
89.18 5.09 97.37 1.69 81.16 0.83 93.41 0.00 90.48 28.57 89.37 3.62 94.40 0.00 78.06 0.91 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3334150549
92.63 3.45 98.73 1.36 85.19 4.03 93.90 0.49 100.00 9.52 93.00 3.62 94.40 0.00 83.18 5.12 /workspace/coverage/default/36.sram_ctrl_stress_all.3704337681
93.99 1.36 98.73 0.00 87.68 2.49 95.56 1.66 100.00 0.00 94.20 1.21 95.28 0.88 86.47 3.29 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4163905396
94.97 0.98 98.90 0.17 88.51 0.83 95.77 0.21 100.00 0.00 94.93 0.72 95.28 0.00 91.41 4.94 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2940034194
95.73 0.76 99.07 0.17 90.52 2.01 96.53 0.76 100.00 0.00 95.65 0.72 96.02 0.74 92.32 0.91 /workspace/coverage/default/1.sram_ctrl_sec_cm.661413608
96.39 0.66 99.07 0.00 90.52 0.00 98.54 2.01 100.00 0.00 95.89 0.24 96.02 0.00 94.70 2.38 /workspace/coverage/default/13.sram_ctrl_stress_all.2059419952
96.57 0.18 99.07 0.00 90.64 0.12 98.54 0.00 100.00 0.00 96.14 0.24 96.76 0.74 94.88 0.18 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2484537710
96.75 0.18 99.07 0.00 90.64 0.00 98.61 0.07 100.00 0.00 96.14 0.00 97.94 1.18 94.88 0.00 /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1204143646
96.93 0.17 99.07 0.00 90.64 0.00 98.61 0.00 100.00 0.00 96.14 0.00 98.97 1.03 95.06 0.18 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.741428972
97.06 0.13 99.15 0.08 90.64 0.00 99.45 0.83 100.00 0.00 96.14 0.00 98.97 0.00 95.06 0.00 /workspace/coverage/default/19.sram_ctrl_ram_cfg.3311252089
97.19 0.13 99.15 0.00 90.64 0.00 99.45 0.00 100.00 0.00 96.14 0.00 98.97 0.00 95.98 0.91 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.213540331
97.32 0.13 99.15 0.00 90.64 0.00 99.45 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.89 0.91 /workspace/coverage/default/34.sram_ctrl_stress_all.1141562042
97.40 0.08 99.15 0.00 90.64 0.00 99.45 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.55 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3555653959
97.46 0.06 99.15 0.00 91.00 0.36 99.51 0.07 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.00 /workspace/coverage/default/1.sram_ctrl_alert_test.605562090
97.49 0.03 99.15 0.00 91.00 0.00 99.72 0.21 100.00 0.00 96.14 0.00 98.97 0.00 97.44 0.00 /workspace/coverage/default/2.sram_ctrl_stress_all.3772626026
97.51 0.02 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.44 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.212405807


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2153566196
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1273212598
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1508610098
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3117874761
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1306368269
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.455071034
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2551364319
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2440421169
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3032709926
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3483953138
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.4116532981
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2027845511
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2649041980
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3949416040
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.164338135
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4046592018
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3875272418
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3813533731
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1958702435
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1997471053
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.766046837
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.845980476
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.2825475359
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3873959556
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.1660852375
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.979960253
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2480315564
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2524129953
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3040782847
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3769025959
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1327401460
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1390292115
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.4264961144
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.869766311
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2637798998
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.170541648
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1496524717
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1631022341
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1844779872
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1469694893
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1359243539
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.148623349
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2233599533
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.787691419
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2123971557
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3836938457
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2337782050
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3311822105
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1545406061
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2129466565
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2035735028
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1725834093
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.836688178
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.835167514
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2307093461
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1853834697
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.254451203
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1773436938
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1726609437
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2428673074
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1743476881
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1907166877
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.652303698
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.466122993
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1083345563
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2893571760
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.242979279
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3101775668
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.840692273
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4131217144
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3117925333
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.788786882
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3653644852
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3841017235
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3426251106
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2508049059
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.207046238
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.52569917
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1625508050
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.883711516
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1814102179
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3274330026
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2405996430
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3723405682
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.981689024
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.133457328
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2388872231
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2528844657
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.658756148
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1012855839
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1870393641
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3929416396
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.2920186041
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.4154685338
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1809525877
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3502605402
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.81862493
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2470657300
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2256632125
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4108541938
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2089503520
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2170392989
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.4072227052
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.3280938144
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2073006647
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.501204446
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.1305899049
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3962150625
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1914581641
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1405684197
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.4226506877
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.340880602
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.845178132
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4036522083
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.375927729
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1426333385
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3307293427
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3166975217
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.203491320
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2556316550
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.4009362027
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2855132905
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3090806465
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3994610777
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1076746937
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2112546561
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1037117456
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1514929053
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2833312992
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.742686209
/workspace/coverage/default/0.sram_ctrl_alert_test.2639893184
/workspace/coverage/default/0.sram_ctrl_bijection.855414272
/workspace/coverage/default/0.sram_ctrl_executable.1611315277
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2107245829
/workspace/coverage/default/0.sram_ctrl_max_throughput.3934601950
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2812232964
/workspace/coverage/default/0.sram_ctrl_mem_walk.1544722447
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1711103658
/workspace/coverage/default/0.sram_ctrl_partial_access.2674314317
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2167892882
/workspace/coverage/default/0.sram_ctrl_ram_cfg.406374946
/workspace/coverage/default/0.sram_ctrl_regwen.3659055353
/workspace/coverage/default/0.sram_ctrl_sec_cm.890485261
/workspace/coverage/default/0.sram_ctrl_smoke.384449876
/workspace/coverage/default/0.sram_ctrl_stress_all.255738669
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2530134766
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2398137899
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3245790729
/workspace/coverage/default/1.sram_ctrl_bijection.3527384452
/workspace/coverage/default/1.sram_ctrl_executable.1746894182
/workspace/coverage/default/1.sram_ctrl_lc_escalation.2186246123
/workspace/coverage/default/1.sram_ctrl_max_throughput.193464464
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3888313392
/workspace/coverage/default/1.sram_ctrl_mem_walk.2277226294
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2629135830
/workspace/coverage/default/1.sram_ctrl_partial_access.1444859788
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3862699482
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3781627178
/workspace/coverage/default/1.sram_ctrl_regwen.324625395
/workspace/coverage/default/1.sram_ctrl_smoke.4254225213
/workspace/coverage/default/1.sram_ctrl_stress_all.3144083137
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.145901225
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1613496363
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1992397191
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3444949032
/workspace/coverage/default/10.sram_ctrl_alert_test.4019892997
/workspace/coverage/default/10.sram_ctrl_bijection.2563983650
/workspace/coverage/default/10.sram_ctrl_executable.375493122
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3745165038
/workspace/coverage/default/10.sram_ctrl_max_throughput.2069863491
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.442086738
/workspace/coverage/default/10.sram_ctrl_mem_walk.2538592459
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1968728708
/workspace/coverage/default/10.sram_ctrl_partial_access.3523898720
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2549206512
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2155297837
/workspace/coverage/default/10.sram_ctrl_regwen.3059284553
/workspace/coverage/default/10.sram_ctrl_smoke.2945916501
/workspace/coverage/default/10.sram_ctrl_stress_all.1240799372
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.867174974
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1808497347
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3702385696
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1967900353
/workspace/coverage/default/11.sram_ctrl_alert_test.3457516738
/workspace/coverage/default/11.sram_ctrl_bijection.474075577
/workspace/coverage/default/11.sram_ctrl_executable.1957660166
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3485801207
/workspace/coverage/default/11.sram_ctrl_max_throughput.1044336772
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.476981035
/workspace/coverage/default/11.sram_ctrl_mem_walk.2113550764
/workspace/coverage/default/11.sram_ctrl_multiple_keys.541622460
/workspace/coverage/default/11.sram_ctrl_partial_access.3441081404
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2068182563
/workspace/coverage/default/11.sram_ctrl_ram_cfg.4264592022
/workspace/coverage/default/11.sram_ctrl_regwen.1834421025
/workspace/coverage/default/11.sram_ctrl_smoke.3146623423
/workspace/coverage/default/11.sram_ctrl_stress_all.2595812922
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2500073121
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2458075594
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.558179976
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.4226792557
/workspace/coverage/default/12.sram_ctrl_alert_test.2368276012
/workspace/coverage/default/12.sram_ctrl_bijection.1361128466
/workspace/coverage/default/12.sram_ctrl_executable.2956555585
/workspace/coverage/default/12.sram_ctrl_lc_escalation.12310230
/workspace/coverage/default/12.sram_ctrl_max_throughput.3349248710
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.4086754232
/workspace/coverage/default/12.sram_ctrl_multiple_keys.3794535249
/workspace/coverage/default/12.sram_ctrl_partial_access.294177631
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.289823052
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1504843125
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/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3883088159
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1087164081
/workspace/coverage/default/44.sram_ctrl_alert_test.375173760
/workspace/coverage/default/44.sram_ctrl_bijection.721682303
/workspace/coverage/default/44.sram_ctrl_executable.2230525583
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2572266976
/workspace/coverage/default/44.sram_ctrl_max_throughput.3521763936
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1356742285
/workspace/coverage/default/44.sram_ctrl_mem_walk.1505001832
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1133558937
/workspace/coverage/default/44.sram_ctrl_partial_access.4141194456
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1095176432
/workspace/coverage/default/44.sram_ctrl_ram_cfg.385694962
/workspace/coverage/default/44.sram_ctrl_regwen.584737944
/workspace/coverage/default/44.sram_ctrl_smoke.3675959599
/workspace/coverage/default/44.sram_ctrl_stress_all.1134019180
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2344794976
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2164804456
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.1030762914
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1722365587
/workspace/coverage/default/45.sram_ctrl_alert_test.3196006251
/workspace/coverage/default/45.sram_ctrl_bijection.481034793
/workspace/coverage/default/45.sram_ctrl_executable.208494041
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1507485609
/workspace/coverage/default/45.sram_ctrl_max_throughput.1299155018
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3096696437
/workspace/coverage/default/45.sram_ctrl_mem_walk.323988923
/workspace/coverage/default/45.sram_ctrl_multiple_keys.567722912
/workspace/coverage/default/45.sram_ctrl_partial_access.1759624440
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.799408270
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3877150722
/workspace/coverage/default/45.sram_ctrl_regwen.3257493744
/workspace/coverage/default/45.sram_ctrl_smoke.3932138744
/workspace/coverage/default/45.sram_ctrl_stress_all.3103327115
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2472882237
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.828971748
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4027352034
/workspace/coverage/default/46.sram_ctrl_alert_test.2719299138
/workspace/coverage/default/46.sram_ctrl_bijection.4184115184
/workspace/coverage/default/46.sram_ctrl_executable.4187379322
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3047728181
/workspace/coverage/default/46.sram_ctrl_max_throughput.3496521962
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3102688930
/workspace/coverage/default/46.sram_ctrl_mem_walk.3646046953
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2284974782
/workspace/coverage/default/46.sram_ctrl_partial_access.2149346856
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2728748574
/workspace/coverage/default/46.sram_ctrl_ram_cfg.183277415
/workspace/coverage/default/46.sram_ctrl_regwen.2129375148
/workspace/coverage/default/46.sram_ctrl_smoke.2978316841
/workspace/coverage/default/46.sram_ctrl_stress_all.81304432
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4242002293
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.4178149523
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.465379353
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2913337749
/workspace/coverage/default/47.sram_ctrl_alert_test.4088930974
/workspace/coverage/default/47.sram_ctrl_bijection.108294124
/workspace/coverage/default/47.sram_ctrl_executable.1345068764
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3522057994
/workspace/coverage/default/47.sram_ctrl_max_throughput.61238153
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2275120471
/workspace/coverage/default/47.sram_ctrl_mem_walk.2446767540
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1550806636
/workspace/coverage/default/47.sram_ctrl_partial_access.340230454
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.991267869
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1802952632
/workspace/coverage/default/47.sram_ctrl_regwen.3323330664
/workspace/coverage/default/47.sram_ctrl_smoke.3949411937
/workspace/coverage/default/47.sram_ctrl_stress_all.965643614
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2891699788
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3595163468
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2817494740
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2951763666
/workspace/coverage/default/48.sram_ctrl_alert_test.3157552212
/workspace/coverage/default/48.sram_ctrl_bijection.257340372
/workspace/coverage/default/48.sram_ctrl_executable.1995464392
/workspace/coverage/default/48.sram_ctrl_lc_escalation.280285579
/workspace/coverage/default/48.sram_ctrl_max_throughput.666943255
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2886771324
/workspace/coverage/default/48.sram_ctrl_mem_walk.98383163
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2089541257
/workspace/coverage/default/48.sram_ctrl_partial_access.450266644
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.748296652
/workspace/coverage/default/48.sram_ctrl_ram_cfg.3701968136
/workspace/coverage/default/48.sram_ctrl_regwen.1714716306
/workspace/coverage/default/48.sram_ctrl_smoke.4025279407
/workspace/coverage/default/48.sram_ctrl_stress_all.289175012
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2762922356
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2878896358
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1976265971
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1315980976
/workspace/coverage/default/49.sram_ctrl_alert_test.1059961388
/workspace/coverage/default/49.sram_ctrl_bijection.159162281
/workspace/coverage/default/49.sram_ctrl_executable.1158416143
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4178430158
/workspace/coverage/default/49.sram_ctrl_max_throughput.3482596963
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3970124028
/workspace/coverage/default/49.sram_ctrl_mem_walk.1048723611
/workspace/coverage/default/49.sram_ctrl_multiple_keys.4164975189
/workspace/coverage/default/49.sram_ctrl_partial_access.3653160043
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1452038013
/workspace/coverage/default/49.sram_ctrl_ram_cfg.603601176
/workspace/coverage/default/49.sram_ctrl_regwen.2882077865
/workspace/coverage/default/49.sram_ctrl_smoke.886285980
/workspace/coverage/default/49.sram_ctrl_stress_all.4286982644
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2499782420
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.139159619
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2799673497
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.819991104
/workspace/coverage/default/5.sram_ctrl_alert_test.2846640352
/workspace/coverage/default/5.sram_ctrl_bijection.1211664937
/workspace/coverage/default/5.sram_ctrl_executable.290368903
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3704545451
/workspace/coverage/default/5.sram_ctrl_max_throughput.3056435788
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3894372929
/workspace/coverage/default/5.sram_ctrl_mem_walk.728228660
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2620597164
/workspace/coverage/default/5.sram_ctrl_partial_access.1576867654
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2953005921
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1957976344
/workspace/coverage/default/5.sram_ctrl_regwen.1472281763
/workspace/coverage/default/5.sram_ctrl_smoke.2244990063
/workspace/coverage/default/5.sram_ctrl_stress_all.1041152758
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1915384669
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1158317979
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2430990602
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1806822052
/workspace/coverage/default/6.sram_ctrl_alert_test.3906374162
/workspace/coverage/default/6.sram_ctrl_bijection.2361951126
/workspace/coverage/default/6.sram_ctrl_executable.3101242588
/workspace/coverage/default/6.sram_ctrl_lc_escalation.3544722983
/workspace/coverage/default/6.sram_ctrl_max_throughput.305584387
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2441286454
/workspace/coverage/default/6.sram_ctrl_mem_walk.1094786299
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1198263281
/workspace/coverage/default/6.sram_ctrl_partial_access.1836448906
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.700107257
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1753861178
/workspace/coverage/default/6.sram_ctrl_regwen.685185968
/workspace/coverage/default/6.sram_ctrl_smoke.3041090762
/workspace/coverage/default/6.sram_ctrl_stress_all.850259579
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1076885872
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.2370618925
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3550299815
/workspace/coverage/default/7.sram_ctrl_alert_test.2019608064
/workspace/coverage/default/7.sram_ctrl_bijection.3087799385
/workspace/coverage/default/7.sram_ctrl_executable.3324485269
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1807799640
/workspace/coverage/default/7.sram_ctrl_max_throughput.2870188671
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.347250206
/workspace/coverage/default/7.sram_ctrl_mem_walk.2865310207
/workspace/coverage/default/7.sram_ctrl_multiple_keys.407441991
/workspace/coverage/default/7.sram_ctrl_partial_access.4007967994
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2093841134
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2509738306
/workspace/coverage/default/7.sram_ctrl_regwen.1594748359
/workspace/coverage/default/7.sram_ctrl_smoke.224137654
/workspace/coverage/default/7.sram_ctrl_stress_all.1278778623
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2713284654
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1064893934
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3041375038
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.4183652923
/workspace/coverage/default/8.sram_ctrl_alert_test.831163491
/workspace/coverage/default/8.sram_ctrl_bijection.19118923
/workspace/coverage/default/8.sram_ctrl_executable.943546336
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1691571973
/workspace/coverage/default/8.sram_ctrl_max_throughput.2430455270
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.1836483905
/workspace/coverage/default/8.sram_ctrl_mem_walk.1678008252
/workspace/coverage/default/8.sram_ctrl_multiple_keys.723332585
/workspace/coverage/default/8.sram_ctrl_partial_access.130134356
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3313284413
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2019543699
/workspace/coverage/default/8.sram_ctrl_regwen.491715976
/workspace/coverage/default/8.sram_ctrl_smoke.4210523713
/workspace/coverage/default/8.sram_ctrl_stress_all.2837759123
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1488034598
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2280308318
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2255936846
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1939310673
/workspace/coverage/default/9.sram_ctrl_alert_test.1558923040
/workspace/coverage/default/9.sram_ctrl_bijection.40214858
/workspace/coverage/default/9.sram_ctrl_executable.4042779349
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1119526216
/workspace/coverage/default/9.sram_ctrl_max_throughput.1059077673
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1294246105
/workspace/coverage/default/9.sram_ctrl_mem_walk.3129232980
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3275373314
/workspace/coverage/default/9.sram_ctrl_partial_access.3243101153
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.4231187372
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2540025198
/workspace/coverage/default/9.sram_ctrl_regwen.1918337671
/workspace/coverage/default/9.sram_ctrl_smoke.2303624612
/workspace/coverage/default/9.sram_ctrl_stress_all.2749100021
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3284695953
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1269639060
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.933254424




Total test records in report: 1022
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/26.sram_ctrl_multiple_keys.1236726246 Jul 13 04:40:54 PM PDT 24 Jul 13 04:48:21 PM PDT 24 7251841740 ps
T2 /workspace/coverage/default/38.sram_ctrl_ram_cfg.2359663865 Jul 13 04:41:21 PM PDT 24 Jul 13 04:41:23 PM PDT 24 78873995 ps
T3 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4163905396 Jul 13 04:41:19 PM PDT 24 Jul 13 04:46:32 PM PDT 24 11540373296 ps
T4 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3341059718 Jul 13 04:41:30 PM PDT 24 Jul 13 04:47:52 PM PDT 24 2258988091 ps
T11 /workspace/coverage/default/38.sram_ctrl_bijection.394747622 Jul 13 04:41:31 PM PDT 24 Jul 13 04:42:41 PM PDT 24 1115613039 ps
T12 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.4118143243 Jul 13 04:40:16 PM PDT 24 Jul 13 04:44:10 PM PDT 24 2555081241 ps
T5 /workspace/coverage/default/46.sram_ctrl_partial_access.2149346856 Jul 13 04:42:16 PM PDT 24 Jul 13 04:42:30 PM PDT 24 1455582678 ps
T13 /workspace/coverage/default/33.sram_ctrl_ram_cfg.2046256901 Jul 13 04:41:05 PM PDT 24 Jul 13 04:41:06 PM PDT 24 74808499 ps
T6 /workspace/coverage/default/45.sram_ctrl_max_throughput.1299155018 Jul 13 04:41:53 PM PDT 24 Jul 13 04:42:26 PM PDT 24 188381928 ps
T14 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.2868265814 Jul 13 04:41:12 PM PDT 24 Jul 13 04:53:16 PM PDT 24 5334706936 ps
T38 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1313519658 Jul 13 04:40:36 PM PDT 24 Jul 13 04:41:02 PM PDT 24 96565197 ps
T39 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2847221694 Jul 13 04:40:55 PM PDT 24 Jul 13 04:41:02 PM PDT 24 852036491 ps
T20 /workspace/coverage/default/29.sram_ctrl_regwen.2211397545 Jul 13 04:40:58 PM PDT 24 Jul 13 05:12:51 PM PDT 24 82807364142 ps
T43 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.741428972 Jul 13 04:40:53 PM PDT 24 Jul 13 04:40:58 PM PDT 24 208509108 ps
T66 /workspace/coverage/default/4.sram_ctrl_max_throughput.1683018281 Jul 13 04:39:52 PM PDT 24 Jul 13 04:42:17 PM PDT 24 135199956 ps
T24 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.3059581954 Jul 13 04:40:51 PM PDT 24 Jul 13 04:40:57 PM PDT 24 145736263 ps
T48 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.1836483905 Jul 13 04:40:11 PM PDT 24 Jul 13 04:40:18 PM PDT 24 391714517 ps
T67 /workspace/coverage/default/5.sram_ctrl_smoke.2244990063 Jul 13 04:40:03 PM PDT 24 Jul 13 04:40:18 PM PDT 24 2493043209 ps
T21 /workspace/coverage/default/13.sram_ctrl_stress_all.2059419952 Jul 13 04:40:18 PM PDT 24 Jul 13 05:06:50 PM PDT 24 95544293899 ps
T68 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3247000887 Jul 13 04:40:39 PM PDT 24 Jul 13 04:41:39 PM PDT 24 800347464 ps
T25 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2499782420 Jul 13 04:42:12 PM PDT 24 Jul 13 04:42:36 PM PDT 24 2676298106 ps
T69 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1269639060 Jul 13 04:40:15 PM PDT 24 Jul 13 04:43:13 PM PDT 24 1697339020 ps
T26 /workspace/coverage/default/3.sram_ctrl_ram_cfg.4294183433 Jul 13 04:40:05 PM PDT 24 Jul 13 04:40:06 PM PDT 24 94124940 ps
T79 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3275373314 Jul 13 04:40:13 PM PDT 24 Jul 13 04:57:21 PM PDT 24 2574031025 ps
T119 /workspace/coverage/default/37.sram_ctrl_multiple_keys.1398421927 Jul 13 04:41:41 PM PDT 24 Jul 13 04:54:53 PM PDT 24 2068086840 ps
T144 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.828971748 Jul 13 04:41:52 PM PDT 24 Jul 13 04:43:54 PM PDT 24 273674154 ps
T140 /workspace/coverage/default/2.sram_ctrl_bijection.3702296316 Jul 13 04:40:21 PM PDT 24 Jul 13 04:41:03 PM PDT 24 10872829596 ps
T40 /workspace/coverage/default/44.sram_ctrl_mem_walk.1505001832 Jul 13 04:41:43 PM PDT 24 Jul 13 04:41:56 PM PDT 24 2623474283 ps
T22 /workspace/coverage/default/10.sram_ctrl_stress_all.1240799372 Jul 13 04:40:10 PM PDT 24 Jul 13 06:12:35 PM PDT 24 13727165737 ps
T145 /workspace/coverage/default/20.sram_ctrl_ram_cfg.663593403 Jul 13 04:40:22 PM PDT 24 Jul 13 04:40:25 PM PDT 24 29133816 ps
T41 /workspace/coverage/default/5.sram_ctrl_multiple_keys.2620597164 Jul 13 04:39:55 PM PDT 24 Jul 13 04:46:24 PM PDT 24 2163158571 ps
T146 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2817494740 Jul 13 04:41:59 PM PDT 24 Jul 13 04:42:06 PM PDT 24 60764905 ps
T147 /workspace/coverage/default/46.sram_ctrl_max_throughput.3496521962 Jul 13 04:41:57 PM PDT 24 Jul 13 04:43:59 PM PDT 24 512262900 ps
T148 /workspace/coverage/default/15.sram_ctrl_max_throughput.2321479035 Jul 13 04:40:11 PM PDT 24 Jul 13 04:40:35 PM PDT 24 86239179 ps
T7 /workspace/coverage/default/29.sram_ctrl_lc_escalation.534532582 Jul 13 04:41:14 PM PDT 24 Jul 13 04:41:26 PM PDT 24 663832686 ps
T80 /workspace/coverage/default/7.sram_ctrl_smoke.224137654 Jul 13 04:40:04 PM PDT 24 Jul 13 04:40:26 PM PDT 24 330135636 ps
T81 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.2530134766 Jul 13 04:39:55 PM PDT 24 Jul 13 04:44:02 PM PDT 24 9746009059 ps
T15 /workspace/coverage/default/1.sram_ctrl_alert_test.605562090 Jul 13 04:39:57 PM PDT 24 Jul 13 04:39:59 PM PDT 24 15642783 ps
T143 /workspace/coverage/default/19.sram_ctrl_bijection.181212920 Jul 13 04:40:48 PM PDT 24 Jul 13 04:41:21 PM PDT 24 1402481902 ps
T149 /workspace/coverage/default/40.sram_ctrl_bijection.520786932 Jul 13 04:41:25 PM PDT 24 Jul 13 04:42:12 PM PDT 24 756177913 ps
T150 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.4276578440 Jul 13 04:39:57 PM PDT 24 Jul 13 04:40:48 PM PDT 24 622803166 ps
T42 /workspace/coverage/default/21.sram_ctrl_executable.4274207203 Jul 13 04:40:33 PM PDT 24 Jul 13 04:53:21 PM PDT 24 43169117546 ps
T98 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.1657790963 Jul 13 04:40:47 PM PDT 24 Jul 13 04:44:35 PM PDT 24 4537747762 ps
T151 /workspace/coverage/default/4.sram_ctrl_ram_cfg.1800171451 Jul 13 04:40:05 PM PDT 24 Jul 13 04:40:08 PM PDT 24 195098511 ps
T152 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1118797850 Jul 13 04:41:04 PM PDT 24 Jul 13 04:41:21 PM PDT 24 126353088 ps
T153 /workspace/coverage/default/40.sram_ctrl_smoke.3671732529 Jul 13 04:41:49 PM PDT 24 Jul 13 04:41:57 PM PDT 24 119502846 ps
T154 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.558179976 Jul 13 04:40:22 PM PDT 24 Jul 13 04:40:46 PM PDT 24 100272536 ps
T142 /workspace/coverage/default/25.sram_ctrl_bijection.537173021 Jul 13 04:40:46 PM PDT 24 Jul 13 04:41:09 PM PDT 24 313455168 ps
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T158 /workspace/coverage/default/20.sram_ctrl_alert_test.1322623102 Jul 13 04:40:34 PM PDT 24 Jul 13 04:40:37 PM PDT 24 48299269 ps
T159 /workspace/coverage/default/38.sram_ctrl_max_throughput.3997542125 Jul 13 04:41:17 PM PDT 24 Jul 13 04:43:51 PM PDT 24 203591777 ps
T100 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2068182563 Jul 13 04:40:07 PM PDT 24 Jul 13 04:47:23 PM PDT 24 15993025995 ps
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T161 /workspace/coverage/default/48.sram_ctrl_ram_cfg.3701968136 Jul 13 04:41:56 PM PDT 24 Jul 13 04:41:58 PM PDT 24 113287263 ps
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T101 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2243052466 Jul 13 04:40:42 PM PDT 24 Jul 13 04:46:37 PM PDT 24 13584300688 ps
T168 /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2385728337 Jul 13 04:41:17 PM PDT 24 Jul 13 04:41:36 PM PDT 24 78586660 ps
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T10 /workspace/coverage/default/1.sram_ctrl_sec_cm.661413608 Jul 13 04:39:44 PM PDT 24 Jul 13 04:39:50 PM PDT 24 3969958330 ps
T29 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3550299815 Jul 13 04:39:42 PM PDT 24 Jul 13 04:58:12 PM PDT 24 6266898269 ps
T30 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.925790304 Jul 13 04:39:59 PM PDT 24 Jul 13 05:06:10 PM PDT 24 3708093040 ps
T31 /workspace/coverage/default/15.sram_ctrl_smoke.3432900385 Jul 13 04:40:20 PM PDT 24 Jul 13 04:40:31 PM PDT 24 362238727 ps
T32 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.938882361 Jul 13 04:41:31 PM PDT 24 Jul 13 04:47:57 PM PDT 24 4064442129 ps
T33 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.1954681574 Jul 13 04:39:58 PM PDT 24 Jul 13 04:40:04 PM PDT 24 258439150 ps
T34 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.3221368483 Jul 13 04:40:37 PM PDT 24 Jul 13 04:40:41 PM PDT 24 115517017 ps
T35 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.1261454371 Jul 13 04:40:13 PM PDT 24 Jul 13 04:41:57 PM PDT 24 830716846 ps
T36 /workspace/coverage/default/30.sram_ctrl_bijection.2342640769 Jul 13 04:40:57 PM PDT 24 Jul 13 04:41:50 PM PDT 24 789377419 ps
T37 /workspace/coverage/default/2.sram_ctrl_stress_all.3772626026 Jul 13 04:39:53 PM PDT 24 Jul 13 06:18:01 PM PDT 24 81121606375 ps
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T170 /workspace/coverage/default/28.sram_ctrl_executable.4283976756 Jul 13 04:40:58 PM PDT 24 Jul 13 04:53:48 PM PDT 24 20023424884 ps
T171 /workspace/coverage/default/12.sram_ctrl_multiple_keys.3794535249 Jul 13 04:40:16 PM PDT 24 Jul 13 04:45:43 PM PDT 24 17595356503 ps
T9 /workspace/coverage/default/18.sram_ctrl_lc_escalation.1488179665 Jul 13 04:40:34 PM PDT 24 Jul 13 04:40:37 PM PDT 24 501428024 ps
T49 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.3334150549 Jul 13 04:41:18 PM PDT 24 Jul 13 04:42:04 PM PDT 24 2360197091 ps
T172 /workspace/coverage/default/42.sram_ctrl_stress_all.1897933877 Jul 13 04:41:30 PM PDT 24 Jul 13 04:43:21 PM PDT 24 19102159483 ps
T173 /workspace/coverage/default/5.sram_ctrl_regwen.1472281763 Jul 13 04:40:02 PM PDT 24 Jul 13 04:53:35 PM PDT 24 22140471281 ps
T54 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.1110501224 Jul 13 04:41:01 PM PDT 24 Jul 13 04:41:06 PM PDT 24 115207618 ps
T174 /workspace/coverage/default/49.sram_ctrl_bijection.159162281 Jul 13 04:42:43 PM PDT 24 Jul 13 04:43:36 PM PDT 24 891329491 ps
T175 /workspace/coverage/default/25.sram_ctrl_partial_access.2217980917 Jul 13 04:40:47 PM PDT 24 Jul 13 04:43:14 PM PDT 24 772307977 ps
T176 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.707613803 Jul 13 04:40:24 PM PDT 24 Jul 13 04:45:16 PM PDT 24 8227450603 ps
T177 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.1038642578 Jul 13 04:40:38 PM PDT 24 Jul 13 04:40:42 PM PDT 24 164671958 ps
T178 /workspace/coverage/default/1.sram_ctrl_mem_walk.2277226294 Jul 13 04:39:52 PM PDT 24 Jul 13 04:39:58 PM PDT 24 950395271 ps
T179 /workspace/coverage/default/23.sram_ctrl_bijection.299917477 Jul 13 04:40:40 PM PDT 24 Jul 13 04:41:37 PM PDT 24 2660326681 ps
T180 /workspace/coverage/default/7.sram_ctrl_bijection.3087799385 Jul 13 04:39:57 PM PDT 24 Jul 13 04:41:06 PM PDT 24 2315381446 ps
T62 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3600370732 Jul 13 04:40:22 PM PDT 24 Jul 13 04:43:29 PM PDT 24 699685471 ps
T55 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.392377367 Jul 13 04:40:47 PM PDT 24 Jul 13 04:40:55 PM PDT 24 199241841 ps
T23 /workspace/coverage/default/36.sram_ctrl_stress_all.3704337681 Jul 13 04:41:14 PM PDT 24 Jul 13 05:11:12 PM PDT 24 23295568069 ps
T181 /workspace/coverage/default/19.sram_ctrl_ram_cfg.3311252089 Jul 13 04:40:42 PM PDT 24 Jul 13 04:40:44 PM PDT 24 84794094 ps
T182 /workspace/coverage/default/28.sram_ctrl_bijection.882551123 Jul 13 04:40:48 PM PDT 24 Jul 13 04:41:31 PM PDT 24 7878165304 ps
T183 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.4226792557 Jul 13 04:40:09 PM PDT 24 Jul 13 04:46:49 PM PDT 24 6320395445 ps
T184 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2398137899 Jul 13 04:40:07 PM PDT 24 Jul 13 04:42:39 PM PDT 24 636856151 ps
T185 /workspace/coverage/default/44.sram_ctrl_max_throughput.3521763936 Jul 13 04:41:39 PM PDT 24 Jul 13 04:44:20 PM PDT 24 651061649 ps
T186 /workspace/coverage/default/29.sram_ctrl_multiple_keys.2128351575 Jul 13 04:40:53 PM PDT 24 Jul 13 04:41:50 PM PDT 24 810601404 ps
T187 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2953005921 Jul 13 04:39:58 PM PDT 24 Jul 13 04:48:04 PM PDT 24 74781689135 ps
T188 /workspace/coverage/default/24.sram_ctrl_regwen.2190923680 Jul 13 04:41:05 PM PDT 24 Jul 13 04:56:15 PM PDT 24 10422127936 ps
T189 /workspace/coverage/default/25.sram_ctrl_ram_cfg.922240699 Jul 13 04:40:48 PM PDT 24 Jul 13 04:40:51 PM PDT 24 31839345 ps
T134 /workspace/coverage/default/3.sram_ctrl_stress_all.178533093 Jul 13 04:39:57 PM PDT 24 Jul 13 04:59:19 PM PDT 24 20015318235 ps
T190 /workspace/coverage/default/39.sram_ctrl_regwen.1109955846 Jul 13 04:41:21 PM PDT 24 Jul 13 04:56:55 PM PDT 24 29829095579 ps
T191 /workspace/coverage/default/1.sram_ctrl_lc_escalation.2186246123 Jul 13 04:39:36 PM PDT 24 Jul 13 04:39:43 PM PDT 24 2205118611 ps
T192 /workspace/coverage/default/35.sram_ctrl_regwen.1349681773 Jul 13 04:41:03 PM PDT 24 Jul 13 04:59:44 PM PDT 24 47801614380 ps
T193 /workspace/coverage/default/19.sram_ctrl_partial_access.4027180641 Jul 13 04:40:21 PM PDT 24 Jul 13 04:40:29 PM PDT 24 325697853 ps
T120 /workspace/coverage/default/39.sram_ctrl_lc_escalation.2070940102 Jul 13 04:41:50 PM PDT 24 Jul 13 04:41:52 PM PDT 24 176982696 ps
T194 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2799673497 Jul 13 04:42:10 PM PDT 24 Jul 13 04:42:21 PM PDT 24 332036458 ps
T195 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.3161127595 Jul 13 04:41:20 PM PDT 24 Jul 13 04:46:10 PM PDT 24 7047034059 ps
T196 /workspace/coverage/default/38.sram_ctrl_alert_test.3852064103 Jul 13 04:41:28 PM PDT 24 Jul 13 04:41:29 PM PDT 24 15814988 ps
T139 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1452038013 Jul 13 04:42:12 PM PDT 24 Jul 13 04:48:49 PM PDT 24 32375317026 ps
T197 /workspace/coverage/default/48.sram_ctrl_smoke.4025279407 Jul 13 04:41:55 PM PDT 24 Jul 13 04:42:06 PM PDT 24 2261561758 ps
T102 /workspace/coverage/default/21.sram_ctrl_alert_test.1343547707 Jul 13 04:40:45 PM PDT 24 Jul 13 04:40:46 PM PDT 24 20968077 ps
T103 /workspace/coverage/default/27.sram_ctrl_smoke.3936130262 Jul 13 04:40:43 PM PDT 24 Jul 13 04:41:03 PM PDT 24 7149107089 ps
T104 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.1158317979 Jul 13 04:39:54 PM PDT 24 Jul 13 04:43:16 PM PDT 24 2116791983 ps
T105 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.1632017114 Jul 13 04:40:55 PM PDT 24 Jul 13 04:40:57 PM PDT 24 113632542 ps
T106 /workspace/coverage/default/27.sram_ctrl_mem_walk.2581383139 Jul 13 04:40:49 PM PDT 24 Jul 13 04:41:02 PM PDT 24 1171784665 ps
T107 /workspace/coverage/default/14.sram_ctrl_ram_cfg.974223746 Jul 13 04:40:12 PM PDT 24 Jul 13 04:40:17 PM PDT 24 78962695 ps
T108 /workspace/coverage/default/22.sram_ctrl_max_throughput.456231189 Jul 13 04:40:40 PM PDT 24 Jul 13 04:41:25 PM PDT 24 446163498 ps
T109 /workspace/coverage/default/37.sram_ctrl_partial_access.3364606157 Jul 13 04:41:16 PM PDT 24 Jul 13 04:41:56 PM PDT 24 251826889 ps
T110 /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2917515752 Jul 13 04:41:30 PM PDT 24 Jul 13 04:45:34 PM PDT 24 5033671431 ps
T111 /workspace/coverage/default/13.sram_ctrl_regwen.2710435968 Jul 13 04:40:32 PM PDT 24 Jul 13 04:42:54 PM PDT 24 1426316881 ps
T198 /workspace/coverage/default/10.sram_ctrl_smoke.2945916501 Jul 13 04:40:13 PM PDT 24 Jul 13 04:40:54 PM PDT 24 128237454 ps
T199 /workspace/coverage/default/23.sram_ctrl_max_throughput.1623968025 Jul 13 04:40:39 PM PDT 24 Jul 13 04:40:43 PM PDT 24 153650099 ps
T200 /workspace/coverage/default/16.sram_ctrl_ram_cfg.3524067051 Jul 13 04:40:30 PM PDT 24 Jul 13 04:40:31 PM PDT 24 50090262 ps
T201 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3313284413 Jul 13 04:40:08 PM PDT 24 Jul 13 04:49:32 PM PDT 24 99586620285 ps
T136 /workspace/coverage/default/24.sram_ctrl_stress_all.3301980101 Jul 13 04:40:47 PM PDT 24 Jul 13 05:30:21 PM PDT 24 36768686485 ps
T202 /workspace/coverage/default/33.sram_ctrl_alert_test.3567033907 Jul 13 04:41:14 PM PDT 24 Jul 13 04:41:17 PM PDT 24 83622047 ps
T203 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1294246105 Jul 13 04:40:14 PM PDT 24 Jul 13 04:40:24 PM PDT 24 145037606 ps
T204 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2093841134 Jul 13 04:40:03 PM PDT 24 Jul 13 04:47:20 PM PDT 24 17069723667 ps
T205 /workspace/coverage/default/32.sram_ctrl_bijection.3297560921 Jul 13 04:41:09 PM PDT 24 Jul 13 04:41:58 PM PDT 24 764112982 ps
T206 /workspace/coverage/default/28.sram_ctrl_max_throughput.527743396 Jul 13 04:40:50 PM PDT 24 Jul 13 04:40:53 PM PDT 24 72880337 ps
T207 /workspace/coverage/default/43.sram_ctrl_lc_escalation.274965603 Jul 13 04:41:40 PM PDT 24 Jul 13 04:41:48 PM PDT 24 600645389 ps
T208 /workspace/coverage/default/47.sram_ctrl_max_throughput.61238153 Jul 13 04:41:56 PM PDT 24 Jul 13 04:42:27 PM PDT 24 128164697 ps
T209 /workspace/coverage/default/1.sram_ctrl_bijection.3527384452 Jul 13 04:39:27 PM PDT 24 Jul 13 04:40:12 PM PDT 24 4833621949 ps
T210 /workspace/coverage/default/14.sram_ctrl_executable.1338095176 Jul 13 04:40:12 PM PDT 24 Jul 13 04:44:19 PM PDT 24 32305088824 ps
T211 /workspace/coverage/default/21.sram_ctrl_lc_escalation.3229779951 Jul 13 04:40:37 PM PDT 24 Jul 13 04:40:43 PM PDT 24 847531789 ps
T212 /workspace/coverage/default/38.sram_ctrl_mem_walk.781842809 Jul 13 04:41:32 PM PDT 24 Jul 13 04:41:44 PM PDT 24 1839605734 ps
T213 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.467181476 Jul 13 04:39:56 PM PDT 24 Jul 13 04:40:03 PM PDT 24 161932476 ps
T214 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1992397191 Jul 13 04:39:27 PM PDT 24 Jul 13 04:40:10 PM PDT 24 227663465 ps
T215 /workspace/coverage/default/6.sram_ctrl_partial_access.1836448906 Jul 13 04:40:07 PM PDT 24 Jul 13 04:40:21 PM PDT 24 968833567 ps
T216 /workspace/coverage/default/2.sram_ctrl_mem_walk.2331968968 Jul 13 04:40:00 PM PDT 24 Jul 13 04:40:11 PM PDT 24 458899940 ps
T217 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.1808497347 Jul 13 04:40:05 PM PDT 24 Jul 13 04:43:39 PM PDT 24 8340802474 ps
T89 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.3081728355 Jul 13 04:41:30 PM PDT 24 Jul 13 04:41:36 PM PDT 24 336851885 ps
T63 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2290432034 Jul 13 04:40:46 PM PDT 24 Jul 13 04:41:32 PM PDT 24 2891517761 ps
T218 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.1724449752 Jul 13 04:40:19 PM PDT 24 Jul 13 04:47:15 PM PDT 24 1373602668 ps
T219 /workspace/coverage/default/20.sram_ctrl_multiple_keys.444800203 Jul 13 04:40:41 PM PDT 24 Jul 13 04:53:50 PM PDT 24 35747346552 ps
T220 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.107478458 Jul 13 04:40:10 PM PDT 24 Jul 13 04:55:17 PM PDT 24 13795401223 ps
T221 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.1405206906 Jul 13 04:41:15 PM PDT 24 Jul 13 04:48:26 PM PDT 24 777259032 ps
T222 /workspace/coverage/default/27.sram_ctrl_stress_all.2459283465 Jul 13 04:40:48 PM PDT 24 Jul 13 05:58:47 PM PDT 24 204498178143 ps
T223 /workspace/coverage/default/6.sram_ctrl_alert_test.3906374162 Jul 13 04:40:08 PM PDT 24 Jul 13 04:40:10 PM PDT 24 25929318 ps
T224 /workspace/coverage/default/36.sram_ctrl_bijection.2013618283 Jul 13 04:41:53 PM PDT 24 Jul 13 04:42:10 PM PDT 24 926152813 ps
T225 /workspace/coverage/default/0.sram_ctrl_executable.1611315277 Jul 13 04:39:41 PM PDT 24 Jul 13 05:03:51 PM PDT 24 19312209606 ps
T226 /workspace/coverage/default/34.sram_ctrl_ram_cfg.3473417953 Jul 13 04:41:03 PM PDT 24 Jul 13 04:41:04 PM PDT 24 334898277 ps
T227 /workspace/coverage/default/38.sram_ctrl_executable.1225791941 Jul 13 04:41:15 PM PDT 24 Jul 13 05:03:20 PM PDT 24 47486043980 ps
T228 /workspace/coverage/default/45.sram_ctrl_partial_access.1759624440 Jul 13 04:41:53 PM PDT 24 Jul 13 04:41:55 PM PDT 24 55163031 ps
T229 /workspace/coverage/default/3.sram_ctrl_max_throughput.1269715529 Jul 13 04:39:55 PM PDT 24 Jul 13 04:41:59 PM PDT 24 506605841 ps
T137 /workspace/coverage/default/44.sram_ctrl_executable.2230525583 Jul 13 04:41:57 PM PDT 24 Jul 13 05:06:52 PM PDT 24 92430852718 ps
T230 /workspace/coverage/default/3.sram_ctrl_lc_escalation.2174744412 Jul 13 04:39:43 PM PDT 24 Jul 13 04:39:50 PM PDT 24 1876855332 ps
T231 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.4107438544 Jul 13 04:40:57 PM PDT 24 Jul 13 04:46:35 PM PDT 24 2218476199 ps
T232 /workspace/coverage/default/0.sram_ctrl_stress_all.255738669 Jul 13 04:40:21 PM PDT 24 Jul 13 05:03:13 PM PDT 24 20635989251 ps
T233 /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.1719203949 Jul 13 04:41:17 PM PDT 24 Jul 13 04:47:29 PM PDT 24 28712682819 ps
T234 /workspace/coverage/default/40.sram_ctrl_max_throughput.2446328700 Jul 13 04:41:31 PM PDT 24 Jul 13 04:42:33 PM PDT 24 644683477 ps
T235 /workspace/coverage/default/3.sram_ctrl_bijection.2879994954 Jul 13 04:39:52 PM PDT 24 Jul 13 04:40:15 PM PDT 24 3374166365 ps
T236 /workspace/coverage/default/11.sram_ctrl_executable.1957660166 Jul 13 04:40:27 PM PDT 24 Jul 13 04:52:25 PM PDT 24 24155248177 ps
T237 /workspace/coverage/default/15.sram_ctrl_mem_walk.159609684 Jul 13 04:40:21 PM PDT 24 Jul 13 04:40:35 PM PDT 24 928345271 ps
T45 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2484537710 Jul 13 04:41:47 PM PDT 24 Jul 13 04:42:45 PM PDT 24 1466677481 ps
T238 /workspace/coverage/default/24.sram_ctrl_executable.2631077281 Jul 13 04:40:47 PM PDT 24 Jul 13 04:41:14 PM PDT 24 1613040856 ps
T239 /workspace/coverage/default/16.sram_ctrl_mem_walk.2292459647 Jul 13 04:40:14 PM PDT 24 Jul 13 04:40:24 PM PDT 24 198800581 ps
T240 /workspace/coverage/default/44.sram_ctrl_smoke.3675959599 Jul 13 04:41:39 PM PDT 24 Jul 13 04:41:57 PM PDT 24 82727108 ps
T241 /workspace/coverage/default/37.sram_ctrl_alert_test.1781651582 Jul 13 04:42:05 PM PDT 24 Jul 13 04:42:06 PM PDT 24 44984230 ps
T242 /workspace/coverage/default/8.sram_ctrl_regwen.491715976 Jul 13 04:40:06 PM PDT 24 Jul 13 05:01:43 PM PDT 24 60064544699 ps
T243 /workspace/coverage/default/14.sram_ctrl_bijection.1468927996 Jul 13 04:40:12 PM PDT 24 Jul 13 04:40:32 PM PDT 24 1880786208 ps
T244 /workspace/coverage/default/33.sram_ctrl_max_throughput.1067514186 Jul 13 04:41:17 PM PDT 24 Jul 13 04:42:25 PM PDT 24 223313868 ps
T245 /workspace/coverage/default/36.sram_ctrl_smoke.3180236747 Jul 13 04:41:41 PM PDT 24 Jul 13 04:41:59 PM PDT 24 3244631190 ps
T246 /workspace/coverage/default/32.sram_ctrl_regwen.4214296108 Jul 13 04:41:00 PM PDT 24 Jul 13 04:48:47 PM PDT 24 901718147 ps
T247 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.1356742285 Jul 13 04:41:38 PM PDT 24 Jul 13 04:41:42 PM PDT 24 104363690 ps
T248 /workspace/coverage/default/32.sram_ctrl_ram_cfg.1956482379 Jul 13 04:41:06 PM PDT 24 Jul 13 04:41:07 PM PDT 24 45683707 ps
T249 /workspace/coverage/default/18.sram_ctrl_bijection.4171274021 Jul 13 04:40:36 PM PDT 24 Jul 13 04:41:06 PM PDT 24 1745802147 ps
T250 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.4002032363 Jul 13 04:40:53 PM PDT 24 Jul 13 04:42:19 PM PDT 24 161851992 ps
T251 /workspace/coverage/default/3.sram_ctrl_smoke.265659189 Jul 13 04:40:06 PM PDT 24 Jul 13 04:40:25 PM PDT 24 10310863007 ps
T252 /workspace/coverage/default/17.sram_ctrl_lc_escalation.415736073 Jul 13 04:40:13 PM PDT 24 Jul 13 04:40:24 PM PDT 24 281364807 ps
T253 /workspace/coverage/default/42.sram_ctrl_max_throughput.321354412 Jul 13 04:41:37 PM PDT 24 Jul 13 04:43:41 PM PDT 24 267645813 ps
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T295 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.3934400696 Jul 13 04:41:10 PM PDT 24 Jul 13 04:48:09 PM PDT 24 27471286123 ps
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T298 /workspace/coverage/default/32.sram_ctrl_partial_access.544517426 Jul 13 04:41:18 PM PDT 24 Jul 13 04:41:36 PM PDT 24 1315668917 ps
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T300 /workspace/coverage/default/42.sram_ctrl_lc_escalation.510929284 Jul 13 04:41:30 PM PDT 24 Jul 13 04:41:36 PM PDT 24 1751773933 ps
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T302 /workspace/coverage/default/17.sram_ctrl_alert_test.477998052 Jul 13 04:40:43 PM PDT 24 Jul 13 04:40:45 PM PDT 24 15500155 ps
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