Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13454387	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

59221192

1

T1

24576

T2

770980

T3

99412

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	36239936	1			T1	12288		T2	424610		T3	54674
values[0x0]	16873555	1			T1	6137		T2	204060		T3	26144
values[0x1]	19562088	1			T1	6151		T2	219583		T3	28381

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6706640	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

65968939

1

T1

24576

T2

809774

T3

104299

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	276885	1			T1	90		T2	7743		T3	396
valid_sources[0x01]	238820	1			T1	52		T2	1610		T3	320
valid_sources[0x02]	318399	1			T1	155		T2	1785		T3	417
valid_sources[0x03]	336644	1			T1	67		T2	1567		T3	404
valid_sources[0x04]	300313	1			T1	162		T2	1774		T3	492
valid_sources[0x05]	299872	1			T1	38		T2	1734		T3	448
valid_sources[0x06]	380462	1			T1	54		T2	1871		T3	472
valid_sources[0x07]	250566	1			T1	64		T2	1676		T3	351
valid_sources[0x08]	271684	1			T1	59		T2	1805		T3	363
valid_sources[0x09]	249733	1			T1	77		T2	1726		T3	480
valid_sources[0x0a]	252482	1			T1	98		T2	1729		T3	425
valid_sources[0x0b]	251347	1			T1	79		T2	1650		T3	478
valid_sources[0x0c]	264173	1			T1	171		T2	1709		T3	441
valid_sources[0x0d]	270696	1			T1	128		T2	1650		T3	435
valid_sources[0x0e]	265380	1			T1	69		T2	1747		T3	458
valid_sources[0x0f]	238858	1			T1	117		T2	1594		T3	471
valid_sources[0x10]	270805	1			T1	86		T2	1646		T3	440
valid_sources[0x11]	284110	1			T1	184		T2	1835		T3	407
valid_sources[0x12]	311366	1			T1	141		T2	9814		T3	448
valid_sources[0x13]	279590	1			T1	55		T2	1827		T3	474
valid_sources[0x14]	359041	1			T1	72		T2	1916		T3	444
valid_sources[0x15]	299853	1			T1	129		T2	1704		T3	390
valid_sources[0x16]	242581	1			T1	12		T2	1853		T3	481
valid_sources[0x17]	284578	1			T1	92		T2	1927		T3	401
valid_sources[0x18]	269551	1			T1	67		T2	1524		T3	384
valid_sources[0x19]	269282	1			T1	102		T2	1817		T3	394
valid_sources[0x1a]	269101	1			T1	170		T2	1739		T3	477
valid_sources[0x1b]	301718	1			T1	69		T2	1755		T3	463
valid_sources[0x1c]	265617	1			T1	168		T2	1591		T3	434
valid_sources[0x1d]	353853	1			T1	120		T2	15959		T3	379
valid_sources[0x1e]	260805	1			T1	133		T2	1698		T3	466
valid_sources[0x1f]	271148	1			T1	39		T2	1610		T3	359
valid_sources[0x20]	245332	1			T1	15		T2	1817		T3	436
valid_sources[0x21]	271794	1			T1	45		T2	1901		T3	467
valid_sources[0x22]	314907	1			T1	68		T2	1684		T3	376
valid_sources[0x23]	249785	1			T1	73		T2	1780		T3	422
valid_sources[0x24]	283163	1			T1	32		T2	1869		T3	396
valid_sources[0x25]	256405	1			T1	88		T2	1853		T3	460
valid_sources[0x26]	279958	1			T1	95		T2	1557		T3	442
valid_sources[0x27]	248587	1			T1	83		T2	1734		T3	464
valid_sources[0x28]	298668	1			T1	91		T2	1784		T3	407
valid_sources[0x29]	313823	1			T1	65		T2	9857		T3	412
valid_sources[0x2a]	242350	1			T1	82		T2	1800		T3	412
valid_sources[0x2b]	286605	1			T1	38		T2	1600		T3	439
valid_sources[0x2c]	276905	1			T1	88		T2	1649		T3	463
valid_sources[0x2d]	279284	1			T1	59		T2	1582		T3	382
valid_sources[0x2e]	301656	1			T1	56		T2	1638		T3	515
valid_sources[0x2f]	280802	1			T1	169		T2	6490		T3	372
valid_sources[0x30]	256717	1			T1	134		T2	1618		T3	438
valid_sources[0x31]	356482	1			T1	74		T2	49532		T3	461
valid_sources[0x32]	263272	1			T1	105		T2	2030		T3	471
valid_sources[0x33]	296997	1			T1	142		T2	7459		T3	439
valid_sources[0x34]	310915	1			T1	136		T2	1833		T3	427
valid_sources[0x35]	288756	1			T1	110		T2	1676		T3	477
valid_sources[0x36]	319251	1			T1	70		T2	1678		T3	387
valid_sources[0x37]	333546	1			T1	77		T2	19186		T3	426
valid_sources[0x38]	266868	1			T1	93		T2	1868		T3	420
valid_sources[0x39]	257127	1			T1	98		T2	1941		T3	448
valid_sources[0x3a]	316946	1			T1	181		T2	1792		T3	428
valid_sources[0x3b]	282081	1			T1	85		T2	1670		T3	466
valid_sources[0x3c]	260257	1			T1	116		T2	2020		T3	407
valid_sources[0x3d]	315886	1			T1	114		T2	6270		T3	426
valid_sources[0x3e]	243309	1			T1	82		T2	1901		T3	368
valid_sources[0x3f]	317233	1			T1	82		T2	1903		T3	452
valid_sources[0x40]	270691	1			T1	105		T2	2006		T3	447
valid_sources[0x41]	276150	1			T1	134		T2	1856		T3	383
valid_sources[0x42]	308124	1			T1	84		T2	11767		T3	465
valid_sources[0x43]	271392	1			T1	100		T2	1657		T3	469
valid_sources[0x44]	248700	1			T1	138		T2	1659		T3	426
valid_sources[0x45]	289348	1			T1	188		T2	1902		T3	466
valid_sources[0x46]	276976	1			T1	95		T2	35646		T3	427
valid_sources[0x47]	256940	1			T1	111		T2	1584		T3	413
valid_sources[0x48]	261468	1			T1	88		T2	1592		T3	485
valid_sources[0x49]	255204	1			T1	144		T2	1873		T3	467
valid_sources[0x4a]	259790	1			T1	105		T2	1834		T3	392
valid_sources[0x4b]	258800	1			T1	51		T2	1725		T3	449
valid_sources[0x4c]	287226	1			T1	20		T2	1817		T3	439
valid_sources[0x4d]	264715	1			T1	136		T2	1753		T3	516
valid_sources[0x4e]	253658	1			T1	170		T2	11657		T3	420
valid_sources[0x4f]	325550	1			T1	164		T2	1637		T3	454
valid_sources[0x50]	286840	1			T1	87		T2	1721		T3	500
valid_sources[0x51]	299524	1			T1	96		T2	1715		T3	387
valid_sources[0x52]	279382	1			T1	50		T2	1828		T3	441
valid_sources[0x53]	273542	1			T1	137		T2	1554		T3	426
valid_sources[0x54]	253460	1			T1	127		T2	1562		T3	399
valid_sources[0x55]	269221	1			T1	148		T2	1669		T3	426
valid_sources[0x56]	267640	1			T1	177		T2	1699		T3	430
valid_sources[0x57]	260499	1			T1	93		T2	1967		T3	418
valid_sources[0x58]	305560	1			T1	78		T2	1807		T3	395
valid_sources[0x59]	278714	1			T1	73		T2	1870		T3	436
valid_sources[0x5a]	274076	1			T1	83		T2	1681		T3	357
valid_sources[0x5b]	272994	1			T1	59		T2	1570		T3	422
valid_sources[0x5c]	260344	1			T1	85		T2	1595		T3	359
valid_sources[0x5d]	318466	1			T1	62		T2	1669		T3	371
valid_sources[0x5e]	241361	1			T1	90		T2	1889		T3	376
valid_sources[0x5f]	262239	1			T1	64		T2	1974		T3	363
valid_sources[0x60]	305519	1			T1	122		T2	2049		T3	445
valid_sources[0x61]	300456	1			T1	87		T2	1808		T3	430
valid_sources[0x62]	285133	1			T1	169		T2	1712		T3	429
valid_sources[0x63]	238952	1			T1	82		T2	1864		T3	356
valid_sources[0x64]	306872	1			T1	117		T2	11796		T3	416
valid_sources[0x65]	293600	1			T1	98		T2	1710		T3	396
valid_sources[0x66]	288073	1			T1	105		T2	1689		T3	420
valid_sources[0x67]	280455	1			T1	101		T2	1548		T3	439
valid_sources[0x68]	428350	1			T1	136		T2	1753		T3	435
valid_sources[0x69]	244575	1			T1	93		T2	1824		T3	434
valid_sources[0x6a]	257451	1			T1	51		T2	1678		T3	461
valid_sources[0x6b]	277561	1			T1	90		T2	1852		T3	459
valid_sources[0x6c]	287040	1			T1	121		T2	12017		T3	382
valid_sources[0x6d]	248820	1			T1	139		T2	5985		T3	445
valid_sources[0x6e]	295481	1			T1	31		T2	17865		T3	368
valid_sources[0x6f]	273217	1			T1	81		T2	16746		T3	434
valid_sources[0x70]	259619	1			T1	94		T2	1792		T3	466
valid_sources[0x71]	301192	1			T1	108		T2	8467		T3	476
valid_sources[0x72]	262262	1			T1	92		T2	1888		T3	447
valid_sources[0x73]	246907	1			T1	80		T2	1650		T3	383
valid_sources[0x74]	334028	1			T1	51		T2	1792		T3	409
valid_sources[0x75]	242397	1			T1	92		T2	1927		T3	397
valid_sources[0x76]	275647	1			T1	131		T2	1632		T3	424
valid_sources[0x77]	325805	1			T1	29		T2	1623		T3	427
valid_sources[0x78]	286907	1			T1	82		T2	1913		T3	525
valid_sources[0x79]	253919	1			T1	60		T2	1925		T3	416
valid_sources[0x7a]	292535	1			T1	125		T2	1766		T3	437
valid_sources[0x7b]	311711	1			T1	106		T2	1813		T3	476
valid_sources[0x7c]	251157	1			T1	38		T2	12081		T3	426
valid_sources[0x7d]	332537	1			T1	102		T2	1540		T3	353
valid_sources[0x7e]	320917	1			T1	175		T2	16805		T3	393
valid_sources[0x7f]	245334	1			T1	116		T2	1862		T3	390
valid_sources[0x80]	248784	1			T1	117		T2	1551		T3	402

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

29516600

1

T1

12288

T2

385892

T3

49761

values[0x0]

all_enables

biggest_size

14853884

1

T1

6137

T2

192494

T3

24648

values[0x1]

all_enables

biggest_size

14850708

1

T1

6151

T2

192594

T3

25003

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	35436	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

119127

1

T1

3

T2

48

T3

2

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	46075	1			T2	14		T6	49		T7	49
values[0x0]	52372	1			T1	7		T2	77		T3	10
values[0x1]	56116	1			T1	5		T2	92		T3	12

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	27391	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

127172

1

T1

4

T2

60

T3

3

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	528	1			T7	1		T25	15		T21	20
valid_sources[0x01]	429	1			T6	2		T19	33		T25	15
valid_sources[0x02]	578	1			T6	1		T25	16		T23	1
valid_sources[0x03]	805	1			T25	9		T21	182		T169	1
valid_sources[0x04]	479	1			T1	1		T9	2		T7	1
valid_sources[0x05]	409	1			T11	2		T7	1		T25	21
valid_sources[0x06]	588	1			T25	16		T21	63		T24	2
valid_sources[0x07]	375	1			T6	1		T61	1		T7	3
valid_sources[0x08]	507	1			T2	1		T9	1		T19	3
valid_sources[0x09]	575	1			T18	8		T25	14		T21	94
valid_sources[0x0a]	528	1			T47	1		T25	17		T163	2
valid_sources[0x0b]	844	1			T25	14		T21	52		T59	11
valid_sources[0x0c]	436	1			T170	3		T25	18		T22	1
valid_sources[0x0d]	924	1			T170	3		T25	16		T14	1
valid_sources[0x0e]	646	1			T2	2		T6	2		T7	1
valid_sources[0x0f]	858	1			T2	6		T25	9		T21	96
valid_sources[0x10]	433	1			T2	1		T25	5		T23	2
valid_sources[0x11]	410	1			T11	1		T25	17		T68	3
valid_sources[0x12]	667	1			T25	13		T21	107		T45	1
valid_sources[0x13]	418	1			T7	1		T25	11		T21	1
valid_sources[0x14]	400	1			T25	14		T23	1		T21	1
valid_sources[0x15]	418	1			T41	6		T25	12		T171	5
valid_sources[0x16]	523	1			T2	1		T25	12		T68	2
valid_sources[0x17]	680	1			T55	2		T25	12		T21	4
valid_sources[0x18]	818	1			T25	6		T68	4		T172	1
valid_sources[0x19]	742	1			T6	1		T25	13		T22	1
valid_sources[0x1a]	783	1			T2	2		T25	13		T96	8
valid_sources[0x1b]	666	1			T7	1		T25	16		T59	8
valid_sources[0x1c]	529	1			T25	13		T21	1		T173	1
valid_sources[0x1d]	431	1			T25	22		T21	1		T59	13
valid_sources[0x1e]	465	1			T25	16		T22	2		T21	12
valid_sources[0x1f]	589	1			T6	1		T25	4		T21	7
valid_sources[0x20]	450	1			T2	4		T7	2		T25	13
valid_sources[0x21]	532	1			T6	1		T25	17		T22	2
valid_sources[0x22]	832	1			T6	1		T25	14		T20	1
valid_sources[0x23]	797	1			T7	2		T25	7		T96	1
valid_sources[0x24]	447	1			T25	12		T21	7		T96	1
valid_sources[0x25]	613	1			T6	1		T7	1		T25	15
valid_sources[0x26]	541	1			T25	13		T68	3		T23	3
valid_sources[0x27]	638	1			T25	13		T21	118		T59	8
valid_sources[0x28]	470	1			T2	6		T25	11		T21	67
valid_sources[0x29]	462	1			T25	12		T29	1		T59	10
valid_sources[0x2a]	425	1			T6	1		T25	13		T21	1
valid_sources[0x2b]	619	1			T2	1		T7	3		T25	18
valid_sources[0x2c]	747	1			T25	11		T21	7		T172	1
valid_sources[0x2d]	375	1			T61	1		T25	13		T59	9
valid_sources[0x2e]	421	1			T62	1		T7	1		T19	7
valid_sources[0x2f]	555	1			T25	10		T23	3		T21	99
valid_sources[0x30]	816	1			T63	20		T48	1		T7	1
valid_sources[0x31]	541	1			T2	3		T25	22		T21	3
valid_sources[0x32]	732	1			T2	3		T25	15		T21	183
valid_sources[0x33]	679	1			T2	3		T7	2		T25	10
valid_sources[0x34]	705	1			T25	9		T22	2		T174	2
valid_sources[0x35]	703	1			T7	1		T25	19		T20	2
valid_sources[0x36]	681	1			T1	2		T25	8		T68	1
valid_sources[0x37]	532	1			T1	1		T25	19		T20	1
valid_sources[0x38]	1121	1			T2	1		T13	7		T25	22
valid_sources[0x39]	508	1			T13	1		T6	3		T7	1
valid_sources[0x3a]	639	1			T7	1		T25	20		T23	1
valid_sources[0x3b]	553	1			T2	7		T48	1		T19	1
valid_sources[0x3c]	614	1			T25	16		T175	1		T59	9
valid_sources[0x3d]	675	1			T25	14		T59	8		T176	1
valid_sources[0x3e]	599	1			T25	12		T21	1		T175	1
valid_sources[0x3f]	558	1			T25	10		T24	1		T59	6
valid_sources[0x40]	485	1			T25	12		T21	48		T174	1
valid_sources[0x41]	999	1			T25	13		T21	130		T45	1
valid_sources[0x42]	581	1			T7	3		T25	9		T22	1
valid_sources[0x43]	768	1			T7	3		T25	15		T20	1
valid_sources[0x44]	427	1			T6	1		T25	6		T172	1
valid_sources[0x45]	765	1			T2	1		T7	5		T25	18
valid_sources[0x46]	507	1			T25	15		T68	5		T23	2
valid_sources[0x47]	443	1			T10	10		T11	1		T7	3
valid_sources[0x48]	398	1			T6	1		T25	9		T24	2
valid_sources[0x49]	468	1			T25	9		T21	43		T24	1
valid_sources[0x4a]	490	1			T1	1		T25	14		T21	5
valid_sources[0x4b]	805	1			T7	5		T25	10		T22	1
valid_sources[0x4c]	731	1			T25	16		T22	1		T21	80
valid_sources[0x4d]	630	1			T2	2		T25	14		T22	2
valid_sources[0x4e]	553	1			T2	1		T25	14		T21	6
valid_sources[0x4f]	717	1			T25	12		T21	1		T14	1
valid_sources[0x50]	415	1			T7	1		T25	9		T23	4
valid_sources[0x51]	688	1			T7	2		T25	19		T26	180
valid_sources[0x52]	692	1			T25	25		T23	1		T21	1
valid_sources[0x53]	728	1			T25	24		T20	1		T173	1
valid_sources[0x54]	625	1			T1	1		T2	4		T64	24
valid_sources[0x55]	630	1			T9	2		T13	2		T7	1
valid_sources[0x56]	711	1			T2	3		T25	18		T24	1
valid_sources[0x57]	541	1			T13	3		T7	1		T8	41
valid_sources[0x58]	405	1			T3	22		T6	2		T7	1
valid_sources[0x59]	859	1			T2	2		T6	2		T25	13
valid_sources[0x5a]	743	1			T7	2		T25	20		T68	3
valid_sources[0x5b]	976	1			T7	1		T28	1		T25	22
valid_sources[0x5c]	363	1			T48	1		T25	8		T23	1
valid_sources[0x5d]	371	1			T7	1		T25	10		T23	1
valid_sources[0x5e]	423	1			T2	10		T25	8		T23	1
valid_sources[0x5f]	669	1			T25	15		T21	1		T169	1
valid_sources[0x60]	617	1			T13	2		T25	19		T21	37
valid_sources[0x61]	526	1			T13	3		T48	4		T7	1
valid_sources[0x62]	431	1			T2	2		T25	16		T21	2
valid_sources[0x63]	593	1			T25	11		T21	121		T59	4
valid_sources[0x64]	594	1			T6	2		T25	12		T22	1
valid_sources[0x65]	408	1			T9	2		T13	4		T25	12
valid_sources[0x66]	639	1			T6	3		T43	3		T61	1
valid_sources[0x67]	469	1			T6	3		T7	2		T25	17
valid_sources[0x68]	671	1			T25	15		T23	2		T21	1
valid_sources[0x69]	428	1			T6	1		T25	17		T21	5
valid_sources[0x6a]	455	1			T2	4		T48	1		T25	9
valid_sources[0x6b]	472	1			T6	2		T25	10		T22	1
valid_sources[0x6c]	532	1			T7	3		T25	10		T21	6
valid_sources[0x6d]	925	1			T25	8		T96	4		T172	2
valid_sources[0x6e]	762	1			T7	1		T19	8		T25	10
valid_sources[0x6f]	339	1			T7	3		T25	6		T172	1
valid_sources[0x70]	613	1			T25	11		T24	1		T177	5
valid_sources[0x71]	396	1			T25	16		T22	1		T51	1
valid_sources[0x72]	368	1			T6	1		T25	10		T21	3
valid_sources[0x73]	665	1			T7	1		T25	14		T22	1
valid_sources[0x74]	521	1			T25	16		T96	5		T178	2
valid_sources[0x75]	808	1			T179	1		T76	20		T25	11
valid_sources[0x76]	422	1			T7	1		T25	11		T23	1
valid_sources[0x77]	857	1			T25	16		T175	1		T59	12
valid_sources[0x78]	500	1			T25	11		T23	4		T105	1
valid_sources[0x79]	876	1			T6	1		T7	2		T25	18
valid_sources[0x7a]	649	1			T7	2		T25	11		T21	3
valid_sources[0x7b]	774	1			T25	23		T92	1		T105	1
valid_sources[0x7c]	510	1			T13	3		T25	11		T22	1
valid_sources[0x7d]	549	1			T7	1		T25	9		T20	1
valid_sources[0x7e]	756	1			T1	1		T25	8		T180	2
valid_sources[0x7f]	713	1			T6	2		T25	8		T169	2
valid_sources[0x80]	401	1			T6	1		T47	1		T25	12

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

33717

1

T2

6

T6

21

T7

24

values[0x0]

all_enables

biggest_size

43805

1

T1

2

T2

24

T3

2

values[0x1]

all_enables

biggest_size

41605

1

T1

1

T2

18

T9

2