Name |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1555682590 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2096728647 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3662892658 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3284921526 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.190307612 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2450674378 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3159282432 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2293730653 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2132890146 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1582825263 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.446051016 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.1432498946 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3355482294 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.823904100 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3237661895 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1674637322 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.671940150 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.632776051 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2872384251 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2670192457 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1436159186 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.781778611 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1879545211 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1065858073 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.81887317 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1273801458 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2895941728 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3042143515 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3309589267 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.348108455 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1634141185 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1830033961 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1886566530 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.4162230336 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1252631867 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2222828342 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3500765484 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.888557025 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2475671933 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3919445771 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.401997826 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3753087848 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2127796162 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1358157753 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1086908645 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.214411189 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2499055136 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3176579280 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.420129744 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3026276295 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3653648738 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1463303272 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2752520100 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.66375582 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1951065211 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3821214507 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.116732955 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3257253467 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3723516034 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.247733217 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3966173239 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.4072584702 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3770699280 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.496028816 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2147986357 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1425258348 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1703228503 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3198533292 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1955657388 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3551828940 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2300660994 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1277627252 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3500795849 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1438023861 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.139525385 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1949127688 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2820666599 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2465794548 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.161216710 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1336224673 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.190753631 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.424161200 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2967590481 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2645683797 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3170274199 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1213489393 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2373293581 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4073416857 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1287123853 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3520220484 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3935573761 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3663355745 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2125162827 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3281728646 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3273587278 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1942150923 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.4166590602 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.4227112079 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.4156592877 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1808491936 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3753506254 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.832881272 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.138825383 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3851613732 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.546245377 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3642702669 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1508274745 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2731557923 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3268894972 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2939005083 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3239888184 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.505067518 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3861478069 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1706891751 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2160099520 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.991969356 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3127986319 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1176157480 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2642322868 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3576082636 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2853837908 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3195022359 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.15910398 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3407438527 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3393987589 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.3822599060 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1552644767 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1195885773 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3201564122 |
/workspace/coverage/default/0.sram_ctrl_alert_test.3859182830 |
/workspace/coverage/default/0.sram_ctrl_bijection.1102419072 |
/workspace/coverage/default/0.sram_ctrl_executable.341003808 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.1966131485 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2888912746 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.2925703854 |
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2278265097 |
/workspace/coverage/default/0.sram_ctrl_partial_access.1247332228 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1182040836 |
/workspace/coverage/default/0.sram_ctrl_ram_cfg.427594170 |
/workspace/coverage/default/0.sram_ctrl_regwen.3889168560 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.4270324909 |
/workspace/coverage/default/0.sram_ctrl_smoke.335237897 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2417202007 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.761957359 |
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2749124641 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2854374253 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1777226907 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3583747254 |
/workspace/coverage/default/1.sram_ctrl_bijection.4255347216 |
/workspace/coverage/default/1.sram_ctrl_executable.3282439761 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3271350891 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.4200922425 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2824131938 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3102115838 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.757637640 |
/workspace/coverage/default/1.sram_ctrl_partial_access.748719221 |
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2541415347 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4041712840 |
/workspace/coverage/default/1.sram_ctrl_regwen.2449621123 |
/workspace/coverage/default/1.sram_ctrl_smoke.365853658 |
/workspace/coverage/default/1.sram_ctrl_stress_all.968260652 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.65497690 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2437936371 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2359688403 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2335504897 |
/workspace/coverage/default/10.sram_ctrl_alert_test.3129185650 |
/workspace/coverage/default/10.sram_ctrl_bijection.1104600149 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.11528173 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.446480383 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2745526273 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1250775770 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3463537395 |
/workspace/coverage/default/10.sram_ctrl_partial_access.1951400430 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.916608739 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1132429379 |
/workspace/coverage/default/10.sram_ctrl_regwen.3352605716 |
/workspace/coverage/default/10.sram_ctrl_smoke.740832947 |
/workspace/coverage/default/10.sram_ctrl_stress_all.343933637 |
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3465393071 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1929874396 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1813774417 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2414366960 |
/workspace/coverage/default/11.sram_ctrl_alert_test.1005438506 |
/workspace/coverage/default/11.sram_ctrl_bijection.4173462754 |
/workspace/coverage/default/11.sram_ctrl_executable.4181734784 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4252133443 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2162022658 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.16213561 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1087514098 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2593164116 |
/workspace/coverage/default/11.sram_ctrl_partial_access.2899309829 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3253147326 |
/workspace/coverage/default/11.sram_ctrl_regwen.1976441392 |
/workspace/coverage/default/11.sram_ctrl_smoke.1022560641 |
/workspace/coverage/default/11.sram_ctrl_stress_all.3626028570 |
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2794018999 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.534915902 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2637682181 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.226504216 |
/workspace/coverage/default/12.sram_ctrl_alert_test.4074501112 |
/workspace/coverage/default/12.sram_ctrl_bijection.2286290420 |
/workspace/coverage/default/12.sram_ctrl_executable.1457223031 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3259840985 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.3741978397 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2675809474 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3875575286 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1736290377 |
/workspace/coverage/default/12.sram_ctrl_partial_access.3925583704 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.176277639 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2579775274 |
/workspace/coverage/default/12.sram_ctrl_regwen.2910837508 |
/workspace/coverage/default/12.sram_ctrl_smoke.1661025186 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1325308632 |
/workspace/coverage/default/12.sram_ctrl_stress_pipeline.3835480441 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.4271025712 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.2414546377 |
/workspace/coverage/default/13.sram_ctrl_alert_test.4110139760 |
/workspace/coverage/default/13.sram_ctrl_bijection.490519254 |
/workspace/coverage/default/13.sram_ctrl_executable.1884149278 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.2612694663 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.1206507905 |
/workspace/coverage/default/13.sram_ctrl_mem_partial_access.2037065785 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.1367868454 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.564633152 |
/workspace/coverage/default/13.sram_ctrl_partial_access.3575894748 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1603597114 |
/workspace/coverage/default/13.sram_ctrl_ram_cfg.2651165666 |
/workspace/coverage/default/13.sram_ctrl_regwen.4244806609 |
/workspace/coverage/default/13.sram_ctrl_smoke.1748014484 |
/workspace/coverage/default/13.sram_ctrl_stress_all.2319551761 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.2164374334 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2827825081 |
/workspace/coverage/default/14.sram_ctrl_access_during_key_req.993904598 |
/workspace/coverage/default/14.sram_ctrl_alert_test.870097305 |
/workspace/coverage/default/14.sram_ctrl_bijection.1975820601 |
/workspace/coverage/default/14.sram_ctrl_executable.667399661 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.1523053575 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.3294954191 |
/workspace/coverage/default/14.sram_ctrl_mem_partial_access.3864586117 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1874213380 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.347266402 |
/workspace/coverage/default/14.sram_ctrl_partial_access.1996949522 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.503577207 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.2380321101 |
/workspace/coverage/default/14.sram_ctrl_regwen.4085294141 |
/workspace/coverage/default/14.sram_ctrl_smoke.4023159157 |
/workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3679956869 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1526855573 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.2675404062 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.4278841748 |
/workspace/coverage/default/15.sram_ctrl_alert_test.3229514767 |
/workspace/coverage/default/15.sram_ctrl_bijection.1093208407 |
/workspace/coverage/default/15.sram_ctrl_executable.2828942634 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.1642371047 |
/workspace/coverage/default/15.sram_ctrl_max_throughput.64412404 |
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/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3302233084 |
/workspace/coverage/default/45.sram_ctrl_alert_test.928741042 |
/workspace/coverage/default/45.sram_ctrl_bijection.4178146759 |
/workspace/coverage/default/45.sram_ctrl_executable.3324096444 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.972749681 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.2962301877 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2453013547 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.1779634311 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.4212244427 |
/workspace/coverage/default/45.sram_ctrl_partial_access.3057936994 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3790980753 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1721869193 |
/workspace/coverage/default/45.sram_ctrl_regwen.888681141 |
/workspace/coverage/default/45.sram_ctrl_smoke.1001845477 |
/workspace/coverage/default/45.sram_ctrl_stress_all.3833761551 |
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.3965149684 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4009674832 |
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2278093778 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1614155238 |
/workspace/coverage/default/46.sram_ctrl_alert_test.2349952276 |
/workspace/coverage/default/46.sram_ctrl_bijection.1815158685 |
/workspace/coverage/default/46.sram_ctrl_executable.2322784540 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1011067943 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.895734133 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1111863380 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.3168697264 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2909961988 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1015596108 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4287799537 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.690819990 |
/workspace/coverage/default/46.sram_ctrl_regwen.2213484261 |
/workspace/coverage/default/46.sram_ctrl_smoke.2988540774 |
/workspace/coverage/default/46.sram_ctrl_stress_all.447121580 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3858877098 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1931430204 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1134920328 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2884726541 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3555789644 |
/workspace/coverage/default/47.sram_ctrl_bijection.590788668 |
/workspace/coverage/default/47.sram_ctrl_executable.3326337490 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1955885986 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.40492499 |
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.721183462 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.452898310 |
/workspace/coverage/default/47.sram_ctrl_multiple_keys.4089645903 |
/workspace/coverage/default/47.sram_ctrl_partial_access.888553385 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2106365707 |
/workspace/coverage/default/47.sram_ctrl_regwen.717860499 |
/workspace/coverage/default/47.sram_ctrl_smoke.1875433138 |
/workspace/coverage/default/47.sram_ctrl_stress_all.1033565046 |
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3186020271 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.798828987 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.815016394 |
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3771346969 |
/workspace/coverage/default/48.sram_ctrl_alert_test.1482668045 |
/workspace/coverage/default/48.sram_ctrl_bijection.4100175196 |
/workspace/coverage/default/48.sram_ctrl_executable.2122473379 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.4119504965 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.3024042211 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3579282490 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.1863194668 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.209795769 |
/workspace/coverage/default/48.sram_ctrl_partial_access.1229523360 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3459065676 |
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2081622740 |
/workspace/coverage/default/48.sram_ctrl_regwen.706554442 |
/workspace/coverage/default/48.sram_ctrl_smoke.3519399527 |
/workspace/coverage/default/48.sram_ctrl_stress_all.3769935343 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1619666780 |
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.549084404 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2466973647 |
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1410168556 |
/workspace/coverage/default/49.sram_ctrl_alert_test.165884293 |
/workspace/coverage/default/49.sram_ctrl_bijection.978553458 |
/workspace/coverage/default/49.sram_ctrl_executable.596926446 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2297496035 |
/workspace/coverage/default/49.sram_ctrl_max_throughput.1151449488 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3863881464 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2921594480 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2134439242 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3853941099 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1927309050 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1901882765 |
/workspace/coverage/default/49.sram_ctrl_regwen.952665624 |
/workspace/coverage/default/49.sram_ctrl_smoke.3313593925 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2953850834 |
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.546890846 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2315685041 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2360325260 |
/workspace/coverage/default/5.sram_ctrl_alert_test.2970302606 |
/workspace/coverage/default/5.sram_ctrl_bijection.2652995265 |
/workspace/coverage/default/5.sram_ctrl_executable.2008496454 |
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1205276529 |
/workspace/coverage/default/5.sram_ctrl_max_throughput.4192307625 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3359543821 |
/workspace/coverage/default/5.sram_ctrl_mem_walk.2711722097 |
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4232399218 |
/workspace/coverage/default/5.sram_ctrl_partial_access.815010621 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3321206457 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4193005784 |
/workspace/coverage/default/5.sram_ctrl_regwen.2774305896 |
/workspace/coverage/default/5.sram_ctrl_smoke.3094626511 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2679736690 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2111458190 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1411521545 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2017108874 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1876912497 |
/workspace/coverage/default/6.sram_ctrl_alert_test.2180439414 |
/workspace/coverage/default/6.sram_ctrl_bijection.2531182518 |
/workspace/coverage/default/6.sram_ctrl_executable.2777143607 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2061725974 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.1172378720 |
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2579870303 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.1883885387 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3685409538 |
/workspace/coverage/default/6.sram_ctrl_partial_access.2228047969 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3677219432 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.156287745 |
/workspace/coverage/default/6.sram_ctrl_regwen.4224207539 |
/workspace/coverage/default/6.sram_ctrl_smoke.756731977 |
/workspace/coverage/default/6.sram_ctrl_stress_all.1427487053 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3047703140 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.815129483 |
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.975055066 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3013958436 |
/workspace/coverage/default/7.sram_ctrl_alert_test.4108859292 |
/workspace/coverage/default/7.sram_ctrl_bijection.2059009342 |
/workspace/coverage/default/7.sram_ctrl_executable.1103136677 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.563950501 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.21421650 |
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.218943600 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.313310664 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.386419555 |
/workspace/coverage/default/7.sram_ctrl_partial_access.1343096041 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1720563071 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1767963812 |
/workspace/coverage/default/7.sram_ctrl_regwen.2443678538 |
/workspace/coverage/default/7.sram_ctrl_smoke.3940926916 |
/workspace/coverage/default/7.sram_ctrl_stress_all.898588323 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.1236517832 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4238802375 |
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3727820537 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.29302214 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3434854766 |
/workspace/coverage/default/8.sram_ctrl_bijection.2398411866 |
/workspace/coverage/default/8.sram_ctrl_executable.2007384615 |
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3815264899 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.3173400987 |
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2123934551 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.135072161 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3964828963 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3413898093 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.755671612 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.503088384 |
/workspace/coverage/default/8.sram_ctrl_regwen.787856935 |
/workspace/coverage/default/8.sram_ctrl_smoke.227365734 |
/workspace/coverage/default/8.sram_ctrl_stress_all.2519048865 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2913386720 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3621245596 |
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2725286005 |
/workspace/coverage/default/9.sram_ctrl_alert_test.2896036794 |
/workspace/coverage/default/9.sram_ctrl_bijection.2478428992 |
/workspace/coverage/default/9.sram_ctrl_executable.66534318 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.1228781326 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.2609711712 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3891464445 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.1583892925 |
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2949667179 |
/workspace/coverage/default/9.sram_ctrl_partial_access.2582358444 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1335143232 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.277686258 |
/workspace/coverage/default/9.sram_ctrl_regwen.70009317 |
/workspace/coverage/default/9.sram_ctrl_smoke.2307986851 |
/workspace/coverage/default/9.sram_ctrl_stress_all.569889751 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2160084191 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1927598883 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1299807036 |
TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
T1 |
/workspace/coverage/default/17.sram_ctrl_bijection.1076099634 |
|
|
Jul 17 07:38:49 PM PDT 24 |
Jul 17 07:39:26 PM PDT 24 |
2036415975 ps |
T2 |
/workspace/coverage/default/35.sram_ctrl_stress_all.3119722073 |
|
|
Jul 17 07:40:45 PM PDT 24 |
Jul 17 09:17:13 PM PDT 24 |
101329335733 ps |
T3 |
/workspace/coverage/default/17.sram_ctrl_executable.1519650375 |
|
|
Jul 17 07:38:59 PM PDT 24 |
Jul 17 07:50:53 PM PDT 24 |
9746411635 ps |
T9 |
/workspace/coverage/default/32.sram_ctrl_alert_test.1535155452 |
|
|
Jul 17 07:40:34 PM PDT 24 |
Jul 17 07:40:37 PM PDT 24 |
18657324 ps |
T5 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.1874213380 |
|
|
Jul 17 07:38:16 PM PDT 24 |
Jul 17 07:38:25 PM PDT 24 |
381414463 ps |
T10 |
/workspace/coverage/default/23.sram_ctrl_alert_test.3782696978 |
|
|
Jul 17 07:39:34 PM PDT 24 |
Jul 17 07:39:36 PM PDT 24 |
23819076 ps |
T4 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.4177567857 |
|
|
Jul 17 07:41:27 PM PDT 24 |
Jul 17 07:44:14 PM PDT 24 |
8303796009 ps |
T11 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2593164116 |
|
|
Jul 17 07:34:17 PM PDT 24 |
Jul 17 07:43:23 PM PDT 24 |
5413689660 ps |
T12 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.2270886228 |
|
|
Jul 17 07:38:15 PM PDT 24 |
Jul 17 07:41:53 PM PDT 24 |
4545656860 ps |
T13 |
/workspace/coverage/default/38.sram_ctrl_executable.1205288 |
|
|
Jul 17 07:40:58 PM PDT 24 |
Jul 17 07:58:27 PM PDT 24 |
16750784254 ps |
T6 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.8168310 |
|
|
Jul 17 07:38:52 PM PDT 24 |
Jul 17 07:39:04 PM PDT 24 |
3477265443 ps |
T41 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.3327258684 |
|
|
Jul 17 07:40:04 PM PDT 24 |
Jul 17 07:40:17 PM PDT 24 |
2419264493 ps |
T47 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.1605762642 |
|
|
Jul 17 07:40:36 PM PDT 24 |
Jul 17 07:41:52 PM PDT 24 |
425268274 ps |
T42 |
/workspace/coverage/default/27.sram_ctrl_multiple_keys.2927822373 |
|
|
Jul 17 07:40:07 PM PDT 24 |
Jul 17 07:53:11 PM PDT 24 |
2880938503 ps |
T18 |
/workspace/coverage/default/32.sram_ctrl_bijection.3716179359 |
|
|
Jul 17 07:40:49 PM PDT 24 |
Jul 17 07:41:22 PM PDT 24 |
1486494583 ps |
T43 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4150372239 |
|
|
Jul 17 07:42:23 PM PDT 24 |
Jul 17 07:48:13 PM PDT 24 |
56473303698 ps |
T55 |
/workspace/coverage/default/5.sram_ctrl_smoke.3094626511 |
|
|
Jul 17 07:33:15 PM PDT 24 |
Jul 17 07:33:22 PM PDT 24 |
1261906636 ps |
T61 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.2369412595 |
|
|
Jul 17 07:38:53 PM PDT 24 |
Jul 17 07:42:42 PM PDT 24 |
2391214901 ps |
T62 |
/workspace/coverage/default/7.sram_ctrl_smoke.3940926916 |
|
|
Jul 17 07:34:15 PM PDT 24 |
Jul 17 07:34:28 PM PDT 24 |
9289140518 ps |
T63 |
/workspace/coverage/default/26.sram_ctrl_bijection.248650004 |
|
|
Jul 17 07:40:17 PM PDT 24 |
Jul 17 07:41:16 PM PDT 24 |
2379847401 ps |
T64 |
/workspace/coverage/default/38.sram_ctrl_bijection.143791407 |
|
|
Jul 17 07:40:55 PM PDT 24 |
Jul 17 07:42:22 PM PDT 24 |
51855376085 ps |
T48 |
/workspace/coverage/default/9.sram_ctrl_mem_walk.1583892925 |
|
|
Jul 17 07:34:13 PM PDT 24 |
Jul 17 07:34:26 PM PDT 24 |
2730306375 ps |
T181 |
/workspace/coverage/default/22.sram_ctrl_smoke.2764728004 |
|
|
Jul 17 07:39:38 PM PDT 24 |
Jul 17 07:39:53 PM PDT 24 |
799632031 ps |
T170 |
/workspace/coverage/default/41.sram_ctrl_bijection.3901521139 |
|
|
Jul 17 07:41:30 PM PDT 24 |
Jul 17 07:42:09 PM PDT 24 |
1771784630 ps |
T90 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.3180950155 |
|
|
Jul 17 07:41:27 PM PDT 24 |
Jul 17 07:43:52 PM PDT 24 |
1504095928 ps |
T7 |
/workspace/coverage/default/10.sram_ctrl_stress_all.343933637 |
|
|
Jul 17 07:34:14 PM PDT 24 |
Jul 17 08:04:08 PM PDT 24 |
47093907873 ps |
T27 |
/workspace/coverage/default/17.sram_ctrl_ram_cfg.657776212 |
|
|
Jul 17 07:38:59 PM PDT 24 |
Jul 17 07:39:00 PM PDT 24 |
148227828 ps |
T122 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1335143232 |
|
|
Jul 17 07:34:18 PM PDT 24 |
Jul 17 07:39:27 PM PDT 24 |
32387536938 ps |
T179 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3027322891 |
|
|
Jul 17 07:41:33 PM PDT 24 |
Jul 17 07:42:13 PM PDT 24 |
859199853 ps |
T8 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.1292433639 |
|
|
Jul 17 07:40:02 PM PDT 24 |
Jul 17 07:40:08 PM PDT 24 |
809374207 ps |
T76 |
/workspace/coverage/default/30.sram_ctrl_executable.3593654861 |
|
|
Jul 17 07:40:14 PM PDT 24 |
Jul 17 07:53:45 PM PDT 24 |
15648178650 ps |
T19 |
/workspace/coverage/default/34.sram_ctrl_regwen.2963423274 |
|
|
Jul 17 07:40:34 PM PDT 24 |
Jul 17 08:00:44 PM PDT 24 |
9715948554 ps |
T28 |
/workspace/coverage/default/15.sram_ctrl_ram_cfg.4282824673 |
|
|
Jul 17 07:38:19 PM PDT 24 |
Jul 17 07:38:21 PM PDT 24 |
77696636 ps |
T123 |
/workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2580880658 |
|
|
Jul 17 07:39:30 PM PDT 24 |
Jul 17 07:43:10 PM PDT 24 |
6183291902 ps |
T25 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.1828981501 |
|
|
Jul 17 07:38:19 PM PDT 24 |
Jul 17 07:39:01 PM PDT 24 |
23921719296 ps |
T68 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.496519868 |
|
|
Jul 17 07:41:29 PM PDT 24 |
Jul 17 07:41:36 PM PDT 24 |
1619896084 ps |
T20 |
/workspace/coverage/default/21.sram_ctrl_regwen.3202470883 |
|
|
Jul 17 07:39:32 PM PDT 24 |
Jul 17 07:42:43 PM PDT 24 |
10929894019 ps |
T22 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.788610123 |
|
|
Jul 17 07:40:42 PM PDT 24 |
Jul 17 07:40:49 PM PDT 24 |
455985632 ps |
T69 |
/workspace/coverage/default/20.sram_ctrl_regwen.3626629291 |
|
|
Jul 17 07:39:29 PM PDT 24 |
Jul 17 07:51:07 PM PDT 24 |
9370939055 ps |
T70 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1015596108 |
|
|
Jul 17 07:42:20 PM PDT 24 |
Jul 17 07:42:26 PM PDT 24 |
64389323 ps |
T29 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2920703183 |
|
|
Jul 17 07:40:39 PM PDT 24 |
Jul 17 07:40:40 PM PDT 24 |
30094545 ps |
T71 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.815016394 |
|
|
Jul 17 07:42:18 PM PDT 24 |
Jul 17 07:42:22 PM PDT 24 |
118994867 ps |
T23 |
/workspace/coverage/default/26.sram_ctrl_stress_all.275477067 |
|
|
Jul 17 07:40:16 PM PDT 24 |
Jul 17 07:50:53 PM PDT 24 |
4261566097 ps |
T72 |
/workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2392737061 |
|
|
Jul 17 07:40:03 PM PDT 24 |
Jul 17 07:40:06 PM PDT 24 |
71471848 ps |
T51 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.1407234161 |
|
|
Jul 17 07:39:34 PM PDT 24 |
Jul 17 07:39:38 PM PDT 24 |
310383070 ps |
T91 |
/workspace/coverage/default/14.sram_ctrl_partial_access.1996949522 |
|
|
Jul 17 07:38:18 PM PDT 24 |
Jul 17 07:38:33 PM PDT 24 |
297743005 ps |
T21 |
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2160084191 |
|
|
Jul 17 07:34:12 PM PDT 24 |
Jul 17 07:51:45 PM PDT 24 |
7946961602 ps |
T92 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.2801077748 |
|
|
Jul 17 07:40:35 PM PDT 24 |
Jul 17 07:46:16 PM PDT 24 |
41108484918 ps |
T93 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3112055487 |
|
|
Jul 17 07:33:09 PM PDT 24 |
Jul 17 07:33:13 PM PDT 24 |
274506489 ps |
T94 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3459065676 |
|
|
Jul 17 07:42:16 PM PDT 24 |
Jul 17 07:46:48 PM PDT 24 |
14716023654 ps |
T95 |
/workspace/coverage/default/3.sram_ctrl_ram_cfg.3232199049 |
|
|
Jul 17 07:33:05 PM PDT 24 |
Jul 17 07:33:07 PM PDT 24 |
31699404 ps |
T96 |
/workspace/coverage/default/24.sram_ctrl_regwen.179026555 |
|
|
Jul 17 07:39:40 PM PDT 24 |
Jul 17 07:55:03 PM PDT 24 |
51064439229 ps |
T97 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2359688403 |
|
|
Jul 17 07:32:40 PM PDT 24 |
Jul 17 07:34:09 PM PDT 24 |
599707850 ps |
T56 |
/workspace/coverage/default/18.sram_ctrl_mem_walk.2414365620 |
|
|
Jul 17 07:38:51 PM PDT 24 |
Jul 17 07:38:58 PM PDT 24 |
350850913 ps |
T165 |
/workspace/coverage/default/39.sram_ctrl_partial_access.3909631631 |
|
|
Jul 17 07:40:58 PM PDT 24 |
Jul 17 07:42:37 PM PDT 24 |
1597713301 ps |
T182 |
/workspace/coverage/default/7.sram_ctrl_max_throughput.21421650 |
|
|
Jul 17 07:34:12 PM PDT 24 |
Jul 17 07:35:12 PM PDT 24 |
113189958 ps |
T183 |
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2017108874 |
|
|
Jul 17 07:33:18 PM PDT 24 |
Jul 17 07:33:23 PM PDT 24 |
76303108 ps |
T184 |
/workspace/coverage/default/16.sram_ctrl_regwen.3101715268 |
|
|
Jul 17 07:38:15 PM PDT 24 |
Jul 17 07:43:59 PM PDT 24 |
11904179897 ps |
T185 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1736290377 |
|
|
Jul 17 07:37:44 PM PDT 24 |
Jul 17 07:47:42 PM PDT 24 |
9019550383 ps |
T161 |
/workspace/coverage/default/2.sram_ctrl_executable.4140816611 |
|
|
Jul 17 07:33:15 PM PDT 24 |
Jul 17 07:40:51 PM PDT 24 |
2119596148 ps |
T169 |
/workspace/coverage/default/23.sram_ctrl_bijection.778881397 |
|
|
Jul 17 07:39:37 PM PDT 24 |
Jul 17 07:40:29 PM PDT 24 |
9114742374 ps |
T44 |
/workspace/coverage/default/24.sram_ctrl_access_during_key_req.195705195 |
|
|
Jul 17 07:39:35 PM PDT 24 |
Jul 17 07:45:05 PM PDT 24 |
1578059380 ps |
T45 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.1270582693 |
|
|
Jul 17 07:40:41 PM PDT 24 |
Jul 17 07:54:10 PM PDT 24 |
2763918013 ps |
T24 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.1525129138 |
|
|
Jul 17 07:38:58 PM PDT 24 |
Jul 17 07:39:06 PM PDT 24 |
4321420812 ps |
T163 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2643813786 |
|
|
Jul 17 07:38:51 PM PDT 24 |
Jul 17 07:42:43 PM PDT 24 |
8207955743 ps |
T46 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.3403572398 |
|
|
Jul 17 07:33:09 PM PDT 24 |
Jul 17 07:48:31 PM PDT 24 |
29418065357 ps |
T186 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.369679511 |
|
|
Jul 17 07:41:31 PM PDT 24 |
Jul 17 07:43:51 PM PDT 24 |
254285945 ps |
T14 |
/workspace/coverage/default/31.sram_ctrl_alert_test.3518982590 |
|
|
Jul 17 07:40:27 PM PDT 24 |
Jul 17 07:40:28 PM PDT 24 |
17058347 ps |
T174 |
/workspace/coverage/default/42.sram_ctrl_bijection.2092954247 |
|
|
Jul 17 07:41:30 PM PDT 24 |
Jul 17 07:42:21 PM PDT 24 |
3109451430 ps |
T187 |
/workspace/coverage/default/22.sram_ctrl_alert_test.2154731372 |
|
|
Jul 17 07:39:37 PM PDT 24 |
Jul 17 07:39:38 PM PDT 24 |
13209919 ps |
T188 |
/workspace/coverage/default/18.sram_ctrl_bijection.3415771654 |
|
|
Jul 17 07:38:50 PM PDT 24 |
Jul 17 07:39:13 PM PDT 24 |
12536938112 ps |
T189 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.3453529219 |
|
|
Jul 17 07:40:04 PM PDT 24 |
Jul 17 07:42:32 PM PDT 24 |
1584605147 ps |
T162 |
/workspace/coverage/default/25.sram_ctrl_stress_all.3349015330 |
|
|
Jul 17 07:40:06 PM PDT 24 |
Jul 17 07:55:03 PM PDT 24 |
33833781824 ps |
T180 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.2334621076 |
|
|
Jul 17 07:41:25 PM PDT 24 |
Jul 17 07:43:58 PM PDT 24 |
5644762529 ps |
T190 |
/workspace/coverage/default/3.sram_ctrl_alert_test.3896013225 |
|
|
Jul 17 07:33:13 PM PDT 24 |
Jul 17 07:33:15 PM PDT 24 |
13790753 ps |
T171 |
/workspace/coverage/default/26.sram_ctrl_alert_test.3372718584 |
|
|
Jul 17 07:40:39 PM PDT 24 |
Jul 17 07:40:40 PM PDT 24 |
17070632 ps |
T158 |
/workspace/coverage/default/32.sram_ctrl_executable.609813658 |
|
|
Jul 17 07:40:23 PM PDT 24 |
Jul 17 07:47:49 PM PDT 24 |
3510241913 ps |
T191 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.1736081427 |
|
|
Jul 17 07:40:34 PM PDT 24 |
Jul 17 07:40:36 PM PDT 24 |
45737305 ps |
T104 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1614155238 |
|
|
Jul 17 07:42:16 PM PDT 24 |
Jul 17 08:07:04 PM PDT 24 |
3743423557 ps |
T172 |
/workspace/coverage/default/13.sram_ctrl_regwen.4244806609 |
|
|
Jul 17 07:37:46 PM PDT 24 |
Jul 17 08:07:42 PM PDT 24 |
16671726408 ps |
T192 |
/workspace/coverage/default/18.sram_ctrl_multiple_keys.2838673261 |
|
|
Jul 17 07:38:58 PM PDT 24 |
Jul 17 07:50:48 PM PDT 24 |
9344659999 ps |
T175 |
/workspace/coverage/default/40.sram_ctrl_regwen.3255238383 |
|
|
Jul 17 07:41:26 PM PDT 24 |
Jul 17 07:59:00 PM PDT 24 |
12452865171 ps |
T105 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.1573491383 |
|
|
Jul 17 07:39:33 PM PDT 24 |
Jul 17 07:57:49 PM PDT 24 |
3256725572 ps |
T167 |
/workspace/coverage/default/42.sram_ctrl_executable.1408076377 |
|
|
Jul 17 07:41:30 PM PDT 24 |
Jul 17 07:52:21 PM PDT 24 |
80133089158 ps |
T168 |
/workspace/coverage/default/26.sram_ctrl_lc_escalation.1784008179 |
|
|
Jul 17 07:40:18 PM PDT 24 |
Jul 17 07:40:31 PM PDT 24 |
4397254106 ps |
T173 |
/workspace/coverage/default/6.sram_ctrl_bijection.2531182518 |
|
|
Jul 17 07:33:18 PM PDT 24 |
Jul 17 07:34:09 PM PDT 24 |
765038196 ps |
T193 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4009674832 |
|
|
Jul 17 07:41:27 PM PDT 24 |
Jul 17 07:48:11 PM PDT 24 |
9060323138 ps |
T194 |
/workspace/coverage/default/19.sram_ctrl_bijection.1801855475 |
|
|
Jul 17 07:38:50 PM PDT 24 |
Jul 17 07:39:17 PM PDT 24 |
761329217 ps |
T195 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.17798277 |
|
|
Jul 17 07:41:26 PM PDT 24 |
Jul 17 07:41:35 PM PDT 24 |
124410694 ps |
T196 |
/workspace/coverage/default/47.sram_ctrl_smoke.1875433138 |
|
|
Jul 17 07:42:18 PM PDT 24 |
Jul 17 07:42:32 PM PDT 24 |
1365634794 ps |
T26 |
/workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.1325308632 |
|
|
Jul 17 07:37:43 PM PDT 24 |
Jul 17 07:38:06 PM PDT 24 |
2555329849 ps |
T106 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2360325260 |
|
|
Jul 17 07:33:14 PM PDT 24 |
Jul 17 07:49:38 PM PDT 24 |
4411208467 ps |
T197 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.3621245596 |
|
|
Jul 17 07:34:10 PM PDT 24 |
Jul 17 07:34:12 PM PDT 24 |
63907934 ps |
T177 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.1526855573 |
|
|
Jul 17 07:38:14 PM PDT 24 |
Jul 17 07:40:14 PM PDT 24 |
6012742099 ps |
T198 |
/workspace/coverage/default/46.sram_ctrl_alert_test.2349952276 |
|
|
Jul 17 07:42:17 PM PDT 24 |
Jul 17 07:42:20 PM PDT 24 |
18184927 ps |
T199 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1357519050 |
|
|
Jul 17 07:38:51 PM PDT 24 |
Jul 17 07:39:08 PM PDT 24 |
1690997854 ps |
T107 |
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3359543821 |
|
|
Jul 17 07:33:18 PM PDT 24 |
Jul 17 07:33:24 PM PDT 24 |
1524983752 ps |
T200 |
/workspace/coverage/default/36.sram_ctrl_partial_access.2279930941 |
|
|
Jul 17 07:40:45 PM PDT 24 |
Jul 17 07:40:54 PM PDT 24 |
418289940 ps |
T178 |
/workspace/coverage/default/33.sram_ctrl_executable.3705171630 |
|
|
Jul 17 07:40:34 PM PDT 24 |
Jul 17 07:45:45 PM PDT 24 |
118320794854 ps |
T201 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.492190947 |
|
|
Jul 17 07:40:24 PM PDT 24 |
Jul 17 07:45:30 PM PDT 24 |
37103638980 ps |
T202 |
/workspace/coverage/default/13.sram_ctrl_smoke.1748014484 |
|
|
Jul 17 07:37:48 PM PDT 24 |
Jul 17 07:37:51 PM PDT 24 |
45163407 ps |
T57 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.559110406 |
|
|
Jul 17 07:38:21 PM PDT 24 |
Jul 17 07:38:34 PM PDT 24 |
1368364801 ps |
T203 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.1172656599 |
|
|
Jul 17 07:40:16 PM PDT 24 |
Jul 17 07:42:34 PM PDT 24 |
2913145035 ps |
T58 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.3678355769 |
|
|
Jul 17 07:39:29 PM PDT 24 |
Jul 17 07:39:35 PM PDT 24 |
188563125 ps |
T59 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.927313527 |
|
|
Jul 17 07:33:17 PM PDT 24 |
Jul 17 07:36:13 PM PDT 24 |
1453511617 ps |
T204 |
/workspace/coverage/default/30.sram_ctrl_max_throughput.10580372 |
|
|
Jul 17 07:40:14 PM PDT 24 |
Jul 17 07:40:17 PM PDT 24 |
622139537 ps |
T164 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.503577207 |
|
|
Jul 17 07:38:19 PM PDT 24 |
Jul 17 07:44:27 PM PDT 24 |
53032028238 ps |
T205 |
/workspace/coverage/default/1.sram_ctrl_regwen.2449621123 |
|
|
Jul 17 07:33:14 PM PDT 24 |
Jul 17 07:40:50 PM PDT 24 |
2680693150 ps |
T108 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.4278841748 |
|
|
Jul 17 07:38:19 PM PDT 24 |
Jul 17 07:52:34 PM PDT 24 |
5524123807 ps |
T206 |
/workspace/coverage/default/41.sram_ctrl_partial_access.4284942859 |
|
|
Jul 17 07:41:27 PM PDT 24 |
Jul 17 07:41:47 PM PDT 24 |
2524295568 ps |
T207 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2998574835 |
|
|
Jul 17 07:39:35 PM PDT 24 |
Jul 17 07:39:52 PM PDT 24 |
328023411 ps |
T208 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.3834274549 |
|
|
Jul 17 07:40:55 PM PDT 24 |
Jul 17 07:46:52 PM PDT 24 |
8875569287 ps |
T209 |
/workspace/coverage/default/8.sram_ctrl_executable.2007384615 |
|
|
Jul 17 07:34:17 PM PDT 24 |
Jul 17 07:37:49 PM PDT 24 |
948324932 ps |
T210 |
/workspace/coverage/default/28.sram_ctrl_executable.2101027172 |
|
|
Jul 17 07:40:18 PM PDT 24 |
Jul 17 07:40:43 PM PDT 24 |
1145120080 ps |
T211 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2247806898 |
|
|
Jul 17 07:33:17 PM PDT 24 |
Jul 17 07:37:46 PM PDT 24 |
11214358824 ps |
T166 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.564633152 |
|
|
Jul 17 07:37:43 PM PDT 24 |
Jul 17 08:00:58 PM PDT 24 |
21194585305 ps |
T159 |
/workspace/coverage/default/7.sram_ctrl_regwen.2443678538 |
|
|
Jul 17 07:34:19 PM PDT 24 |
Jul 17 07:42:18 PM PDT 24 |
16164281122 ps |
T212 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.501947430 |
|
|
Jul 17 07:41:25 PM PDT 24 |
Jul 17 07:46:14 PM PDT 24 |
22206166469 ps |
T213 |
/workspace/coverage/default/22.sram_ctrl_regwen.2703144386 |
|
|
Jul 17 07:39:39 PM PDT 24 |
Jul 17 07:56:37 PM PDT 24 |
8486589671 ps |
T214 |
/workspace/coverage/default/43.sram_ctrl_partial_access.1166379817 |
|
|
Jul 17 07:41:31 PM PDT 24 |
Jul 17 07:41:47 PM PDT 24 |
235200953 ps |
T215 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1612697311 |
|
|
Jul 17 07:37:11 PM PDT 24 |
Jul 17 07:37:13 PM PDT 24 |
28116134 ps |
T216 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.2595398872 |
|
|
Jul 17 07:40:18 PM PDT 24 |
Jul 17 07:40:28 PM PDT 24 |
1460481774 ps |
T217 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.2178709953 |
|
|
Jul 17 07:40:30 PM PDT 24 |
Jul 17 07:45:03 PM PDT 24 |
5729948508 ps |
T60 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.3897593187 |
|
|
Jul 17 07:33:08 PM PDT 24 |
Jul 17 07:33:15 PM PDT 24 |
342788712 ps |
T218 |
/workspace/coverage/default/35.sram_ctrl_smoke.1649063982 |
|
|
Jul 17 07:40:48 PM PDT 24 |
Jul 17 07:40:50 PM PDT 24 |
49093227 ps |
T160 |
/workspace/coverage/default/0.sram_ctrl_stress_all.2417202007 |
|
|
Jul 17 07:32:37 PM PDT 24 |
Jul 17 09:16:28 PM PDT 24 |
101833390419 ps |
T219 |
/workspace/coverage/default/12.sram_ctrl_partial_access.3925583704 |
|
|
Jul 17 07:37:41 PM PDT 24 |
Jul 17 07:39:42 PM PDT 24 |
888119686 ps |
T220 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1673209817 |
|
|
Jul 17 07:41:36 PM PDT 24 |
Jul 17 08:41:56 PM PDT 24 |
62206687556 ps |
T221 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.4252133443 |
|
|
Jul 17 07:37:12 PM PDT 24 |
Jul 17 07:37:20 PM PDT 24 |
1517693699 ps |
T176 |
/workspace/coverage/default/44.sram_ctrl_regwen.2233020134 |
|
|
Jul 17 07:41:35 PM PDT 24 |
Jul 17 07:54:48 PM PDT 24 |
17275902512 ps |
T222 |
/workspace/coverage/default/10.sram_ctrl_mem_walk.1250775770 |
|
|
Jul 17 07:34:20 PM PDT 24 |
Jul 17 07:34:31 PM PDT 24 |
887118894 ps |
T223 |
/workspace/coverage/default/37.sram_ctrl_alert_test.1903525601 |
|
|
Jul 17 07:40:56 PM PDT 24 |
Jul 17 07:40:58 PM PDT 24 |
32910312 ps |
T224 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.2414546377 |
|
|
Jul 17 07:37:44 PM PDT 24 |
Jul 17 07:38:53 PM PDT 24 |
1907485264 ps |
T225 |
/workspace/coverage/default/25.sram_ctrl_stress_pipeline.2826452556 |
|
|
Jul 17 07:40:14 PM PDT 24 |
Jul 17 07:42:33 PM PDT 24 |
5730233155 ps |
T226 |
/workspace/coverage/default/37.sram_ctrl_regwen.3704535214 |
|
|
Jul 17 07:40:52 PM PDT 24 |
Jul 17 07:59:54 PM PDT 24 |
21300325509 ps |
T227 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1700180141 |
|
|
Jul 17 07:38:20 PM PDT 24 |
Jul 17 07:48:26 PM PDT 24 |
26430552284 ps |
T228 |
/workspace/coverage/default/42.sram_ctrl_alert_test.4064107341 |
|
|
Jul 17 07:41:31 PM PDT 24 |
Jul 17 07:41:35 PM PDT 24 |
13362394 ps |
T229 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.820318877 |
|
|
Jul 17 07:41:35 PM PDT 24 |
Jul 17 07:41:41 PM PDT 24 |
274262924 ps |
T230 |
/workspace/coverage/default/18.sram_ctrl_stress_all.1569740441 |
|
|
Jul 17 07:38:50 PM PDT 24 |
Jul 17 08:03:37 PM PDT 24 |
32317805780 ps |
T65 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1109195400 |
|
|
Jul 17 07:40:07 PM PDT 24 |
Jul 17 07:40:25 PM PDT 24 |
903431124 ps |
T231 |
/workspace/coverage/default/13.sram_ctrl_executable.1884149278 |
|
|
Jul 17 07:37:44 PM PDT 24 |
Jul 17 08:06:29 PM PDT 24 |
189362723263 ps |
T232 |
/workspace/coverage/default/25.sram_ctrl_partial_access.13176791 |
|
|
Jul 17 07:40:05 PM PDT 24 |
Jul 17 07:40:07 PM PDT 24 |
26603204 ps |
T233 |
/workspace/coverage/default/17.sram_ctrl_stress_all.563869767 |
|
|
Jul 17 07:38:50 PM PDT 24 |
Jul 17 07:53:09 PM PDT 24 |
10389805981 ps |
T234 |
/workspace/coverage/default/4.sram_ctrl_mem_walk.3543394025 |
|
|
Jul 17 07:33:15 PM PDT 24 |
Jul 17 07:33:24 PM PDT 24 |
446830974 ps |
T235 |
/workspace/coverage/default/3.sram_ctrl_smoke.1876918962 |
|
|
Jul 17 07:33:18 PM PDT 24 |
Jul 17 07:33:36 PM PDT 24 |
3360791914 ps |
T236 |
/workspace/coverage/default/34.sram_ctrl_bijection.2122581361 |
|
|
Jul 17 07:40:26 PM PDT 24 |
Jul 17 07:40:56 PM PDT 24 |
1316794608 ps |
T237 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.1195386 |
|
|
Jul 17 07:40:57 PM PDT 24 |
Jul 17 07:44:19 PM PDT 24 |
8131575405 ps |
T238 |
/workspace/coverage/default/49.sram_ctrl_executable.596926446 |
|
|
Jul 17 07:42:19 PM PDT 24 |
Jul 17 07:55:05 PM PDT 24 |
14429468593 ps |
T239 |
/workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1747441754 |
|
|
Jul 17 07:40:17 PM PDT 24 |
Jul 17 07:40:47 PM PDT 24 |
387580054 ps |
T240 |
/workspace/coverage/default/27.sram_ctrl_partial_access.1930753264 |
|
|
Jul 17 07:40:10 PM PDT 24 |
Jul 17 07:40:18 PM PDT 24 |
149956280 ps |
T241 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3434854766 |
|
|
Jul 17 07:34:12 PM PDT 24 |
Jul 17 07:34:14 PM PDT 24 |
15972374 ps |
T80 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3024312589 |
|
|
Jul 17 07:39:41 PM PDT 24 |
Jul 17 07:40:46 PM PDT 24 |
1561575326 ps |
T242 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.3829820388 |
|
|
Jul 17 07:41:33 PM PDT 24 |
Jul 17 07:41:38 PM PDT 24 |
46611482 ps |
T66 |
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.55401369 |
|
|
Jul 17 07:41:33 PM PDT 24 |
Jul 17 07:46:27 PM PDT 24 |
2138690256 ps |
T243 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.738915974 |
|
|
Jul 17 07:38:51 PM PDT 24 |
Jul 17 07:38:57 PM PDT 24 |
1856114542 ps |
T244 |
/workspace/coverage/default/35.sram_ctrl_partial_access.1698732721 |
|
|
Jul 17 07:40:35 PM PDT 24 |
Jul 17 07:40:56 PM PDT 24 |
1183459851 ps |
T245 |
/workspace/coverage/default/1.sram_ctrl_alert_test.3583747254 |
|
|
Jul 17 07:33:19 PM PDT 24 |
Jul 17 07:33:22 PM PDT 24 |
13695323 ps |
T246 |
/workspace/coverage/default/39.sram_ctrl_executable.2534339973 |
|
|
Jul 17 07:40:58 PM PDT 24 |
Jul 17 07:54:44 PM PDT 24 |
6881691351 ps |
T247 |
/workspace/coverage/default/45.sram_ctrl_stress_all.3833761551 |
|
|
Jul 17 07:42:16 PM PDT 24 |
Jul 17 08:34:41 PM PDT 24 |
20984637440 ps |
T248 |
/workspace/coverage/default/15.sram_ctrl_smoke.3736514074 |
|
|
Jul 17 07:38:21 PM PDT 24 |
Jul 17 07:38:40 PM PDT 24 |
787755233 ps |
T249 |
/workspace/coverage/default/27.sram_ctrl_bijection.3036318896 |
|
|
Jul 17 07:40:09 PM PDT 24 |
Jul 17 07:41:08 PM PDT 24 |
3759916186 ps |
T250 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.4243958738 |
|
|
Jul 17 07:40:40 PM PDT 24 |
Jul 17 07:46:47 PM PDT 24 |
8193232948 ps |
T251 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.376530200 |
|
|
Jul 17 07:39:30 PM PDT 24 |
Jul 17 07:45:56 PM PDT 24 |
4167649129 ps |
T252 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1540614754 |
|
|
Jul 17 07:40:05 PM PDT 24 |
Jul 17 07:47:19 PM PDT 24 |
106610791677 ps |
T52 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.65497690 |
|
|
Jul 17 07:33:13 PM PDT 24 |
Jul 17 07:34:45 PM PDT 24 |
1575510760 ps |
T136 |
/workspace/coverage/default/17.sram_ctrl_multiple_keys.598689543 |
|
|
Jul 17 07:38:51 PM PDT 24 |
Jul 17 07:58:48 PM PDT 24 |
17224751468 ps |
T137 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.3016195751 |
|
|
Jul 17 07:41:26 PM PDT 24 |
Jul 17 07:41:39 PM PDT 24 |
656346594 ps |
T138 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2865024664 |
|
|
Jul 17 07:32:39 PM PDT 24 |
Jul 17 07:32:49 PM PDT 24 |
383182105 ps |
T54 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3858877098 |
|
|
Jul 17 07:42:19 PM PDT 24 |
Jul 17 07:46:28 PM PDT 24 |
3062009112 ps |
T139 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.446480383 |
|
|
Jul 17 07:34:12 PM PDT 24 |
Jul 17 07:34:22 PM PDT 24 |
239019011 ps |
T140 |
/workspace/coverage/default/31.sram_ctrl_regwen.1726104256 |
|
|
Jul 17 07:40:23 PM PDT 24 |
Jul 17 07:57:13 PM PDT 24 |
5011330349 ps |
T141 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.815129483 |
|
|
Jul 17 07:33:11 PM PDT 24 |
Jul 17 07:36:10 PM PDT 24 |
2051365619 ps |
T142 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.188421493 |
|
|
Jul 17 07:40:57 PM PDT 24 |
Jul 17 07:49:30 PM PDT 24 |
10649204877 ps |
T81 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.2594065811 |
|
|
Jul 17 07:33:09 PM PDT 24 |
Jul 17 07:33:21 PM PDT 24 |
663205810 ps |
T253 |
/workspace/coverage/default/25.sram_ctrl_smoke.3970185685 |
|
|
Jul 17 07:39:40 PM PDT 24 |
Jul 17 07:39:44 PM PDT 24 |
105892506 ps |
T254 |
/workspace/coverage/default/31.sram_ctrl_max_throughput.4134598204 |
|
|
Jul 17 07:40:24 PM PDT 24 |
Jul 17 07:40:33 PM PDT 24 |
122572340 ps |
T255 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.3928833776 |
|
|
Jul 17 07:39:38 PM PDT 24 |
Jul 17 07:40:21 PM PDT 24 |
97509744 ps |
T256 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.1137977299 |
|
|
Jul 17 07:40:14 PM PDT 24 |
Jul 17 07:41:42 PM PDT 24 |
142593945 ps |
T257 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1011067943 |
|
|
Jul 17 07:42:17 PM PDT 24 |
Jul 17 07:42:24 PM PDT 24 |
1463299659 ps |
T258 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.1381570276 |
|
|
Jul 17 07:39:38 PM PDT 24 |
Jul 17 07:42:14 PM PDT 24 |
133367236 ps |
T259 |
/workspace/coverage/default/14.sram_ctrl_regwen.4085294141 |
|
|
Jul 17 07:38:21 PM PDT 24 |
Jul 17 08:02:59 PM PDT 24 |
22743466018 ps |
T260 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2466973647 |
|
|
Jul 17 07:42:15 PM PDT 24 |
Jul 17 07:44:07 PM PDT 24 |
147596528 ps |
T261 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.1024833378 |
|
|
Jul 17 07:40:39 PM PDT 24 |
Jul 17 07:40:44 PM PDT 24 |
151150271 ps |
T262 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.112602252 |
|
|
Jul 17 07:39:38 PM PDT 24 |
Jul 17 07:42:42 PM PDT 24 |
10719820233 ps |
T263 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2496632834 |
|
|
Jul 17 07:41:27 PM PDT 24 |
Jul 17 07:41:34 PM PDT 24 |
229282590 ps |
T128 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.692818331 |
|
|
Jul 17 07:40:33 PM PDT 24 |
Jul 17 07:40:44 PM PDT 24 |
476905774 ps |
T264 |
/workspace/coverage/default/7.sram_ctrl_bijection.2059009342 |
|
|
Jul 17 07:34:11 PM PDT 24 |
Jul 17 07:34:54 PM PDT 24 |
2378366824 ps |
T265 |
/workspace/coverage/default/38.sram_ctrl_ram_cfg.3994998308 |
|
|
Jul 17 07:40:56 PM PDT 24 |
Jul 17 07:40:58 PM PDT 24 |
79545878 ps |
T266 |
/workspace/coverage/default/3.sram_ctrl_executable.1477109726 |
|
|
Jul 17 07:33:12 PM PDT 24 |
Jul 17 07:39:10 PM PDT 24 |
1123568672 ps |
T267 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1182040836 |
|
|
Jul 17 07:32:36 PM PDT 24 |
Jul 17 07:37:11 PM PDT 24 |
42146943615 ps |
T268 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2993172161 |
|
|
Jul 17 07:40:23 PM PDT 24 |
Jul 17 07:42:43 PM PDT 24 |
154972513 ps |
T269 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.3102115838 |
|
|
Jul 17 07:33:16 PM PDT 24 |
Jul 17 07:33:23 PM PDT 24 |
306734530 ps |
T270 |
/workspace/coverage/default/34.sram_ctrl_smoke.1597675825 |
|
|
Jul 17 07:40:32 PM PDT 24 |
Jul 17 07:41:14 PM PDT 24 |
399550639 ps |
T271 |
/workspace/coverage/default/24.sram_ctrl_executable.3384864473 |
|
|
Jul 17 07:39:37 PM PDT 24 |
Jul 17 07:58:39 PM PDT 24 |
85317786109 ps |
T272 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2946640793 |
|
|
Jul 17 07:39:32 PM PDT 24 |
Jul 17 07:42:33 PM PDT 24 |
1601399419 ps |
T273 |
/workspace/coverage/default/23.sram_ctrl_partial_access.1462321303 |
|
|
Jul 17 07:39:38 PM PDT 24 |
Jul 17 07:39:51 PM PDT 24 |
493342569 ps |
T274 |
/workspace/coverage/default/11.sram_ctrl_smoke.1022560641 |
|
|
Jul 17 07:34:18 PM PDT 24 |
Jul 17 07:36:26 PM PDT 24 |
742013548 ps |
T275 |
/workspace/coverage/default/34.sram_ctrl_stress_all.4155333053 |
|
|
Jul 17 07:40:48 PM PDT 24 |
Jul 17 07:45:10 PM PDT 24 |
1778309236 ps |
T276 |
/workspace/coverage/default/12.sram_ctrl_max_throughput.3741978397 |
|
|
Jul 17 07:37:40 PM PDT 24 |
Jul 17 07:40:00 PM PDT 24 |
254226816 ps |
T67 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.3579282490 |
|
|
Jul 17 07:42:17 PM PDT 24 |
Jul 17 07:42:23 PM PDT 24 |
345891249 ps |
T277 |
/workspace/coverage/default/0.sram_ctrl_alert_test.3859182830 |
|
|
Jul 17 07:32:38 PM PDT 24 |
Jul 17 07:32:46 PM PDT 24 |
33409366 ps |
T278 |
/workspace/coverage/default/38.sram_ctrl_multiple_keys.3645911764 |
|
|
Jul 17 07:40:58 PM PDT 24 |
Jul 17 07:58:12 PM PDT 24 |
87575939800 ps |
T279 |
/workspace/coverage/default/46.sram_ctrl_stress_all.447121580 |
|
|
Jul 17 07:42:17 PM PDT 24 |
Jul 17 08:23:52 PM PDT 24 |
6047282793 ps |
T280 |
/workspace/coverage/default/37.sram_ctrl_bijection.2481418620 |
|
|
Jul 17 07:40:41 PM PDT 24 |
Jul 17 07:41:40 PM PDT 24 |
852378660 ps |
T281 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.1061795779 |
|
|
Jul 17 07:40:16 PM PDT 24 |
Jul 17 07:40:21 PM PDT 24 |
61557139 ps |
T282 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3581095319 |
|
|
Jul 17 07:40:19 PM PDT 24 |
Jul 17 07:41:33 PM PDT 24 |
132732740 ps |
T283 |
/workspace/coverage/default/42.sram_ctrl_mem_walk.2309030649 |
|
|
Jul 17 07:41:30 PM PDT 24 |
Jul 17 07:41:44 PM PDT 24 |
660588171 ps |
T284 |
/workspace/coverage/default/17.sram_ctrl_smoke.85267334 |
|
|
Jul 17 07:38:49 PM PDT 24 |
Jul 17 07:40:56 PM PDT 24 |
1410409028 ps |
T285 |
/workspace/coverage/default/35.sram_ctrl_mem_walk.2985603673 |
|
|
Jul 17 07:40:41 PM PDT 24 |
Jul 17 07:40:53 PM PDT 24 |
684071256 ps |
T286 |
/workspace/coverage/default/19.sram_ctrl_executable.3408104943 |
|
|
Jul 17 07:38:58 PM PDT 24 |
Jul 17 07:39:54 PM PDT 24 |
10156708686 ps |
T287 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.3390137352 |
|
|
Jul 17 07:40:49 PM PDT 24 |
Jul 17 07:40:53 PM PDT 24 |
60968340 ps |
T288 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3201564122 |
|
|
Jul 17 07:32:37 PM PDT 24 |
Jul 17 08:03:57 PM PDT 24 |
3290606245 ps |
T289 |
/workspace/coverage/default/49.sram_ctrl_stress_all.2953850834 |
|
|
Jul 17 07:42:19 PM PDT 24 |
Jul 17 08:12:03 PM PDT 24 |
38110326073 ps |
T290 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.184526177 |
|
|
Jul 17 07:40:04 PM PDT 24 |
Jul 17 07:46:15 PM PDT 24 |
14366634913 ps |
T291 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1927598883 |
|
|
Jul 17 07:34:12 PM PDT 24 |
Jul 17 07:38:11 PM PDT 24 |
4895269736 ps |
T292 |
/workspace/coverage/default/22.sram_ctrl_partial_access.52399404 |
|
|
Jul 17 07:39:38 PM PDT 24 |
Jul 17 07:41:10 PM PDT 24 |
179220355 ps |
T293 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2824131938 |
|
|
Jul 17 07:33:08 PM PDT 24 |
Jul 17 07:33:14 PM PDT 24 |
172753564 ps |
T53 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2453013547 |
|
|
Jul 17 07:42:19 PM PDT 24 |
Jul 17 07:42:25 PM PDT 24 |
393780336 ps |
T294 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1813774417 |
|
|
Jul 17 07:34:16 PM PDT 24 |
Jul 17 07:36:25 PM PDT 24 |
644116918 ps |
T295 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.4289219752 |
|
|
Jul 17 07:41:26 PM PDT 24 |
Jul 17 07:46:06 PM PDT 24 |
39562601343 ps |
T296 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2786808209 |
|
|
Jul 17 07:40:56 PM PDT 24 |
Jul 17 07:45:04 PM PDT 24 |
2308582097 ps |
T297 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.1722723378 |
|
|
Jul 17 07:40:26 PM PDT 24 |
Jul 17 07:40:28 PM PDT 24 |
140510134 ps |
T298 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.2609711712 |
|
|
Jul 17 07:34:12 PM PDT 24 |
Jul 17 07:34:31 PM PDT 24 |
140357788 ps |
T299 |
/workspace/coverage/default/17.sram_ctrl_regwen.243463160 |
|
|
Jul 17 07:38:49 PM PDT 24 |
Jul 17 07:59:03 PM PDT 24 |
11784861146 ps |
T300 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.269623940 |
|
|
Jul 17 07:41:33 PM PDT 24 |
Jul 17 07:41:51 PM PDT 24 |
279099774 ps |
T301 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.2006903452 |
|
|
Jul 17 07:41:29 PM PDT 24 |
Jul 17 07:41:31 PM PDT 24 |
126906379 ps |
T302 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1931430204 |
|
|
Jul 17 07:42:16 PM PDT 24 |
Jul 17 07:47:28 PM PDT 24 |
12372293097 ps |
T303 |
/workspace/coverage/default/30.sram_ctrl_smoke.188960793 |
|
|
Jul 17 07:40:16 PM PDT 24 |
Jul 17 07:41:31 PM PDT 24 |
1005059181 ps |
T304 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.3920517199 |
|
|
Jul 17 07:40:55 PM PDT 24 |
Jul 17 07:42:01 PM PDT 24 |
190800132 ps |
T305 |
/workspace/coverage/default/30.sram_ctrl_regwen.4278797047 |
|
|
Jul 17 07:40:41 PM PDT 24 |
Jul 17 07:47:34 PM PDT 24 |
26715045678 ps |
T306 |
/workspace/coverage/default/2.sram_ctrl_lc_escalation.268305346 |
|
|
Jul 17 07:33:07 PM PDT 24 |
Jul 17 07:33:14 PM PDT 24 |
694198205 ps |
T307 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.924662423 |
|
|
Jul 17 07:39:33 PM PDT 24 |
Jul 17 07:39:51 PM PDT 24 |
1044003736 ps |
T308 |
/workspace/coverage/default/16.sram_ctrl_smoke.313081788 |
|
|
Jul 17 07:38:19 PM PDT 24 |
Jul 17 07:40:36 PM PDT 24 |
137776981 ps |
T309 |
/workspace/coverage/default/40.sram_ctrl_partial_access.1300994048 |
|
|
Jul 17 07:41:24 PM PDT 24 |
Jul 17 07:41:43 PM PDT 24 |
2004539366 ps |
T310 |
/workspace/coverage/default/8.sram_ctrl_partial_access.3413898093 |
|
|
Jul 17 07:34:16 PM PDT 24 |
Jul 17 07:34:21 PM PDT 24 |
207790658 ps |
T311 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.3273266790 |
|
|
Jul 17 07:38:52 PM PDT 24 |
Jul 17 07:47:28 PM PDT 24 |
2375619590 ps |
T312 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.2381427470 |
|
|
Jul 17 07:38:54 PM PDT 24 |
Jul 17 07:40:12 PM PDT 24 |
131964486 ps |
T313 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.2721440422 |
|
|
Jul 17 07:40:17 PM PDT 24 |
Jul 17 07:40:28 PM PDT 24 |
5246415487 ps |
T314 |
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1901882765 |
|
|
Jul 17 07:42:19 PM PDT 24 |
Jul 17 07:42:22 PM PDT 24 |
89013035 ps |
T315 |
/workspace/coverage/default/20.sram_ctrl_partial_access_b2b.314334311 |
|
|
Jul 17 07:39:40 PM PDT 24 |
Jul 17 07:45:49 PM PDT 24 |
5250925121 ps |
T316 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2689186396 |
|
|
Jul 17 07:40:18 PM PDT 24 |
Jul 17 07:44:17 PM PDT 24 |
11753880091 ps |
T317 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.100598125 |
|
|
Jul 17 07:38:57 PM PDT 24 |
Jul 17 07:45:14 PM PDT 24 |
30080564688 ps |
T318 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2111458190 |
|
|
Jul 17 07:33:11 PM PDT 24 |
Jul 17 07:35:07 PM PDT 24 |
1274718946 ps |
T319 |
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3964828963 |
|
|
Jul 17 07:34:18 PM PDT 24 |
Jul 17 07:45:20 PM PDT 24 |
20771983198 ps |
T320 |
/workspace/coverage/default/29.sram_ctrl_regwen.2535012543 |
|
|
Jul 17 07:40:07 PM PDT 24 |
Jul 17 07:49:29 PM PDT 24 |
14364852474 ps |
T321 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1134920328 |
|
|
Jul 17 07:42:19 PM PDT 24 |
Jul 17 07:45:02 PM PDT 24 |
639185529 ps |
T322 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.1087514098 |
|
|
Jul 17 07:37:10 PM PDT 24 |
Jul 17 07:37:16 PM PDT 24 |
177643345 ps |
T323 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.633350825 |
|
|
Jul 17 07:40:47 PM PDT 24 |
Jul 17 07:45:59 PM PDT 24 |
63919559421 ps |
T324 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.1581254647 |
|
|
Jul 17 07:40:34 PM PDT 24 |
Jul 17 07:40:37 PM PDT 24 |
83989000 ps |
T325 |
/workspace/coverage/default/5.sram_ctrl_executable.2008496454 |
|
|
Jul 17 07:33:08 PM PDT 24 |
Jul 17 07:42:38 PM PDT 24 |
7113328125 ps |