Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	14163843	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

58315201

1

T1

947

T2

4584

T3

210

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	36138166	1			T1	469		T2	2754		T3	506
values[0x0]	16748828	1			T1	260		T2	1294		T3	168
values[0x1]	19592050	1			T1	218		T2	1536		T3	331

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	7057314	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

65421730

1

T1

947

T2

5060

T3

598

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	266365	1			T1	12		T2	28		T3	3
valid_sources[0x01]	254871	1			T2	27		T3	2		T4	235
valid_sources[0x02]	302015	1			T2	24		T3	5		T4	221
valid_sources[0x03]	268486	1			T1	6		T2	16		T3	5
valid_sources[0x04]	264596	1			T1	1		T2	28		T3	4
valid_sources[0x05]	281607	1			T1	34		T2	30		T3	9
valid_sources[0x06]	280738	1			T2	25		T3	12		T4	251
valid_sources[0x07]	324795	1			T2	13		T3	2		T4	262
valid_sources[0x08]	349054	1			T1	8		T2	17		T3	3
valid_sources[0x09]	305152	1			T1	1		T2	26		T3	3
valid_sources[0x0a]	249021	1			T1	7		T2	28		T3	2
valid_sources[0x0b]	264812	1			T2	19		T3	5		T4	206
valid_sources[0x0c]	304012	1			T2	18		T3	8		T4	227
valid_sources[0x0d]	273382	1			T2	22		T3	2		T4	220
valid_sources[0x0e]	267908	1			T1	2		T2	18		T3	6
valid_sources[0x0f]	288095	1			T1	12		T2	22		T3	5
valid_sources[0x10]	258080	1			T2	23		T4	219		T9	538
valid_sources[0x11]	249119	1			T1	23		T2	30		T3	6
valid_sources[0x12]	270285	1			T2	21		T3	15		T4	230
valid_sources[0x13]	306595	1			T2	19		T3	6		T4	219
valid_sources[0x14]	262204	1			T1	24		T2	18		T3	1
valid_sources[0x15]	287238	1			T2	28		T3	9		T4	206
valid_sources[0x16]	286955	1			T2	19		T3	4		T4	261
valid_sources[0x17]	323392	1			T1	19		T2	22		T3	11
valid_sources[0x18]	284646	1			T1	2		T2	24		T3	4
valid_sources[0x19]	355097	1			T2	26		T3	6		T4	259
valid_sources[0x1a]	265675	1			T2	23		T3	1		T4	228
valid_sources[0x1b]	261188	1			T1	9		T2	22		T3	4
valid_sources[0x1c]	271950	1			T1	8		T2	22		T3	6
valid_sources[0x1d]	282528	1			T2	24		T3	2		T4	236
valid_sources[0x1e]	259554	1			T1	11		T2	16		T3	7
valid_sources[0x1f]	262092	1			T1	4		T2	29		T3	1
valid_sources[0x20]	246774	1			T2	31		T3	1		T4	239
valid_sources[0x21]	261690	1			T2	17		T3	3		T4	203
valid_sources[0x22]	248318	1			T2	16		T3	9		T4	231
valid_sources[0x23]	273096	1			T1	10		T2	20		T3	8
valid_sources[0x24]	255190	1			T1	2		T2	17		T3	1
valid_sources[0x25]	276682	1			T1	17		T2	33		T3	4
valid_sources[0x26]	260297	1			T2	31		T3	5		T4	229
valid_sources[0x27]	281911	1			T2	25		T3	4		T4	235
valid_sources[0x28]	283205	1			T2	29		T3	2		T4	228
valid_sources[0x29]	273617	1			T1	3		T2	29		T3	4
valid_sources[0x2a]	261595	1			T2	33		T4	250		T9	520
valid_sources[0x2b]	254094	1			T2	14		T3	2		T4	216
valid_sources[0x2c]	254004	1			T1	65		T2	17		T3	2
valid_sources[0x2d]	297760	1			T1	7		T2	28		T3	5
valid_sources[0x2e]	290695	1			T2	26		T4	216		T9	516
valid_sources[0x2f]	265625	1			T1	3		T2	22		T3	3
valid_sources[0x30]	282235	1			T2	31		T3	1		T4	252
valid_sources[0x31]	295372	1			T1	17		T2	21		T3	2
valid_sources[0x32]	253276	1			T1	10		T2	24		T3	5
valid_sources[0x33]	289989	1			T2	28		T3	5		T4	215
valid_sources[0x34]	252035	1			T2	19		T3	2		T4	241
valid_sources[0x35]	257082	1			T2	18		T3	2		T4	202
valid_sources[0x36]	362112	1			T1	3		T2	17		T3	2
valid_sources[0x37]	268423	1			T2	28		T3	3		T4	215
valid_sources[0x38]	273373	1			T2	24		T3	1		T4	251
valid_sources[0x39]	330255	1			T1	20		T2	24		T3	6
valid_sources[0x3a]	285132	1			T1	7		T2	23		T3	7
valid_sources[0x3b]	252985	1			T1	17		T2	27		T4	234
valid_sources[0x3c]	276783	1			T1	7		T2	20		T3	4
valid_sources[0x3d]	287202	1			T1	11		T2	23		T3	3
valid_sources[0x3e]	298867	1			T1	17		T2	25		T3	5
valid_sources[0x3f]	272961	1			T2	19		T3	5		T4	216
valid_sources[0x40]	287686	1			T2	28		T4	227		T9	473
valid_sources[0x41]	325689	1			T2	22		T3	6		T4	251
valid_sources[0x42]	308895	1			T2	24		T3	6		T4	228
valid_sources[0x43]	268945	1			T2	20		T3	3		T4	248
valid_sources[0x44]	263324	1			T2	32		T3	1		T4	215
valid_sources[0x45]	259161	1			T1	12		T2	15		T4	217
valid_sources[0x46]	250019	1			T1	13		T2	15		T3	3
valid_sources[0x47]	317036	1			T2	26		T3	1		T4	230
valid_sources[0x48]	344923	1			T1	15		T2	20		T3	4
valid_sources[0x49]	279161	1			T2	23		T3	6		T4	213
valid_sources[0x4a]	248985	1			T2	22		T3	6		T4	274
valid_sources[0x4b]	262922	1			T1	1		T2	26		T3	2
valid_sources[0x4c]	265275	1			T2	14		T3	2		T4	244
valid_sources[0x4d]	284314	1			T1	1		T2	19		T3	6
valid_sources[0x4e]	248810	1			T1	3		T2	22		T3	3
valid_sources[0x4f]	263595	1			T2	16		T3	2		T4	237
valid_sources[0x50]	282313	1			T2	27		T3	7		T4	234
valid_sources[0x51]	247208	1			T2	23		T3	7		T4	194
valid_sources[0x52]	285904	1			T1	7		T2	25		T3	4
valid_sources[0x53]	243206	1			T2	23		T3	3		T4	237
valid_sources[0x54]	331874	1			T2	26		T3	2		T4	245
valid_sources[0x55]	300147	1			T1	19		T2	21		T3	4
valid_sources[0x56]	405485	1			T2	26		T3	2		T4	242
valid_sources[0x57]	289829	1			T1	3		T2	20		T4	249
valid_sources[0x58]	293446	1			T1	20		T2	21		T3	2
valid_sources[0x59]	351446	1			T2	12		T3	2		T4	217
valid_sources[0x5a]	270339	1			T1	11		T2	21		T3	4
valid_sources[0x5b]	271955	1			T2	25		T3	3		T4	216
valid_sources[0x5c]	261717	1			T2	17		T3	12		T4	202
valid_sources[0x5d]	269254	1			T2	21		T3	4		T4	233
valid_sources[0x5e]	256769	1			T2	29		T4	208		T9	487
valid_sources[0x5f]	268662	1			T1	5		T2	18		T3	1
valid_sources[0x60]	296803	1			T1	29		T2	18		T3	1
valid_sources[0x61]	289888	1			T2	27		T3	1		T4	200
valid_sources[0x62]	277723	1			T2	18		T3	5		T4	209
valid_sources[0x63]	256354	1			T2	18		T3	5		T4	259
valid_sources[0x64]	304092	1			T1	1		T2	23		T3	2
valid_sources[0x65]	293614	1			T2	14		T3	4		T4	217
valid_sources[0x66]	344166	1			T2	23		T3	2		T4	253
valid_sources[0x67]	278452	1			T2	28		T3	1		T4	199
valid_sources[0x68]	275962	1			T2	29		T3	3		T4	225
valid_sources[0x69]	365193	1			T1	6		T2	28		T3	2
valid_sources[0x6a]	292783	1			T2	20		T3	1		T4	212
valid_sources[0x6b]	282748	1			T2	22		T3	4		T4	269
valid_sources[0x6c]	268253	1			T1	5		T2	26		T3	3
valid_sources[0x6d]	267429	1			T2	26		T3	5		T4	209
valid_sources[0x6e]	284519	1			T2	18		T4	280		T9	503
valid_sources[0x6f]	303708	1			T1	6		T2	28		T3	3
valid_sources[0x70]	286520	1			T2	28		T3	5		T4	264
valid_sources[0x71]	266961	1			T1	5		T2	13		T3	7
valid_sources[0x72]	281341	1			T2	22		T3	1		T4	254
valid_sources[0x73]	264659	1			T2	19		T3	3		T4	205
valid_sources[0x74]	313801	1			T1	1		T2	20		T3	3
valid_sources[0x75]	280796	1			T2	23		T3	3		T4	220
valid_sources[0x76]	347940	1			T2	20		T3	6		T4	214
valid_sources[0x77]	374689	1			T1	2		T2	15		T3	9
valid_sources[0x78]	327487	1			T1	14		T2	13		T3	3
valid_sources[0x79]	272962	1			T2	28		T3	3		T4	218
valid_sources[0x7a]	311854	1			T2	20		T3	3		T4	225
valid_sources[0x7b]	258771	1			T2	18		T3	6		T4	238
valid_sources[0x7c]	278482	1			T1	11		T2	27		T3	2
valid_sources[0x7d]	332516	1			T2	12		T3	3		T4	224
valid_sources[0x7e]	262224	1			T2	25		T3	1		T4	238
valid_sources[0x7f]	256426	1			T1	22		T2	18		T3	3
valid_sources[0x80]	298920	1			T2	26		T3	6		T4	248

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

29062872

1

T1

469

T2

2272

T3

110

values[0x0]

all_enables

biggest_size

14623897

1

T1

260

T2

1133

T3

44

values[0x1]

all_enables

biggest_size

14628432

1

T1

218

T2

1179

T3

56

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	35367	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

121597

1

T1

1

T3

1

T4

2756

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	46328	1			T4	774		T20	983		T22	11
values[0x0]	53285	1			T3	1		T4	1035		T8	7
values[0x1]	57351	1			T1	2		T2	2		T4	1223

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	26770	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

130194

1

T1

1

T3

1

T4

2902

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	620	1			T4	1		T20	10		T25	4
valid_sources[0x01]	518	1			T20	10		T51	1		T25	7
valid_sources[0x02]	513	1			T4	3		T20	4		T106	1
valid_sources[0x03]	456	1			T4	1		T20	5		T25	3
valid_sources[0x04]	667	1			T11	4		T20	34		T142	7
valid_sources[0x05]	502	1			T11	1		T20	11		T14	11
valid_sources[0x06]	590	1			T4	3		T20	23		T25	6
valid_sources[0x07]	708	1			T4	6		T20	34		T25	6
valid_sources[0x08]	658	1			T4	65		T20	10		T139	1
valid_sources[0x09]	574	1			T10	2		T20	18		T25	9
valid_sources[0x0a]	585	1			T9	1		T20	6		T143	2
valid_sources[0x0b]	585	1			T20	18		T16	3		T25	7
valid_sources[0x0c]	536	1			T20	33		T21	1		T144	20
valid_sources[0x0d]	556	1			T4	1		T20	28		T25	8
valid_sources[0x0e]	861	1			T20	7		T106	1		T25	8
valid_sources[0x0f]	555	1			T4	1		T13	2		T20	26
valid_sources[0x10]	475	1			T4	1		T20	20		T25	7
valid_sources[0x11]	528	1			T20	6		T75	2		T139	1
valid_sources[0x12]	568	1			T20	7		T25	8		T68	21
valid_sources[0x13]	512	1			T4	13		T20	10		T25	5
valid_sources[0x14]	535	1			T4	2		T20	14		T77	20
valid_sources[0x15]	449	1			T20	7		T21	1		T75	1
valid_sources[0x16]	740	1			T4	1		T20	9		T25	8
valid_sources[0x17]	534	1			T20	23		T75	1		T6	10
valid_sources[0x18]	402	1			T20	11		T25	11		T68	8
valid_sources[0x19]	568	1			T4	1		T20	3		T28	2
valid_sources[0x1a]	488	1			T1	1		T20	23		T25	5
valid_sources[0x1b]	542	1			T20	15		T25	1		T68	1
valid_sources[0x1c]	513	1			T20	8		T25	5		T68	12
valid_sources[0x1d]	596	1			T4	20		T20	8		T24	2
valid_sources[0x1e]	680	1			T4	1		T20	7		T75	1
valid_sources[0x1f]	426	1			T4	1		T20	24		T50	2
valid_sources[0x20]	678	1			T4	2		T20	30		T65	1
valid_sources[0x21]	503	1			T20	11		T78	1		T25	6
valid_sources[0x22]	563	1			T4	1		T20	18		T139	1
valid_sources[0x23]	533	1			T4	2		T20	21		T25	4
valid_sources[0x24]	479	1			T20	18		T25	6		T63	1
valid_sources[0x25]	527	1			T4	3		T20	10		T139	1
valid_sources[0x26]	620	1			T20	32		T64	1		T25	5
valid_sources[0x27]	649	1			T4	133		T20	22		T25	9
valid_sources[0x28]	470	1			T20	3		T106	1		T25	6
valid_sources[0x29]	756	1			T4	83		T20	2		T47	2
valid_sources[0x2a]	562	1			T20	30		T25	4		T68	8
valid_sources[0x2b]	588	1			T4	40		T20	16		T22	1
valid_sources[0x2c]	956	1			T25	3		T68	39		T57	2
valid_sources[0x2d]	628	1			T20	3		T6	3		T25	5
valid_sources[0x2e]	496	1			T142	4		T25	4		T68	1
valid_sources[0x2f]	625	1			T8	1		T20	60		T6	4
valid_sources[0x30]	712	1			T4	2		T20	28		T14	2
valid_sources[0x31]	678	1			T20	11		T25	5		T63	1
valid_sources[0x32]	566	1			T20	4		T25	7		T68	18
valid_sources[0x33]	555	1			T4	1		T20	17		T16	1
valid_sources[0x34]	717	1			T20	13		T106	1		T76	1
valid_sources[0x35]	560	1			T4	1		T20	16		T15	1
valid_sources[0x36]	807	1			T4	234		T20	7		T25	8
valid_sources[0x37]	573	1			T8	1		T25	6		T68	39
valid_sources[0x38]	459	1			T20	3		T25	5		T68	15
valid_sources[0x39]	799	1			T4	8		T20	5		T143	2
valid_sources[0x3a]	604	1			T20	4		T25	7		T63	1
valid_sources[0x3b]	589	1			T20	18		T51	1		T6	1
valid_sources[0x3c]	582	1			T20	34		T25	5		T68	11
valid_sources[0x3d]	696	1			T20	36		T42	2		T25	4
valid_sources[0x3e]	630	1			T20	17		T108	1		T25	7
valid_sources[0x3f]	586	1			T20	3		T25	6		T68	22
valid_sources[0x40]	641	1			T8	1		T20	19		T25	8
valid_sources[0x41]	577	1			T20	6		T25	9		T63	1
valid_sources[0x42]	1336	1			T4	89		T20	13		T25	7
valid_sources[0x43]	640	1			T4	4		T20	26		T25	4
valid_sources[0x44]	609	1			T4	13		T9	1		T20	29
valid_sources[0x45]	645	1			T4	3		T20	8		T47	1
valid_sources[0x46]	606	1			T4	5		T20	26		T22	2
valid_sources[0x47]	941	1			T20	21		T25	4		T68	8
valid_sources[0x48]	679	1			T4	3		T20	3		T51	1
valid_sources[0x49]	596	1			T8	1		T20	12		T25	5
valid_sources[0x4a]	507	1			T20	19		T25	6		T68	10
valid_sources[0x4b]	593	1			T4	1		T20	15		T64	1
valid_sources[0x4c]	767	1			T20	60		T25	8		T68	34
valid_sources[0x4d]	639	1			T20	1		T75	1		T79	1
valid_sources[0x4e]	479	1			T20	12		T25	7		T68	17
valid_sources[0x4f]	573	1			T20	15		T75	1		T25	1
valid_sources[0x50]	581	1			T4	1		T20	46		T45	7
valid_sources[0x51]	413	1			T20	6		T21	1		T25	9
valid_sources[0x52]	744	1			T20	6		T64	1		T25	3
valid_sources[0x53]	703	1			T8	1		T20	5		T21	1
valid_sources[0x54]	637	1			T20	13		T75	1		T25	8
valid_sources[0x55]	584	1			T4	1		T20	30		T51	1
valid_sources[0x56]	553	1			T20	22		T25	2		T63	2
valid_sources[0x57]	524	1			T9	1		T20	27		T25	4
valid_sources[0x58]	808	1			T4	1		T20	8		T25	8
valid_sources[0x59]	665	1			T20	5		T6	3		T25	12
valid_sources[0x5a]	556	1			T20	30		T25	7		T68	24
valid_sources[0x5b]	501	1			T20	11		T28	1		T21	1
valid_sources[0x5c]	656	1			T20	5		T25	7		T68	27
valid_sources[0x5d]	756	1			T9	1		T20	33		T28	12
valid_sources[0x5e]	631	1			T20	22		T15	3		T139	1
valid_sources[0x5f]	516	1			T4	96		T20	3		T25	6
valid_sources[0x60]	506	1			T20	8		T21	1		T25	5
valid_sources[0x61]	786	1			T4	1		T20	28		T28	2
valid_sources[0x62]	572	1			T4	2		T20	44		T51	1
valid_sources[0x63]	746	1			T4	60		T20	8		T28	2
valid_sources[0x64]	633	1			T25	5		T68	27		T57	2
valid_sources[0x65]	740	1			T20	11		T25	9		T68	15
valid_sources[0x66]	605	1			T20	31		T16	1		T25	9
valid_sources[0x67]	533	1			T4	2		T20	2		T75	1
valid_sources[0x68]	550	1			T20	23		T28	1		T25	3
valid_sources[0x69]	646	1			T4	1		T20	10		T25	9
valid_sources[0x6a]	594	1			T8	1		T20	4		T28	1
valid_sources[0x6b]	590	1			T4	79		T20	18		T25	2
valid_sources[0x6c]	655	1			T20	27		T142	4		T25	11
valid_sources[0x6d]	698	1			T4	1		T20	35		T29	1
valid_sources[0x6e]	491	1			T4	1		T20	7		T28	1
valid_sources[0x6f]	505	1			T20	9		T25	4		T68	18
valid_sources[0x70]	600	1			T20	13		T142	1		T25	8
valid_sources[0x71]	577	1			T20	9		T22	13		T139	2
valid_sources[0x72]	731	1			T4	1		T20	21		T25	4
valid_sources[0x73]	581	1			T4	4		T20	3		T28	1
valid_sources[0x74]	635	1			T4	1		T9	1		T20	8
valid_sources[0x75]	556	1			T20	8		T145	1		T25	4
valid_sources[0x76]	563	1			T20	8		T25	11		T63	2
valid_sources[0x77]	580	1			T20	13		T6	3		T146	1
valid_sources[0x78]	620	1			T20	19		T25	8		T68	23
valid_sources[0x79]	769	1			T4	99		T20	29		T25	3
valid_sources[0x7a]	509	1			T20	18		T65	2		T25	3
valid_sources[0x7b]	529	1			T20	18		T25	8		T63	1
valid_sources[0x7c]	779	1			T20	1		T47	3		T25	2
valid_sources[0x7d]	470	1			T4	1		T20	14		T25	5
valid_sources[0x7e]	504	1			T20	6		T25	6		T68	20
valid_sources[0x7f]	517	1			T20	18		T25	6		T68	4
valid_sources[0x80]	565	1			T4	1		T20	1		T137	38

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

33627

1

T4

710

T20

873

T22

4

values[0x0]

all_enables

biggest_size

45033

1

T3

1

T4

1008

T8

3

values[0x1]

all_enables

biggest_size

42937

1

T1

1

T4

1038

T8

1