| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.217341226 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1327984542 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2767093636 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1200606802 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.696639662 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.279746691 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1551745698 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1067655166 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.4192668045 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.740479442 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.813714078 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2485013565 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3040710023 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2552516432 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.4113409006 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2366913443 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1416508518 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2048788009 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3242848750 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.4192876293 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.765482693 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2020794476 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1444226615 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.922943813 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2720478368 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.3705396997 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.790206500 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1158264381 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3991159507 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2885330100 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2858184293 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3574451790 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1845109816 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1431972930 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.3219148647 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3594319337 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4050757113 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.301047201 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2379940007 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1078362691 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.656015383 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3698421736 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.183495358 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1962873523 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1708452015 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.3777360411 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1028852241 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1729498237 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1943140247 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1176148288 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.345813433 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1468398122 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3670521425 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3443444958 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.4108675790 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.3238301158 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1070647402 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.978609443 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1360439111 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2758649375 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2777215032 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1619981281 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.1581471386 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1633304029 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.795986992 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1737363899 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.272253928 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4183205592 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3294169941 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1822156302 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1130138689 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.834749991 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.535542255 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3876970809 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.649454144 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.277418275 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3347380945 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.737580517 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2405318321 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1516948319 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.1703536013 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3725188715 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1281519103 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.842963799 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1346177998 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1698869977 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.245250468 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1798682226 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.3851312842 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1337823144 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1631305096 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2175593693 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1553993917 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1941772441 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3843690149 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2659456145 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.2001750078 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1818524405 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3963466615 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.790727852 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3896901310 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.28733661 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2681305674 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3726076838 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.517952544 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3327018487 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1543846132 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3472231233 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2780145530 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2129995043 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.4098455252 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.4226284330 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.13683018 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1497960987 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1402255657 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2386696554 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2136876265 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2026377016 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.4149217261 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1107483781 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.4294029751 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3144159 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.269076950 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.296880607 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2134185532 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3441636035 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1809358940 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3153511040 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.19856295 |
| /workspace/coverage/default/0.sram_ctrl_bijection.2983113909 |
| /workspace/coverage/default/0.sram_ctrl_executable.1555361651 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.2787135638 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.559065192 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.2038349599 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.4242594066 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.1605725339 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.273823544 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.817250837 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.2101921282 |
| /workspace/coverage/default/0.sram_ctrl_regwen.73305748 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.3591914351 |
| /workspace/coverage/default/0.sram_ctrl_smoke.1592754623 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.2878784068 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.94419471 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4028524269 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2335595343 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.3116568899 |
| /workspace/coverage/default/1.sram_ctrl_bijection.3749919485 |
| /workspace/coverage/default/1.sram_ctrl_executable.970946465 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.967697354 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.3918666340 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.139061175 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.450559483 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.718753633 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.2346584299 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.273035098 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.325700464 |
| /workspace/coverage/default/1.sram_ctrl_regwen.2125703392 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.4105241955 |
| /workspace/coverage/default/1.sram_ctrl_smoke.2699116321 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.1949698510 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.2757587951 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1760754260 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.3958736848 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.2611863920 |
| /workspace/coverage/default/10.sram_ctrl_bijection.2131035219 |
| /workspace/coverage/default/10.sram_ctrl_executable.4290890941 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.2825199023 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.523190918 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.4196397903 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.2386174458 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.1488451804 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.1350503042 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.635414141 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.661748907 |
| /workspace/coverage/default/10.sram_ctrl_regwen.1548958601 |
| /workspace/coverage/default/10.sram_ctrl_smoke.2456827614 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3444059351 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2240949434 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.341048470 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.3995388372 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.3243469019 |
| /workspace/coverage/default/11.sram_ctrl_bijection.4270115232 |
| /workspace/coverage/default/11.sram_ctrl_executable.3540031079 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.2756845107 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.3907110747 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.2041910295 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.2135200458 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.2196919392 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.2313215436 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.3643195799 |
| /workspace/coverage/default/11.sram_ctrl_regwen.3005072593 |
| /workspace/coverage/default/11.sram_ctrl_smoke.1596246015 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.1609479825 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.4172670611 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1140742067 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3150031933 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.854019458 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.515259977 |
| /workspace/coverage/default/12.sram_ctrl_bijection.2209475159 |
| /workspace/coverage/default/12.sram_ctrl_executable.1594819854 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.2975224997 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.1577724665 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.1264508141 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.2875710263 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.1847635883 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.3029349473 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.1619222200 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.2792589297 |
| /workspace/coverage/default/12.sram_ctrl_regwen.2668746458 |
| /workspace/coverage/default/12.sram_ctrl_smoke.671142396 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.1173380404 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2719293126 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3658442167 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2984591035 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.1797127267 |
| /workspace/coverage/default/13.sram_ctrl_bijection.2714385661 |
| /workspace/coverage/default/13.sram_ctrl_executable.3618683598 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.3721234525 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.4250677093 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.2099542234 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.1134700922 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.2244980336 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.3508990807 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3903811312 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.134655127 |
| /workspace/coverage/default/13.sram_ctrl_regwen.2670412877 |
| /workspace/coverage/default/13.sram_ctrl_smoke.3131119705 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.1843284431 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.307517998 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3141854236 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1504362603 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.1023387970 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.2826776787 |
| /workspace/coverage/default/14.sram_ctrl_bijection.3039239775 |
| /workspace/coverage/default/14.sram_ctrl_executable.3982442195 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.4014864537 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.2778326934 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.380817660 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.4033967451 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.4140641338 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.248247843 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3644005394 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.3987410356 |
| /workspace/coverage/default/14.sram_ctrl_regwen.1821267559 |
| /workspace/coverage/default/14.sram_ctrl_smoke.208368469 |
| /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.1193940356 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.2873217642 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.1711855965 |
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| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.889043923 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.908634209 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.217643686 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.163356480 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3184136922 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.873041640 |
| /workspace/coverage/default/43.sram_ctrl_regwen.1175848841 |
| /workspace/coverage/default/43.sram_ctrl_smoke.4005266816 |
| /workspace/coverage/default/43.sram_ctrl_stress_all.291417504 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3967605140 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3833561722 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.3685265068 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.1169884532 |
| /workspace/coverage/default/44.sram_ctrl_bijection.3031311498 |
| /workspace/coverage/default/44.sram_ctrl_executable.557574948 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.1936437314 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.1680878238 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.91268130 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.1337847491 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.890064378 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.88243702 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3271760277 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.3025702942 |
| /workspace/coverage/default/44.sram_ctrl_regwen.1286930084 |
| /workspace/coverage/default/44.sram_ctrl_smoke.2264411621 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.3273874217 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.3825776006 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2048603351 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3750524731 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.2321305151 |
| /workspace/coverage/default/45.sram_ctrl_bijection.4058014384 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.1808172513 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.3323253266 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.4168919178 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.4038572123 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.3291101100 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.1683843416 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.921848756 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.380887547 |
| /workspace/coverage/default/45.sram_ctrl_regwen.3267247606 |
| /workspace/coverage/default/45.sram_ctrl_smoke.2020369224 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.1150115175 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.2223006547 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1862564540 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2173659025 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.1282839553 |
| /workspace/coverage/default/46.sram_ctrl_bijection.2465481761 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.1512245028 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.851069377 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2441510008 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.2807343278 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.3819036858 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.2778889542 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2142769403 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.3679193974 |
| /workspace/coverage/default/46.sram_ctrl_regwen.2949606604 |
| /workspace/coverage/default/46.sram_ctrl_smoke.2917457546 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.1601567464 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1768343872 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3978952919 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2154979473 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.303997735 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.3566976646 |
| /workspace/coverage/default/47.sram_ctrl_bijection.315981898 |
| /workspace/coverage/default/47.sram_ctrl_executable.2535044690 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.2001995832 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.2326011764 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1230746398 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.3619996924 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.710704321 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.3486716253 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3837916593 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.2166184679 |
| /workspace/coverage/default/47.sram_ctrl_regwen.2622491615 |
| /workspace/coverage/default/47.sram_ctrl_smoke.2395509615 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.379503895 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.3881824819 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3548284483 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.2793799896 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.3606431920 |
| /workspace/coverage/default/48.sram_ctrl_bijection.1539306656 |
| /workspace/coverage/default/48.sram_ctrl_executable.478809927 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.265457239 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.616820125 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.2241170945 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.3026897892 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.180282738 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.3965878853 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.911152746 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.349019933 |
| /workspace/coverage/default/48.sram_ctrl_regwen.2509776036 |
| /workspace/coverage/default/48.sram_ctrl_smoke.765894113 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.1067515241 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2930075400 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.4246966760 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2875791838 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.1960431415 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.652655016 |
| /workspace/coverage/default/49.sram_ctrl_bijection.3809225582 |
| /workspace/coverage/default/49.sram_ctrl_executable.3820648629 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.2000558419 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.4115425846 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.4208014680 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.2034525902 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.2970422636 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.4056514979 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2416418769 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.3810436553 |
| /workspace/coverage/default/49.sram_ctrl_regwen.891587780 |
| /workspace/coverage/default/49.sram_ctrl_smoke.485535898 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.1892256511 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3561635478 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.616298497 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.2469338030 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.948448521 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.630131453 |
| /workspace/coverage/default/5.sram_ctrl_bijection.3565527698 |
| /workspace/coverage/default/5.sram_ctrl_executable.289719091 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.2905001097 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.3680160053 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.492745279 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.2180543104 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.45375615 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.1162666503 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3879026233 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.3479029285 |
| /workspace/coverage/default/5.sram_ctrl_regwen.2490136918 |
| /workspace/coverage/default/5.sram_ctrl_smoke.1938255349 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.53900879 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.57637760 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.2998396812 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3658184256 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.288339259 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.1965140944 |
| /workspace/coverage/default/6.sram_ctrl_bijection.1338815967 |
| /workspace/coverage/default/6.sram_ctrl_executable.3159824785 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.2028370247 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.2810447696 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1659960216 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.1921849120 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.3837601059 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.370500184 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.290827782 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.3107237433 |
| /workspace/coverage/default/6.sram_ctrl_regwen.2222593247 |
| /workspace/coverage/default/6.sram_ctrl_smoke.1980459196 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.2069992333 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1733331924 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.4250584734 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3462174154 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.2013139761 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.288011833 |
| /workspace/coverage/default/7.sram_ctrl_bijection.3541895660 |
| /workspace/coverage/default/7.sram_ctrl_executable.4288887278 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.778379632 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.2916638073 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3979443138 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.3359950878 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.41877851 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.2409395795 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2394082300 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.3041238250 |
| /workspace/coverage/default/7.sram_ctrl_smoke.275940366 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.2203231745 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3522234319 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.1390075379 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1842729796 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3070195278 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.540580799 |
| /workspace/coverage/default/8.sram_ctrl_bijection.1670533794 |
| /workspace/coverage/default/8.sram_ctrl_executable.2978112951 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.3719745676 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.1626280184 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.816538070 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.772804699 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.3725944376 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.2565440244 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.667871955 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.1849519831 |
| /workspace/coverage/default/8.sram_ctrl_regwen.1316184232 |
| /workspace/coverage/default/8.sram_ctrl_smoke.1422309996 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.2891523852 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.3266132384 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1885789671 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.4148358096 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.3553291177 |
| /workspace/coverage/default/9.sram_ctrl_bijection.404111633 |
| /workspace/coverage/default/9.sram_ctrl_executable.3611273581 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.3143742536 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.1582728540 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.513850534 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.581774195 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.693491745 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.3100131042 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2510739928 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.3085063548 |
| /workspace/coverage/default/9.sram_ctrl_regwen.3730978218 |
| /workspace/coverage/default/9.sram_ctrl_smoke.3210155463 |
| /workspace/coverage/default/9.sram_ctrl_stress_all.3702362130 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.3156242351 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.4122783311 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1892104320 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/15.sram_ctrl_multiple_keys.1038976527 |
|
|
Jul 20 05:03:11 PM PDT 24 |
Jul 20 05:07:55 PM PDT 24 |
12630076728 ps |
| T2 |
/workspace/coverage/default/45.sram_ctrl_executable.1269442925 |
|
|
Jul 20 05:11:21 PM PDT 24 |
Jul 20 05:33:15 PM PDT 24 |
18698386077 ps |
| T3 |
/workspace/coverage/default/33.sram_ctrl_max_throughput.803109530 |
|
|
Jul 20 05:08:18 PM PDT 24 |
Jul 20 05:09:44 PM PDT 24 |
463877938 ps |
| T5 |
/workspace/coverage/default/24.sram_ctrl_bijection.1029910842 |
|
|
Jul 20 05:05:43 PM PDT 24 |
Jul 20 05:06:26 PM PDT 24 |
2410449753 ps |
| T4 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.3893358692 |
|
|
Jul 20 05:05:10 PM PDT 24 |
Jul 20 05:07:21 PM PDT 24 |
1419453689 ps |
| T9 |
/workspace/coverage/default/41.sram_ctrl_alert_test.3826617769 |
|
|
Jul 20 05:10:23 PM PDT 24 |
Jul 20 05:10:24 PM PDT 24 |
22108678 ps |
| T10 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2136625966 |
|
|
Jul 20 05:02:22 PM PDT 24 |
Jul 20 05:10:19 PM PDT 24 |
35645453860 ps |
| T11 |
/workspace/coverage/default/37.sram_ctrl_regwen.4145752710 |
|
|
Jul 20 05:09:09 PM PDT 24 |
Jul 20 05:26:08 PM PDT 24 |
8287790026 ps |
| T12 |
/workspace/coverage/default/19.sram_ctrl_smoke.872566492 |
|
|
Jul 20 05:04:13 PM PDT 24 |
Jul 20 05:04:32 PM PDT 24 |
68671788 ps |
| T13 |
/workspace/coverage/default/46.sram_ctrl_executable.1131840538 |
|
|
Jul 20 05:11:29 PM PDT 24 |
Jul 20 05:29:35 PM PDT 24 |
16680733111 ps |
| T27 |
/workspace/coverage/default/38.sram_ctrl_regwen.1975732191 |
|
|
Jul 20 05:09:25 PM PDT 24 |
Jul 20 05:29:59 PM PDT 24 |
39392195030 ps |
| T42 |
/workspace/coverage/default/11.sram_ctrl_smoke.1596246015 |
|
|
Jul 20 05:02:18 PM PDT 24 |
Jul 20 05:03:31 PM PDT 24 |
2698841839 ps |
| T43 |
/workspace/coverage/default/31.sram_ctrl_partial_access.3008726257 |
|
|
Jul 20 05:07:37 PM PDT 24 |
Jul 20 05:07:42 PM PDT 24 |
518004576 ps |
| T14 |
/workspace/coverage/default/8.sram_ctrl_alert_test.540580799 |
|
|
Jul 20 05:01:59 PM PDT 24 |
Jul 20 05:02:01 PM PDT 24 |
21138619 ps |
| T28 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.3258459457 |
|
|
Jul 20 05:08:46 PM PDT 24 |
Jul 20 05:08:47 PM PDT 24 |
26253300 ps |
| T80 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2510739928 |
|
|
Jul 20 05:02:00 PM PDT 24 |
Jul 20 05:06:06 PM PDT 24 |
9449464986 ps |
| T75 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1400908170 |
|
|
Jul 20 05:06:25 PM PDT 24 |
Jul 20 05:10:36 PM PDT 24 |
33968077994 ps |
| T29 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3041238250 |
|
|
Jul 20 05:01:37 PM PDT 24 |
Jul 20 05:01:39 PM PDT 24 |
47886846 ps |
| T30 |
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3085063548 |
|
|
Jul 20 05:02:10 PM PDT 24 |
Jul 20 05:02:12 PM PDT 24 |
306495977 ps |
| T44 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.253080994 |
|
|
Jul 20 05:01:24 PM PDT 24 |
Jul 20 05:20:02 PM PDT 24 |
15357409489 ps |
| T20 |
/workspace/coverage/default/0.sram_ctrl_bijection.2983113909 |
|
|
Jul 20 05:01:03 PM PDT 24 |
Jul 20 05:01:55 PM PDT 24 |
2838871441 ps |
| T21 |
/workspace/coverage/default/9.sram_ctrl_stress_all.3702362130 |
|
|
Jul 20 05:02:09 PM PDT 24 |
Jul 20 05:40:35 PM PDT 24 |
17201540254 ps |
| T6 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1808172513 |
|
|
Jul 20 05:11:13 PM PDT 24 |
Jul 20 05:11:18 PM PDT 24 |
1455845270 ps |
| T47 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.1201469686 |
|
|
Jul 20 05:03:41 PM PDT 24 |
Jul 20 05:03:47 PM PDT 24 |
99663801 ps |
| T15 |
/workspace/coverage/default/28.sram_ctrl_alert_test.524410201 |
|
|
Jul 20 05:07:11 PM PDT 24 |
Jul 20 05:07:12 PM PDT 24 |
15937328 ps |
| T60 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.3646210627 |
|
|
Jul 20 05:08:05 PM PDT 24 |
Jul 20 05:08:07 PM PDT 24 |
91006449 ps |
| T61 |
/workspace/coverage/default/36.sram_ctrl_multiple_keys.1301783345 |
|
|
Jul 20 05:08:42 PM PDT 24 |
Jul 20 05:20:23 PM PDT 24 |
12507088346 ps |
| T62 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1504362603 |
|
|
Jul 20 05:02:58 PM PDT 24 |
Jul 20 05:03:35 PM PDT 24 |
331235989 ps |
| T7 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3955384276 |
|
|
Jul 20 05:05:00 PM PDT 24 |
Jul 20 05:05:05 PM PDT 24 |
826941830 ps |
| T63 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2150898656 |
|
|
Jul 20 05:03:47 PM PDT 24 |
Jul 20 05:11:16 PM PDT 24 |
4469592091 ps |
| T16 |
/workspace/coverage/default/26.sram_ctrl_alert_test.347758938 |
|
|
Jul 20 05:06:33 PM PDT 24 |
Jul 20 05:06:34 PM PDT 24 |
36214062 ps |
| T64 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1683843416 |
|
|
Jul 20 05:11:14 PM PDT 24 |
Jul 20 05:11:20 PM PDT 24 |
306266296 ps |
| T65 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.341048470 |
|
|
Jul 20 05:02:16 PM PDT 24 |
Jul 20 05:04:38 PM PDT 24 |
597689695 ps |
| T112 |
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2757587951 |
|
|
Jul 20 05:01:09 PM PDT 24 |
Jul 20 05:06:14 PM PDT 24 |
12166549515 ps |
| T142 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.512339846 |
|
|
Jul 20 05:05:42 PM PDT 24 |
Jul 20 05:16:43 PM PDT 24 |
20258855945 ps |
| T8 |
/workspace/coverage/default/15.sram_ctrl_lc_escalation.297622366 |
|
|
Jul 20 05:03:23 PM PDT 24 |
Jul 20 05:03:32 PM PDT 24 |
2235464158 ps |
| T45 |
/workspace/coverage/default/2.sram_ctrl_access_during_key_req.3491168374 |
|
|
Jul 20 05:01:19 PM PDT 24 |
Jul 20 05:20:51 PM PDT 24 |
9771077335 ps |
| T48 |
/workspace/coverage/default/31.sram_ctrl_mem_partial_access.1622132040 |
|
|
Jul 20 05:07:57 PM PDT 24 |
Jul 20 05:08:04 PM PDT 24 |
187537128 ps |
| T22 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.1433618186 |
|
|
Jul 20 05:04:32 PM PDT 24 |
Jul 20 05:06:18 PM PDT 24 |
238548039 ps |
| T68 |
/workspace/coverage/default/23.sram_ctrl_executable.3675800942 |
|
|
Jul 20 05:05:26 PM PDT 24 |
Jul 20 05:23:33 PM PDT 24 |
8182131927 ps |
| T69 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.767766881 |
|
|
Jul 20 05:06:45 PM PDT 24 |
Jul 20 05:06:53 PM PDT 24 |
273134210 ps |
| T25 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3561635478 |
|
|
Jul 20 05:12:24 PM PDT 24 |
Jul 20 05:12:34 PM PDT 24 |
856232567 ps |
| T56 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.2575177729 |
|
|
Jul 20 05:04:29 PM PDT 24 |
Jul 20 05:04:40 PM PDT 24 |
219263023 ps |
| T70 |
/workspace/coverage/default/4.sram_ctrl_partial_access.2863981408 |
|
|
Jul 20 05:01:25 PM PDT 24 |
Jul 20 05:01:43 PM PDT 24 |
1900739639 ps |
| T23 |
/workspace/coverage/default/15.sram_ctrl_regwen.366161982 |
|
|
Jul 20 05:03:24 PM PDT 24 |
Jul 20 05:25:40 PM PDT 24 |
12627556889 ps |
| T71 |
/workspace/coverage/default/31.sram_ctrl_executable.226045443 |
|
|
Jul 20 05:07:47 PM PDT 24 |
Jul 20 05:21:48 PM PDT 24 |
38822591139 ps |
| T26 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2930075400 |
|
|
Jul 20 05:12:03 PM PDT 24 |
Jul 20 05:12:22 PM PDT 24 |
804697848 ps |
| T82 |
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2196919392 |
|
|
Jul 20 05:02:18 PM PDT 24 |
Jul 20 05:29:58 PM PDT 24 |
43064074401 ps |
| T143 |
/workspace/coverage/default/28.sram_ctrl_bijection.2041951159 |
|
|
Jul 20 05:06:56 PM PDT 24 |
Jul 20 05:07:43 PM PDT 24 |
11741909829 ps |
| T146 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.1211540713 |
|
|
Jul 20 05:08:27 PM PDT 24 |
Jul 20 05:08:28 PM PDT 24 |
126518907 ps |
| T52 |
/workspace/coverage/default/22.sram_ctrl_mem_walk.264051411 |
|
|
Jul 20 05:05:17 PM PDT 24 |
Jul 20 05:05:29 PM PDT 24 |
1510274864 ps |
| T141 |
/workspace/coverage/default/42.sram_ctrl_executable.3358242072 |
|
|
Jul 20 05:10:31 PM PDT 24 |
Jul 20 05:21:19 PM PDT 24 |
5229914503 ps |
| T147 |
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3107237433 |
|
|
Jul 20 05:01:36 PM PDT 24 |
Jul 20 05:01:37 PM PDT 24 |
30189311 ps |
| T46 |
/workspace/coverage/default/27.sram_ctrl_access_during_key_req.634030569 |
|
|
Jul 20 05:06:56 PM PDT 24 |
Jul 20 05:15:07 PM PDT 24 |
11884743875 ps |
| T148 |
/workspace/coverage/default/33.sram_ctrl_alert_test.1935427241 |
|
|
Jul 20 05:08:30 PM PDT 24 |
Jul 20 05:08:31 PM PDT 24 |
16439368 ps |
| T113 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.635414141 |
|
|
Jul 20 05:02:18 PM PDT 24 |
Jul 20 05:05:28 PM PDT 24 |
10986953307 ps |
| T149 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.597178623 |
|
|
Jul 20 05:09:44 PM PDT 24 |
Jul 20 05:11:06 PM PDT 24 |
138331758 ps |
| T114 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1390075379 |
|
|
Jul 20 05:01:36 PM PDT 24 |
Jul 20 05:05:29 PM PDT 24 |
4863211582 ps |
| T83 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1985465569 |
|
|
Jul 20 05:06:34 PM PDT 24 |
Jul 20 05:40:21 PM PDT 24 |
80355514748 ps |
| T84 |
/workspace/coverage/default/49.sram_ctrl_stress_all.1892256511 |
|
|
Jul 20 05:12:23 PM PDT 24 |
Jul 20 05:49:10 PM PDT 24 |
144773134232 ps |
| T115 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2312142944 |
|
|
Jul 20 05:06:54 PM PDT 24 |
Jul 20 05:15:33 PM PDT 24 |
27861253456 ps |
| T116 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.317415867 |
|
|
Jul 20 05:06:58 PM PDT 24 |
Jul 20 05:11:23 PM PDT 24 |
5662134530 ps |
| T150 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.1025204824 |
|
|
Jul 20 05:03:13 PM PDT 24 |
Jul 20 05:09:36 PM PDT 24 |
56120729567 ps |
| T85 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2825199023 |
|
|
Jul 20 05:02:17 PM PDT 24 |
Jul 20 05:02:19 PM PDT 24 |
81825490 ps |
| T151 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3607591439 |
|
|
Jul 20 05:07:13 PM PDT 24 |
Jul 20 05:10:31 PM PDT 24 |
3379700750 ps |
| T97 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1469234396 |
|
|
Jul 20 05:03:39 PM PDT 24 |
Jul 20 05:03:45 PM PDT 24 |
70196537 ps |
| T144 |
/workspace/coverage/default/15.sram_ctrl_bijection.1618039605 |
|
|
Jul 20 05:03:14 PM PDT 24 |
Jul 20 05:04:15 PM PDT 24 |
7638834956 ps |
| T152 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2195424647 |
|
|
Jul 20 05:05:52 PM PDT 24 |
Jul 20 05:05:53 PM PDT 24 |
96551096 ps |
| T153 |
/workspace/coverage/default/41.sram_ctrl_executable.3919175142 |
|
|
Jul 20 05:10:22 PM PDT 24 |
Jul 20 05:40:09 PM PDT 24 |
47632902004 ps |
| T154 |
/workspace/coverage/default/1.sram_ctrl_multiple_keys.718753633 |
|
|
Jul 20 05:01:11 PM PDT 24 |
Jul 20 05:06:25 PM PDT 24 |
9361634222 ps |
| T145 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.2810447696 |
|
|
Jul 20 05:01:34 PM PDT 24 |
Jul 20 05:01:35 PM PDT 24 |
125534011 ps |
| T155 |
/workspace/coverage/default/2.sram_ctrl_partial_access.3196991274 |
|
|
Jul 20 05:01:21 PM PDT 24 |
Jul 20 05:02:11 PM PDT 24 |
534191264 ps |
| T79 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.1197067524 |
|
|
Jul 20 05:07:38 PM PDT 24 |
Jul 20 05:09:40 PM PDT 24 |
5949630732 ps |
| T125 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1885789671 |
|
|
Jul 20 05:01:52 PM PDT 24 |
Jul 20 05:04:06 PM PDT 24 |
2366077708 ps |
| T24 |
/workspace/coverage/default/29.sram_ctrl_stress_all.84793063 |
|
|
Jul 20 05:07:21 PM PDT 24 |
Jul 20 05:34:57 PM PDT 24 |
18077151875 ps |
| T126 |
/workspace/coverage/default/43.sram_ctrl_bijection.797617948 |
|
|
Jul 20 05:10:38 PM PDT 24 |
Jul 20 05:10:53 PM PDT 24 |
229357569 ps |
| T53 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.1220535929 |
|
|
Jul 20 05:08:26 PM PDT 24 |
Jul 20 05:08:30 PM PDT 24 |
548560568 ps |
| T127 |
/workspace/coverage/default/34.sram_ctrl_smoke.3667888240 |
|
|
Jul 20 05:08:25 PM PDT 24 |
Jul 20 05:08:52 PM PDT 24 |
605893525 ps |
| T128 |
/workspace/coverage/default/13.sram_ctrl_smoke.3131119705 |
|
|
Jul 20 05:02:48 PM PDT 24 |
Jul 20 05:03:02 PM PDT 24 |
398249547 ps |
| T129 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.2770897086 |
|
|
Jul 20 05:03:40 PM PDT 24 |
Jul 20 05:03:48 PM PDT 24 |
3174603201 ps |
| T130 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.458649738 |
|
|
Jul 20 05:06:46 PM PDT 24 |
Jul 20 05:06:54 PM PDT 24 |
995794132 ps |
| T131 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.967697354 |
|
|
Jul 20 05:01:10 PM PDT 24 |
Jul 20 05:01:17 PM PDT 24 |
2423075601 ps |
| T156 |
/workspace/coverage/default/28.sram_ctrl_executable.2380903160 |
|
|
Jul 20 05:07:07 PM PDT 24 |
Jul 20 05:23:07 PM PDT 24 |
17553661378 ps |
| T157 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.3946268853 |
|
|
Jul 20 05:08:17 PM PDT 24 |
Jul 20 05:08:26 PM PDT 24 |
268380079 ps |
| T57 |
/workspace/coverage/default/2.sram_ctrl_mem_walk.241022223 |
|
|
Jul 20 05:01:20 PM PDT 24 |
Jul 20 05:01:26 PM PDT 24 |
408684740 ps |
| T98 |
/workspace/coverage/default/41.sram_ctrl_access_during_key_req.1684734352 |
|
|
Jul 20 05:10:23 PM PDT 24 |
Jul 20 05:38:46 PM PDT 24 |
8654047014 ps |
| T158 |
/workspace/coverage/default/6.sram_ctrl_regwen.2222593247 |
|
|
Jul 20 05:01:36 PM PDT 24 |
Jul 20 05:14:42 PM PDT 24 |
9076073752 ps |
| T159 |
/workspace/coverage/default/43.sram_ctrl_executable.2508550977 |
|
|
Jul 20 05:10:56 PM PDT 24 |
Jul 20 05:20:14 PM PDT 24 |
44111377089 ps |
| T99 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.889043923 |
|
|
Jul 20 05:10:57 PM PDT 24 |
Jul 20 05:11:03 PM PDT 24 |
67017322 ps |
| T160 |
/workspace/coverage/default/24.sram_ctrl_smoke.555267678 |
|
|
Jul 20 05:05:44 PM PDT 24 |
Jul 20 05:05:47 PM PDT 24 |
54597960 ps |
| T161 |
/workspace/coverage/default/47.sram_ctrl_regwen.2622491615 |
|
|
Jul 20 05:11:46 PM PDT 24 |
Jul 20 05:26:15 PM PDT 24 |
2521930872 ps |
| T162 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2792589297 |
|
|
Jul 20 05:02:45 PM PDT 24 |
Jul 20 05:02:46 PM PDT 24 |
69743087 ps |
| T163 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.785666536 |
|
|
Jul 20 05:04:38 PM PDT 24 |
Jul 20 05:07:10 PM PDT 24 |
309554396 ps |
| T164 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.302408049 |
|
|
Jul 20 05:01:25 PM PDT 24 |
Jul 20 05:03:41 PM PDT 24 |
1516963468 ps |
| T165 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.2343396062 |
|
|
Jul 20 05:04:37 PM PDT 24 |
Jul 20 05:06:49 PM PDT 24 |
264488652 ps |
| T166 |
/workspace/coverage/default/38.sram_ctrl_executable.650062623 |
|
|
Jul 20 05:09:26 PM PDT 24 |
Jul 20 05:25:17 PM PDT 24 |
20627563365 ps |
| T167 |
/workspace/coverage/default/29.sram_ctrl_alert_test.259105219 |
|
|
Jul 20 05:07:23 PM PDT 24 |
Jul 20 05:07:24 PM PDT 24 |
13225827 ps |
| T168 |
/workspace/coverage/default/49.sram_ctrl_smoke.485535898 |
|
|
Jul 20 05:12:11 PM PDT 24 |
Jul 20 05:14:08 PM PDT 24 |
2956011598 ps |
| T169 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3479029285 |
|
|
Jul 20 05:01:35 PM PDT 24 |
Jul 20 05:01:37 PM PDT 24 |
83082707 ps |
| T170 |
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.817250837 |
|
|
Jul 20 05:01:02 PM PDT 24 |
Jul 20 05:07:43 PM PDT 24 |
15257944592 ps |
| T171 |
/workspace/coverage/default/29.sram_ctrl_partial_access.4017830728 |
|
|
Jul 20 05:07:13 PM PDT 24 |
Jul 20 05:07:25 PM PDT 24 |
830202838 ps |
| T172 |
/workspace/coverage/default/38.sram_ctrl_partial_access.1943668261 |
|
|
Jul 20 05:09:23 PM PDT 24 |
Jul 20 05:09:28 PM PDT 24 |
94629428 ps |
| T173 |
/workspace/coverage/default/44.sram_ctrl_regwen.1286930084 |
|
|
Jul 20 05:11:06 PM PDT 24 |
Jul 20 05:12:52 PM PDT 24 |
502329696 ps |
| T174 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1193105961 |
|
|
Jul 20 05:08:35 PM PDT 24 |
Jul 20 05:09:59 PM PDT 24 |
132043505 ps |
| T175 |
/workspace/coverage/default/44.sram_ctrl_bijection.3031311498 |
|
|
Jul 20 05:10:57 PM PDT 24 |
Jul 20 05:12:07 PM PDT 24 |
1234894195 ps |
| T176 |
/workspace/coverage/default/10.sram_ctrl_executable.4290890941 |
|
|
Jul 20 05:02:18 PM PDT 24 |
Jul 20 05:07:53 PM PDT 24 |
3275707922 ps |
| T177 |
/workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3110295895 |
|
|
Jul 20 05:03:54 PM PDT 24 |
Jul 20 05:03:58 PM PDT 24 |
166639050 ps |
| T178 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.2807354253 |
|
|
Jul 20 05:08:03 PM PDT 24 |
Jul 20 05:21:30 PM PDT 24 |
12601776582 ps |
| T179 |
/workspace/coverage/default/21.sram_ctrl_executable.3671224027 |
|
|
Jul 20 05:05:01 PM PDT 24 |
Jul 20 05:25:20 PM PDT 24 |
36405295117 ps |
| T180 |
/workspace/coverage/default/3.sram_ctrl_partial_access.4140343879 |
|
|
Jul 20 05:01:25 PM PDT 24 |
Jul 20 05:01:39 PM PDT 24 |
639990079 ps |
| T181 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.2497638588 |
|
|
Jul 20 05:03:41 PM PDT 24 |
Jul 20 05:04:22 PM PDT 24 |
356007897 ps |
| T182 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2998396812 |
|
|
Jul 20 05:01:37 PM PDT 24 |
Jul 20 05:05:50 PM PDT 24 |
17673431274 ps |
| T100 |
/workspace/coverage/default/19.sram_ctrl_access_during_key_req.3145763548 |
|
|
Jul 20 05:04:22 PM PDT 24 |
Jul 20 05:06:34 PM PDT 24 |
593093694 ps |
| T58 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2715001840 |
|
|
Jul 20 05:09:53 PM PDT 24 |
Jul 20 05:16:01 PM PDT 24 |
1427313826 ps |
| T183 |
/workspace/coverage/default/29.sram_ctrl_bijection.196742380 |
|
|
Jul 20 05:07:12 PM PDT 24 |
Jul 20 05:07:36 PM PDT 24 |
4095161696 ps |
| T184 |
/workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1141561836 |
|
|
Jul 20 05:10:03 PM PDT 24 |
Jul 20 05:10:53 PM PDT 24 |
202913478 ps |
| T132 |
/workspace/coverage/default/8.sram_ctrl_stress_all.2891523852 |
|
|
Jul 20 05:02:01 PM PDT 24 |
Jul 20 05:52:53 PM PDT 24 |
37302817304 ps |
| T101 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3995388372 |
|
|
Jul 20 05:02:23 PM PDT 24 |
Jul 20 05:17:07 PM PDT 24 |
12850718955 ps |
| T185 |
/workspace/coverage/default/15.sram_ctrl_stress_all.850735191 |
|
|
Jul 20 05:03:30 PM PDT 24 |
Jul 20 05:40:30 PM PDT 24 |
130599421060 ps |
| T186 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1892104320 |
|
|
Jul 20 05:02:01 PM PDT 24 |
Jul 20 05:02:22 PM PDT 24 |
151612153 ps |
| T59 |
/workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.120736406 |
|
|
Jul 20 05:07:23 PM PDT 24 |
Jul 20 05:11:41 PM PDT 24 |
2243661912 ps |
| T187 |
/workspace/coverage/default/40.sram_ctrl_multiple_keys.1559925413 |
|
|
Jul 20 05:09:54 PM PDT 24 |
Jul 20 05:14:37 PM PDT 24 |
2504219997 ps |
| T188 |
/workspace/coverage/default/21.sram_ctrl_alert_test.3055395069 |
|
|
Jul 20 05:05:09 PM PDT 24 |
Jul 20 05:05:10 PM PDT 24 |
15743886 ps |
| T54 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.2291494901 |
|
|
Jul 20 05:01:17 PM PDT 24 |
Jul 20 05:02:13 PM PDT 24 |
550662704 ps |
| T189 |
/workspace/coverage/default/41.sram_ctrl_regwen.2252635525 |
|
|
Jul 20 05:10:21 PM PDT 24 |
Jul 20 05:27:21 PM PDT 24 |
29119802619 ps |
| T190 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.560209490 |
|
|
Jul 20 05:01:27 PM PDT 24 |
Jul 20 05:23:30 PM PDT 24 |
12210299156 ps |
| T191 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.228152765 |
|
|
Jul 20 05:08:33 PM PDT 24 |
Jul 20 05:13:10 PM PDT 24 |
35936497556 ps |
| T192 |
/workspace/coverage/default/12.sram_ctrl_alert_test.515259977 |
|
|
Jul 20 05:02:47 PM PDT 24 |
Jul 20 05:02:48 PM PDT 24 |
44263601 ps |
| T193 |
/workspace/coverage/default/30.sram_ctrl_alert_test.916131693 |
|
|
Jul 20 05:07:40 PM PDT 24 |
Jul 20 05:07:41 PM PDT 24 |
11288518 ps |
| T194 |
/workspace/coverage/default/45.sram_ctrl_bijection.4058014384 |
|
|
Jul 20 05:11:14 PM PDT 24 |
Jul 20 05:12:00 PM PDT 24 |
752444867 ps |
| T195 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3978952919 |
|
|
Jul 20 05:11:31 PM PDT 24 |
Jul 20 05:16:11 PM PDT 24 |
14598513121 ps |
| T196 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.3682374331 |
|
|
Jul 20 05:09:03 PM PDT 24 |
Jul 20 05:20:36 PM PDT 24 |
5331401632 ps |
| T197 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.3720058120 |
|
|
Jul 20 05:08:24 PM PDT 24 |
Jul 20 05:08:41 PM PDT 24 |
1265495593 ps |
| T81 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1606515344 |
|
|
Jul 20 05:09:36 PM PDT 24 |
Jul 20 05:10:01 PM PDT 24 |
595964868 ps |
| T198 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.2634726526 |
|
|
Jul 20 05:09:25 PM PDT 24 |
Jul 20 05:10:42 PM PDT 24 |
253089069 ps |
| T199 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.753717853 |
|
|
Jul 20 05:06:23 PM PDT 24 |
Jul 20 05:06:27 PM PDT 24 |
170608137 ps |
| T200 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.1385136208 |
|
|
Jul 20 05:08:17 PM PDT 24 |
Jul 20 05:11:28 PM PDT 24 |
7391413513 ps |
| T201 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.3721234525 |
|
|
Jul 20 05:02:57 PM PDT 24 |
Jul 20 05:03:04 PM PDT 24 |
1773143819 ps |
| T202 |
/workspace/coverage/default/44.sram_ctrl_partial_access.88243702 |
|
|
Jul 20 05:11:05 PM PDT 24 |
Jul 20 05:11:22 PM PDT 24 |
2121650920 ps |
| T203 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3770514079 |
|
|
Jul 20 05:04:05 PM PDT 24 |
Jul 20 05:05:15 PM PDT 24 |
140831469 ps |
| T204 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3266132384 |
|
|
Jul 20 05:01:52 PM PDT 24 |
Jul 20 05:07:08 PM PDT 24 |
3180737324 ps |
| T205 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.2312505113 |
|
|
Jul 20 05:07:27 PM PDT 24 |
Jul 20 05:11:16 PM PDT 24 |
2478832615 ps |
| T206 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.1802236389 |
|
|
Jul 20 05:01:18 PM PDT 24 |
Jul 20 05:01:21 PM PDT 24 |
46738099 ps |
| T207 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2975224997 |
|
|
Jul 20 05:02:40 PM PDT 24 |
Jul 20 05:02:45 PM PDT 24 |
315940838 ps |
| T208 |
/workspace/coverage/default/48.sram_ctrl_regwen.2509776036 |
|
|
Jul 20 05:12:03 PM PDT 24 |
Jul 20 05:18:26 PM PDT 24 |
20351601487 ps |
| T209 |
/workspace/coverage/default/24.sram_ctrl_partial_access.3496086285 |
|
|
Jul 20 05:05:44 PM PDT 24 |
Jul 20 05:06:07 PM PDT 24 |
286940406 ps |
| T210 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3584119139 |
|
|
Jul 20 05:05:18 PM PDT 24 |
Jul 20 05:05:20 PM PDT 24 |
86148297 ps |
| T211 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.2368965115 |
|
|
Jul 20 05:06:31 PM PDT 24 |
Jul 20 05:06:32 PM PDT 24 |
81440839 ps |
| T212 |
/workspace/coverage/default/19.sram_ctrl_stress_all.195423435 |
|
|
Jul 20 05:04:29 PM PDT 24 |
Jul 20 05:32:40 PM PDT 24 |
89849265321 ps |
| T213 |
/workspace/coverage/default/45.sram_ctrl_regwen.3267247606 |
|
|
Jul 20 05:11:22 PM PDT 24 |
Jul 20 05:21:21 PM PDT 24 |
6198492549 ps |
| T214 |
/workspace/coverage/default/10.sram_ctrl_stress_all.914618303 |
|
|
Jul 20 05:02:17 PM PDT 24 |
Jul 20 05:53:18 PM PDT 24 |
358157082714 ps |
| T215 |
/workspace/coverage/default/41.sram_ctrl_partial_access.112769204 |
|
|
Jul 20 05:10:22 PM PDT 24 |
Jul 20 05:12:13 PM PDT 24 |
447652511 ps |
| T216 |
/workspace/coverage/default/15.sram_ctrl_executable.2304016057 |
|
|
Jul 20 05:03:24 PM PDT 24 |
Jul 20 05:11:23 PM PDT 24 |
4077249686 ps |
| T217 |
/workspace/coverage/default/13.sram_ctrl_max_throughput.4250677093 |
|
|
Jul 20 05:02:50 PM PDT 24 |
Jul 20 05:05:02 PM PDT 24 |
578507018 ps |
| T218 |
/workspace/coverage/default/11.sram_ctrl_alert_test.3243469019 |
|
|
Jul 20 05:02:30 PM PDT 24 |
Jul 20 05:02:32 PM PDT 24 |
16539217 ps |
| T219 |
/workspace/coverage/default/48.sram_ctrl_stress_all.1067515241 |
|
|
Jul 20 05:12:03 PM PDT 24 |
Jul 20 06:01:35 PM PDT 24 |
430516859194 ps |
| T220 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.3644005394 |
|
|
Jul 20 05:03:06 PM PDT 24 |
Jul 20 05:08:40 PM PDT 24 |
60192505675 ps |
| T221 |
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2223006547 |
|
|
Jul 20 05:11:14 PM PDT 24 |
Jul 20 05:14:07 PM PDT 24 |
1740847117 ps |
| T222 |
/workspace/coverage/default/46.sram_ctrl_bijection.2465481761 |
|
|
Jul 20 05:11:30 PM PDT 24 |
Jul 20 05:11:54 PM PDT 24 |
5262338150 ps |
| T223 |
/workspace/coverage/default/5.sram_ctrl_bijection.3565527698 |
|
|
Jul 20 05:01:37 PM PDT 24 |
Jul 20 05:02:14 PM PDT 24 |
6645797421 ps |
| T224 |
/workspace/coverage/default/20.sram_ctrl_alert_test.339701189 |
|
|
Jul 20 05:04:45 PM PDT 24 |
Jul 20 05:04:46 PM PDT 24 |
20244299 ps |
| T225 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2394082300 |
|
|
Jul 20 05:01:36 PM PDT 24 |
Jul 20 05:08:27 PM PDT 24 |
29944792063 ps |
| T226 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.3915995293 |
|
|
Jul 20 05:01:19 PM PDT 24 |
Jul 20 05:01:20 PM PDT 24 |
128762416 ps |
| T227 |
/workspace/coverage/default/5.sram_ctrl_stress_all.53900879 |
|
|
Jul 20 05:01:39 PM PDT 24 |
Jul 20 05:17:45 PM PDT 24 |
23073824603 ps |
| T228 |
/workspace/coverage/default/2.sram_ctrl_stress_pipeline.4281747141 |
|
|
Jul 20 05:01:20 PM PDT 24 |
Jul 20 05:03:46 PM PDT 24 |
1471029423 ps |
| T229 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.385255568 |
|
|
Jul 20 05:07:55 PM PDT 24 |
Jul 20 05:09:17 PM PDT 24 |
239716285 ps |
| T55 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.3367307867 |
|
|
Jul 20 05:03:29 PM PDT 24 |
Jul 20 05:03:33 PM PDT 24 |
196340065 ps |
| T230 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.2828306556 |
|
|
Jul 20 05:10:46 PM PDT 24 |
Jul 20 05:11:16 PM PDT 24 |
316580290 ps |
| T231 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.1675724132 |
|
|
Jul 20 05:06:16 PM PDT 24 |
Jul 20 05:06:46 PM PDT 24 |
86506450 ps |
| T232 |
/workspace/coverage/default/19.sram_ctrl_executable.1404136494 |
|
|
Jul 20 05:04:21 PM PDT 24 |
Jul 20 05:06:55 PM PDT 24 |
394209847 ps |
| T233 |
/workspace/coverage/default/12.sram_ctrl_smoke.671142396 |
|
|
Jul 20 05:02:31 PM PDT 24 |
Jul 20 05:02:41 PM PDT 24 |
498891511 ps |
| T234 |
/workspace/coverage/default/47.sram_ctrl_bijection.315981898 |
|
|
Jul 20 05:11:49 PM PDT 24 |
Jul 20 05:12:23 PM PDT 24 |
526308097 ps |
| T235 |
/workspace/coverage/default/47.sram_ctrl_alert_test.3566976646 |
|
|
Jul 20 05:11:53 PM PDT 24 |
Jul 20 05:11:53 PM PDT 24 |
14307106 ps |
| T236 |
/workspace/coverage/default/48.sram_ctrl_bijection.1539306656 |
|
|
Jul 20 05:11:54 PM PDT 24 |
Jul 20 05:13:15 PM PDT 24 |
4706149515 ps |
| T237 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.3002095252 |
|
|
Jul 20 05:04:52 PM PDT 24 |
Jul 20 05:07:05 PM PDT 24 |
257382735 ps |
| T238 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.4208014680 |
|
|
Jul 20 05:12:24 PM PDT 24 |
Jul 20 05:12:30 PM PDT 24 |
172060589 ps |
| T239 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3864058869 |
|
|
Jul 20 05:01:17 PM PDT 24 |
Jul 20 05:07:49 PM PDT 24 |
22032730837 ps |
| T240 |
/workspace/coverage/default/15.sram_ctrl_smoke.2854387648 |
|
|
Jul 20 05:03:13 PM PDT 24 |
Jul 20 05:03:23 PM PDT 24 |
403310659 ps |
| T241 |
/workspace/coverage/default/15.sram_ctrl_access_during_key_req.3153410426 |
|
|
Jul 20 05:03:23 PM PDT 24 |
Jul 20 05:16:55 PM PDT 24 |
2026969359 ps |
| T242 |
/workspace/coverage/default/43.sram_ctrl_alert_test.945706151 |
|
|
Jul 20 05:10:57 PM PDT 24 |
Jul 20 05:10:58 PM PDT 24 |
40188332 ps |
| T243 |
/workspace/coverage/default/24.sram_ctrl_executable.718392195 |
|
|
Jul 20 05:05:51 PM PDT 24 |
Jul 20 05:32:39 PM PDT 24 |
13478715022 ps |
| T244 |
/workspace/coverage/default/26.sram_ctrl_regwen.1868944022 |
|
|
Jul 20 05:06:35 PM PDT 24 |
Jul 20 05:15:23 PM PDT 24 |
8642866026 ps |
| T245 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.2244980336 |
|
|
Jul 20 05:02:48 PM PDT 24 |
Jul 20 05:07:43 PM PDT 24 |
7056114706 ps |
| T246 |
/workspace/coverage/default/21.sram_ctrl_ram_cfg.680936352 |
|
|
Jul 20 05:05:01 PM PDT 24 |
Jul 20 05:05:02 PM PDT 24 |
39409358 ps |
| T247 |
/workspace/coverage/default/37.sram_ctrl_smoke.1892170179 |
|
|
Jul 20 05:09:00 PM PDT 24 |
Jul 20 05:09:06 PM PDT 24 |
626451560 ps |
| T248 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.260503753 |
|
|
Jul 20 05:04:05 PM PDT 24 |
Jul 20 05:08:07 PM PDT 24 |
9053480654 ps |
| T249 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.2875710263 |
|
|
Jul 20 05:02:40 PM PDT 24 |
Jul 20 05:02:47 PM PDT 24 |
1824557299 ps |
| T250 |
/workspace/coverage/default/35.sram_ctrl_alert_test.2454205732 |
|
|
Jul 20 05:08:46 PM PDT 24 |
Jul 20 05:08:47 PM PDT 24 |
26880079 ps |
| T251 |
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3685265068 |
|
|
Jul 20 05:11:04 PM PDT 24 |
Jul 20 05:30:52 PM PDT 24 |
2726214265 ps |
| T252 |
/workspace/coverage/default/22.sram_ctrl_partial_access.928050164 |
|
|
Jul 20 05:05:10 PM PDT 24 |
Jul 20 05:05:38 PM PDT 24 |
501131001 ps |
| T253 |
/workspace/coverage/default/18.sram_ctrl_bijection.2445169590 |
|
|
Jul 20 05:04:06 PM PDT 24 |
Jul 20 05:04:31 PM PDT 24 |
5676334394 ps |
| T254 |
/workspace/coverage/default/11.sram_ctrl_bijection.4270115232 |
|
|
Jul 20 05:02:24 PM PDT 24 |
Jul 20 05:02:45 PM PDT 24 |
1276385793 ps |
| T255 |
/workspace/coverage/default/25.sram_ctrl_stress_all.2099808902 |
|
|
Jul 20 05:06:24 PM PDT 24 |
Jul 20 05:42:28 PM PDT 24 |
39342597288 ps |
| T256 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.3150610571 |
|
|
Jul 20 05:06:06 PM PDT 24 |
Jul 20 05:12:26 PM PDT 24 |
1623598925 ps |
| T257 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.2024450301 |
|
|
Jul 20 05:04:44 PM PDT 24 |
Jul 20 05:04:47 PM PDT 24 |
172852684 ps |
| T258 |
/workspace/coverage/default/14.sram_ctrl_multiple_keys.4140641338 |
|
|
Jul 20 05:02:57 PM PDT 24 |
Jul 20 05:05:39 PM PDT 24 |
3132358344 ps |
| T259 |
/workspace/coverage/default/8.sram_ctrl_executable.2978112951 |
|
|
Jul 20 05:01:59 PM PDT 24 |
Jul 20 05:17:34 PM PDT 24 |
39797333429 ps |
| T260 |
/workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1446329936 |
|
|
Jul 20 05:08:17 PM PDT 24 |
Jul 20 05:09:48 PM PDT 24 |
460265743 ps |
| T261 |
/workspace/coverage/default/5.sram_ctrl_smoke.1938255349 |
|
|
Jul 20 05:01:37 PM PDT 24 |
Jul 20 05:01:50 PM PDT 24 |
623111211 ps |
| T262 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2894076663 |
|
|
Jul 20 05:06:54 PM PDT 24 |
Jul 20 05:07:05 PM PDT 24 |
357887444 ps |
| T263 |
/workspace/coverage/default/17.sram_ctrl_lc_escalation.1773716311 |
|
|
Jul 20 05:03:57 PM PDT 24 |
Jul 20 05:04:02 PM PDT 24 |
837432834 ps |
| T264 |
/workspace/coverage/default/7.sram_ctrl_smoke.275940366 |
|
|
Jul 20 05:01:35 PM PDT 24 |
Jul 20 05:01:45 PM PDT 24 |
568166847 ps |
| T265 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3070195278 |
|
|
Jul 20 05:01:59 PM PDT 24 |
Jul 20 05:18:19 PM PDT 24 |
8501393718 ps |
| T266 |
/workspace/coverage/default/39.sram_ctrl_executable.2231910496 |
|
|
Jul 20 05:09:45 PM PDT 24 |
Jul 20 05:18:25 PM PDT 24 |
868704920 ps |
| T267 |
/workspace/coverage/default/42.sram_ctrl_bijection.1516012000 |
|
|
Jul 20 05:10:32 PM PDT 24 |
Jul 20 05:11:39 PM PDT 24 |
11608513194 ps |
| T268 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4250584734 |
|
|
Jul 20 05:01:37 PM PDT 24 |
Jul 20 05:04:59 PM PDT 24 |
2133542883 ps |
| T269 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.1852384242 |
|
|
Jul 20 05:08:35 PM PDT 24 |
Jul 20 05:12:02 PM PDT 24 |
8448541991 ps |
| T270 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.2104198774 |
|
|
Jul 20 05:05:24 PM PDT 24 |
Jul 20 05:05:28 PM PDT 24 |
661241789 ps |
| T271 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1140742067 |
|
|
Jul 20 05:02:23 PM PDT 24 |
Jul 20 05:06:37 PM PDT 24 |
8888837071 ps |
| T66 |
/workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.518482858 |
|
|
Jul 20 05:08:03 PM PDT 24 |
Jul 20 05:09:04 PM PDT 24 |
1671290163 ps |
| T272 |
/workspace/coverage/default/14.sram_ctrl_mem_walk.4033967451 |
|
|
Jul 20 05:03:05 PM PDT 24 |
Jul 20 05:03:16 PM PDT 24 |
1694063158 ps |
| T273 |
/workspace/coverage/default/5.sram_ctrl_regwen.2490136918 |
|
|
Jul 20 05:01:37 PM PDT 24 |
Jul 20 05:15:27 PM PDT 24 |
8987920296 ps |
| T274 |
/workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2942989150 |
|
|
Jul 20 05:05:42 PM PDT 24 |
Jul 20 05:09:59 PM PDT 24 |
13939340856 ps |
| T275 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.3662662596 |
|
|
Jul 20 05:06:14 PM PDT 24 |
Jul 20 05:06:24 PM PDT 24 |
446150398 ps |
| T276 |
/workspace/coverage/default/46.sram_ctrl_regwen.2949606604 |
|
|
Jul 20 05:11:36 PM PDT 24 |
Jul 20 05:28:51 PM PDT 24 |
3003529482 ps |
| T277 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.556487423 |
|
|
Jul 20 05:06:26 PM PDT 24 |
Jul 20 05:09:13 PM PDT 24 |
153084812 ps |
| T278 |
/workspace/coverage/default/24.sram_ctrl_alert_test.2149714736 |
|
|
Jul 20 05:06:06 PM PDT 24 |
Jul 20 05:06:07 PM PDT 24 |
13095152 ps |
| T279 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.523190918 |
|
|
Jul 20 05:02:17 PM PDT 24 |
Jul 20 05:02:21 PM PDT 24 |
177767903 ps |
| T280 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1977923617 |
|
|
Jul 20 05:09:24 PM PDT 24 |
Jul 20 05:13:39 PM PDT 24 |
44670316376 ps |
| T281 |
/workspace/coverage/default/22.sram_ctrl_regwen.531137955 |
|
|
Jul 20 05:05:17 PM PDT 24 |
Jul 20 05:12:01 PM PDT 24 |
8932578133 ps |
| T282 |
/workspace/coverage/default/27.sram_ctrl_stress_all.846661870 |
|
|
Jul 20 05:06:57 PM PDT 24 |
Jul 20 05:52:06 PM PDT 24 |
46825315106 ps |
| T283 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.1843017486 |
|
|
Jul 20 05:08:27 PM PDT 24 |
Jul 20 05:09:44 PM PDT 24 |
211742690 ps |
| T284 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.2038349599 |
|
|
Jul 20 05:01:10 PM PDT 24 |
Jul 20 05:01:15 PM PDT 24 |
323647911 ps |
| T285 |
/workspace/coverage/default/36.sram_ctrl_partial_access.4004233073 |
|
|
Jul 20 05:08:53 PM PDT 24 |
Jul 20 05:09:03 PM PDT 24 |
649490516 ps |
| T286 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.3230151690 |
|
|
Jul 20 05:03:57 PM PDT 24 |
Jul 20 05:04:04 PM PDT 24 |
1003072447 ps |
| T287 |
/workspace/coverage/default/24.sram_ctrl_mem_walk.1442353526 |
|
|
Jul 20 05:05:53 PM PDT 24 |
Jul 20 05:06:02 PM PDT 24 |
272116279 ps |
| T288 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.948448521 |
|
|
Jul 20 05:01:37 PM PDT 24 |
Jul 20 05:07:41 PM PDT 24 |
2436597079 ps |
| T67 |
/workspace/coverage/default/18.sram_ctrl_mem_partial_access.3920398369 |
|
|
Jul 20 05:04:17 PM PDT 24 |
Jul 20 05:04:23 PM PDT 24 |
397814576 ps |
| T289 |
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2166184679 |
|
|
Jul 20 05:11:52 PM PDT 24 |
Jul 20 05:11:53 PM PDT 24 |
99089580 ps |
| T290 |
/workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1549309346 |
|
|
Jul 20 05:04:21 PM PDT 24 |
Jul 20 05:07:40 PM PDT 24 |
5269449935 ps |
| T291 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.1870094970 |
|
|
Jul 20 05:06:45 PM PDT 24 |
Jul 20 05:07:27 PM PDT 24 |
101526189 ps |
| T292 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.239078807 |
|
|
Jul 20 05:01:26 PM PDT 24 |
Jul 20 05:01:31 PM PDT 24 |
67346166 ps |
| T293 |
/workspace/coverage/default/37.sram_ctrl_executable.2100117603 |
|
|
Jul 20 05:09:10 PM PDT 24 |
Jul 20 05:11:54 PM PDT 24 |
754234266 ps |
| T294 |
/workspace/coverage/default/18.sram_ctrl_executable.2711717117 |
|
|
Jul 20 05:04:04 PM PDT 24 |
Jul 20 05:18:18 PM PDT 24 |
27586243548 ps |
| T295 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.3789809605 |
|
|
Jul 20 05:08:16 PM PDT 24 |
Jul 20 05:08:17 PM PDT 24 |
47177329 ps |
| T296 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4028524269 |
|
|
Jul 20 05:01:05 PM PDT 24 |
Jul 20 05:03:18 PM PDT 24 |
606561033 ps |
| T297 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3881824819 |
|
|
Jul 20 05:11:46 PM PDT 24 |
Jul 20 05:17:44 PM PDT 24 |
13986158306 ps |
| T298 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.3903811312 |
|
|
Jul 20 05:02:49 PM PDT 24 |
Jul 20 05:07:31 PM PDT 24 |
15705752347 ps |
| T299 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.2034525902 |
|
|
Jul 20 05:12:23 PM PDT 24 |
Jul 20 05:12:34 PM PDT 24 |
451613872 ps |
| T300 |
/workspace/coverage/default/41.sram_ctrl_smoke.66304782 |
|
|
Jul 20 05:10:11 PM PDT 24 |
Jul 20 05:11:33 PM PDT 24 |
1970044422 ps |
| T301 |
/workspace/coverage/default/13.sram_ctrl_stress_pipeline.3141854236 |
|
|
Jul 20 05:02:47 PM PDT 24 |
Jul 20 05:07:49 PM PDT 24 |
41572238780 ps |
| T302 |
/workspace/coverage/default/47.sram_ctrl_stress_all.1694834597 |
|
|
Jul 20 05:11:55 PM PDT 24 |
Jul 20 06:12:57 PM PDT 24 |
211490403877 ps |
| T303 |
/workspace/coverage/default/26.sram_ctrl_partial_access.672676087 |
|
|
Jul 20 05:06:26 PM PDT 24 |
Jul 20 05:06:34 PM PDT 24 |
419671490 ps |
| T304 |
/workspace/coverage/default/40.sram_ctrl_lc_escalation.3117835239 |
|
|
Jul 20 05:10:01 PM PDT 24 |
Jul 20 05:10:05 PM PDT 24 |
415092477 ps |
| T305 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.902239596 |
|
|
Jul 20 05:05:10 PM PDT 24 |
Jul 20 05:05:43 PM PDT 24 |
613913905 ps |
| T306 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2321783134 |
|
|
Jul 20 05:05:44 PM PDT 24 |
Jul 20 05:06:16 PM PDT 24 |
293600083 ps |
| T307 |
/workspace/coverage/default/0.sram_ctrl_mem_walk.4242594066 |
|
|
Jul 20 05:01:08 PM PDT 24 |
Jul 20 05:01:17 PM PDT 24 |
271367262 ps |
| T308 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.1913565474 |
|
|
Jul 20 05:03:39 PM PDT 24 |
Jul 20 05:08:03 PM PDT 24 |
9896346310 ps |
| T309 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.1160185735 |
|
|
Jul 20 05:07:46 PM PDT 24 |
Jul 20 05:07:55 PM PDT 24 |
2845441445 ps |
| T310 |
/workspace/coverage/default/16.sram_ctrl_ram_cfg.1282969131 |
|
|
Jul 20 05:03:39 PM PDT 24 |
Jul 20 05:03:40 PM PDT 24 |
28321591 ps |