Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1024
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
72.92 72.92 92.12 92.12 76.42 76.42 91.09 91.09 23.81 23.81 80.68 80.68 93.66 93.66 52.65 52.65 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3944395956
85.80 12.88 97.37 5.25 81.87 5.45 91.16 0.07 90.48 66.67 90.10 9.42 94.25 0.59 55.39 2.74 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.262076558
90.50 4.70 97.37 0.00 83.65 1.78 93.38 2.22 90.48 0.00 91.06 0.97 95.28 1.03 82.27 26.87 /workspace/coverage/default/33.sram_ctrl_executable.669040103
93.91 3.41 98.73 1.36 87.56 3.91 94.63 1.25 100.00 9.52 94.69 3.62 95.28 0.00 86.47 4.20 /workspace/coverage/default/24.sram_ctrl_stress_all.1871367389
94.94 1.03 98.90 0.17 88.39 0.83 94.83 0.21 100.00 0.00 95.41 0.72 95.28 0.00 91.77 5.30 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.777124423
95.52 0.58 99.07 0.17 90.17 1.78 95.25 0.42 100.00 0.00 96.14 0.72 95.87 0.59 92.14 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.4269443554
96.09 0.57 99.07 0.00 90.17 0.00 96.91 1.66 100.00 0.00 96.14 0.00 96.02 0.15 94.33 2.19 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2878293162
96.41 0.32 99.07 0.00 90.28 0.12 98.16 1.25 100.00 0.00 96.14 0.00 96.90 0.88 94.33 0.00 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.1497767771
96.63 0.21 99.07 0.00 90.64 0.36 98.58 0.42 100.00 0.00 96.14 0.00 96.90 0.00 95.06 0.73 /workspace/coverage/default/39.sram_ctrl_alert_test.3042314531
96.83 0.20 99.07 0.00 90.64 0.00 98.65 0.07 100.00 0.00 96.14 0.00 98.23 1.33 95.06 0.00 /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.16891392
96.99 0.17 99.07 0.00 90.76 0.12 98.65 0.00 100.00 0.00 96.14 0.00 98.38 0.15 95.98 0.91 /workspace/coverage/default/1.sram_ctrl_stress_all.2566161864
97.16 0.16 99.07 0.00 90.76 0.00 98.86 0.21 100.00 0.00 96.14 0.00 99.12 0.74 96.16 0.18 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2529846127
97.29 0.13 99.15 0.08 90.76 0.00 99.69 0.83 100.00 0.00 96.14 0.00 99.12 0.00 96.16 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.2043775668
97.37 0.08 99.15 0.00 90.76 0.00 99.69 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.71 0.55 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2608188623
97.42 0.05 99.15 0.00 90.76 0.00 99.69 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.37 /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.171042021
97.45 0.03 99.15 0.00 91.00 0.24 99.69 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.00 /workspace/coverage/default/1.sram_ctrl_lc_escalation.2299450842
97.48 0.03 99.15 0.00 91.00 0.00 99.69 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.3667538742
97.50 0.03 99.15 0.00 91.00 0.00 99.69 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/default/18.sram_ctrl_regwen.1770595657
97.51 0.01 99.15 0.00 91.00 0.00 99.72 0.03 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.4215614969


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3692600741
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.58108564
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.2074248376
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2947763094
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1453326622
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.314296903
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1791612288
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2554325297
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.691606656
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1074711881
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.893026172
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.717194107
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2519417184
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2834042288
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.680928298
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3741185132
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.848337679
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.2007606658
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2904546981
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1166228803
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3802111035
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3372921199
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.4144776164
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3754466166
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.891025074
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.2714217324
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1292753014
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2218014301
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2653191576
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2156473294
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1880609129
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.731127803
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.838713753
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.4034894536
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3973726788
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1731277616
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2833581924
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2623446285
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.966070617
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1101594007
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2441499979
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.4102733408
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3946944783
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.386356677
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.1273816006
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3962998244
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4200210385
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1811272162
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1383600454
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.648308040
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2863022808
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2203278649
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.2210969689
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.959216362
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.780061256
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.1272098470
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.4232969533
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3778939013
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3486264203
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3709433844
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2150668933
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1275775891
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1225204954
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2804490303
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2497241446
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.1239024611
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.2778083407
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.411046950
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2870778080
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2655510049
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1402809125
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3754598185
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2366502587
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.1676413926
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3485535670
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1806367346
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1966005413
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4291289488
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2220519026
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3894552146
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2756431820
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2614721541
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2488591039
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.801171060
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3742429542
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1820433017
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1934048003
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2453461353
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3951964181
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2143953293
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2294244828
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.427083872
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1143020404
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3031519744
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2829080450
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3724189640
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.938332998
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.894637507
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.83868483
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.252924265
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1391344619
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1287524347
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1603096075
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2698920265
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1501525380
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.2871239605
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3001380458
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3210922533
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.264901127
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2378478092
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.375287257
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3941599313
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2382348005
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.148818563
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.490568277
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.703331633
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3384835282
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2959157048
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1078987186
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2925454333
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3725732165
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.4167779070
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2793107586
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4221522856
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.155526801
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1853134866
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1790820375
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.250083161
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2176255964
/workspace/coverage/default/0.sram_ctrl_alert_test.2948508075
/workspace/coverage/default/0.sram_ctrl_bijection.1777590211
/workspace/coverage/default/0.sram_ctrl_executable.3878633937
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2886624087
/workspace/coverage/default/0.sram_ctrl_max_throughput.1330315212
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3958519781
/workspace/coverage/default/0.sram_ctrl_mem_walk.1049786816
/workspace/coverage/default/0.sram_ctrl_multiple_keys.762103178
/workspace/coverage/default/0.sram_ctrl_partial_access.2863109590
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3376306348
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1140198759
/workspace/coverage/default/0.sram_ctrl_regwen.4261658480
/workspace/coverage/default/0.sram_ctrl_smoke.607221810
/workspace/coverage/default/0.sram_ctrl_stress_all.2811051683
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.401079259
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1511058594
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2181948225
/workspace/coverage/default/1.sram_ctrl_alert_test.1989295764
/workspace/coverage/default/1.sram_ctrl_bijection.214166249
/workspace/coverage/default/1.sram_ctrl_executable.2958918569
/workspace/coverage/default/1.sram_ctrl_max_throughput.2405785605
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1395354836
/workspace/coverage/default/1.sram_ctrl_mem_walk.4278671939
/workspace/coverage/default/1.sram_ctrl_multiple_keys.4052058506
/workspace/coverage/default/1.sram_ctrl_partial_access.2447798663
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2771896318
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2803679676
/workspace/coverage/default/1.sram_ctrl_regwen.271631438
/workspace/coverage/default/1.sram_ctrl_sec_cm.2554248239
/workspace/coverage/default/1.sram_ctrl_smoke.1362661264
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2152704473
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1562839352
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3497907401
/workspace/coverage/default/10.sram_ctrl_alert_test.2049368522
/workspace/coverage/default/10.sram_ctrl_bijection.1193857701
/workspace/coverage/default/10.sram_ctrl_executable.1560199206
/workspace/coverage/default/10.sram_ctrl_lc_escalation.78958232
/workspace/coverage/default/10.sram_ctrl_max_throughput.179810759
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2295188837
/workspace/coverage/default/10.sram_ctrl_mem_walk.1771269436
/workspace/coverage/default/10.sram_ctrl_multiple_keys.706979476
/workspace/coverage/default/10.sram_ctrl_partial_access.543445699
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1976924538
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3607929768
/workspace/coverage/default/10.sram_ctrl_regwen.3469644543
/workspace/coverage/default/10.sram_ctrl_smoke.233779169
/workspace/coverage/default/10.sram_ctrl_stress_all.1807547600
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1812548300
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2126616164
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.950516124
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.505483034
/workspace/coverage/default/11.sram_ctrl_alert_test.1103898582
/workspace/coverage/default/11.sram_ctrl_bijection.4081049890
/workspace/coverage/default/11.sram_ctrl_executable.140380619
/workspace/coverage/default/11.sram_ctrl_lc_escalation.518108744
/workspace/coverage/default/11.sram_ctrl_max_throughput.2070280825
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3584037277
/workspace/coverage/default/11.sram_ctrl_mem_walk.1830668264
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3317311542
/workspace/coverage/default/11.sram_ctrl_partial_access.2645728740
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3728599041
/workspace/coverage/default/11.sram_ctrl_regwen.3791766623
/workspace/coverage/default/11.sram_ctrl_smoke.2442745263
/workspace/coverage/default/11.sram_ctrl_stress_all.2484345884
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1985493057
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1084329687
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2041402216
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3239919563
/workspace/coverage/default/12.sram_ctrl_alert_test.2613417706
/workspace/coverage/default/12.sram_ctrl_bijection.3028421463
/workspace/coverage/default/12.sram_ctrl_executable.1644215585
/workspace/coverage/default/12.sram_ctrl_lc_escalation.4159939257
/workspace/coverage/default/12.sram_ctrl_max_throughput.14236433
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.896467649
/workspace/coverage/default/12.sram_ctrl_mem_walk.1189846970
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2302235574
/workspace/coverage/default/12.sram_ctrl_partial_access.2044750539
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.194008198
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/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3495449042
/workspace/coverage/default/43.sram_ctrl_ram_cfg.4150400495
/workspace/coverage/default/43.sram_ctrl_regwen.2626645707
/workspace/coverage/default/43.sram_ctrl_smoke.814881220
/workspace/coverage/default/43.sram_ctrl_stress_all.1266734330
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.891456639
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1182569499
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2349702558
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.784232491
/workspace/coverage/default/44.sram_ctrl_alert_test.2022731880
/workspace/coverage/default/44.sram_ctrl_bijection.1938854613
/workspace/coverage/default/44.sram_ctrl_executable.3905882156
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1871751462
/workspace/coverage/default/44.sram_ctrl_max_throughput.383102694
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3403902782
/workspace/coverage/default/44.sram_ctrl_mem_walk.277844707
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3292119419
/workspace/coverage/default/44.sram_ctrl_partial_access.3505707380
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2268009917
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3977302978
/workspace/coverage/default/44.sram_ctrl_regwen.4109966883
/workspace/coverage/default/44.sram_ctrl_smoke.1022085435
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.2347599308
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2139473076
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.2337177240
/workspace/coverage/default/45.sram_ctrl_alert_test.961597436
/workspace/coverage/default/45.sram_ctrl_bijection.4032327407
/workspace/coverage/default/45.sram_ctrl_executable.649840580
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1518207618
/workspace/coverage/default/45.sram_ctrl_max_throughput.3769523786
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3138758403
/workspace/coverage/default/45.sram_ctrl_mem_walk.1319685444
/workspace/coverage/default/45.sram_ctrl_multiple_keys.579392840
/workspace/coverage/default/45.sram_ctrl_partial_access.2791190136
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3820018831
/workspace/coverage/default/45.sram_ctrl_ram_cfg.4089477023
/workspace/coverage/default/45.sram_ctrl_regwen.560239156
/workspace/coverage/default/45.sram_ctrl_smoke.850722054
/workspace/coverage/default/45.sram_ctrl_stress_all.3760284484
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.4173740413
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.500053884
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3228862692
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2586688437
/workspace/coverage/default/46.sram_ctrl_alert_test.1823818653
/workspace/coverage/default/46.sram_ctrl_bijection.1148312267
/workspace/coverage/default/46.sram_ctrl_executable.1044282405
/workspace/coverage/default/46.sram_ctrl_lc_escalation.4043787311
/workspace/coverage/default/46.sram_ctrl_max_throughput.3961242240
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.979900346
/workspace/coverage/default/46.sram_ctrl_mem_walk.1278576677
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3903190340
/workspace/coverage/default/46.sram_ctrl_partial_access.3043302568
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.185138823
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3441614121
/workspace/coverage/default/46.sram_ctrl_regwen.2827823026
/workspace/coverage/default/46.sram_ctrl_smoke.148915731
/workspace/coverage/default/46.sram_ctrl_stress_all.2426168406
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3326034731
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3776220613
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1237561690
/workspace/coverage/default/47.sram_ctrl_alert_test.3649108399
/workspace/coverage/default/47.sram_ctrl_bijection.958964625
/workspace/coverage/default/47.sram_ctrl_executable.3944020504
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3123367565
/workspace/coverage/default/47.sram_ctrl_max_throughput.2084091809
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.844102365
/workspace/coverage/default/47.sram_ctrl_mem_walk.1233741015
/workspace/coverage/default/47.sram_ctrl_multiple_keys.674678183
/workspace/coverage/default/47.sram_ctrl_partial_access.1610438605
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2231184035
/workspace/coverage/default/47.sram_ctrl_ram_cfg.308438358
/workspace/coverage/default/47.sram_ctrl_regwen.4202764154
/workspace/coverage/default/47.sram_ctrl_smoke.1202221205
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.936045531
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.4215493842
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.255879307
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.714821982
/workspace/coverage/default/48.sram_ctrl_alert_test.1987988682
/workspace/coverage/default/48.sram_ctrl_bijection.1538239449
/workspace/coverage/default/48.sram_ctrl_executable.3022241640
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2570100999
/workspace/coverage/default/48.sram_ctrl_max_throughput.995811644
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1166405711
/workspace/coverage/default/48.sram_ctrl_mem_walk.1045342208
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2555002345
/workspace/coverage/default/48.sram_ctrl_partial_access.4125585879
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3204140722
/workspace/coverage/default/48.sram_ctrl_ram_cfg.395665359
/workspace/coverage/default/48.sram_ctrl_regwen.3003188815
/workspace/coverage/default/48.sram_ctrl_smoke.2228825413
/workspace/coverage/default/48.sram_ctrl_stress_all.3761877729
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3246675578
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3606773194
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2500163356
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2994760185
/workspace/coverage/default/49.sram_ctrl_alert_test.1584061591
/workspace/coverage/default/49.sram_ctrl_bijection.1641598401
/workspace/coverage/default/49.sram_ctrl_executable.3387833847
/workspace/coverage/default/49.sram_ctrl_lc_escalation.848724519
/workspace/coverage/default/49.sram_ctrl_max_throughput.1632438265
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1943552980
/workspace/coverage/default/49.sram_ctrl_mem_walk.2330911598
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2623428067
/workspace/coverage/default/49.sram_ctrl_partial_access.1385856654
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.155088651
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3556191773
/workspace/coverage/default/49.sram_ctrl_regwen.3068308818
/workspace/coverage/default/49.sram_ctrl_smoke.4110566946
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.235401839
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2992991108
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3588755535
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.280596107
/workspace/coverage/default/5.sram_ctrl_alert_test.2607208673
/workspace/coverage/default/5.sram_ctrl_bijection.586341005
/workspace/coverage/default/5.sram_ctrl_executable.277667354
/workspace/coverage/default/5.sram_ctrl_lc_escalation.4194234629
/workspace/coverage/default/5.sram_ctrl_max_throughput.1081392810
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3507969610
/workspace/coverage/default/5.sram_ctrl_mem_walk.3815337691
/workspace/coverage/default/5.sram_ctrl_multiple_keys.1029504577
/workspace/coverage/default/5.sram_ctrl_partial_access.4108413734
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3993688738
/workspace/coverage/default/5.sram_ctrl_ram_cfg.1026673775
/workspace/coverage/default/5.sram_ctrl_regwen.2518565609
/workspace/coverage/default/5.sram_ctrl_smoke.3622303667
/workspace/coverage/default/5.sram_ctrl_stress_all.1467900274
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1763799580
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.747743253
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.4250067228
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.4185014952
/workspace/coverage/default/6.sram_ctrl_alert_test.2221958252
/workspace/coverage/default/6.sram_ctrl_bijection.459175438
/workspace/coverage/default/6.sram_ctrl_executable.1579108746
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2986029729
/workspace/coverage/default/6.sram_ctrl_max_throughput.51945340
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1922288787
/workspace/coverage/default/6.sram_ctrl_mem_walk.1126848654
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2818165983
/workspace/coverage/default/6.sram_ctrl_partial_access.2070344112
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.220054986
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3621172161
/workspace/coverage/default/6.sram_ctrl_regwen.2491616846
/workspace/coverage/default/6.sram_ctrl_smoke.3956543913
/workspace/coverage/default/6.sram_ctrl_stress_all.2453398095
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3350896640
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.2076107209
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4189003698
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.497551370
/workspace/coverage/default/7.sram_ctrl_alert_test.4138144025
/workspace/coverage/default/7.sram_ctrl_bijection.1173338646
/workspace/coverage/default/7.sram_ctrl_executable.3069966807
/workspace/coverage/default/7.sram_ctrl_lc_escalation.4030984222
/workspace/coverage/default/7.sram_ctrl_max_throughput.2368455179
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2778911235
/workspace/coverage/default/7.sram_ctrl_mem_walk.3497755903
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1911234364
/workspace/coverage/default/7.sram_ctrl_partial_access.910863323
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3601510618
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2846358414
/workspace/coverage/default/7.sram_ctrl_regwen.2266565317
/workspace/coverage/default/7.sram_ctrl_smoke.4189474595
/workspace/coverage/default/7.sram_ctrl_stress_all.2111110446
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.373826339
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.845769885
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.322771242
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.64920253
/workspace/coverage/default/8.sram_ctrl_alert_test.3784249226
/workspace/coverage/default/8.sram_ctrl_bijection.698989184
/workspace/coverage/default/8.sram_ctrl_executable.3327108147
/workspace/coverage/default/8.sram_ctrl_lc_escalation.791838504
/workspace/coverage/default/8.sram_ctrl_max_throughput.3134345516
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3067569395
/workspace/coverage/default/8.sram_ctrl_mem_walk.1098595801
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3585975073
/workspace/coverage/default/8.sram_ctrl_partial_access.590758635
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2973116009
/workspace/coverage/default/8.sram_ctrl_ram_cfg.4155571236
/workspace/coverage/default/8.sram_ctrl_regwen.1358710590
/workspace/coverage/default/8.sram_ctrl_smoke.1969363498
/workspace/coverage/default/8.sram_ctrl_stress_all.976732671
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3019212628
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2385349564
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.54331283
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.4271904321
/workspace/coverage/default/9.sram_ctrl_alert_test.1035318512
/workspace/coverage/default/9.sram_ctrl_bijection.1833729874
/workspace/coverage/default/9.sram_ctrl_executable.3561426279
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3714244969
/workspace/coverage/default/9.sram_ctrl_max_throughput.3197837375
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.4160163042
/workspace/coverage/default/9.sram_ctrl_mem_walk.2779099975
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3552174324
/workspace/coverage/default/9.sram_ctrl_partial_access.293745999
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2192068256
/workspace/coverage/default/9.sram_ctrl_ram_cfg.165048053
/workspace/coverage/default/9.sram_ctrl_regwen.2947437113
/workspace/coverage/default/9.sram_ctrl_smoke.3016714743
/workspace/coverage/default/9.sram_ctrl_stress_all.4167082055
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2541003699
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.427111236
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.310739415




Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.943046140 Jul 22 06:53:42 PM PDT 24 Jul 22 07:11:35 PM PDT 24 23025682338 ps
T2 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2878293162 Jul 22 06:52:51 PM PDT 24 Jul 22 07:01:40 PM PDT 24 142779852622 ps
T3 /workspace/coverage/default/40.sram_ctrl_alert_test.3219676976 Jul 22 06:55:26 PM PDT 24 Jul 22 06:56:27 PM PDT 24 26660883 ps
T4 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3944395956 Jul 22 06:53:27 PM PDT 24 Jul 22 06:55:16 PM PDT 24 1370351697 ps
T5 /workspace/coverage/default/28.sram_ctrl_multiple_keys.2497929612 Jul 22 06:53:37 PM PDT 24 Jul 22 07:03:54 PM PDT 24 62840037425 ps
T9 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.3507969610 Jul 22 06:51:23 PM PDT 24 Jul 22 06:52:17 PM PDT 24 94964979 ps
T10 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.1525523381 Jul 22 06:54:59 PM PDT 24 Jul 22 07:02:22 PM PDT 24 14291333960 ps
T11 /workspace/coverage/default/22.sram_ctrl_mem_walk.1479335313 Jul 22 06:53:27 PM PDT 24 Jul 22 06:54:55 PM PDT 24 2741295669 ps
T12 /workspace/coverage/default/23.sram_ctrl_mem_walk.98184230 Jul 22 06:53:32 PM PDT 24 Jul 22 06:54:55 PM PDT 24 676725049 ps
T13 /workspace/coverage/default/33.sram_ctrl_executable.669040103 Jul 22 06:54:24 PM PDT 24 Jul 22 07:05:33 PM PDT 24 40005780367 ps
T24 /workspace/coverage/default/11.sram_ctrl_executable.140380619 Jul 22 06:52:47 PM PDT 24 Jul 22 07:02:18 PM PDT 24 1848447622 ps
T44 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3612054113 Jul 22 06:52:53 PM PDT 24 Jul 22 06:55:35 PM PDT 24 529489580 ps
T45 /workspace/coverage/default/41.sram_ctrl_multiple_keys.817299620 Jul 22 06:55:27 PM PDT 24 Jul 22 07:03:52 PM PDT 24 7168033718 ps
T56 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.16065094 Jul 22 06:53:26 PM PDT 24 Jul 22 06:54:44 PM PDT 24 68709124 ps
T25 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.3975913528 Jul 22 06:58:27 PM PDT 24 Jul 22 06:58:37 PM PDT 24 179475369 ps
T28 /workspace/coverage/default/48.sram_ctrl_executable.3022241640 Jul 22 06:56:06 PM PDT 24 Jul 22 07:15:08 PM PDT 24 17053967884 ps
T50 /workspace/coverage/default/6.sram_ctrl_mem_walk.1126848654 Jul 22 06:51:37 PM PDT 24 Jul 22 06:52:40 PM PDT 24 374216147 ps
T62 /workspace/coverage/default/34.sram_ctrl_max_throughput.2747078852 Jul 22 06:54:24 PM PDT 24 Jul 22 06:55:42 PM PDT 24 40241212 ps
T63 /workspace/coverage/default/3.sram_ctrl_executable.720579561 Jul 22 06:51:00 PM PDT 24 Jul 22 06:55:22 PM PDT 24 4302935883 ps
T64 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.1922288787 Jul 22 06:51:36 PM PDT 24 Jul 22 06:52:36 PM PDT 24 578669179 ps
T42 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.4215614969 Jul 22 06:50:49 PM PDT 24 Jul 22 07:03:44 PM PDT 24 2315070310 ps
T43 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.1649905636 Jul 22 06:56:12 PM PDT 24 Jul 22 06:58:37 PM PDT 24 1131014494 ps
T27 /workspace/coverage/default/34.sram_ctrl_regwen.2220027482 Jul 22 06:54:24 PM PDT 24 Jul 22 06:59:23 PM PDT 24 13625510764 ps
T65 /workspace/coverage/default/47.sram_ctrl_multiple_keys.674678183 Jul 22 06:55:57 PM PDT 24 Jul 22 07:20:58 PM PDT 24 38320512982 ps
T72 /workspace/coverage/default/3.sram_ctrl_max_throughput.4059101936 Jul 22 06:51:21 PM PDT 24 Jul 22 06:53:44 PM PDT 24 1761012140 ps
T71 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.4124948525 Jul 22 06:53:39 PM PDT 24 Jul 22 06:56:40 PM PDT 24 285196740 ps
T52 /workspace/coverage/default/26.sram_ctrl_mem_walk.1755216708 Jul 22 06:53:26 PM PDT 24 Jul 22 06:54:45 PM PDT 24 297667377 ps
T82 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3993688738 Jul 22 06:51:26 PM PDT 24 Jul 22 06:58:40 PM PDT 24 33833312451 ps
T29 /workspace/coverage/default/33.sram_ctrl_ram_cfg.704339411 Jul 22 06:55:37 PM PDT 24 Jul 22 06:56:33 PM PDT 24 27536231 ps
T23 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.262076558 Jul 22 06:54:23 PM PDT 24 Jul 22 06:57:12 PM PDT 24 1491076388 ps
T70 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.1497767771 Jul 22 06:54:59 PM PDT 24 Jul 22 07:05:49 PM PDT 24 4766667210 ps
T53 /workspace/coverage/default/27.sram_ctrl_mem_walk.1696246114 Jul 22 06:53:40 PM PDT 24 Jul 22 06:55:08 PM PDT 24 916984068 ps
T73 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.3104393265 Jul 22 06:55:36 PM PDT 24 Jul 22 06:56:45 PM PDT 24 116611907 ps
T106 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1197290223 Jul 22 06:50:50 PM PDT 24 Jul 22 06:56:13 PM PDT 24 15036928515 ps
T48 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.3871925592 Jul 22 06:55:38 PM PDT 24 Jul 22 06:56:40 PM PDT 24 761970716 ps
T6 /workspace/coverage/default/35.sram_ctrl_lc_escalation.2758664077 Jul 22 06:54:49 PM PDT 24 Jul 22 06:56:06 PM PDT 24 416429486 ps
T155 /workspace/coverage/default/12.sram_ctrl_max_throughput.14236433 Jul 22 06:52:52 PM PDT 24 Jul 22 06:55:24 PM PDT 24 127573486 ps
T19 /workspace/coverage/default/18.sram_ctrl_regwen.1770595657 Jul 22 06:53:14 PM PDT 24 Jul 22 07:14:47 PM PDT 24 68904755446 ps
T30 /workspace/coverage/default/20.sram_ctrl_ram_cfg.1205688186 Jul 22 06:53:33 PM PDT 24 Jul 22 06:54:51 PM PDT 24 78976158 ps
T7 /workspace/coverage/default/1.sram_ctrl_stress_all.2566161864 Jul 22 06:53:33 PM PDT 24 Jul 22 06:58:39 PM PDT 24 11174595594 ps
T107 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2056048248 Jul 22 06:53:32 PM PDT 24 Jul 22 07:04:28 PM PDT 24 87491719696 ps
T156 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2500163356 Jul 22 06:56:05 PM PDT 24 Jul 22 06:58:11 PM PDT 24 553580840 ps
T142 /workspace/coverage/default/19.sram_ctrl_stress_all.421348190 Jul 22 06:53:23 PM PDT 24 Jul 22 07:07:24 PM PDT 24 13969176720 ps
T96 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.347933241 Jul 22 06:50:56 PM PDT 24 Jul 22 07:08:23 PM PDT 24 17289933132 ps
T97 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.1060878773 Jul 22 06:54:24 PM PDT 24 Jul 22 07:00:47 PM PDT 24 1137011612 ps
T157 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.1016334869 Jul 22 06:53:47 PM PDT 24 Jul 22 06:55:44 PM PDT 24 426194080 ps
T147 /workspace/coverage/default/23.sram_ctrl_multiple_keys.4051996590 Jul 22 06:53:27 PM PDT 24 Jul 22 07:02:23 PM PDT 24 3875073968 ps
T54 /workspace/coverage/default/42.sram_ctrl_mem_walk.560831234 Jul 22 06:55:38 PM PDT 24 Jul 22 06:56:38 PM PDT 24 928977003 ps
T31 /workspace/coverage/default/46.sram_ctrl_ram_cfg.3441614121 Jul 22 06:56:18 PM PDT 24 Jul 22 06:56:54 PM PDT 24 46388470 ps
T55 /workspace/coverage/default/33.sram_ctrl_mem_walk.3521994031 Jul 22 06:55:37 PM PDT 24 Jul 22 06:56:38 PM PDT 24 402261537 ps
T158 /workspace/coverage/default/35.sram_ctrl_partial_access.3879084699 Jul 22 06:54:22 PM PDT 24 Jul 22 06:56:28 PM PDT 24 523588600 ps
T159 /workspace/coverage/default/32.sram_ctrl_max_throughput.3924061742 Jul 22 06:53:46 PM PDT 24 Jul 22 06:55:06 PM PDT 24 157032901 ps
T160 /workspace/coverage/default/47.sram_ctrl_smoke.1202221205 Jul 22 06:55:56 PM PDT 24 Jul 22 06:56:57 PM PDT 24 76056612 ps
T153 /workspace/coverage/default/41.sram_ctrl_mem_walk.3364711458 Jul 22 06:58:09 PM PDT 24 Jul 22 06:58:27 PM PDT 24 603069523 ps
T151 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2139473076 Jul 22 06:55:45 PM PDT 24 Jul 22 06:59:15 PM PDT 24 155763125 ps
T161 /workspace/coverage/default/7.sram_ctrl_partial_access.910863323 Jul 22 06:52:31 PM PDT 24 Jul 22 06:54:10 PM PDT 24 564079559 ps
T8 /workspace/coverage/default/37.sram_ctrl_lc_escalation.2114214591 Jul 22 06:54:59 PM PDT 24 Jul 22 06:56:16 PM PDT 24 688060351 ps
T108 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.500053884 Jul 22 06:55:48 PM PDT 24 Jul 22 07:01:54 PM PDT 24 22900800188 ps
T69 /workspace/coverage/default/47.sram_ctrl_regwen.4202764154 Jul 22 06:55:55 PM PDT 24 Jul 22 07:06:51 PM PDT 24 3735482777 ps
T162 /workspace/coverage/default/30.sram_ctrl_multiple_keys.717183775 Jul 22 06:55:57 PM PDT 24 Jul 22 07:01:35 PM PDT 24 4201263501 ps
T109 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.2126616164 Jul 22 06:52:35 PM PDT 24 Jul 22 06:58:50 PM PDT 24 6370690239 ps
T163 /workspace/coverage/default/40.sram_ctrl_max_throughput.4147118674 Jul 22 06:55:26 PM PDT 24 Jul 22 06:57:02 PM PDT 24 135789310 ps
T154 /workspace/coverage/default/20.sram_ctrl_partial_access.2160537465 Jul 22 06:53:33 PM PDT 24 Jul 22 06:55:33 PM PDT 24 411385259 ps
T57 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1943552980 Jul 22 06:56:18 PM PDT 24 Jul 22 06:56:59 PM PDT 24 376979215 ps
T140 /workspace/coverage/default/25.sram_ctrl_executable.2699165220 Jul 22 06:53:26 PM PDT 24 Jul 22 07:12:10 PM PDT 24 2879033278 ps
T164 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.3438952357 Jul 22 06:56:13 PM PDT 24 Jul 22 07:00:32 PM PDT 24 9473777635 ps
T139 /workspace/coverage/default/12.sram_ctrl_executable.1644215585 Jul 22 06:52:52 PM PDT 24 Jul 22 06:58:01 PM PDT 24 5323093590 ps
T150 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.118519952 Jul 22 06:53:17 PM PDT 24 Jul 22 06:59:09 PM PDT 24 2888308121 ps
T165 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.2521775433 Jul 22 06:54:53 PM PDT 24 Jul 22 06:59:34 PM PDT 24 18226320791 ps
T166 /workspace/coverage/default/11.sram_ctrl_mem_walk.1830668264 Jul 22 06:52:50 PM PDT 24 Jul 22 06:54:05 PM PDT 24 879088193 ps
T148 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.1517491774 Jul 22 06:55:24 PM PDT 24 Jul 22 07:00:37 PM PDT 24 3218762908 ps
T167 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.392855315 Jul 22 06:50:56 PM PDT 24 Jul 22 06:54:03 PM PDT 24 18089646427 ps
T168 /workspace/coverage/default/29.sram_ctrl_max_throughput.255863381 Jul 22 06:53:50 PM PDT 24 Jul 22 06:56:17 PM PDT 24 403387401 ps
T169 /workspace/coverage/default/38.sram_ctrl_bijection.1159773507 Jul 22 06:55:02 PM PDT 24 Jul 22 06:57:13 PM PDT 24 1049959166 ps
T14 /workspace/coverage/default/43.sram_ctrl_alert_test.1220652988 Jul 22 06:55:46 PM PDT 24 Jul 22 06:56:38 PM PDT 24 15044403 ps
T26 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3006128292 Jul 22 06:53:27 PM PDT 24 Jul 22 06:55:12 PM PDT 24 1384508573 ps
T149 /workspace/coverage/default/4.sram_ctrl_mem_walk.2465847312 Jul 22 06:51:25 PM PDT 24 Jul 22 06:52:28 PM PDT 24 1995765755 ps
T170 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2122696482 Jul 22 06:51:50 PM PDT 24 Jul 22 06:56:22 PM PDT 24 5989859551 ps
T171 /workspace/coverage/default/32.sram_ctrl_multiple_keys.2540004478 Jul 22 06:54:20 PM PDT 24 Jul 22 07:09:36 PM PDT 24 6219522859 ps
T172 /workspace/coverage/default/21.sram_ctrl_smoke.2802342425 Jul 22 06:54:37 PM PDT 24 Jul 22 06:58:59 PM PDT 24 445439158 ps
T22 /workspace/coverage/default/14.sram_ctrl_lc_escalation.1047968603 Jul 22 06:52:58 PM PDT 24 Jul 22 06:54:12 PM PDT 24 4473896158 ps
T80 /workspace/coverage/default/28.sram_ctrl_lc_escalation.1334151552 Jul 22 06:53:30 PM PDT 24 Jul 22 06:54:55 PM PDT 24 4862305980 ps
T173 /workspace/coverage/default/11.sram_ctrl_ram_cfg.2043775668 Jul 22 06:52:51 PM PDT 24 Jul 22 06:54:01 PM PDT 24 181049823 ps
T174 /workspace/coverage/default/8.sram_ctrl_max_throughput.3134345516 Jul 22 06:52:31 PM PDT 24 Jul 22 06:53:37 PM PDT 24 145539369 ps
T175 /workspace/coverage/default/44.sram_ctrl_mem_walk.277844707 Jul 22 06:55:44 PM PDT 24 Jul 22 06:56:48 PM PDT 24 363805317 ps
T176 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.4212870887 Jul 22 06:53:38 PM PDT 24 Jul 22 06:59:53 PM PDT 24 16472041011 ps
T20 /workspace/coverage/default/16.sram_ctrl_regwen.3706778642 Jul 22 06:53:08 PM PDT 24 Jul 22 07:02:36 PM PDT 24 1109097062 ps
T177 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2586688437 Jul 22 06:56:00 PM PDT 24 Jul 22 07:12:19 PM PDT 24 3163941898 ps
T152 /workspace/coverage/default/9.sram_ctrl_multiple_keys.3552174324 Jul 22 06:52:31 PM PDT 24 Jul 22 07:03:25 PM PDT 24 2710285643 ps
T21 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.652936195 Jul 22 06:53:38 PM PDT 24 Jul 22 07:10:46 PM PDT 24 8261766411 ps
T178 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.2992991108 Jul 22 06:56:21 PM PDT 24 Jul 22 07:01:41 PM PDT 24 3020757143 ps
T179 /workspace/coverage/default/35.sram_ctrl_multiple_keys.263720153 Jul 22 06:54:24 PM PDT 24 Jul 22 07:02:21 PM PDT 24 6877718890 ps
T145 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2973116009 Jul 22 06:52:33 PM PDT 24 Jul 22 07:03:31 PM PDT 24 51030160330 ps
T141 /workspace/coverage/default/1.sram_ctrl_executable.2958918569 Jul 22 06:50:49 PM PDT 24 Jul 22 06:59:23 PM PDT 24 7092995895 ps
T58 /workspace/coverage/default/31.sram_ctrl_mem_partial_access.1803793899 Jul 22 06:54:21 PM PDT 24 Jul 22 06:55:42 PM PDT 24 319236829 ps
T77 /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.576474602 Jul 22 06:52:11 PM PDT 24 Jul 22 06:55:26 PM PDT 24 11203675070 ps
T51 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2529846127 Jul 22 06:50:56 PM PDT 24 Jul 22 06:52:17 PM PDT 24 2673915745 ps
T119 /workspace/coverage/default/39.sram_ctrl_mem_walk.4253104176 Jul 22 06:55:12 PM PDT 24 Jul 22 06:56:22 PM PDT 24 1771126179 ps
T120 /workspace/coverage/default/16.sram_ctrl_max_throughput.1321135461 Jul 22 06:53:02 PM PDT 24 Jul 22 06:54:27 PM PDT 24 77709514 ps
T81 /workspace/coverage/default/12.sram_ctrl_regwen.699681108 Jul 22 06:52:52 PM PDT 24 Jul 22 07:04:09 PM PDT 24 3628679416 ps
T121 /workspace/coverage/default/38.sram_ctrl_lc_escalation.1888824611 Jul 22 06:55:00 PM PDT 24 Jul 22 06:56:12 PM PDT 24 1153340060 ps
T122 /workspace/coverage/default/32.sram_ctrl_bijection.2784621499 Jul 22 06:53:42 PM PDT 24 Jul 22 06:55:55 PM PDT 24 9959384256 ps
T123 /workspace/coverage/default/13.sram_ctrl_smoke.3868559721 Jul 22 06:52:54 PM PDT 24 Jul 22 06:54:13 PM PDT 24 347840583 ps
T124 /workspace/coverage/default/43.sram_ctrl_bijection.3530505650 Jul 22 06:55:35 PM PDT 24 Jul 22 06:57:01 PM PDT 24 908548025 ps
T125 /workspace/coverage/default/3.sram_ctrl_bijection.2593538710 Jul 22 06:50:57 PM PDT 24 Jul 22 06:52:41 PM PDT 24 3677886105 ps
T126 /workspace/coverage/default/21.sram_ctrl_multiple_keys.3713616824 Jul 22 06:53:16 PM PDT 24 Jul 22 06:59:22 PM PDT 24 4917518582 ps
T146 /workspace/coverage/default/5.sram_ctrl_multiple_keys.1029504577 Jul 22 06:51:23 PM PDT 24 Jul 22 07:14:00 PM PDT 24 70992495677 ps
T180 /workspace/coverage/default/6.sram_ctrl_ram_cfg.3621172161 Jul 22 06:51:37 PM PDT 24 Jul 22 06:52:34 PM PDT 24 100629415 ps
T181 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3870878285 Jul 22 06:53:28 PM PDT 24 Jul 22 07:01:50 PM PDT 24 5813137998 ps
T182 /workspace/coverage/default/0.sram_ctrl_lc_escalation.2886624087 Jul 22 06:50:54 PM PDT 24 Jul 22 06:51:44 PM PDT 24 2488212911 ps
T183 /workspace/coverage/default/32.sram_ctrl_partial_access.3165469040 Jul 22 06:53:46 PM PDT 24 Jul 22 06:55:05 PM PDT 24 354122050 ps
T15 /workspace/coverage/default/39.sram_ctrl_alert_test.3042314531 Jul 22 06:55:23 PM PDT 24 Jul 22 06:56:25 PM PDT 24 99814738 ps
T59 /workspace/coverage/default/41.sram_ctrl_mem_partial_access.3044504766 Jul 22 06:55:35 PM PDT 24 Jul 22 06:56:38 PM PDT 24 711583009 ps
T184 /workspace/coverage/default/47.sram_ctrl_partial_access.1610438605 Jul 22 06:55:56 PM PDT 24 Jul 22 06:57:24 PM PDT 24 382547057 ps
T185 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3728599041 Jul 22 06:52:52 PM PDT 24 Jul 22 07:01:29 PM PDT 24 68241928903 ps
T186 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2349702558 Jul 22 06:55:36 PM PDT 24 Jul 22 06:56:37 PM PDT 24 794606802 ps
T187 /workspace/coverage/default/38.sram_ctrl_multiple_keys.208573265 Jul 22 06:54:58 PM PDT 24 Jul 22 07:12:48 PM PDT 24 27715965165 ps
T188 /workspace/coverage/default/45.sram_ctrl_partial_access.2791190136 Jul 22 06:55:46 PM PDT 24 Jul 22 06:56:39 PM PDT 24 78337074 ps
T189 /workspace/coverage/default/4.sram_ctrl_ram_cfg.2540734194 Jul 22 06:51:24 PM PDT 24 Jul 22 06:52:17 PM PDT 24 55418909 ps
T143 /workspace/coverage/default/9.sram_ctrl_executable.3561426279 Jul 22 06:52:35 PM PDT 24 Jul 22 07:10:27 PM PDT 24 35735024837 ps
T190 /workspace/coverage/default/28.sram_ctrl_ram_cfg.2774660802 Jul 22 06:53:38 PM PDT 24 Jul 22 06:54:56 PM PDT 24 34573827 ps
T191 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.2693576446 Jul 22 06:54:15 PM PDT 24 Jul 22 06:58:47 PM PDT 24 4352020118 ps
T144 /workspace/coverage/default/27.sram_ctrl_executable.1814640761 Jul 22 06:53:40 PM PDT 24 Jul 22 07:15:11 PM PDT 24 161299007113 ps
T192 /workspace/coverage/default/0.sram_ctrl_multiple_keys.762103178 Jul 22 06:50:53 PM PDT 24 Jul 22 07:10:11 PM PDT 24 10041975210 ps
T193 /workspace/coverage/default/44.sram_ctrl_max_throughput.383102694 Jul 22 06:55:49 PM PDT 24 Jul 22 06:58:15 PM PDT 24 825422667 ps
T194 /workspace/coverage/default/38.sram_ctrl_ram_cfg.1636086479 Jul 22 06:55:12 PM PDT 24 Jul 22 06:56:17 PM PDT 24 295169459 ps
T78 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.1009711746 Jul 22 06:55:34 PM PDT 24 Jul 22 06:58:48 PM PDT 24 873223261 ps
T195 /workspace/coverage/default/2.sram_ctrl_smoke.3517406891 Jul 22 06:50:54 PM PDT 24 Jul 22 06:51:46 PM PDT 24 698301110 ps
T196 /workspace/coverage/default/8.sram_ctrl_partial_access.590758635 Jul 22 06:52:35 PM PDT 24 Jul 22 06:54:44 PM PDT 24 166539798 ps
T197 /workspace/coverage/default/3.sram_ctrl_multiple_keys.3583712819 Jul 22 06:50:57 PM PDT 24 Jul 22 06:56:02 PM PDT 24 909099993 ps
T198 /workspace/coverage/default/0.sram_ctrl_smoke.607221810 Jul 22 06:50:50 PM PDT 24 Jul 22 06:51:31 PM PDT 24 805442552 ps
T199 /workspace/coverage/default/29.sram_ctrl_smoke.2548247499 Jul 22 06:53:42 PM PDT 24 Jul 22 06:55:02 PM PDT 24 48382355 ps
T200 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.427111236 Jul 22 06:52:35 PM PDT 24 Jul 22 06:59:25 PM PDT 24 3584926332 ps
T201 /workspace/coverage/default/17.sram_ctrl_executable.3655452272 Jul 22 06:53:11 PM PDT 24 Jul 22 06:57:37 PM PDT 24 4341228943 ps
T60 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1183886487 Jul 22 06:54:26 PM PDT 24 Jul 22 07:04:10 PM PDT 24 1197112360 ps
T202 /workspace/coverage/default/27.sram_ctrl_bijection.998837259 Jul 22 06:53:41 PM PDT 24 Jul 22 06:56:05 PM PDT 24 8580564112 ps
T203 /workspace/coverage/default/24.sram_ctrl_stress_all.1871367389 Jul 22 06:53:29 PM PDT 24 Jul 22 07:39:47 PM PDT 24 207051027044 ps
T61 /workspace/coverage/default/29.sram_ctrl_mem_partial_access.2225489833 Jul 22 06:53:50 PM PDT 24 Jul 22 06:55:13 PM PDT 24 327578093 ps
T79 /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2062713698 Jul 22 06:53:58 PM PDT 24 Jul 22 06:58:38 PM PDT 24 6504457576 ps
T127 /workspace/coverage/default/26.sram_ctrl_lc_escalation.3777079744 Jul 22 06:53:41 PM PDT 24 Jul 22 06:55:07 PM PDT 24 1781541690 ps
T204 /workspace/coverage/default/48.sram_ctrl_max_throughput.995811644 Jul 22 06:56:07 PM PDT 24 Jul 22 06:57:23 PM PDT 24 87409072 ps
T205 /workspace/coverage/default/12.sram_ctrl_partial_access.2044750539 Jul 22 06:52:53 PM PDT 24 Jul 22 06:56:29 PM PDT 24 564526814 ps
T206 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4189003698 Jul 22 06:51:36 PM PDT 24 Jul 22 06:52:42 PM PDT 24 80991043 ps
T207 /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.1477008173 Jul 22 06:50:56 PM PDT 24 Jul 22 06:53:09 PM PDT 24 154641399 ps
T208 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.1053139525 Jul 22 06:53:29 PM PDT 24 Jul 22 06:58:07 PM PDT 24 3608511362 ps
T209 /workspace/coverage/default/44.sram_ctrl_executable.3905882156 Jul 22 06:55:46 PM PDT 24 Jul 22 07:11:42 PM PDT 24 40409622911 ps
T210 /workspace/coverage/default/11.sram_ctrl_smoke.2442745263 Jul 22 06:52:34 PM PDT 24 Jul 22 06:54:24 PM PDT 24 1055781381 ps
T211 /workspace/coverage/default/1.sram_ctrl_lc_escalation.2299450842 Jul 22 06:50:53 PM PDT 24 Jul 22 06:51:41 PM PDT 24 1268024220 ps
T212 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.505483034 Jul 22 06:54:44 PM PDT 24 Jul 22 07:09:43 PM PDT 24 2821420473 ps
T213 /workspace/coverage/default/45.sram_ctrl_bijection.4032327407 Jul 22 06:55:48 PM PDT 24 Jul 22 06:57:46 PM PDT 24 22878559178 ps
T214 /workspace/coverage/default/33.sram_ctrl_regwen.3083878481 Jul 22 06:54:09 PM PDT 24 Jul 22 07:13:25 PM PDT 24 45244602499 ps
T215 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2295365261 Jul 22 06:53:47 PM PDT 24 Jul 22 07:00:09 PM PDT 24 12555933070 ps
T216 /workspace/coverage/default/41.sram_ctrl_executable.674931505 Jul 22 06:55:35 PM PDT 24 Jul 22 07:20:01 PM PDT 24 201995700217 ps
T217 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3601510618 Jul 22 06:52:31 PM PDT 24 Jul 22 06:58:55 PM PDT 24 15609441406 ps
T218 /workspace/coverage/default/16.sram_ctrl_mem_walk.895617187 Jul 22 06:53:34 PM PDT 24 Jul 22 06:54:59 PM PDT 24 525347522 ps
T219 /workspace/coverage/default/9.sram_ctrl_max_throughput.3197837375 Jul 22 06:52:31 PM PDT 24 Jul 22 06:54:23 PM PDT 24 425470148 ps
T220 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1084329687 Jul 22 06:52:47 PM PDT 24 Jul 22 06:57:40 PM PDT 24 2367156840 ps
T221 /workspace/coverage/default/7.sram_ctrl_max_throughput.2368455179 Jul 22 06:52:34 PM PDT 24 Jul 22 06:54:30 PM PDT 24 201778864 ps
T222 /workspace/coverage/default/43.sram_ctrl_executable.290978589 Jul 22 06:57:23 PM PDT 24 Jul 22 07:20:34 PM PDT 24 13906991874 ps
T223 /workspace/coverage/default/46.sram_ctrl_stress_all.2426168406 Jul 22 06:55:57 PM PDT 24 Jul 22 07:48:22 PM PDT 24 55869046107 ps
T224 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.4293815501 Jul 22 06:53:49 PM PDT 24 Jul 22 07:02:10 PM PDT 24 33207652633 ps
T225 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2581741361 Jul 22 06:54:51 PM PDT 24 Jul 22 07:02:27 PM PDT 24 65362096837 ps
T226 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.497551370 Jul 22 06:52:31 PM PDT 24 Jul 22 07:02:53 PM PDT 24 2546907279 ps
T227 /workspace/coverage/default/26.sram_ctrl_regwen.1708618842 Jul 22 06:53:39 PM PDT 24 Jul 22 07:00:57 PM PDT 24 6344279923 ps
T228 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.162447269 Jul 22 06:54:20 PM PDT 24 Jul 22 06:55:44 PM PDT 24 604620885 ps
T229 /workspace/coverage/default/29.sram_ctrl_regwen.4187859209 Jul 22 06:53:50 PM PDT 24 Jul 22 07:08:48 PM PDT 24 43956149970 ps
T230 /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3403902782 Jul 22 06:55:46 PM PDT 24 Jul 22 06:56:43 PM PDT 24 113680449 ps
T231 /workspace/coverage/default/20.sram_ctrl_stress_all.3451810498 Jul 22 06:53:34 PM PDT 24 Jul 22 08:29:23 PM PDT 24 15431499832 ps
T232 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.904082275 Jul 22 06:54:44 PM PDT 24 Jul 22 07:10:42 PM PDT 24 2159581983 ps
T233 /workspace/coverage/default/4.sram_ctrl_regwen.4050365263 Jul 22 06:51:25 PM PDT 24 Jul 22 07:05:42 PM PDT 24 14951604287 ps
T234 /workspace/coverage/default/20.sram_ctrl_max_throughput.477142355 Jul 22 06:53:42 PM PDT 24 Jul 22 06:55:01 PM PDT 24 145699677 ps
T235 /workspace/coverage/default/38.sram_ctrl_alert_test.183987407 Jul 22 06:55:10 PM PDT 24 Jul 22 06:56:17 PM PDT 24 76794528 ps
T236 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.1347861835 Jul 22 06:54:21 PM PDT 24 Jul 22 06:57:29 PM PDT 24 2487321632 ps
T237 /workspace/coverage/default/48.sram_ctrl_mem_walk.1045342208 Jul 22 06:56:08 PM PDT 24 Jul 22 06:57:01 PM PDT 24 1022581419 ps
T238 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.551615956 Jul 22 06:51:21 PM PDT 24 Jul 22 06:53:11 PM PDT 24 174921767 ps
T239 /workspace/coverage/default/3.sram_ctrl_alert_test.1131119526 Jul 22 06:51:02 PM PDT 24 Jul 22 06:51:48 PM PDT 24 14905790 ps
T240 /workspace/coverage/default/19.sram_ctrl_lc_escalation.2120731033 Jul 22 06:53:12 PM PDT 24 Jul 22 06:54:30 PM PDT 24 982000926 ps
T241 /workspace/coverage/default/45.sram_ctrl_mem_walk.1319685444 Jul 22 06:56:06 PM PDT 24 Jul 22 06:56:55 PM PDT 24 595386447 ps
T242 /workspace/coverage/default/2.sram_ctrl_stress_all.3287603786 Jul 22 06:50:58 PM PDT 24 Jul 22 06:52:08 PM PDT 24 3742577884 ps
T243 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.1886188174 Jul 22 06:52:52 PM PDT 24 Jul 22 06:57:15 PM PDT 24 12405240941 ps
T244 /workspace/coverage/default/30.sram_ctrl_lc_escalation.1403519484 Jul 22 06:53:32 PM PDT 24 Jul 22 06:54:50 PM PDT 24 217973921 ps
T245 /workspace/coverage/default/8.sram_ctrl_smoke.1969363498 Jul 22 06:52:31 PM PDT 24 Jul 22 06:55:56 PM PDT 24 800791579 ps
T246 /workspace/coverage/default/2.sram_ctrl_executable.2591483850 Jul 22 06:50:55 PM PDT 24 Jul 22 07:09:04 PM PDT 24 10624161972 ps
T247 /workspace/coverage/default/29.sram_ctrl_bijection.3922868944 Jul 22 06:53:50 PM PDT 24 Jul 22 06:55:43 PM PDT 24 2528802353 ps
T248 /workspace/coverage/default/11.sram_ctrl_lc_escalation.518108744 Jul 22 06:52:47 PM PDT 24 Jul 22 06:54:01 PM PDT 24 871411183 ps
T249 /workspace/coverage/default/31.sram_ctrl_alert_test.1368632037 Jul 22 06:53:46 PM PDT 24 Jul 22 06:55:04 PM PDT 24 13212224 ps
T250 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.2235212384 Jul 22 06:53:55 PM PDT 24 Jul 22 06:55:18 PM PDT 24 205068864 ps
T251 /workspace/coverage/default/35.sram_ctrl_max_throughput.3611620166 Jul 22 06:54:36 PM PDT 24 Jul 22 06:56:08 PM PDT 24 72970683 ps
T252 /workspace/coverage/default/13.sram_ctrl_bijection.1782914995 Jul 22 06:52:53 PM PDT 24 Jul 22 06:54:51 PM PDT 24 2709149499 ps
T253 /workspace/coverage/default/4.sram_ctrl_multiple_keys.1309521887 Jul 22 06:51:01 PM PDT 24 Jul 22 07:01:35 PM PDT 24 44375949356 ps
T254 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.799216498 Jul 22 06:53:20 PM PDT 24 Jul 22 07:07:33 PM PDT 24 2409935572 ps
T255 /workspace/coverage/default/41.sram_ctrl_stress_all.65095496 Jul 22 06:55:35 PM PDT 24 Jul 22 07:48:37 PM PDT 24 168531377539 ps
T256 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1227883338 Jul 22 06:54:58 PM PDT 24 Jul 22 06:56:32 PM PDT 24 328155241 ps
T257 /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.185138823 Jul 22 06:56:18 PM PDT 24 Jul 22 07:03:23 PM PDT 24 55804504781 ps
T258 /workspace/coverage/default/3.sram_ctrl_regwen.2344063943 Jul 22 06:51:11 PM PDT 24 Jul 22 06:57:33 PM PDT 24 4156429425 ps
T259 /workspace/coverage/default/2.sram_ctrl_bijection.2017038873 Jul 22 06:50:54 PM PDT 24 Jul 22 06:52:32 PM PDT 24 850059358 ps
T260 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.2825983661 Jul 22 06:55:16 PM PDT 24 Jul 22 06:56:24 PM PDT 24 104697862 ps
T261 /workspace/coverage/default/29.sram_ctrl_lc_escalation.2671553256 Jul 22 06:53:26 PM PDT 24 Jul 22 06:54:45 PM PDT 24 453514161 ps
T262 /workspace/coverage/default/48.sram_ctrl_multiple_keys.2555002345 Jul 22 06:56:06 PM PDT 24 Jul 22 07:13:39 PM PDT 24 77480308919 ps
T263 /workspace/coverage/default/24.sram_ctrl_lc_escalation.3587422770 Jul 22 06:53:28 PM PDT 24 Jul 22 06:54:54 PM PDT 24 924847660 ps
T264 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.3361324366 Jul 22 06:51:27 PM PDT 24 Jul 22 07:06:06 PM PDT 24 10609289602 ps
T265 /workspace/coverage/default/40.sram_ctrl_regwen.4174115373 Jul 22 06:55:25 PM PDT 24 Jul 22 07:06:56 PM PDT 24 10530214514 ps
T266 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.4234958520 Jul 22 06:53:29 PM PDT 24 Jul 22 07:01:39 PM PDT 24 16269680202 ps
T267 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3714244969 Jul 22 06:52:33 PM PDT 24 Jul 22 06:53:37 PM PDT 24 574623105 ps
T268 /workspace/coverage/default/34.sram_ctrl_ram_cfg.1567026841 Jul 22 06:54:25 PM PDT 24 Jul 22 06:55:42 PM PDT 24 93794651 ps
T269 /workspace/coverage/default/16.sram_ctrl_executable.3954082646 Jul 22 06:53:01 PM PDT 24 Jul 22 06:56:41 PM PDT 24 3394305476 ps
T270 /workspace/coverage/default/27.sram_ctrl_lc_escalation.1019920036 Jul 22 06:53:40 PM PDT 24 Jul 22 06:55:00 PM PDT 24 146006989 ps
T271 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.310739415 Jul 22 06:52:31 PM PDT 24 Jul 22 06:53:34 PM PDT 24 292201092 ps
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T273 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.280596107 Jul 22 06:51:25 PM PDT 24 Jul 22 06:55:16 PM PDT 24 5244831379 ps
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T275 /workspace/coverage/default/6.sram_ctrl_partial_access.2070344112 Jul 22 06:51:40 PM PDT 24 Jul 22 06:53:29 PM PDT 24 1740729123 ps
T276 /workspace/coverage/default/41.sram_ctrl_max_throughput.3277721151 Jul 22 06:57:23 PM PDT 24 Jul 22 06:58:02 PM PDT 24 602340677 ps
T277 /workspace/coverage/default/32.sram_ctrl_stress_all.3781696140 Jul 22 06:53:56 PM PDT 24 Jul 22 07:27:09 PM PDT 24 14274139605 ps
T278 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.714821982 Jul 22 06:56:08 PM PDT 24 Jul 22 06:58:02 PM PDT 24 9531429391 ps
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T281 /workspace/coverage/default/28.sram_ctrl_partial_access.3163910652 Jul 22 06:53:39 PM PDT 24 Jul 22 06:57:21 PM PDT 24 753851702 ps
T282 /workspace/coverage/default/15.sram_ctrl_lc_escalation.542942232 Jul 22 06:53:02 PM PDT 24 Jul 22 06:54:19 PM PDT 24 2349227417 ps
T283 /workspace/coverage/default/44.sram_ctrl_ram_cfg.3977302978 Jul 22 06:55:46 PM PDT 24 Jul 22 06:56:40 PM PDT 24 45931525 ps
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T288 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.322771242 Jul 22 06:52:33 PM PDT 24 Jul 22 06:54:48 PM PDT 24 484973156 ps
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T295 /workspace/coverage/default/22.sram_ctrl_ram_cfg.3743361374 Jul 22 06:54:25 PM PDT 24 Jul 22 06:55:43 PM PDT 24 29298558 ps
T296 /workspace/coverage/default/27.sram_ctrl_multiple_keys.3413680255 Jul 22 06:53:46 PM PDT 24 Jul 22 07:09:03 PM PDT 24 4067276562 ps
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T298 /workspace/coverage/default/49.sram_ctrl_partial_access.1385856654 Jul 22 06:56:19 PM PDT 24 Jul 22 06:59:33 PM PDT 24 6818974077 ps
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T300 /workspace/coverage/default/49.sram_ctrl_smoke.4110566946 Jul 22 06:56:18 PM PDT 24 Jul 22 06:57:23 PM PDT 24 1294822731 ps
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T303 /workspace/coverage/default/47.sram_ctrl_ram_cfg.308438358 Jul 22 06:56:01 PM PDT 24 Jul 22 06:56:46 PM PDT 24 46194291 ps
T304 /workspace/coverage/default/23.sram_ctrl_ram_cfg.1377979289 Jul 22 06:53:29 PM PDT 24 Jul 22 06:54:45 PM PDT 24 29938975 ps
T305 /workspace/coverage/default/10.sram_ctrl_partial_access.543445699 Jul 22 06:52:34 PM PDT 24 Jul 22 06:53:41 PM PDT 24 678166027 ps
T306 /workspace/coverage/default/49.sram_ctrl_lc_escalation.848724519 Jul 22 06:56:18 PM PDT 24 Jul 22 06:57:02 PM PDT 24 2687935283 ps
T307 /workspace/coverage/default/45.sram_ctrl_executable.649840580 Jul 22 06:55:51 PM PDT 24 Jul 22 06:57:57 PM PDT 24 1330563601 ps
T308 /workspace/coverage/default/7.sram_ctrl_multiple_keys.1911234364 Jul 22 06:52:31 PM PDT 24 Jul 22 07:08:45 PM PDT 24 8904356495 ps
T309 /workspace/coverage/default/22.sram_ctrl_executable.1370517519 Jul 22 06:54:25 PM PDT 24 Jul 22 07:17:15 PM PDT 24 15641296015 ps
T310 /workspace/coverage/default/6.sram_ctrl_stress_all.2453398095 Jul 22 06:51:37 PM PDT 24 Jul 22 07:54:16 PM PDT 24 45477044927 ps
T311 /workspace/coverage/default/29.sram_ctrl_stress_all.405017926 Jul 22 06:55:57 PM PDT 24 Jul 22 07:20:48 PM PDT 24 93501779827 ps
T312 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.255879307 Jul 22 06:55:57 PM PDT 24 Jul 22 06:57:51 PM PDT 24 472419928 ps
T313 /workspace/coverage/default/19.sram_ctrl_alert_test.1079699807 Jul 22 06:53:15 PM PDT 24 Jul 22 06:54:28 PM PDT 24 23489496 ps
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