Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1026
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
81.46 81.46 95.76 95.76 81.16 81.16 93.48 93.48 61.90 61.90 86.23 86.23 94.25 94.25 57.40 57.40 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3740827765
89.00 7.54 97.03 1.27 87.68 6.52 93.90 0.42 71.43 9.52 91.06 4.83 95.43 1.18 86.47 29.07 /workspace/coverage/default/34.sram_ctrl_stress_all.1403526261
93.88 4.88 98.73 1.69 87.80 0.12 93.90 0.00 100.00 28.57 93.96 2.90 96.31 0.88 86.47 0.00 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.1992105786
94.89 1.01 98.90 0.17 88.63 0.83 94.11 0.21 100.00 0.00 94.69 0.72 96.31 0.00 91.59 5.12 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1458288864
95.69 0.80 99.07 0.17 90.40 1.78 95.56 1.46 100.00 0.00 95.41 0.72 96.90 0.59 92.50 0.91 /workspace/coverage/default/4.sram_ctrl_sec_cm.1983506763
96.14 0.44 99.07 0.00 90.40 0.00 97.78 2.22 100.00 0.00 95.41 0.00 97.05 0.15 93.24 0.73 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1247393102
96.34 0.21 99.07 0.00 90.40 0.00 97.78 0.00 100.00 0.00 95.41 0.00 97.05 0.00 94.70 1.46 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2530380597
96.55 0.20 99.07 0.00 90.52 0.12 97.85 0.07 100.00 0.00 95.89 0.48 97.79 0.74 94.70 0.00 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.1115736867
96.75 0.20 99.07 0.00 90.52 0.00 97.92 0.07 100.00 0.00 95.89 0.00 99.12 1.33 94.70 0.00 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1268405669
96.89 0.15 99.07 0.00 90.52 0.00 98.58 0.66 100.00 0.00 95.89 0.00 99.12 0.00 95.06 0.37 /workspace/coverage/default/30.sram_ctrl_regwen.207361148
97.03 0.14 99.15 0.08 90.52 0.00 99.45 0.87 100.00 0.00 95.89 0.00 99.12 0.00 95.06 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.1918588925
97.16 0.13 99.15 0.00 90.52 0.00 99.45 0.00 100.00 0.00 95.89 0.00 99.12 0.00 95.98 0.91 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.3266048791
97.25 0.10 99.15 0.00 90.64 0.12 99.45 0.00 100.00 0.00 95.89 0.00 99.12 0.00 96.53 0.55 /workspace/coverage/default/9.sram_ctrl_stress_all.3633741223
97.34 0.09 99.15 0.00 91.00 0.36 99.51 0.07 100.00 0.00 95.89 0.00 99.12 0.00 96.71 0.18 /workspace/coverage/default/1.sram_ctrl_alert_test.2044218511
97.43 0.09 99.15 0.00 91.00 0.00 99.51 0.00 100.00 0.00 96.14 0.24 99.12 0.00 97.07 0.37 /workspace/coverage/default/33.sram_ctrl_stress_all.1723859295
97.48 0.05 99.15 0.00 91.00 0.00 99.51 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.37 /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.48188371
97.50 0.02 99.15 0.00 91.00 0.00 99.69 0.17 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/default/23.sram_ctrl_stress_all.2533883598
97.51 0.01 99.15 0.00 91.00 0.00 99.72 0.03 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/default/15.sram_ctrl_mem_walk.2316780954

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.873516110
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2475454784
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3145867098
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.3779493355
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3404978339
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3410466238
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.2501177561
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.1378901056
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.673399618
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1043188003
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.934897807
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2286298238
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.480054754
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2221841738
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3657980093
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1110636945
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2828978890
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3933812906
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2410262316
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3121034874
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.2231038713
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.401449986
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.4273731774
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.4127044189
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1858198705
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2548016700
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.69928380
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1788517565
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1076061692
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3383424817
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2921433258
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3794550497
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.881164715
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1587173495
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1956031948
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.1812780747
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1038726605
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2916012743
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.41119395
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.937752553
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3332365402
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1643372174
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3653642344
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.1168052936
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3303005549
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2016798267
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.689823727
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1255550847
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1093689750
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3760305415
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1233515743
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1839767252
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1250227595
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2024456841
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2285180866
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2917212288
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1629564509
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.3576565016
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2535457315
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3843709771
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2278902397
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3016176318
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2178480046
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2158960466
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.4269508322
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.3712342488
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3788246816
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1704335716
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.2802561087
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1044162850
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.4009001130
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1119847103
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3667479240
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2701787125
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1130415508
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2840360796
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1627056703
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.1538858322
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1915369780
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3193077421
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1187026231
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.4060194161
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.971186483
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1128206288
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2740223252
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3249596139
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1579986495
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3229182127
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3130823356
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3430431416
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.504248621
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1319017855
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1755873051
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.4119693609
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2064647713
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.3231092377
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.279273878
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1444958547
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1695659978
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2906466695
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.558693366
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1095226120
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.4077480066
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1847846850
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3699887389
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.442175663
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1785248842
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.780562227
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.594255474
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1893096862
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2040294181
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.227967735
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3452072007
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.332647282
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2848464999
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2050533095
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.3735090496
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1363228495
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2287885992
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.843755937
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2628293211
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.950059782
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3015288584
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3833596488
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3069445677
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.525188443
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1801100895
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1429190336
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.4195569530
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.217461826
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3855048115
/workspace/coverage/default/0.sram_ctrl_alert_test.4221811001
/workspace/coverage/default/0.sram_ctrl_bijection.3769132000
/workspace/coverage/default/0.sram_ctrl_executable.1067935229
/workspace/coverage/default/0.sram_ctrl_lc_escalation.4132374141
/workspace/coverage/default/0.sram_ctrl_max_throughput.2489286682
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.166497197
/workspace/coverage/default/0.sram_ctrl_mem_walk.2802695422
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2238649055
/workspace/coverage/default/0.sram_ctrl_partial_access.1402461938
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.910478416
/workspace/coverage/default/0.sram_ctrl_regwen.826477614
/workspace/coverage/default/0.sram_ctrl_sec_cm.3678608934
/workspace/coverage/default/0.sram_ctrl_smoke.3748267016
/workspace/coverage/default/0.sram_ctrl_stress_all.3623734741
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4250139235
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2816960003
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2724644233
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.28248281
/workspace/coverage/default/1.sram_ctrl_bijection.2227731737
/workspace/coverage/default/1.sram_ctrl_executable.2328704021
/workspace/coverage/default/1.sram_ctrl_lc_escalation.181709563
/workspace/coverage/default/1.sram_ctrl_max_throughput.2043769284
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.602161648
/workspace/coverage/default/1.sram_ctrl_mem_walk.548721867
/workspace/coverage/default/1.sram_ctrl_multiple_keys.766258238
/workspace/coverage/default/1.sram_ctrl_partial_access.2179161684
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3651276939
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2485436314
/workspace/coverage/default/1.sram_ctrl_regwen.15703057
/workspace/coverage/default/1.sram_ctrl_sec_cm.1394124970
/workspace/coverage/default/1.sram_ctrl_smoke.1677962360
/workspace/coverage/default/1.sram_ctrl_stress_all.3263604010
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1426735901
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1242376735
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.4077382098
/workspace/coverage/default/10.sram_ctrl_alert_test.842298000
/workspace/coverage/default/10.sram_ctrl_bijection.1585426822
/workspace/coverage/default/10.sram_ctrl_executable.4170515563
/workspace/coverage/default/10.sram_ctrl_lc_escalation.2791381373
/workspace/coverage/default/10.sram_ctrl_max_throughput.1835123620
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.747137948
/workspace/coverage/default/10.sram_ctrl_mem_walk.1373177253
/workspace/coverage/default/10.sram_ctrl_multiple_keys.816018804
/workspace/coverage/default/10.sram_ctrl_partial_access.3121088698
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2309412960
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3309651965
/workspace/coverage/default/10.sram_ctrl_regwen.1594345090
/workspace/coverage/default/10.sram_ctrl_smoke.2534144420
/workspace/coverage/default/10.sram_ctrl_stress_all.1342484336
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1462990091
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2831921471
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4138129900
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.483241898
/workspace/coverage/default/11.sram_ctrl_alert_test.3185488313
/workspace/coverage/default/11.sram_ctrl_bijection.363001624
/workspace/coverage/default/11.sram_ctrl_executable.4010854334
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2058194778
/workspace/coverage/default/11.sram_ctrl_max_throughput.2503073323
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2185481689
/workspace/coverage/default/11.sram_ctrl_mem_walk.433370978
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1104835834
/workspace/coverage/default/11.sram_ctrl_partial_access.342193283
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4138937483
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1920997023
/workspace/coverage/default/11.sram_ctrl_regwen.1746414760
/workspace/coverage/default/11.sram_ctrl_smoke.3168980798
/workspace/coverage/default/11.sram_ctrl_stress_all.3615549376
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2556756139
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.846254515
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3360173362
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.487900497
/workspace/coverage/default/12.sram_ctrl_alert_test.1676327090
/workspace/coverage/default/12.sram_ctrl_bijection.3760785371
/workspace/coverage/default/12.sram_ctrl_executable.1251787285
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2911801545
/workspace/coverage/default/12.sram_ctrl_max_throughput.345247709
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.4248798343
/workspace/coverage/default/12.sram_ctrl_mem_walk.3734541090
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/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.4169191210
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1263840976
/workspace/coverage/default/43.sram_ctrl_regwen.1654170444
/workspace/coverage/default/43.sram_ctrl_smoke.1515827082
/workspace/coverage/default/43.sram_ctrl_stress_all.190439230
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2929736089
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.155669453
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.441541884
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1910712740
/workspace/coverage/default/44.sram_ctrl_alert_test.2180352456
/workspace/coverage/default/44.sram_ctrl_bijection.1317368520
/workspace/coverage/default/44.sram_ctrl_executable.1764624505
/workspace/coverage/default/44.sram_ctrl_lc_escalation.44965249
/workspace/coverage/default/44.sram_ctrl_max_throughput.2306567310
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1688056533
/workspace/coverage/default/44.sram_ctrl_mem_walk.3025236306
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3130602756
/workspace/coverage/default/44.sram_ctrl_partial_access.3657839896
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1127487321
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3862488585
/workspace/coverage/default/44.sram_ctrl_regwen.33127119
/workspace/coverage/default/44.sram_ctrl_smoke.3220095481
/workspace/coverage/default/44.sram_ctrl_stress_all.1366598189
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1738666086
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2162773399
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3400985046
/workspace/coverage/default/45.sram_ctrl_alert_test.3229439251
/workspace/coverage/default/45.sram_ctrl_bijection.3439731736
/workspace/coverage/default/45.sram_ctrl_executable.3899538377
/workspace/coverage/default/45.sram_ctrl_lc_escalation.1251180976
/workspace/coverage/default/45.sram_ctrl_max_throughput.3628003830
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3379142216
/workspace/coverage/default/45.sram_ctrl_mem_walk.603550913
/workspace/coverage/default/45.sram_ctrl_multiple_keys.1331996758
/workspace/coverage/default/45.sram_ctrl_partial_access.755798381
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3391853415
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2198526338
/workspace/coverage/default/45.sram_ctrl_regwen.943148246
/workspace/coverage/default/45.sram_ctrl_smoke.2184720831
/workspace/coverage/default/45.sram_ctrl_stress_all.3505255427
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1720404216
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1419065511
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2235043710
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2934688683
/workspace/coverage/default/46.sram_ctrl_alert_test.1208789760
/workspace/coverage/default/46.sram_ctrl_bijection.2421136403
/workspace/coverage/default/46.sram_ctrl_executable.2252219001
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3001181784
/workspace/coverage/default/46.sram_ctrl_max_throughput.4130334687
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1791866118
/workspace/coverage/default/46.sram_ctrl_mem_walk.1646680949
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3615069259
/workspace/coverage/default/46.sram_ctrl_partial_access.325253490
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1465188311
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2246706134
/workspace/coverage/default/46.sram_ctrl_regwen.1566632078
/workspace/coverage/default/46.sram_ctrl_smoke.810394407
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.1323547626
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1353625684
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.3262977631
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1542533080
/workspace/coverage/default/47.sram_ctrl_alert_test.571900534
/workspace/coverage/default/47.sram_ctrl_bijection.3050764789
/workspace/coverage/default/47.sram_ctrl_executable.1219935743
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2705511993
/workspace/coverage/default/47.sram_ctrl_max_throughput.3018270720
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1336498158
/workspace/coverage/default/47.sram_ctrl_mem_walk.4106321813
/workspace/coverage/default/47.sram_ctrl_multiple_keys.24126178
/workspace/coverage/default/47.sram_ctrl_partial_access.3371711739
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1228435959
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1662290573
/workspace/coverage/default/47.sram_ctrl_regwen.778381404
/workspace/coverage/default/47.sram_ctrl_smoke.3700511665
/workspace/coverage/default/47.sram_ctrl_stress_all.834303556
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.623623296
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2969347691
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4144303834
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1760957399
/workspace/coverage/default/48.sram_ctrl_alert_test.3961585317
/workspace/coverage/default/48.sram_ctrl_bijection.3967765917
/workspace/coverage/default/48.sram_ctrl_executable.269665556
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1921719693
/workspace/coverage/default/48.sram_ctrl_max_throughput.1126162148
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1404410335
/workspace/coverage/default/48.sram_ctrl_mem_walk.674957669
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1595089536
/workspace/coverage/default/48.sram_ctrl_partial_access.665291483
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.435129002
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2983027066
/workspace/coverage/default/48.sram_ctrl_regwen.156431848
/workspace/coverage/default/48.sram_ctrl_smoke.2558042565
/workspace/coverage/default/48.sram_ctrl_stress_all.3896425599
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.2337918821
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2652499575
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2028032044
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.298295672
/workspace/coverage/default/49.sram_ctrl_alert_test.2667275132
/workspace/coverage/default/49.sram_ctrl_bijection.1818688395
/workspace/coverage/default/49.sram_ctrl_executable.270521094
/workspace/coverage/default/49.sram_ctrl_lc_escalation.260624557
/workspace/coverage/default/49.sram_ctrl_max_throughput.2042698963
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.1588714212
/workspace/coverage/default/49.sram_ctrl_mem_walk.1243381265
/workspace/coverage/default/49.sram_ctrl_multiple_keys.918380372
/workspace/coverage/default/49.sram_ctrl_partial_access.1656003524
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.3203373703
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2535853112
/workspace/coverage/default/49.sram_ctrl_regwen.1070352750
/workspace/coverage/default/49.sram_ctrl_smoke.340332890
/workspace/coverage/default/49.sram_ctrl_stress_all.2093399533
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1888382885
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1029428517
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1086149730
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2394007568
/workspace/coverage/default/5.sram_ctrl_alert_test.63287300
/workspace/coverage/default/5.sram_ctrl_bijection.3985988093
/workspace/coverage/default/5.sram_ctrl_executable.2278528674
/workspace/coverage/default/5.sram_ctrl_lc_escalation.211019360
/workspace/coverage/default/5.sram_ctrl_max_throughput.234522265
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.4040669032
/workspace/coverage/default/5.sram_ctrl_mem_walk.559187080
/workspace/coverage/default/5.sram_ctrl_multiple_keys.2670636706
/workspace/coverage/default/5.sram_ctrl_partial_access.2509728759
/workspace/coverage/default/5.sram_ctrl_ram_cfg.934158043
/workspace/coverage/default/5.sram_ctrl_regwen.1349681090
/workspace/coverage/default/5.sram_ctrl_smoke.904827817
/workspace/coverage/default/5.sram_ctrl_stress_all.2897345811
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3311449260
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2727748046
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.952361722
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2037154507
/workspace/coverage/default/6.sram_ctrl_alert_test.2903801898
/workspace/coverage/default/6.sram_ctrl_bijection.4061597743
/workspace/coverage/default/6.sram_ctrl_executable.3361859606
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2835329166
/workspace/coverage/default/6.sram_ctrl_max_throughput.1305084590
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2509012820
/workspace/coverage/default/6.sram_ctrl_mem_walk.1341691407
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2790200134
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.2002395811
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3630222598
/workspace/coverage/default/6.sram_ctrl_regwen.2531241424
/workspace/coverage/default/6.sram_ctrl_smoke.1308004544
/workspace/coverage/default/6.sram_ctrl_stress_all.378789217
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.917662703
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4253198558
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.1214009829
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.473951850
/workspace/coverage/default/7.sram_ctrl_alert_test.2261383618
/workspace/coverage/default/7.sram_ctrl_bijection.3351125445
/workspace/coverage/default/7.sram_ctrl_executable.2974978107
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1657870404
/workspace/coverage/default/7.sram_ctrl_max_throughput.3560178558
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.4210735926
/workspace/coverage/default/7.sram_ctrl_mem_walk.2409721632
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3179094077
/workspace/coverage/default/7.sram_ctrl_partial_access.3291876505
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3976820596
/workspace/coverage/default/7.sram_ctrl_ram_cfg.4038316794
/workspace/coverage/default/7.sram_ctrl_regwen.3922840175
/workspace/coverage/default/7.sram_ctrl_smoke.1179605488
/workspace/coverage/default/7.sram_ctrl_stress_all.2989668531
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3267110970
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1492707700
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2488588745
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.495975805
/workspace/coverage/default/8.sram_ctrl_alert_test.1628631036
/workspace/coverage/default/8.sram_ctrl_bijection.2783117292
/workspace/coverage/default/8.sram_ctrl_executable.3786278965
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3584142747
/workspace/coverage/default/8.sram_ctrl_max_throughput.374736312
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2131867941
/workspace/coverage/default/8.sram_ctrl_mem_walk.1490765814
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3909408277
/workspace/coverage/default/8.sram_ctrl_partial_access.3519568946
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3961381564
/workspace/coverage/default/8.sram_ctrl_ram_cfg.679687934
/workspace/coverage/default/8.sram_ctrl_regwen.1591464562
/workspace/coverage/default/8.sram_ctrl_smoke.2203044505
/workspace/coverage/default/8.sram_ctrl_stress_all.650620073
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.650676666
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.1898731429
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1281924971
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2548411523
/workspace/coverage/default/9.sram_ctrl_alert_test.368037808
/workspace/coverage/default/9.sram_ctrl_bijection.3822941506
/workspace/coverage/default/9.sram_ctrl_executable.412754978
/workspace/coverage/default/9.sram_ctrl_lc_escalation.521627155
/workspace/coverage/default/9.sram_ctrl_max_throughput.626338467
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1127596249
/workspace/coverage/default/9.sram_ctrl_mem_walk.2081286681
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1919958824
/workspace/coverage/default/9.sram_ctrl_partial_access.1907357237
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.606870991
/workspace/coverage/default/9.sram_ctrl_ram_cfg.3577445655
/workspace/coverage/default/9.sram_ctrl_regwen.92583141
/workspace/coverage/default/9.sram_ctrl_smoke.2621318396
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1045712038
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.4227548084
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.860348029



Total test records in report: 1026
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3391853415 Jul 24 06:49:17 PM PDT 24 Jul 24 06:54:02 PM PDT 24 15088279594 ps
T2 /workspace/coverage/default/42.sram_ctrl_partial_access.4126379543 Jul 24 06:48:41 PM PDT 24 Jul 24 06:50:08 PM PDT 24 992425732 ps
T3 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.3740827765 Jul 24 06:48:43 PM PDT 24 Jul 24 06:56:11 PM PDT 24 1857389036 ps
T4 /workspace/coverage/default/37.sram_ctrl_partial_access.3957778851 Jul 24 06:47:21 PM PDT 24 Jul 24 06:47:34 PM PDT 24 671484023 ps
T9 /workspace/coverage/default/23.sram_ctrl_multiple_keys.3898863554 Jul 24 06:43:23 PM PDT 24 Jul 24 07:02:35 PM PDT 24 3171752740 ps
T5 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.2229981820 Jul 24 06:43:57 PM PDT 24 Jul 24 07:09:27 PM PDT 24 15220115921 ps
T10 /workspace/coverage/default/12.sram_ctrl_regwen.3972121603 Jul 24 06:40:36 PM PDT 24 Jul 24 06:45:46 PM PDT 24 16478667838 ps
T11 /workspace/coverage/default/30.sram_ctrl_regwen.207361148 Jul 24 06:45:38 PM PDT 24 Jul 24 07:08:24 PM PDT 24 9572810970 ps
T12 /workspace/coverage/default/48.sram_ctrl_smoke.2558042565 Jul 24 06:50:31 PM PDT 24 Jul 24 06:50:33 PM PDT 24 69508068 ps
T6 /workspace/coverage/default/34.sram_ctrl_stress_all.1403526261 Jul 24 06:46:45 PM PDT 24 Jul 24 07:44:07 PM PDT 24 267709490239 ps
T7 /workspace/coverage/default/35.sram_ctrl_lc_escalation.1527034848 Jul 24 06:46:45 PM PDT 24 Jul 24 06:46:49 PM PDT 24 1606007253 ps
T51 /workspace/coverage/default/41.sram_ctrl_mem_walk.364803884 Jul 24 06:48:30 PM PDT 24 Jul 24 06:48:35 PM PDT 24 286865111 ps
T19 /workspace/coverage/default/37.sram_ctrl_regwen.3480861096 Jul 24 06:47:23 PM PDT 24 Jul 24 06:56:18 PM PDT 24 8656239298 ps
T63 /workspace/coverage/default/6.sram_ctrl_bijection.4061597743 Jul 24 06:38:43 PM PDT 24 Jul 24 06:38:59 PM PDT 24 1066471164 ps
T8 /workspace/coverage/default/39.sram_ctrl_lc_escalation.2779437062 Jul 24 06:47:57 PM PDT 24 Jul 24 06:48:02 PM PDT 24 3187492985 ps
T25 /workspace/coverage/default/19.sram_ctrl_ram_cfg.67160853 Jul 24 06:42:29 PM PDT 24 Jul 24 06:42:29 PM PDT 24 26328545 ps
T95 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.580192728 Jul 24 06:41:33 PM PDT 24 Jul 24 06:44:54 PM PDT 24 2011514976 ps
T22 /workspace/coverage/default/23.sram_ctrl_regwen.766751640 Jul 24 06:43:45 PM PDT 24 Jul 24 07:04:04 PM PDT 24 53818293489 ps
T38 /workspace/coverage/default/4.sram_ctrl_stress_all.1467022102 Jul 24 06:38:26 PM PDT 24 Jul 24 06:57:17 PM PDT 24 32179335822 ps
T73 /workspace/coverage/default/6.sram_ctrl_multiple_keys.2790200134 Jul 24 06:38:45 PM PDT 24 Jul 24 06:48:33 PM PDT 24 17658194981 ps
T141 /workspace/coverage/default/15.sram_ctrl_executable.2935181196 Jul 24 06:41:27 PM PDT 24 Jul 24 07:03:49 PM PDT 24 12274041144 ps
T39 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.473951850 Jul 24 06:39:07 PM PDT 24 Jul 24 07:03:25 PM PDT 24 6697220146 ps
T59 /workspace/coverage/default/32.sram_ctrl_max_throughput.1117160842 Jul 24 06:46:02 PM PDT 24 Jul 24 06:48:17 PM PDT 24 136876791 ps
T20 /workspace/coverage/default/8.sram_ctrl_lc_escalation.3584142747 Jul 24 06:39:30 PM PDT 24 Jul 24 06:39:36 PM PDT 24 501732409 ps
T58 /workspace/coverage/default/28.sram_ctrl_bijection.850856292 Jul 24 06:44:50 PM PDT 24 Jul 24 06:45:38 PM PDT 24 2870937792 ps
T64 /workspace/coverage/default/33.sram_ctrl_stress_all.1723859295 Jul 24 06:46:30 PM PDT 24 Jul 24 07:27:25 PM PDT 24 41381441729 ps
T57 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.2285461274 Jul 24 06:42:30 PM PDT 24 Jul 24 06:42:33 PM PDT 24 468284089 ps
T138 /workspace/coverage/default/27.sram_ctrl_executable.3806468931 Jul 24 06:44:43 PM PDT 24 Jul 24 06:54:01 PM PDT 24 18413941236 ps
T150 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.983141033 Jul 24 06:44:55 PM PDT 24 Jul 24 06:45:53 PM PDT 24 110939812 ps
T152 /workspace/coverage/default/48.sram_ctrl_partial_access.665291483 Jul 24 06:50:32 PM PDT 24 Jul 24 06:50:34 PM PDT 24 48537056 ps
T148 /workspace/coverage/default/24.sram_ctrl_stress_all.3065874611 Jul 24 06:44:02 PM PDT 24 Jul 24 07:41:33 PM PDT 24 34620658846 ps
T23 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3365294081 Jul 24 06:45:07 PM PDT 24 Jul 24 06:45:16 PM PDT 24 3043119027 ps
T140 /workspace/coverage/default/39.sram_ctrl_regwen.2134314275 Jul 24 06:47:59 PM PDT 24 Jul 24 06:53:16 PM PDT 24 1550775258 ps
T153 /workspace/coverage/default/3.sram_ctrl_smoke.1396310464 Jul 24 06:37:45 PM PDT 24 Jul 24 06:38:23 PM PDT 24 103907866 ps
T41 /workspace/coverage/default/15.sram_ctrl_mem_walk.2316780954 Jul 24 06:41:30 PM PDT 24 Jul 24 06:41:35 PM PDT 24 255767082 ps
T151 /workspace/coverage/default/4.sram_ctrl_smoke.4164390419 Jul 24 06:38:04 PM PDT 24 Jul 24 06:38:12 PM PDT 24 494308855 ps
T144 /workspace/coverage/default/39.sram_ctrl_executable.587510507 Jul 24 06:47:57 PM PDT 24 Jul 24 07:00:57 PM PDT 24 9359857627 ps
T96 /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1247393102 Jul 24 06:38:25 PM PDT 24 Jul 24 06:41:04 PM PDT 24 8788219543 ps
T134 /workspace/coverage/default/27.sram_ctrl_stress_all.3362484958 Jul 24 06:44:42 PM PDT 24 Jul 24 06:59:10 PM PDT 24 13492659221 ps
T149 /workspace/coverage/default/27.sram_ctrl_multiple_keys.3855619131 Jul 24 06:44:37 PM PDT 24 Jul 24 06:54:53 PM PDT 24 23216560528 ps
T21 /workspace/coverage/default/22.sram_ctrl_lc_escalation.1655431561 Jul 24 06:43:14 PM PDT 24 Jul 24 06:43:22 PM PDT 24 727741337 ps
T137 /workspace/coverage/default/31.sram_ctrl_executable.1646906716 Jul 24 06:45:48 PM PDT 24 Jul 24 06:50:10 PM PDT 24 3365953673 ps
T154 /workspace/coverage/default/28.sram_ctrl_multiple_keys.484722091 Jul 24 06:44:52 PM PDT 24 Jul 24 07:00:26 PM PDT 24 13250872921 ps
T13 /workspace/coverage/default/21.sram_ctrl_alert_test.2819679908 Jul 24 06:43:07 PM PDT 24 Jul 24 06:43:08 PM PDT 24 71128856 ps
T97 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.2587179503 Jul 24 06:37:53 PM PDT 24 Jul 24 06:42:30 PM PDT 24 2961365617 ps
T98 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.1444982661 Jul 24 06:47:28 PM PDT 24 Jul 24 06:50:47 PM PDT 24 4118666562 ps
T40 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.2174713935 Jul 24 06:47:39 PM PDT 24 Jul 24 07:04:42 PM PDT 24 9432863228 ps
T155 /workspace/coverage/default/24.sram_ctrl_partial_access.3508997370 Jul 24 06:43:52 PM PDT 24 Jul 24 06:44:13 PM PDT 24 1392843224 ps
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T14 /workspace/coverage/default/11.sram_ctrl_alert_test.3185488313 Jul 24 06:40:38 PM PDT 24 Jul 24 06:40:39 PM PDT 24 18753016 ps
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T27 /workspace/coverage/default/21.sram_ctrl_ram_cfg.986234676 Jul 24 06:43:07 PM PDT 24 Jul 24 06:43:08 PM PDT 24 54225224 ps
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T45 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.917662703 Jul 24 06:39:02 PM PDT 24 Jul 24 06:44:29 PM PDT 24 2499763284 ps
T160 /workspace/coverage/default/32.sram_ctrl_ram_cfg.2455416734 Jul 24 06:46:08 PM PDT 24 Jul 24 06:46:09 PM PDT 24 122986157 ps
T161 /workspace/coverage/default/28.sram_ctrl_ram_cfg.3055703857 Jul 24 06:45:02 PM PDT 24 Jul 24 06:45:03 PM PDT 24 121513748 ps
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T16 /workspace/coverage/default/4.sram_ctrl_sec_cm.1983506763 Jul 24 06:38:26 PM PDT 24 Jul 24 06:38:30 PM PDT 24 571745930 ps
T30 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.2478278552 Jul 24 06:44:52 PM PDT 24 Jul 24 06:50:08 PM PDT 24 6392662424 ps
T31 /workspace/coverage/default/30.sram_ctrl_stress_all.3541425853 Jul 24 06:45:40 PM PDT 24 Jul 24 07:28:38 PM PDT 24 83386076534 ps
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T33 /workspace/coverage/default/29.sram_ctrl_partial_access.2131906095 Jul 24 06:45:13 PM PDT 24 Jul 24 06:45:27 PM PDT 24 2585158226 ps
T34 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1029428517 Jul 24 06:50:45 PM PDT 24 Jul 24 06:53:16 PM PDT 24 3147054357 ps
T35 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.483241898 Jul 24 06:40:32 PM PDT 24 Jul 24 06:56:12 PM PDT 24 4124873101 ps
T36 /workspace/coverage/default/5.sram_ctrl_partial_access.2509728759 Jul 24 06:38:27 PM PDT 24 Jul 24 06:38:56 PM PDT 24 745401673 ps
T37 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.910478416 Jul 24 06:36:39 PM PDT 24 Jul 24 06:39:20 PM PDT 24 2251277567 ps
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T164 /workspace/coverage/default/9.sram_ctrl_stress_all.3633741223 Jul 24 06:39:56 PM PDT 24 Jul 24 07:22:46 PM PDT 24 7950463631 ps
T165 /workspace/coverage/default/25.sram_ctrl_alert_test.1138196526 Jul 24 06:44:25 PM PDT 24 Jul 24 06:44:26 PM PDT 24 16153902 ps
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T167 /workspace/coverage/default/10.sram_ctrl_alert_test.842298000 Jul 24 06:40:19 PM PDT 24 Jul 24 06:40:20 PM PDT 24 50679880 ps
T168 /workspace/coverage/default/5.sram_ctrl_max_throughput.234522265 Jul 24 06:38:27 PM PDT 24 Jul 24 06:39:49 PM PDT 24 222545879 ps
T169 /workspace/coverage/default/12.sram_ctrl_ram_cfg.2048374066 Jul 24 06:40:40 PM PDT 24 Jul 24 06:40:41 PM PDT 24 46609697 ps
T170 /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.1354776602 Jul 24 06:44:32 PM PDT 24 Jul 24 06:44:41 PM PDT 24 68050582 ps
T171 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.822920053 Jul 24 06:47:09 PM PDT 24 Jul 24 06:47:58 PM PDT 24 220648027 ps
T49 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1462990091 Jul 24 06:40:09 PM PDT 24 Jul 24 06:50:06 PM PDT 24 5089771415 ps
T172 /workspace/coverage/default/4.sram_ctrl_bijection.1700169109 Jul 24 06:38:11 PM PDT 24 Jul 24 06:38:42 PM PDT 24 2922305671 ps
T173 /workspace/coverage/default/1.sram_ctrl_alert_test.2044218511 Jul 24 06:37:18 PM PDT 24 Jul 24 06:37:19 PM PDT 24 44503442 ps
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T146 /workspace/coverage/default/16.sram_ctrl_multiple_keys.878356331 Jul 24 06:41:36 PM PDT 24 Jul 24 06:48:12 PM PDT 24 9236179818 ps
T175 /workspace/coverage/default/14.sram_ctrl_partial_access.4050503509 Jul 24 06:41:13 PM PDT 24 Jul 24 06:41:28 PM PDT 24 299829504 ps
T79 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.1020341094 Jul 24 06:42:48 PM PDT 24 Jul 24 06:42:51 PM PDT 24 92925121 ps
T176 /workspace/coverage/default/41.sram_ctrl_bijection.3408854518 Jul 24 06:48:15 PM PDT 24 Jul 24 06:49:04 PM PDT 24 4464127632 ps
T177 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4144303834 Jul 24 06:49:44 PM PDT 24 Jul 24 06:51:22 PM PDT 24 507432431 ps
T178 /workspace/coverage/default/1.sram_ctrl_multiple_keys.766258238 Jul 24 06:37:00 PM PDT 24 Jul 24 06:37:37 PM PDT 24 859518359 ps
T50 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2929736089 Jul 24 06:48:57 PM PDT 24 Jul 24 06:52:42 PM PDT 24 4350259140 ps
T179 /workspace/coverage/default/15.sram_ctrl_multiple_keys.1991607492 Jul 24 06:41:20 PM PDT 24 Jul 24 06:43:55 PM PDT 24 4588356080 ps
T180 /workspace/coverage/default/42.sram_ctrl_smoke.4074173890 Jul 24 06:48:29 PM PDT 24 Jul 24 06:48:34 PM PDT 24 182712484 ps
T181 /workspace/coverage/default/23.sram_ctrl_max_throughput.2396318426 Jul 24 06:43:29 PM PDT 24 Jul 24 06:43:52 PM PDT 24 361253690 ps
T182 /workspace/coverage/default/20.sram_ctrl_executable.3372360407 Jul 24 06:42:42 PM PDT 24 Jul 24 06:52:28 PM PDT 24 18404238638 ps
T80 /workspace/coverage/default/48.sram_ctrl_mem_partial_access.1404410335 Jul 24 06:50:37 PM PDT 24 Jul 24 06:50:40 PM PDT 24 339484746 ps
T183 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2488588745 Jul 24 06:39:06 PM PDT 24 Jul 24 06:39:52 PM PDT 24 123361730 ps
T81 /workspace/coverage/default/0.sram_ctrl_access_during_key_req.3855048115 Jul 24 06:36:39 PM PDT 24 Jul 24 06:47:03 PM PDT 24 3099013546 ps
T82 /workspace/coverage/default/28.sram_ctrl_mem_partial_access.1523889757 Jul 24 06:45:06 PM PDT 24 Jul 24 06:45:12 PM PDT 24 318326811 ps
T184 /workspace/coverage/default/5.sram_ctrl_ram_cfg.934158043 Jul 24 06:38:41 PM PDT 24 Jul 24 06:38:42 PM PDT 24 38238600 ps
T42 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3753356309 Jul 24 06:45:20 PM PDT 24 Jul 24 06:45:59 PM PDT 24 6359959078 ps
T185 /workspace/coverage/default/3.sram_ctrl_executable.82570336 Jul 24 06:37:57 PM PDT 24 Jul 24 06:47:01 PM PDT 24 6511814163 ps
T186 /workspace/coverage/default/12.sram_ctrl_multiple_keys.4011719462 Jul 24 06:40:38 PM PDT 24 Jul 24 06:56:11 PM PDT 24 14173289049 ps
T187 /workspace/coverage/default/38.sram_ctrl_ram_cfg.677969506 Jul 24 06:47:40 PM PDT 24 Jul 24 06:47:41 PM PDT 24 73163170 ps
T100 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1127487321 Jul 24 06:49:04 PM PDT 24 Jul 24 06:52:00 PM PDT 24 2476230572 ps
T188 /workspace/coverage/default/8.sram_ctrl_partial_access.3519568946 Jul 24 06:39:23 PM PDT 24 Jul 24 06:40:32 PM PDT 24 466912221 ps
T47 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.1992105786 Jul 24 06:41:52 PM PDT 24 Jul 24 06:41:56 PM PDT 24 117509685 ps
T189 /workspace/coverage/default/45.sram_ctrl_multiple_keys.1331996758 Jul 24 06:49:09 PM PDT 24 Jul 24 07:07:40 PM PDT 24 28646165252 ps
T190 /workspace/coverage/default/44.sram_ctrl_ram_cfg.3862488585 Jul 24 06:49:03 PM PDT 24 Jul 24 06:49:04 PM PDT 24 74629694 ps
T191 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.3970367088 Jul 24 06:48:41 PM PDT 24 Jul 24 06:54:08 PM PDT 24 13034748772 ps
T192 /workspace/coverage/default/29.sram_ctrl_bijection.1536564415 Jul 24 06:45:07 PM PDT 24 Jul 24 06:46:21 PM PDT 24 3311973350 ps
T193 /workspace/coverage/default/38.sram_ctrl_partial_access.3472845655 Jul 24 06:47:33 PM PDT 24 Jul 24 06:47:51 PM PDT 24 3487857025 ps
T52 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1720404216 Jul 24 06:49:26 PM PDT 24 Jul 24 06:49:33 PM PDT 24 836583608 ps
T194 /workspace/coverage/default/0.sram_ctrl_partial_access.1402461938 Jul 24 06:36:33 PM PDT 24 Jul 24 06:36:50 PM PDT 24 4540567298 ps
T195 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1426735901 Jul 24 06:37:00 PM PDT 24 Jul 24 06:41:32 PM PDT 24 5690199027 ps
T196 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.4138129900 Jul 24 06:39:59 PM PDT 24 Jul 24 06:40:29 PM PDT 24 824834055 ps
T197 /workspace/coverage/default/35.sram_ctrl_partial_access.2722855538 Jul 24 06:46:45 PM PDT 24 Jul 24 06:46:49 PM PDT 24 107133773 ps
T198 /workspace/coverage/default/16.sram_ctrl_lc_escalation.254559862 Jul 24 06:41:45 PM PDT 24 Jul 24 06:41:51 PM PDT 24 2914942547 ps
T199 /workspace/coverage/default/36.sram_ctrl_mem_walk.3704854084 Jul 24 06:47:16 PM PDT 24 Jul 24 06:47:27 PM PDT 24 2432437894 ps
T200 /workspace/coverage/default/29.sram_ctrl_smoke.2338162223 Jul 24 06:45:08 PM PDT 24 Jul 24 06:45:14 PM PDT 24 307134142 ps
T142 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2530380597 Jul 24 06:41:20 PM PDT 24 Jul 24 06:48:50 PM PDT 24 19655382146 ps
T143 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.2685934491 Jul 24 06:42:54 PM PDT 24 Jul 24 06:49:12 PM PDT 24 16671967634 ps
T201 /workspace/coverage/default/6.sram_ctrl_smoke.1308004544 Jul 24 06:38:44 PM PDT 24 Jul 24 06:38:55 PM PDT 24 199201719 ps
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T203 /workspace/coverage/default/4.sram_ctrl_partial_access.2896880307 Jul 24 06:38:12 PM PDT 24 Jul 24 06:38:24 PM PDT 24 625406581 ps
T204 /workspace/coverage/default/9.sram_ctrl_regwen.92583141 Jul 24 06:39:48 PM PDT 24 Jul 24 06:50:41 PM PDT 24 19620685631 ps
T205 /workspace/coverage/default/19.sram_ctrl_regwen.3790208577 Jul 24 06:42:31 PM PDT 24 Jul 24 06:48:02 PM PDT 24 2670976994 ps
T206 /workspace/coverage/default/0.sram_ctrl_bijection.3769132000 Jul 24 06:36:40 PM PDT 24 Jul 24 06:37:07 PM PDT 24 1547386908 ps
T207 /workspace/coverage/default/0.sram_ctrl_ram_cfg.1918588925 Jul 24 06:36:47 PM PDT 24 Jul 24 06:36:48 PM PDT 24 48001117 ps
T208 /workspace/coverage/default/28.sram_ctrl_lc_escalation.2496709724 Jul 24 06:44:55 PM PDT 24 Jul 24 06:45:01 PM PDT 24 551979615 ps
T209 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.2394007568 Jul 24 06:38:32 PM PDT 24 Jul 24 07:02:53 PM PDT 24 3679543660 ps
T210 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1086149730 Jul 24 06:50:48 PM PDT 24 Jul 24 06:52:37 PM PDT 24 595223890 ps
T211 /workspace/coverage/default/37.sram_ctrl_executable.2136041642 Jul 24 06:47:24 PM PDT 24 Jul 24 07:02:13 PM PDT 24 29764387045 ps
T212 /workspace/coverage/default/12.sram_ctrl_partial_access.4198100246 Jul 24 06:40:36 PM PDT 24 Jul 24 06:40:40 PM PDT 24 87366776 ps
T213 /workspace/coverage/default/28.sram_ctrl_regwen.4091217450 Jul 24 06:45:03 PM PDT 24 Jul 24 06:59:03 PM PDT 24 2620990953 ps
T214 /workspace/coverage/default/14.sram_ctrl_lc_escalation.313254504 Jul 24 06:41:20 PM PDT 24 Jul 24 06:41:27 PM PDT 24 587539424 ps
T215 /workspace/coverage/default/41.sram_ctrl_executable.2070309236 Jul 24 06:48:23 PM PDT 24 Jul 24 07:03:00 PM PDT 24 14023233091 ps
T216 /workspace/coverage/default/33.sram_ctrl_ram_cfg.1056834782 Jul 24 06:46:24 PM PDT 24 Jul 24 06:46:25 PM PDT 24 39555446 ps
T62 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.821035197 Jul 24 06:46:29 PM PDT 24 Jul 24 06:48:23 PM PDT 24 2797244495 ps
T147 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.373910507 Jul 24 06:47:33 PM PDT 24 Jul 24 06:54:19 PM PDT 24 58083635929 ps
T217 /workspace/coverage/default/22.sram_ctrl_multiple_keys.4073997868 Jul 24 06:43:13 PM PDT 24 Jul 24 06:56:49 PM PDT 24 54386321676 ps
T218 /workspace/coverage/default/26.sram_ctrl_smoke.3299983079 Jul 24 06:44:22 PM PDT 24 Jul 24 06:44:25 PM PDT 24 105228962 ps
T219 /workspace/coverage/default/46.sram_ctrl_executable.2252219001 Jul 24 06:49:32 PM PDT 24 Jul 24 07:17:51 PM PDT 24 35380765864 ps
T53 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2572677499 Jul 24 06:47:15 PM PDT 24 Jul 24 07:00:58 PM PDT 24 3559558911 ps
T220 /workspace/coverage/default/48.sram_ctrl_bijection.3967765917 Jul 24 06:50:34 PM PDT 24 Jul 24 06:51:22 PM PDT 24 4835519039 ps
T221 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.2037154507 Jul 24 06:38:50 PM PDT 24 Jul 24 06:39:28 PM PDT 24 544480048 ps
T222 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.3393627690 Jul 24 06:47:03 PM PDT 24 Jul 24 06:54:00 PM PDT 24 8080802603 ps
T223 /workspace/coverage/default/26.sram_ctrl_multiple_keys.3743122590 Jul 24 06:44:23 PM PDT 24 Jul 24 06:50:11 PM PDT 24 3303958066 ps
T224 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.214846375 Jul 24 06:46:16 PM PDT 24 Jul 24 06:51:32 PM PDT 24 4151144552 ps
T225 /workspace/coverage/default/5.sram_ctrl_mem_walk.559187080 Jul 24 06:38:38 PM PDT 24 Jul 24 06:38:47 PM PDT 24 525585145 ps
T226 /workspace/coverage/default/17.sram_ctrl_mem_walk.3746402322 Jul 24 06:42:03 PM PDT 24 Jul 24 06:42:14 PM PDT 24 1817262729 ps
T227 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.602161648 Jul 24 06:37:13 PM PDT 24 Jul 24 06:37:18 PM PDT 24 485560658 ps
T228 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.190062543 Jul 24 06:46:24 PM PDT 24 Jul 24 06:46:26 PM PDT 24 692600093 ps
T229 /workspace/coverage/default/22.sram_ctrl_partial_access.1712068266 Jul 24 06:43:11 PM PDT 24 Jul 24 06:43:20 PM PDT 24 1509518641 ps
T230 /workspace/coverage/default/41.sram_ctrl_max_throughput.4036757946 Jul 24 06:48:21 PM PDT 24 Jul 24 06:48:26 PM PDT 24 203253895 ps
T231 /workspace/coverage/default/3.sram_ctrl_lc_escalation.2860775020 Jul 24 06:37:58 PM PDT 24 Jul 24 06:38:05 PM PDT 24 926184968 ps
T232 /workspace/coverage/default/18.sram_ctrl_stress_pipeline.1800543213 Jul 24 06:42:21 PM PDT 24 Jul 24 06:46:44 PM PDT 24 2759230607 ps
T233 /workspace/coverage/default/34.sram_ctrl_lc_escalation.410319978 Jul 24 06:46:37 PM PDT 24 Jul 24 06:46:39 PM PDT 24 538113939 ps
T234 /workspace/coverage/default/5.sram_ctrl_alert_test.63287300 Jul 24 06:38:44 PM PDT 24 Jul 24 06:38:45 PM PDT 24 65687784 ps
T235 /workspace/coverage/default/33.sram_ctrl_alert_test.934684849 Jul 24 06:46:29 PM PDT 24 Jul 24 06:46:30 PM PDT 24 14994194 ps
T236 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.1484801133 Jul 24 06:47:38 PM PDT 24 Jul 24 06:50:17 PM PDT 24 177151494 ps
T237 /workspace/coverage/default/16.sram_ctrl_partial_access.492365554 Jul 24 06:41:34 PM PDT 24 Jul 24 06:42:01 PM PDT 24 272976713 ps
T238 /workspace/coverage/default/23.sram_ctrl_stress_all.2533883598 Jul 24 06:43:44 PM PDT 24 Jul 24 07:45:17 PM PDT 24 39527051305 ps
T239 /workspace/coverage/default/15.sram_ctrl_stress_all.3295607133 Jul 24 06:41:35 PM PDT 24 Jul 24 07:51:02 PM PDT 24 60318964827 ps
T240 /workspace/coverage/default/8.sram_ctrl_max_throughput.374736312 Jul 24 06:39:20 PM PDT 24 Jul 24 06:39:54 PM PDT 24 695911089 ps
T241 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2884313918 Jul 24 06:44:37 PM PDT 24 Jul 24 06:49:51 PM PDT 24 105866597277 ps
T242 /workspace/coverage/default/36.sram_ctrl_executable.1930961996 Jul 24 06:47:09 PM PDT 24 Jul 24 06:51:52 PM PDT 24 8063546274 ps
T243 /workspace/coverage/default/2.sram_ctrl_smoke.3641537285 Jul 24 06:37:24 PM PDT 24 Jul 24 06:37:27 PM PDT 24 485559283 ps
T244 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.1767330486 Jul 24 06:42:16 PM PDT 24 Jul 24 06:46:38 PM PDT 24 7274025250 ps
T245 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.325935184 Jul 24 06:41:14 PM PDT 24 Jul 24 06:44:33 PM PDT 24 5585134245 ps
T246 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2131867941 Jul 24 06:39:36 PM PDT 24 Jul 24 06:39:42 PM PDT 24 163474635 ps
T247 /workspace/coverage/default/2.sram_ctrl_regwen.4006388649 Jul 24 06:37:35 PM PDT 24 Jul 24 06:51:24 PM PDT 24 4871407665 ps
T248 /workspace/coverage/default/14.sram_ctrl_regwen.4219863995 Jul 24 06:41:20 PM PDT 24 Jul 24 07:02:26 PM PDT 24 3247900352 ps
T249 /workspace/coverage/default/45.sram_ctrl_alert_test.3229439251 Jul 24 06:49:26 PM PDT 24 Jul 24 06:49:27 PM PDT 24 35809902 ps
T135 /workspace/coverage/default/39.sram_ctrl_stress_all.2227914272 Jul 24 06:48:04 PM PDT 24 Jul 24 07:36:39 PM PDT 24 31915461667 ps
T250 /workspace/coverage/default/42.sram_ctrl_bijection.1017142011 Jul 24 06:48:32 PM PDT 24 Jul 24 06:49:06 PM PDT 24 15897700000 ps
T251 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.4248867996 Jul 24 06:38:18 PM PDT 24 Jul 24 06:38:42 PM PDT 24 90442776 ps
T252 /workspace/coverage/default/13.sram_ctrl_regwen.3305937719 Jul 24 06:40:59 PM PDT 24 Jul 24 06:47:31 PM PDT 24 3774266421 ps
T253 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.606870991 Jul 24 06:39:36 PM PDT 24 Jul 24 06:45:02 PM PDT 24 91059901805 ps
T254 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.1356971883 Jul 24 06:42:54 PM PDT 24 Jul 24 06:46:52 PM PDT 24 2402152794 ps
T255 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.860348029 Jul 24 06:39:47 PM PDT 24 Jul 24 06:40:02 PM PDT 24 348480998 ps
T256 /workspace/coverage/default/23.sram_ctrl_ram_cfg.2870400786 Jul 24 06:43:45 PM PDT 24 Jul 24 06:43:46 PM PDT 24 31135785 ps
T83 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1127596249 Jul 24 06:39:54 PM PDT 24 Jul 24 06:39:57 PM PDT 24 221525330 ps
T257 /workspace/coverage/default/21.sram_ctrl_bijection.541744064 Jul 24 06:42:49 PM PDT 24 Jul 24 06:43:10 PM PDT 24 3673755877 ps
T258 /workspace/coverage/default/33.sram_ctrl_mem_walk.2157024000 Jul 24 06:46:25 PM PDT 24 Jul 24 06:46:36 PM PDT 24 569918862 ps
T259 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1629837576 Jul 24 06:42:02 PM PDT 24 Jul 24 06:42:16 PM PDT 24 84232560 ps
T260 /workspace/coverage/default/40.sram_ctrl_multiple_keys.1924691830 Jul 24 06:48:04 PM PDT 24 Jul 24 07:05:45 PM PDT 24 11213745608 ps
T261 /workspace/coverage/default/4.sram_ctrl_ram_cfg.290559599 Jul 24 06:38:18 PM PDT 24 Jul 24 06:38:19 PM PDT 24 76948947 ps
T262 /workspace/coverage/default/6.sram_ctrl_executable.3361859606 Jul 24 06:38:50 PM PDT 24 Jul 24 07:02:30 PM PDT 24 27880212022 ps
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T264 /workspace/coverage/default/20.sram_ctrl_bijection.3633046509 Jul 24 06:42:36 PM PDT 24 Jul 24 06:43:12 PM PDT 24 2180623041 ps
T265 /workspace/coverage/default/24.sram_ctrl_bijection.1452788821 Jul 24 06:43:50 PM PDT 24 Jul 24 06:44:06 PM PDT 24 938833255 ps
T266 /workspace/coverage/default/0.sram_ctrl_multiple_keys.2238649055 Jul 24 06:36:34 PM PDT 24 Jul 24 06:54:28 PM PDT 24 20981494179 ps
T267 /workspace/coverage/default/46.sram_ctrl_alert_test.1208789760 Jul 24 06:49:38 PM PDT 24 Jul 24 06:49:39 PM PDT 24 15210220 ps
T268 /workspace/coverage/default/6.sram_ctrl_max_throughput.1305084590 Jul 24 06:38:44 PM PDT 24 Jul 24 06:39:58 PM PDT 24 409038495 ps
T269 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.3265051741 Jul 24 06:48:06 PM PDT 24 Jul 24 06:51:59 PM PDT 24 1101948706 ps
T270 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1336498158 Jul 24 06:50:24 PM PDT 24 Jul 24 06:50:28 PM PDT 24 106710271 ps
T271 /workspace/coverage/default/40.sram_ctrl_lc_escalation.975344276 Jul 24 06:48:11 PM PDT 24 Jul 24 06:48:22 PM PDT 24 3685902157 ps
T272 /workspace/coverage/default/16.sram_ctrl_stress_all.218475787 Jul 24 06:42:04 PM PDT 24 Jul 24 07:04:53 PM PDT 24 5564794045 ps
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T136 /workspace/coverage/default/47.sram_ctrl_stress_all.834303556 Jul 24 06:50:25 PM PDT 24 Jul 24 07:25:57 PM PDT 24 40305618201 ps
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T304 /workspace/coverage/default/34.sram_ctrl_max_throughput.3622844824 Jul 24 06:46:28 PM PDT 24 Jul 24 06:48:52 PM PDT 24 140771709 ps
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T305 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1791866118 Jul 24 06:49:46 PM PDT 24 Jul 24 06:49:52 PM PDT 24 297825424 ps
T306 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.2132592767 Jul 24 06:45:35 PM PDT 24 Jul 24 06:46:19 PM PDT 24 218387641 ps
T307 /workspace/coverage/default/41.sram_ctrl_partial_access.3905575112 Jul 24 06:48:24 PM PDT 24 Jul 24 06:48:30 PM PDT 24 303328799 ps
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T309 /workspace/coverage/default/17.sram_ctrl_executable.4278049994 Jul 24 06:42:02 PM PDT 24 Jul 24 07:00:25 PM PDT 24 10310976169 ps
T310 /workspace/coverage/default/48.sram_ctrl_ram_cfg.2983027066 Jul 24 06:50:46 PM PDT 24 Jul 24 06:50:47 PM PDT 24 27370316 ps
T311 /workspace/coverage/default/36.sram_ctrl_stress_all.2715224997 Jul 24 06:47:15 PM PDT 24 Jul 24 07:14:17 PM PDT 24 7563265809 ps
T312 /workspace/coverage/default/3.sram_ctrl_regwen.4108099689 Jul 24 06:37:59 PM PDT 24 Jul 24 06:49:51 PM PDT 24 6692900011 ps
T313 /workspace/coverage/default/2.sram_ctrl_ram_cfg.1454167442 Jul 24 06:37:29 PM PDT 24 Jul 24 06:37:30 PM PDT 24 119655808 ps
T314 /workspace/coverage/default/17.sram_ctrl_partial_access.3933505385 Jul 24 06:41:54 PM PDT 24 Jul 24 06:42:02 PM PDT 24 2369525102 ps
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