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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1023
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

T309 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2773550563 Jul 27 05:00:55 PM PDT 24 Jul 27 05:02:49 PM PDT 24 611254546 ps
T310 /workspace/coverage/default/48.sram_ctrl_bijection.4279600983 Jul 27 05:01:46 PM PDT 24 Jul 27 05:02:10 PM PDT 24 1528409844 ps
T311 /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3317023058 Jul 27 05:01:45 PM PDT 24 Jul 27 05:02:12 PM PDT 24 188849903 ps
T312 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.2182792474 Jul 27 05:00:09 PM PDT 24 Jul 27 05:00:13 PM PDT 24 73334072 ps
T313 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.691288071 Jul 27 05:00:21 PM PDT 24 Jul 27 05:00:23 PM PDT 24 77045896 ps
T314 /workspace/coverage/default/47.sram_ctrl_smoke.1910375898 Jul 27 05:01:46 PM PDT 24 Jul 27 05:01:59 PM PDT 24 1361511118 ps
T315 /workspace/coverage/default/12.sram_ctrl_smoke.876574837 Jul 27 04:59:59 PM PDT 24 Jul 27 05:02:16 PM PDT 24 783458815 ps
T316 /workspace/coverage/default/25.sram_ctrl_regwen.484846186 Jul 27 05:00:26 PM PDT 24 Jul 27 05:12:44 PM PDT 24 11854629779 ps
T317 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.3956865269 Jul 27 05:00:09 PM PDT 24 Jul 27 05:08:02 PM PDT 24 1327247124 ps
T318 /workspace/coverage/default/21.sram_ctrl_executable.2998769006 Jul 27 05:00:29 PM PDT 24 Jul 27 05:16:16 PM PDT 24 34603485158 ps
T319 /workspace/coverage/default/27.sram_ctrl_max_throughput.3002403459 Jul 27 05:00:31 PM PDT 24 Jul 27 05:02:09 PM PDT 24 509428361 ps
T320 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.1395494006 Jul 27 05:01:29 PM PDT 24 Jul 27 05:10:03 PM PDT 24 103920098800 ps
T321 /workspace/coverage/default/9.sram_ctrl_mem_walk.1241803270 Jul 27 04:59:47 PM PDT 24 Jul 27 04:59:54 PM PDT 24 74292152 ps
T322 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1012914515 Jul 27 05:01:16 PM PDT 24 Jul 27 05:01:20 PM PDT 24 115065331 ps
T323 /workspace/coverage/default/43.sram_ctrl_regwen.827341133 Jul 27 05:01:29 PM PDT 24 Jul 27 05:05:12 PM PDT 24 62088748948 ps
T324 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.1644673379 Jul 27 05:00:25 PM PDT 24 Jul 27 05:00:34 PM PDT 24 399429352 ps
T325 /workspace/coverage/default/0.sram_ctrl_max_throughput.99731008 Jul 27 04:59:50 PM PDT 24 Jul 27 04:59:53 PM PDT 24 88633794 ps
T41 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2952211494 Jul 27 04:59:39 PM PDT 24 Jul 27 04:59:50 PM PDT 24 371723562 ps
T326 /workspace/coverage/default/27.sram_ctrl_mem_walk.575446306 Jul 27 05:00:36 PM PDT 24 Jul 27 05:00:42 PM PDT 24 226222828 ps
T327 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.3001079236 Jul 27 05:01:01 PM PDT 24 Jul 27 05:21:48 PM PDT 24 13117129573 ps
T328 /workspace/coverage/default/19.sram_ctrl_multiple_keys.881408442 Jul 27 05:00:04 PM PDT 24 Jul 27 05:03:42 PM PDT 24 15243632316 ps
T329 /workspace/coverage/default/8.sram_ctrl_bijection.3792884034 Jul 27 04:59:58 PM PDT 24 Jul 27 05:00:33 PM PDT 24 569122312 ps
T330 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2782224236 Jul 27 04:59:47 PM PDT 24 Jul 27 05:03:11 PM PDT 24 11842776734 ps
T331 /workspace/coverage/default/25.sram_ctrl_stress_all.3290635399 Jul 27 05:00:15 PM PDT 24 Jul 27 05:22:17 PM PDT 24 23129489489 ps
T332 /workspace/coverage/default/42.sram_ctrl_mem_walk.1538931158 Jul 27 05:01:31 PM PDT 24 Jul 27 05:01:36 PM PDT 24 293938435 ps
T333 /workspace/coverage/default/46.sram_ctrl_alert_test.3983987600 Jul 27 05:01:46 PM PDT 24 Jul 27 05:01:47 PM PDT 24 45178930 ps
T334 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.1609443141 Jul 27 04:59:53 PM PDT 24 Jul 27 05:05:31 PM PDT 24 15887026588 ps
T335 /workspace/coverage/default/41.sram_ctrl_mem_walk.3850259708 Jul 27 05:01:18 PM PDT 24 Jul 27 05:01:25 PM PDT 24 348154408 ps
T336 /workspace/coverage/default/9.sram_ctrl_regwen.3032666842 Jul 27 04:59:47 PM PDT 24 Jul 27 05:11:04 PM PDT 24 20157864702 ps
T337 /workspace/coverage/default/39.sram_ctrl_partial_access.177024377 Jul 27 05:01:08 PM PDT 24 Jul 27 05:01:20 PM PDT 24 1122997163 ps
T338 /workspace/coverage/default/6.sram_ctrl_multiple_keys.2698988320 Jul 27 05:00:07 PM PDT 24 Jul 27 05:16:25 PM PDT 24 59941487429 ps
T339 /workspace/coverage/default/43.sram_ctrl_smoke.1763035496 Jul 27 05:01:30 PM PDT 24 Jul 27 05:01:35 PM PDT 24 255933109 ps
T340 /workspace/coverage/default/34.sram_ctrl_lc_escalation.641702995 Jul 27 05:00:58 PM PDT 24 Jul 27 05:01:03 PM PDT 24 629527975 ps
T341 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.317925711 Jul 27 05:01:30 PM PDT 24 Jul 27 05:01:35 PM PDT 24 54189650 ps
T342 /workspace/coverage/default/14.sram_ctrl_executable.2461420062 Jul 27 05:00:21 PM PDT 24 Jul 27 05:07:54 PM PDT 24 20934614376 ps
T343 /workspace/coverage/default/15.sram_ctrl_partial_access.316979152 Jul 27 05:00:18 PM PDT 24 Jul 27 05:00:32 PM PDT 24 902721321 ps
T344 /workspace/coverage/default/29.sram_ctrl_bijection.2084543269 Jul 27 05:00:38 PM PDT 24 Jul 27 05:01:25 PM PDT 24 12320666380 ps
T345 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.4241053908 Jul 27 05:00:21 PM PDT 24 Jul 27 05:05:47 PM PDT 24 15111486786 ps
T346 /workspace/coverage/default/46.sram_ctrl_partial_access.4056272461 Jul 27 05:01:37 PM PDT 24 Jul 27 05:01:53 PM PDT 24 288305671 ps
T347 /workspace/coverage/default/9.sram_ctrl_executable.349368284 Jul 27 04:59:52 PM PDT 24 Jul 27 05:11:51 PM PDT 24 38579879277 ps
T348 /workspace/coverage/default/32.sram_ctrl_executable.1802523483 Jul 27 05:00:52 PM PDT 24 Jul 27 05:01:26 PM PDT 24 730938835 ps
T349 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.3878280058 Jul 27 05:00:43 PM PDT 24 Jul 27 05:04:19 PM PDT 24 1006842965 ps
T350 /workspace/coverage/default/14.sram_ctrl_multiple_keys.1416061997 Jul 27 05:00:05 PM PDT 24 Jul 27 05:06:05 PM PDT 24 2809523227 ps
T351 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.531471459 Jul 27 04:59:53 PM PDT 24 Jul 27 05:00:02 PM PDT 24 684004297 ps
T352 /workspace/coverage/default/0.sram_ctrl_stress_all.102652476 Jul 27 04:59:21 PM PDT 24 Jul 27 05:55:13 PM PDT 24 92699358313 ps
T353 /workspace/coverage/default/3.sram_ctrl_smoke.3530235253 Jul 27 04:59:48 PM PDT 24 Jul 27 05:01:14 PM PDT 24 656304346 ps
T354 /workspace/coverage/default/37.sram_ctrl_partial_access.621800642 Jul 27 05:01:02 PM PDT 24 Jul 27 05:01:06 PM PDT 24 71541690 ps
T355 /workspace/coverage/default/28.sram_ctrl_executable.1068693993 Jul 27 05:00:38 PM PDT 24 Jul 27 05:03:23 PM PDT 24 8621105828 ps
T356 /workspace/coverage/default/8.sram_ctrl_lc_escalation.912532764 Jul 27 05:00:05 PM PDT 24 Jul 27 05:00:12 PM PDT 24 388262202 ps
T357 /workspace/coverage/default/44.sram_ctrl_multiple_keys.4285505896 Jul 27 05:01:30 PM PDT 24 Jul 27 05:01:59 PM PDT 24 1131957002 ps
T358 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1542470961 Jul 27 05:01:28 PM PDT 24 Jul 27 05:07:24 PM PDT 24 101106321113 ps
T359 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1651893482 Jul 27 05:01:09 PM PDT 24 Jul 27 05:01:13 PM PDT 24 162469231 ps
T360 /workspace/coverage/default/43.sram_ctrl_executable.3296775292 Jul 27 05:01:29 PM PDT 24 Jul 27 05:18:10 PM PDT 24 7843795283 ps
T361 /workspace/coverage/default/7.sram_ctrl_multiple_keys.1229300977 Jul 27 04:59:58 PM PDT 24 Jul 27 05:13:29 PM PDT 24 2987294971 ps
T362 /workspace/coverage/default/23.sram_ctrl_partial_access.3458521074 Jul 27 05:00:29 PM PDT 24 Jul 27 05:01:11 PM PDT 24 1020588715 ps
T363 /workspace/coverage/default/23.sram_ctrl_bijection.2534118113 Jul 27 05:00:25 PM PDT 24 Jul 27 05:00:54 PM PDT 24 4673050593 ps
T364 /workspace/coverage/default/29.sram_ctrl_lc_escalation.2350584284 Jul 27 05:00:44 PM PDT 24 Jul 27 05:00:50 PM PDT 24 1437606409 ps
T365 /workspace/coverage/default/38.sram_ctrl_alert_test.1603842047 Jul 27 05:01:11 PM PDT 24 Jul 27 05:01:12 PM PDT 24 14754825 ps
T366 /workspace/coverage/default/38.sram_ctrl_stress_all.1749556562 Jul 27 05:01:15 PM PDT 24 Jul 27 06:08:30 PM PDT 24 220616497934 ps
T367 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3630267338 Jul 27 05:01:58 PM PDT 24 Jul 27 05:03:47 PM PDT 24 486711059 ps
T368 /workspace/coverage/default/8.sram_ctrl_stress_all.3791432896 Jul 27 05:00:14 PM PDT 24 Jul 27 06:37:49 PM PDT 24 12652102074 ps
T369 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2339423943 Jul 27 05:00:28 PM PDT 24 Jul 27 05:01:58 PM PDT 24 2995115112 ps
T370 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.3727280783 Jul 27 04:59:47 PM PDT 24 Jul 27 05:11:10 PM PDT 24 1731632054 ps
T371 /workspace/coverage/default/22.sram_ctrl_executable.1961034006 Jul 27 05:00:29 PM PDT 24 Jul 27 05:14:33 PM PDT 24 81933570524 ps
T372 /workspace/coverage/default/20.sram_ctrl_mem_walk.1813881628 Jul 27 05:00:13 PM PDT 24 Jul 27 05:00:21 PM PDT 24 135483396 ps
T373 /workspace/coverage/default/30.sram_ctrl_multiple_keys.3018368595 Jul 27 05:00:54 PM PDT 24 Jul 27 05:20:25 PM PDT 24 13326321390 ps
T374 /workspace/coverage/default/24.sram_ctrl_lc_escalation.3931445415 Jul 27 05:00:40 PM PDT 24 Jul 27 05:00:43 PM PDT 24 193813501 ps
T375 /workspace/coverage/default/47.sram_ctrl_ram_cfg.3284194136 Jul 27 05:01:47 PM PDT 24 Jul 27 05:01:47 PM PDT 24 70857725 ps
T376 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.3648261608 Jul 27 05:00:45 PM PDT 24 Jul 27 05:03:17 PM PDT 24 160204788 ps
T377 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.305766829 Jul 27 05:00:54 PM PDT 24 Jul 27 05:01:26 PM PDT 24 2016576318 ps
T378 /workspace/coverage/default/7.sram_ctrl_max_throughput.2000866713 Jul 27 04:59:42 PM PDT 24 Jul 27 04:59:52 PM PDT 24 235196462 ps
T379 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.213174430 Jul 27 05:00:31 PM PDT 24 Jul 27 05:00:44 PM PDT 24 277899168 ps
T380 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.1988331270 Jul 27 04:59:49 PM PDT 24 Jul 27 05:01:58 PM PDT 24 1988154500 ps
T381 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1979212693 Jul 27 05:00:17 PM PDT 24 Jul 27 05:01:35 PM PDT 24 504435091 ps
T382 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4205314623 Jul 27 05:00:56 PM PDT 24 Jul 27 05:08:56 PM PDT 24 17932131003 ps
T383 /workspace/coverage/default/24.sram_ctrl_multiple_keys.4238973350 Jul 27 05:00:32 PM PDT 24 Jul 27 05:18:32 PM PDT 24 14161926638 ps
T384 /workspace/coverage/default/12.sram_ctrl_lc_escalation.2329482483 Jul 27 05:00:11 PM PDT 24 Jul 27 05:00:17 PM PDT 24 421537588 ps
T385 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1607806849 Jul 27 04:59:47 PM PDT 24 Jul 27 05:02:19 PM PDT 24 1524664532 ps
T386 /workspace/coverage/default/11.sram_ctrl_stress_all.1071697372 Jul 27 04:59:59 PM PDT 24 Jul 27 05:52:16 PM PDT 24 131860782663 ps
T387 /workspace/coverage/default/2.sram_ctrl_partial_access.4116450404 Jul 27 04:59:52 PM PDT 24 Jul 27 05:00:21 PM PDT 24 370038901 ps
T388 /workspace/coverage/default/36.sram_ctrl_max_throughput.1106871469 Jul 27 05:01:00 PM PDT 24 Jul 27 05:02:55 PM PDT 24 122181873 ps
T389 /workspace/coverage/default/16.sram_ctrl_alert_test.1217611816 Jul 27 05:00:14 PM PDT 24 Jul 27 05:00:15 PM PDT 24 13593666 ps
T390 /workspace/coverage/default/0.sram_ctrl_lc_escalation.603794640 Jul 27 04:59:20 PM PDT 24 Jul 27 04:59:28 PM PDT 24 2637138275 ps
T391 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.2650838123 Jul 27 05:00:53 PM PDT 24 Jul 27 05:09:16 PM PDT 24 23888711244 ps
T392 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1259078888 Jul 27 05:01:00 PM PDT 24 Jul 27 05:01:05 PM PDT 24 56772402 ps
T393 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.1287407943 Jul 27 05:00:58 PM PDT 24 Jul 27 05:01:53 PM PDT 24 1009550679 ps
T394 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.936420502 Jul 27 04:59:58 PM PDT 24 Jul 27 05:00:01 PM PDT 24 212712727 ps
T395 /workspace/coverage/default/49.sram_ctrl_stress_all.3054440247 Jul 27 05:01:58 PM PDT 24 Jul 27 05:42:17 PM PDT 24 126396287381 ps
T396 /workspace/coverage/default/9.sram_ctrl_max_throughput.1919739144 Jul 27 04:59:45 PM PDT 24 Jul 27 04:59:57 PM PDT 24 264877196 ps
T397 /workspace/coverage/default/10.sram_ctrl_mem_walk.2509405634 Jul 27 05:00:11 PM PDT 24 Jul 27 05:00:22 PM PDT 24 2977964838 ps
T398 /workspace/coverage/default/43.sram_ctrl_lc_escalation.1126402754 Jul 27 05:01:31 PM PDT 24 Jul 27 05:01:37 PM PDT 24 820051620 ps
T399 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.4016227377 Jul 27 05:00:38 PM PDT 24 Jul 27 05:14:44 PM PDT 24 2732373999 ps
T400 /workspace/coverage/default/33.sram_ctrl_regwen.3640320030 Jul 27 05:00:52 PM PDT 24 Jul 27 05:14:38 PM PDT 24 14743515851 ps
T401 /workspace/coverage/default/12.sram_ctrl_bijection.62640782 Jul 27 05:00:12 PM PDT 24 Jul 27 05:00:59 PM PDT 24 11249377404 ps
T402 /workspace/coverage/default/26.sram_ctrl_max_throughput.2569782380 Jul 27 05:00:38 PM PDT 24 Jul 27 05:01:20 PM PDT 24 207044263 ps
T403 /workspace/coverage/default/47.sram_ctrl_multiple_keys.1341409653 Jul 27 05:01:48 PM PDT 24 Jul 27 05:22:43 PM PDT 24 24343016461 ps
T404 /workspace/coverage/default/20.sram_ctrl_partial_access.2889962094 Jul 27 05:00:06 PM PDT 24 Jul 27 05:02:10 PM PDT 24 222589426 ps
T405 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1949251204 Jul 27 05:00:51 PM PDT 24 Jul 27 05:00:52 PM PDT 24 28571262 ps
T406 /workspace/coverage/default/2.sram_ctrl_multiple_keys.1455162199 Jul 27 04:59:59 PM PDT 24 Jul 27 05:02:19 PM PDT 24 5676431348 ps
T407 /workspace/coverage/default/24.sram_ctrl_stress_all.3513696740 Jul 27 05:00:27 PM PDT 24 Jul 27 05:49:01 PM PDT 24 27610494482 ps
T408 /workspace/coverage/default/19.sram_ctrl_alert_test.1256488120 Jul 27 05:00:30 PM PDT 24 Jul 27 05:00:31 PM PDT 24 15739106 ps
T409 /workspace/coverage/default/37.sram_ctrl_alert_test.1643979405 Jul 27 05:01:07 PM PDT 24 Jul 27 05:01:08 PM PDT 24 12435160 ps
T410 /workspace/coverage/default/49.sram_ctrl_executable.1903364324 Jul 27 05:02:01 PM PDT 24 Jul 27 05:10:25 PM PDT 24 17961683237 ps
T411 /workspace/coverage/default/39.sram_ctrl_executable.79805599 Jul 27 05:01:08 PM PDT 24 Jul 27 05:07:29 PM PDT 24 20734595517 ps
T412 /workspace/coverage/default/14.sram_ctrl_alert_test.3235290808 Jul 27 05:00:26 PM PDT 24 Jul 27 05:00:27 PM PDT 24 16262795 ps
T413 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.4230994627 Jul 27 05:00:32 PM PDT 24 Jul 27 05:00:38 PM PDT 24 353167453 ps
T414 /workspace/coverage/default/26.sram_ctrl_partial_access.3885638463 Jul 27 05:00:26 PM PDT 24 Jul 27 05:00:37 PM PDT 24 461904455 ps
T98 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3018535165 Jul 27 05:01:18 PM PDT 24 Jul 27 05:01:43 PM PDT 24 3168166431 ps
T415 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.3878286281 Jul 27 05:00:14 PM PDT 24 Jul 27 05:03:25 PM PDT 24 7875471598 ps
T416 /workspace/coverage/default/32.sram_ctrl_multiple_keys.3991412116 Jul 27 05:00:54 PM PDT 24 Jul 27 05:03:14 PM PDT 24 1232992488 ps
T417 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1775356639 Jul 27 04:59:33 PM PDT 24 Jul 27 05:03:10 PM PDT 24 3035927827 ps
T418 /workspace/coverage/default/6.sram_ctrl_smoke.1237213242 Jul 27 04:59:56 PM PDT 24 Jul 27 05:00:12 PM PDT 24 1031733543 ps
T419 /workspace/coverage/default/37.sram_ctrl_regwen.1471641882 Jul 27 05:01:07 PM PDT 24 Jul 27 05:29:17 PM PDT 24 41112900222 ps
T420 /workspace/coverage/default/10.sram_ctrl_regwen.237009757 Jul 27 04:59:58 PM PDT 24 Jul 27 05:10:31 PM PDT 24 6275759792 ps
T421 /workspace/coverage/default/36.sram_ctrl_bijection.1486928106 Jul 27 05:01:02 PM PDT 24 Jul 27 05:01:18 PM PDT 24 913072275 ps
T422 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.1530536693 Jul 27 05:00:32 PM PDT 24 Jul 27 05:01:41 PM PDT 24 270617276 ps
T423 /workspace/coverage/default/21.sram_ctrl_max_throughput.1102790103 Jul 27 05:00:25 PM PDT 24 Jul 27 05:00:29 PM PDT 24 184754453 ps
T424 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.3404035297 Jul 27 05:00:30 PM PDT 24 Jul 27 05:02:56 PM PDT 24 3214582080 ps
T425 /workspace/coverage/default/3.sram_ctrl_bijection.595452436 Jul 27 04:59:42 PM PDT 24 Jul 27 05:00:11 PM PDT 24 1711938930 ps
T426 /workspace/coverage/default/46.sram_ctrl_regwen.3637763086 Jul 27 05:01:48 PM PDT 24 Jul 27 05:14:08 PM PDT 24 10202590238 ps
T427 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.788320352 Jul 27 05:00:03 PM PDT 24 Jul 27 05:00:26 PM PDT 24 166224096 ps
T428 /workspace/coverage/default/48.sram_ctrl_stress_pipeline.4253691015 Jul 27 05:01:45 PM PDT 24 Jul 27 05:08:44 PM PDT 24 16829984368 ps
T429 /workspace/coverage/default/15.sram_ctrl_stress_all.2947591943 Jul 27 05:00:15 PM PDT 24 Jul 27 05:42:41 PM PDT 24 86161921140 ps
T430 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.2666218828 Jul 27 05:00:03 PM PDT 24 Jul 27 05:00:09 PM PDT 24 323048234 ps
T431 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.388994433 Jul 27 05:01:19 PM PDT 24 Jul 27 05:08:45 PM PDT 24 16825362050 ps
T432 /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.3309115775 Jul 27 05:01:07 PM PDT 24 Jul 27 05:02:19 PM PDT 24 256939735 ps
T433 /workspace/coverage/default/14.sram_ctrl_partial_access.4140836648 Jul 27 05:00:19 PM PDT 24 Jul 27 05:00:38 PM PDT 24 1143138914 ps
T434 /workspace/coverage/default/46.sram_ctrl_stress_all.2490057468 Jul 27 05:01:47 PM PDT 24 Jul 27 05:19:45 PM PDT 24 35631748847 ps
T435 /workspace/coverage/default/24.sram_ctrl_partial_access.99162050 Jul 27 05:00:28 PM PDT 24 Jul 27 05:00:35 PM PDT 24 1440788545 ps
T436 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.2114258257 Jul 27 04:59:50 PM PDT 24 Jul 27 05:02:09 PM PDT 24 7701568894 ps
T437 /workspace/coverage/default/34.sram_ctrl_regwen.2646519584 Jul 27 05:00:59 PM PDT 24 Jul 27 05:19:40 PM PDT 24 6579840738 ps
T438 /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.612236926 Jul 27 04:59:57 PM PDT 24 Jul 27 05:04:24 PM PDT 24 7307693746 ps
T439 /workspace/coverage/default/1.sram_ctrl_multiple_keys.311875054 Jul 27 04:59:34 PM PDT 24 Jul 27 05:20:25 PM PDT 24 5301460303 ps
T440 /workspace/coverage/default/33.sram_ctrl_multiple_keys.3679842244 Jul 27 05:00:51 PM PDT 24 Jul 27 05:18:22 PM PDT 24 3653832377 ps
T441 /workspace/coverage/default/1.sram_ctrl_stress_all.1880556135 Jul 27 04:59:45 PM PDT 24 Jul 27 05:47:24 PM PDT 24 8282834311 ps
T442 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.2113191831 Jul 27 04:59:59 PM PDT 24 Jul 27 05:00:05 PM PDT 24 382445495 ps
T443 /workspace/coverage/default/13.sram_ctrl_partial_access.759903939 Jul 27 05:00:07 PM PDT 24 Jul 27 05:00:28 PM PDT 24 1360651846 ps
T444 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.3931522514 Jul 27 05:01:27 PM PDT 24 Jul 27 05:03:07 PM PDT 24 1059469652 ps
T445 /workspace/coverage/default/4.sram_ctrl_lc_escalation.734212203 Jul 27 04:59:47 PM PDT 24 Jul 27 04:59:53 PM PDT 24 1038781321 ps
T446 /workspace/coverage/default/35.sram_ctrl_max_throughput.1069165655 Jul 27 05:00:54 PM PDT 24 Jul 27 05:00:56 PM PDT 24 37776020 ps
T447 /workspace/coverage/default/23.sram_ctrl_regwen.686946178 Jul 27 05:00:30 PM PDT 24 Jul 27 05:12:18 PM PDT 24 1547519554 ps
T448 /workspace/coverage/default/23.sram_ctrl_multiple_keys.900575452 Jul 27 05:00:28 PM PDT 24 Jul 27 05:16:33 PM PDT 24 30663508213 ps
T449 /workspace/coverage/default/1.sram_ctrl_ram_cfg.377902050 Jul 27 04:59:36 PM PDT 24 Jul 27 04:59:37 PM PDT 24 29027013 ps
T450 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3805306999 Jul 27 05:00:04 PM PDT 24 Jul 27 05:04:10 PM PDT 24 2547220369 ps
T451 /workspace/coverage/default/29.sram_ctrl_mem_walk.762938821 Jul 27 05:00:57 PM PDT 24 Jul 27 05:01:03 PM PDT 24 95473376 ps
T452 /workspace/coverage/default/48.sram_ctrl_mem_walk.1786119543 Jul 27 05:01:58 PM PDT 24 Jul 27 05:02:04 PM PDT 24 1263063980 ps
T453 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3005106500 Jul 27 04:59:52 PM PDT 24 Jul 27 05:22:51 PM PDT 24 13542082639 ps
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T471 /workspace/coverage/default/16.sram_ctrl_executable.2282038533 Jul 27 04:59:56 PM PDT 24 Jul 27 05:04:53 PM PDT 24 12603788870 ps
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T486 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3280599840 Jul 27 05:00:18 PM PDT 24 Jul 27 05:08:07 PM PDT 24 18942393701 ps
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T503 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.108778280 Jul 27 05:00:15 PM PDT 24 Jul 27 05:10:23 PM PDT 24 2807134228 ps
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T511 /workspace/coverage/default/49.sram_ctrl_bijection.3919257854 Jul 27 05:01:59 PM PDT 24 Jul 27 05:02:45 PM PDT 24 838427469 ps
T512 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1618338260 Jul 27 05:00:28 PM PDT 24 Jul 27 05:00:44 PM PDT 24 221053464 ps
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T520 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.764526322 Jul 27 05:00:25 PM PDT 24 Jul 27 05:05:00 PM PDT 24 7899327921 ps
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T524 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.2679064343 Jul 27 05:01:06 PM PDT 24 Jul 27 05:21:49 PM PDT 24 16987589421 ps
T525 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.4269188460 Jul 27 05:01:10 PM PDT 24 Jul 27 05:19:09 PM PDT 24 8711722200 ps
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T527 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.2168501196 Jul 27 05:01:15 PM PDT 24 Jul 27 05:01:20 PM PDT 24 386491665 ps
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T529 /workspace/coverage/default/41.sram_ctrl_lc_escalation.287891596 Jul 27 05:01:24 PM PDT 24 Jul 27 05:01:30 PM PDT 24 3569980152 ps
T530 /workspace/coverage/default/38.sram_ctrl_bijection.732989139 Jul 27 05:01:08 PM PDT 24 Jul 27 05:01:31 PM PDT 24 4449586509 ps
T531 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2528274391 Jul 27 05:00:30 PM PDT 24 Jul 27 05:02:07 PM PDT 24 2213674970 ps
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T100 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.2672037136 Jul 27 05:01:12 PM PDT 24 Jul 27 05:01:52 PM PDT 24 1415360254 ps
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T540 /workspace/coverage/default/31.sram_ctrl_regwen.3871483270 Jul 27 05:00:58 PM PDT 24 Jul 27 05:05:46 PM PDT 24 21481531588 ps
T541 /workspace/coverage/default/20.sram_ctrl_lc_escalation.2556013589 Jul 27 05:00:18 PM PDT 24 Jul 27 05:00:20 PM PDT 24 116104729 ps
T542 /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.2729704604 Jul 27 05:01:01 PM PDT 24 Jul 27 05:01:31 PM PDT 24 101390263 ps
T543 /workspace/coverage/default/40.sram_ctrl_alert_test.2310188538 Jul 27 05:01:18 PM PDT 24 Jul 27 05:01:19 PM PDT 24 12692544 ps
T544 /workspace/coverage/default/20.sram_ctrl_multiple_keys.489052057 Jul 27 05:00:27 PM PDT 24 Jul 27 05:24:05 PM PDT 24 16011623794 ps
T545 /workspace/coverage/default/47.sram_ctrl_partial_access.3407703613 Jul 27 05:01:48 PM PDT 24 Jul 27 05:02:06 PM PDT 24 318646000 ps
T546 /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3054593151 Jul 27 04:59:51 PM PDT 24 Jul 27 05:04:01 PM PDT 24 11101739125 ps
T547 /workspace/coverage/default/16.sram_ctrl_lc_escalation.725467578 Jul 27 05:00:15 PM PDT 24 Jul 27 05:00:21 PM PDT 24 827817561 ps
T548 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.3073574513 Jul 27 05:00:08 PM PDT 24 Jul 27 05:19:21 PM PDT 24 3906982212 ps
T549 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1980541320 Jul 27 05:00:41 PM PDT 24 Jul 27 05:00:42 PM PDT 24 29267506 ps
T550 /workspace/coverage/default/29.sram_ctrl_multiple_keys.1687500736 Jul 27 05:00:27 PM PDT 24 Jul 27 05:13:59 PM PDT 24 34625951052 ps
T551 /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.3182158648 Jul 27 05:01:17 PM PDT 24 Jul 27 05:03:50 PM PDT 24 7087519349 ps
T552 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.3476839737 Jul 27 05:00:32 PM PDT 24 Jul 27 05:02:00 PM PDT 24 335099806 ps
T553 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.1994036964 Jul 27 05:00:56 PM PDT 24 Jul 27 05:03:57 PM PDT 24 6730754740 ps
T554 /workspace/coverage/default/48.sram_ctrl_alert_test.2086180700 Jul 27 05:01:58 PM PDT 24 Jul 27 05:01:59 PM PDT 24 22905562 ps
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