| T550 |
/workspace/coverage/default/2.sram_ctrl_alert_test.3926200905 |
|
|
Jul 30 07:24:05 PM PDT 24 |
Jul 30 07:24:06 PM PDT 24 |
206904695 ps |
| T551 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.2908025768 |
|
|
Jul 30 07:29:18 PM PDT 24 |
Jul 30 07:29:21 PM PDT 24 |
172536452 ps |
| T552 |
/workspace/coverage/default/17.sram_ctrl_mem_partial_access.3664060026 |
|
|
Jul 30 07:25:53 PM PDT 24 |
Jul 30 07:25:56 PM PDT 24 |
54006038 ps |
| T553 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.111043784 |
|
|
Jul 30 07:27:57 PM PDT 24 |
Jul 30 07:27:57 PM PDT 24 |
29701744 ps |
| T554 |
/workspace/coverage/default/1.sram_ctrl_max_throughput.3277802775 |
|
|
Jul 30 07:23:54 PM PDT 24 |
Jul 30 07:24:03 PM PDT 24 |
258426509 ps |
| T555 |
/workspace/coverage/default/30.sram_ctrl_partial_access_b2b.2973757690 |
|
|
Jul 30 07:28:01 PM PDT 24 |
Jul 30 07:33:19 PM PDT 24 |
27122172387 ps |
| T556 |
/workspace/coverage/default/40.sram_ctrl_mem_partial_access.4284318209 |
|
|
Jul 30 07:29:54 PM PDT 24 |
Jul 30 07:29:57 PM PDT 24 |
365468979 ps |
| T557 |
/workspace/coverage/default/25.sram_ctrl_lc_escalation.667620155 |
|
|
Jul 30 07:27:16 PM PDT 24 |
Jul 30 07:27:22 PM PDT 24 |
556691544 ps |
| T558 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.2384772654 |
|
|
Jul 30 07:28:32 PM PDT 24 |
Jul 30 07:33:46 PM PDT 24 |
1844729022 ps |
| T559 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.2254923886 |
|
|
Jul 30 07:31:25 PM PDT 24 |
Jul 30 07:31:32 PM PDT 24 |
292174415 ps |
| T560 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.658606604 |
|
|
Jul 30 07:24:38 PM PDT 24 |
Jul 30 07:27:12 PM PDT 24 |
4349710446 ps |
| T561 |
/workspace/coverage/default/9.sram_ctrl_alert_test.4015158513 |
|
|
Jul 30 07:24:46 PM PDT 24 |
Jul 30 07:24:47 PM PDT 24 |
17883271 ps |
| T562 |
/workspace/coverage/default/9.sram_ctrl_executable.2842109813 |
|
|
Jul 30 07:24:41 PM PDT 24 |
Jul 30 07:49:13 PM PDT 24 |
15508091999 ps |
| T563 |
/workspace/coverage/default/45.sram_ctrl_stress_all.593225148 |
|
|
Jul 30 07:30:57 PM PDT 24 |
Jul 30 09:10:54 PM PDT 24 |
319093389726 ps |
| T564 |
/workspace/coverage/default/20.sram_ctrl_executable.2448904584 |
|
|
Jul 30 07:26:24 PM PDT 24 |
Jul 30 07:34:31 PM PDT 24 |
1763644126 ps |
| T565 |
/workspace/coverage/default/31.sram_ctrl_access_during_key_req.3767974012 |
|
|
Jul 30 07:28:10 PM PDT 24 |
Jul 30 07:38:48 PM PDT 24 |
12546118486 ps |
| T566 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1250609042 |
|
|
Jul 30 07:30:37 PM PDT 24 |
Jul 30 07:30:43 PM PDT 24 |
168491431 ps |
| T567 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.808625035 |
|
|
Jul 30 07:24:32 PM PDT 24 |
Jul 30 07:27:41 PM PDT 24 |
7789774129 ps |
| T568 |
/workspace/coverage/default/26.sram_ctrl_alert_test.2350561956 |
|
|
Jul 30 07:27:24 PM PDT 24 |
Jul 30 07:27:25 PM PDT 24 |
22870286 ps |
| T569 |
/workspace/coverage/default/24.sram_ctrl_executable.747087265 |
|
|
Jul 30 07:27:04 PM PDT 24 |
Jul 30 07:39:28 PM PDT 24 |
8498624361 ps |
| T570 |
/workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.4051779260 |
|
|
Jul 30 07:25:12 PM PDT 24 |
Jul 30 07:26:09 PM PDT 24 |
816476913 ps |
| T571 |
/workspace/coverage/default/4.sram_ctrl_executable.2329630937 |
|
|
Jul 30 07:24:15 PM PDT 24 |
Jul 30 07:26:04 PM PDT 24 |
739062452 ps |
| T572 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.103372129 |
|
|
Jul 30 07:24:53 PM PDT 24 |
Jul 30 07:25:32 PM PDT 24 |
96787195 ps |
| T573 |
/workspace/coverage/default/30.sram_ctrl_ram_cfg.2533872401 |
|
|
Jul 30 07:28:03 PM PDT 24 |
Jul 30 07:28:04 PM PDT 24 |
74375201 ps |
| T574 |
/workspace/coverage/default/47.sram_ctrl_bijection.2468000174 |
|
|
Jul 30 07:31:16 PM PDT 24 |
Jul 30 07:31:45 PM PDT 24 |
457973323 ps |
| T575 |
/workspace/coverage/default/12.sram_ctrl_smoke.1459100933 |
|
|
Jul 30 07:24:58 PM PDT 24 |
Jul 30 07:25:12 PM PDT 24 |
236702029 ps |
| T576 |
/workspace/coverage/default/13.sram_ctrl_partial_access.3258774841 |
|
|
Jul 30 07:25:07 PM PDT 24 |
Jul 30 07:26:24 PM PDT 24 |
180146646 ps |
| T577 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.2428090495 |
|
|
Jul 30 07:27:58 PM PDT 24 |
Jul 30 07:28:24 PM PDT 24 |
627320900 ps |
| T578 |
/workspace/coverage/default/26.sram_ctrl_partial_access.2939189785 |
|
|
Jul 30 07:27:16 PM PDT 24 |
Jul 30 07:27:36 PM PDT 24 |
1157203941 ps |
| T579 |
/workspace/coverage/default/42.sram_ctrl_partial_access_b2b.1510623429 |
|
|
Jul 30 07:30:18 PM PDT 24 |
Jul 30 07:36:16 PM PDT 24 |
13530619955 ps |
| T580 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.1716954660 |
|
|
Jul 30 07:27:27 PM PDT 24 |
Jul 30 07:27:36 PM PDT 24 |
122019230 ps |
| T581 |
/workspace/coverage/default/30.sram_ctrl_bijection.1479162432 |
|
|
Jul 30 07:28:02 PM PDT 24 |
Jul 30 07:29:28 PM PDT 24 |
18377829803 ps |
| T582 |
/workspace/coverage/default/41.sram_ctrl_regwen.424710768 |
|
|
Jul 30 07:30:05 PM PDT 24 |
Jul 30 07:40:59 PM PDT 24 |
9267072647 ps |
| T583 |
/workspace/coverage/default/34.sram_ctrl_executable.2971390907 |
|
|
Jul 30 07:28:45 PM PDT 24 |
Jul 30 07:48:13 PM PDT 24 |
62150474647 ps |
| T584 |
/workspace/coverage/default/31.sram_ctrl_smoke.1542861054 |
|
|
Jul 30 07:28:09 PM PDT 24 |
Jul 30 07:28:26 PM PDT 24 |
776768155 ps |
| T585 |
/workspace/coverage/default/7.sram_ctrl_stress_all.3564929426 |
|
|
Jul 30 07:24:25 PM PDT 24 |
Jul 30 07:29:54 PM PDT 24 |
4254078634 ps |
| T586 |
/workspace/coverage/default/3.sram_ctrl_lc_escalation.162933849 |
|
|
Jul 30 07:24:06 PM PDT 24 |
Jul 30 07:24:13 PM PDT 24 |
561146375 ps |
| T587 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.1274856744 |
|
|
Jul 30 07:26:32 PM PDT 24 |
Jul 30 07:28:25 PM PDT 24 |
1540414243 ps |
| T588 |
/workspace/coverage/default/15.sram_ctrl_stress_pipeline.2093204257 |
|
|
Jul 30 07:25:26 PM PDT 24 |
Jul 30 07:28:12 PM PDT 24 |
1831552165 ps |
| T589 |
/workspace/coverage/default/23.sram_ctrl_lc_escalation.3722919453 |
|
|
Jul 30 07:26:47 PM PDT 24 |
Jul 30 07:26:54 PM PDT 24 |
444565805 ps |
| T590 |
/workspace/coverage/default/18.sram_ctrl_stress_pipeline.1984902283 |
|
|
Jul 30 07:25:53 PM PDT 24 |
Jul 30 07:29:12 PM PDT 24 |
2210380959 ps |
| T114 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1486832271 |
|
|
Jul 30 07:24:13 PM PDT 24 |
Jul 30 07:24:19 PM PDT 24 |
285593494 ps |
| T591 |
/workspace/coverage/default/18.sram_ctrl_lc_escalation.1811642736 |
|
|
Jul 30 07:25:58 PM PDT 24 |
Jul 30 07:26:02 PM PDT 24 |
281613449 ps |
| T592 |
/workspace/coverage/default/12.sram_ctrl_alert_test.852146899 |
|
|
Jul 30 07:25:05 PM PDT 24 |
Jul 30 07:25:05 PM PDT 24 |
48887507 ps |
| T593 |
/workspace/coverage/default/8.sram_ctrl_smoke.2264602023 |
|
|
Jul 30 07:24:27 PM PDT 24 |
Jul 30 07:24:34 PM PDT 24 |
533561145 ps |
| T594 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.681571091 |
|
|
Jul 30 07:24:26 PM PDT 24 |
Jul 30 07:24:28 PM PDT 24 |
42264824 ps |
| T595 |
/workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3444710183 |
|
|
Jul 30 07:29:38 PM PDT 24 |
Jul 30 07:37:39 PM PDT 24 |
26595240548 ps |
| T17 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.177242605 |
|
|
Jul 30 07:24:00 PM PDT 24 |
Jul 30 07:24:02 PM PDT 24 |
752399328 ps |
| T596 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.3090952198 |
|
|
Jul 30 07:27:29 PM PDT 24 |
Jul 30 07:30:28 PM PDT 24 |
13166972926 ps |
| T597 |
/workspace/coverage/default/45.sram_ctrl_ram_cfg.255166046 |
|
|
Jul 30 07:30:54 PM PDT 24 |
Jul 30 07:30:55 PM PDT 24 |
81357138 ps |
| T598 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1119696105 |
|
|
Jul 30 07:23:50 PM PDT 24 |
Jul 30 07:39:04 PM PDT 24 |
2414213810 ps |
| T599 |
/workspace/coverage/default/24.sram_ctrl_stress_all.3606273580 |
|
|
Jul 30 07:27:06 PM PDT 24 |
Jul 30 07:40:30 PM PDT 24 |
92957261411 ps |
| T600 |
/workspace/coverage/default/30.sram_ctrl_partial_access.3231316846 |
|
|
Jul 30 07:28:02 PM PDT 24 |
Jul 30 07:29:14 PM PDT 24 |
599923775 ps |
| T601 |
/workspace/coverage/default/11.sram_ctrl_alert_test.2798833834 |
|
|
Jul 30 07:24:57 PM PDT 24 |
Jul 30 07:24:57 PM PDT 24 |
33899702 ps |
| T602 |
/workspace/coverage/default/10.sram_ctrl_partial_access.774238608 |
|
|
Jul 30 07:24:43 PM PDT 24 |
Jul 30 07:25:17 PM PDT 24 |
1881790346 ps |
| T603 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.754175546 |
|
|
Jul 30 07:26:48 PM PDT 24 |
Jul 30 07:26:49 PM PDT 24 |
38845340 ps |
| T93 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.4103685936 |
|
|
Jul 30 07:25:32 PM PDT 24 |
Jul 30 07:25:38 PM PDT 24 |
181419434 ps |
| T604 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.2241179743 |
|
|
Jul 30 07:29:06 PM PDT 24 |
Jul 30 07:29:12 PM PDT 24 |
174875588 ps |
| T605 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2212772946 |
|
|
Jul 30 07:24:49 PM PDT 24 |
Jul 30 07:24:53 PM PDT 24 |
119301055 ps |
| T606 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.1275379182 |
|
|
Jul 30 07:30:13 PM PDT 24 |
Jul 30 07:30:16 PM PDT 24 |
124575660 ps |
| T607 |
/workspace/coverage/default/44.sram_ctrl_regwen.590913942 |
|
|
Jul 30 07:30:41 PM PDT 24 |
Jul 30 07:50:53 PM PDT 24 |
13247369717 ps |
| T608 |
/workspace/coverage/default/35.sram_ctrl_regwen.2589642124 |
|
|
Jul 30 07:28:54 PM PDT 24 |
Jul 30 07:41:41 PM PDT 24 |
9304967256 ps |
| T609 |
/workspace/coverage/default/39.sram_ctrl_access_during_key_req.1498164920 |
|
|
Jul 30 07:29:38 PM PDT 24 |
Jul 30 07:34:49 PM PDT 24 |
1205210143 ps |
| T610 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3374014521 |
|
|
Jul 30 07:25:15 PM PDT 24 |
Jul 30 07:25:30 PM PDT 24 |
80340227 ps |
| T611 |
/workspace/coverage/default/35.sram_ctrl_bijection.3910716527 |
|
|
Jul 30 07:28:45 PM PDT 24 |
Jul 30 07:29:45 PM PDT 24 |
3904229402 ps |
| T612 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1250682528 |
|
|
Jul 30 07:24:28 PM PDT 24 |
Jul 30 07:33:59 PM PDT 24 |
24594641811 ps |
| T613 |
/workspace/coverage/default/42.sram_ctrl_executable.4231458136 |
|
|
Jul 30 07:30:23 PM PDT 24 |
Jul 30 07:45:09 PM PDT 24 |
2962919792 ps |
| T614 |
/workspace/coverage/default/10.sram_ctrl_alert_test.2059723722 |
|
|
Jul 30 07:24:47 PM PDT 24 |
Jul 30 07:24:48 PM PDT 24 |
13179997 ps |
| T615 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.3098159732 |
|
|
Jul 30 07:29:13 PM PDT 24 |
Jul 30 07:42:44 PM PDT 24 |
12710012151 ps |
| T616 |
/workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.1849413120 |
|
|
Jul 30 07:28:13 PM PDT 24 |
Jul 30 07:29:30 PM PDT 24 |
4671288817 ps |
| T617 |
/workspace/coverage/default/9.sram_ctrl_partial_access.1635241853 |
|
|
Jul 30 07:24:33 PM PDT 24 |
Jul 30 07:24:38 PM PDT 24 |
343438953 ps |
| T618 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.1416870574 |
|
|
Jul 30 07:27:11 PM PDT 24 |
Jul 30 07:27:21 PM PDT 24 |
685905421 ps |
| T619 |
/workspace/coverage/default/28.sram_ctrl_partial_access.2459757416 |
|
|
Jul 30 07:27:40 PM PDT 24 |
Jul 30 07:28:00 PM PDT 24 |
3782198138 ps |
| T620 |
/workspace/coverage/default/20.sram_ctrl_stress_pipeline.1608936591 |
|
|
Jul 30 07:26:19 PM PDT 24 |
Jul 30 07:30:50 PM PDT 24 |
9205895667 ps |
| T621 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.4184131207 |
|
|
Jul 30 07:28:17 PM PDT 24 |
Jul 30 07:33:02 PM PDT 24 |
2942119113 ps |
| T622 |
/workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.2821196544 |
|
|
Jul 30 07:29:09 PM PDT 24 |
Jul 30 07:30:22 PM PDT 24 |
956117986 ps |
| T623 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2265567488 |
|
|
Jul 30 07:24:50 PM PDT 24 |
Jul 30 07:25:21 PM PDT 24 |
774103095 ps |
| T624 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4136568434 |
|
|
Jul 30 07:31:34 PM PDT 24 |
Jul 30 07:31:36 PM PDT 24 |
218373878 ps |
| T625 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.2104238108 |
|
|
Jul 30 07:27:36 PM PDT 24 |
Jul 30 07:27:42 PM PDT 24 |
666574520 ps |
| T626 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3093743434 |
|
|
Jul 30 07:30:59 PM PDT 24 |
Jul 30 07:31:03 PM PDT 24 |
203951179 ps |
| T627 |
/workspace/coverage/default/49.sram_ctrl_mem_walk.1712506259 |
|
|
Jul 30 07:31:33 PM PDT 24 |
Jul 30 07:31:44 PM PDT 24 |
177517892 ps |
| T628 |
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1731932643 |
|
|
Jul 30 07:30:41 PM PDT 24 |
Jul 30 07:35:25 PM PDT 24 |
30099228958 ps |
| T629 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.3196361326 |
|
|
Jul 30 07:24:23 PM PDT 24 |
Jul 30 07:24:30 PM PDT 24 |
668323414 ps |
| T630 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.2511006948 |
|
|
Jul 30 07:28:53 PM PDT 24 |
Jul 30 07:28:54 PM PDT 24 |
74740220 ps |
| T631 |
/workspace/coverage/default/8.sram_ctrl_partial_access.284367493 |
|
|
Jul 30 07:24:28 PM PDT 24 |
Jul 30 07:25:15 PM PDT 24 |
494117810 ps |
| T632 |
/workspace/coverage/default/49.sram_ctrl_bijection.2417020812 |
|
|
Jul 30 07:31:30 PM PDT 24 |
Jul 30 07:32:39 PM PDT 24 |
1865667148 ps |
| T115 |
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.503392007 |
|
|
Jul 30 07:23:55 PM PDT 24 |
Jul 30 07:25:06 PM PDT 24 |
721145994 ps |
| T633 |
/workspace/coverage/default/11.sram_ctrl_regwen.1701288170 |
|
|
Jul 30 07:24:53 PM PDT 24 |
Jul 30 07:30:38 PM PDT 24 |
6455215604 ps |
| T634 |
/workspace/coverage/default/25.sram_ctrl_smoke.3038116323 |
|
|
Jul 30 07:27:09 PM PDT 24 |
Jul 30 07:27:41 PM PDT 24 |
90780436 ps |
| T635 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.376816788 |
|
|
Jul 30 07:29:05 PM PDT 24 |
Jul 30 07:29:06 PM PDT 24 |
45513053 ps |
| T636 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.2219984837 |
|
|
Jul 30 07:29:02 PM PDT 24 |
Jul 30 07:29:04 PM PDT 24 |
47390756 ps |
| T637 |
/workspace/coverage/default/34.sram_ctrl_multiple_keys.3387344519 |
|
|
Jul 30 07:28:36 PM PDT 24 |
Jul 30 07:43:07 PM PDT 24 |
9655987533 ps |
| T638 |
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.805229817 |
|
|
Jul 30 07:30:46 PM PDT 24 |
Jul 30 07:30:49 PM PDT 24 |
176526001 ps |
| T639 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.1786769306 |
|
|
Jul 30 07:28:47 PM PDT 24 |
Jul 30 07:39:58 PM PDT 24 |
1879031259 ps |
| T640 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3328204078 |
|
|
Jul 30 07:26:50 PM PDT 24 |
Jul 30 07:34:11 PM PDT 24 |
11671516936 ps |
| T641 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3231283975 |
|
|
Jul 30 07:28:48 PM PDT 24 |
Jul 30 07:33:19 PM PDT 24 |
5922518757 ps |
| T642 |
/workspace/coverage/default/37.sram_ctrl_partial_access.1493935657 |
|
|
Jul 30 07:29:16 PM PDT 24 |
Jul 30 07:29:27 PM PDT 24 |
762130136 ps |
| T643 |
/workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2175349155 |
|
|
Jul 30 07:27:09 PM PDT 24 |
Jul 30 07:33:58 PM PDT 24 |
61583039259 ps |
| T644 |
/workspace/coverage/default/24.sram_ctrl_bijection.1037632193 |
|
|
Jul 30 07:26:55 PM PDT 24 |
Jul 30 07:27:17 PM PDT 24 |
317781208 ps |
| T645 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1521230788 |
|
|
Jul 30 07:27:28 PM PDT 24 |
Jul 30 08:41:27 PM PDT 24 |
68325460984 ps |
| T646 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.1716214299 |
|
|
Jul 30 07:25:02 PM PDT 24 |
Jul 30 07:25:11 PM PDT 24 |
572692622 ps |
| T647 |
/workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.1543482756 |
|
|
Jul 30 07:27:23 PM PDT 24 |
Jul 30 07:31:48 PM PDT 24 |
2538697590 ps |
| T648 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.2067624083 |
|
|
Jul 30 07:25:02 PM PDT 24 |
Jul 30 07:25:03 PM PDT 24 |
205301201 ps |
| T649 |
/workspace/coverage/default/49.sram_ctrl_regwen.2508520956 |
|
|
Jul 30 07:31:36 PM PDT 24 |
Jul 30 07:43:05 PM PDT 24 |
11687686653 ps |
| T650 |
/workspace/coverage/default/17.sram_ctrl_partial_access_b2b.3909332465 |
|
|
Jul 30 07:25:46 PM PDT 24 |
Jul 30 07:30:57 PM PDT 24 |
51737043266 ps |
| T651 |
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2962101547 |
|
|
Jul 30 07:25:01 PM PDT 24 |
Jul 30 07:25:08 PM PDT 24 |
565620703 ps |
| T652 |
/workspace/coverage/default/35.sram_ctrl_access_during_key_req.2326281584 |
|
|
Jul 30 07:28:53 PM PDT 24 |
Jul 30 07:37:18 PM PDT 24 |
1524936702 ps |
| T653 |
/workspace/coverage/default/19.sram_ctrl_multiple_keys.2100421263 |
|
|
Jul 30 07:26:11 PM PDT 24 |
Jul 30 07:28:11 PM PDT 24 |
4026948297 ps |
| T654 |
/workspace/coverage/default/24.sram_ctrl_alert_test.1284367089 |
|
|
Jul 30 07:27:08 PM PDT 24 |
Jul 30 07:27:09 PM PDT 24 |
40262099 ps |
| T655 |
/workspace/coverage/default/5.sram_ctrl_smoke.2939528350 |
|
|
Jul 30 07:24:11 PM PDT 24 |
Jul 30 07:25:12 PM PDT 24 |
533373487 ps |
| T656 |
/workspace/coverage/default/28.sram_ctrl_stress_pipeline.975312664 |
|
|
Jul 30 07:27:43 PM PDT 24 |
Jul 30 07:31:31 PM PDT 24 |
2497392723 ps |
| T657 |
/workspace/coverage/default/33.sram_ctrl_mem_walk.3980701700 |
|
|
Jul 30 07:28:32 PM PDT 24 |
Jul 30 07:28:37 PM PDT 24 |
228421344 ps |
| T658 |
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.418254693 |
|
|
Jul 30 07:24:20 PM PDT 24 |
Jul 30 07:26:47 PM PDT 24 |
856574381 ps |
| T659 |
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4288605302 |
|
|
Jul 30 07:23:50 PM PDT 24 |
Jul 30 07:25:17 PM PDT 24 |
524443270 ps |
| T660 |
/workspace/coverage/default/39.sram_ctrl_mem_walk.1100978936 |
|
|
Jul 30 07:29:43 PM PDT 24 |
Jul 30 07:29:49 PM PDT 24 |
520918161 ps |
| T661 |
/workspace/coverage/default/14.sram_ctrl_bijection.3495086874 |
|
|
Jul 30 07:25:12 PM PDT 24 |
Jul 30 07:26:09 PM PDT 24 |
8510720146 ps |
| T662 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1571631032 |
|
|
Jul 30 07:30:58 PM PDT 24 |
Jul 30 07:32:22 PM PDT 24 |
1898273116 ps |
| T663 |
/workspace/coverage/default/20.sram_ctrl_partial_access.1478172660 |
|
|
Jul 30 07:26:20 PM PDT 24 |
Jul 30 07:26:32 PM PDT 24 |
230270408 ps |
| T664 |
/workspace/coverage/default/35.sram_ctrl_lc_escalation.2837118711 |
|
|
Jul 30 07:28:53 PM PDT 24 |
Jul 30 07:28:56 PM PDT 24 |
528506539 ps |
| T665 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.3402318491 |
|
|
Jul 30 07:29:55 PM PDT 24 |
Jul 30 07:29:56 PM PDT 24 |
74183561 ps |
| T666 |
/workspace/coverage/default/30.sram_ctrl_alert_test.3607892041 |
|
|
Jul 30 07:28:05 PM PDT 24 |
Jul 30 07:28:05 PM PDT 24 |
19181706 ps |
| T667 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.3585101000 |
|
|
Jul 30 07:26:20 PM PDT 24 |
Jul 30 07:26:41 PM PDT 24 |
314001086 ps |
| T668 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.887947601 |
|
|
Jul 30 07:24:50 PM PDT 24 |
Jul 30 07:24:50 PM PDT 24 |
28568972 ps |
| T669 |
/workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2793971937 |
|
|
Jul 30 07:29:14 PM PDT 24 |
Jul 30 07:34:48 PM PDT 24 |
29988993412 ps |
| T670 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.63355407 |
|
|
Jul 30 07:31:15 PM PDT 24 |
Jul 30 07:36:07 PM PDT 24 |
8142408171 ps |
| T671 |
/workspace/coverage/default/5.sram_ctrl_regwen.2560668386 |
|
|
Jul 30 07:24:18 PM PDT 24 |
Jul 30 07:33:14 PM PDT 24 |
3118909736 ps |
| T51 |
/workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1176761504 |
|
|
Jul 30 07:29:01 PM PDT 24 |
Jul 30 07:30:42 PM PDT 24 |
1293985137 ps |
| T672 |
/workspace/coverage/default/35.sram_ctrl_mem_partial_access.2708000847 |
|
|
Jul 30 07:29:01 PM PDT 24 |
Jul 30 07:29:05 PM PDT 24 |
106689834 ps |
| T50 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.2054636459 |
|
|
Jul 30 07:29:45 PM PDT 24 |
Jul 30 07:30:13 PM PDT 24 |
969427569 ps |
| T673 |
/workspace/coverage/default/20.sram_ctrl_stress_all.2623594548 |
|
|
Jul 30 07:26:36 PM PDT 24 |
Jul 30 08:31:15 PM PDT 24 |
29293956333 ps |
| T116 |
/workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3883278991 |
|
|
Jul 30 07:27:50 PM PDT 24 |
Jul 30 07:30:22 PM PDT 24 |
10503902476 ps |
| T674 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.774316401 |
|
|
Jul 30 07:25:03 PM PDT 24 |
Jul 30 07:25:06 PM PDT 24 |
354438192 ps |
| T675 |
/workspace/coverage/default/17.sram_ctrl_stress_all.3953196393 |
|
|
Jul 30 07:25:54 PM PDT 24 |
Jul 30 08:22:23 PM PDT 24 |
9391124378 ps |
| T676 |
/workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2806255142 |
|
|
Jul 30 07:25:33 PM PDT 24 |
Jul 30 07:25:55 PM PDT 24 |
853746362 ps |
| T677 |
/workspace/coverage/default/31.sram_ctrl_bijection.3275756823 |
|
|
Jul 30 07:28:13 PM PDT 24 |
Jul 30 07:28:46 PM PDT 24 |
1968201435 ps |
| T678 |
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1642771906 |
|
|
Jul 30 07:30:43 PM PDT 24 |
Jul 30 07:30:44 PM PDT 24 |
76616423 ps |
| T679 |
/workspace/coverage/default/21.sram_ctrl_max_throughput.514898847 |
|
|
Jul 30 07:26:35 PM PDT 24 |
Jul 30 07:28:39 PM PDT 24 |
521291585 ps |
| T680 |
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1475358597 |
|
|
Jul 30 07:24:16 PM PDT 24 |
Jul 30 07:28:33 PM PDT 24 |
26698591797 ps |
| T681 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.2214129468 |
|
|
Jul 30 07:31:15 PM PDT 24 |
Jul 30 07:31:26 PM PDT 24 |
921187938 ps |
| T682 |
/workspace/coverage/default/46.sram_ctrl_smoke.3921306109 |
|
|
Jul 30 07:30:59 PM PDT 24 |
Jul 30 07:31:32 PM PDT 24 |
426919983 ps |
| T117 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3876374260 |
|
|
Jul 30 07:26:44 PM PDT 24 |
Jul 30 07:27:23 PM PDT 24 |
1242817617 ps |
| T683 |
/workspace/coverage/default/17.sram_ctrl_partial_access.3479095119 |
|
|
Jul 30 07:25:43 PM PDT 24 |
Jul 30 07:25:58 PM PDT 24 |
3055002790 ps |
| T684 |
/workspace/coverage/default/7.sram_ctrl_bijection.4208741826 |
|
|
Jul 30 07:24:18 PM PDT 24 |
Jul 30 07:24:51 PM PDT 24 |
943244934 ps |
| T685 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.1254980570 |
|
|
Jul 30 07:24:40 PM PDT 24 |
Jul 30 07:26:40 PM PDT 24 |
653449169 ps |
| T686 |
/workspace/coverage/default/21.sram_ctrl_mem_walk.1410661275 |
|
|
Jul 30 07:26:31 PM PDT 24 |
Jul 30 07:26:36 PM PDT 24 |
183656815 ps |
| T687 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.3405655740 |
|
|
Jul 30 07:24:17 PM PDT 24 |
Jul 30 07:42:34 PM PDT 24 |
6855359266 ps |
| T688 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.3836743355 |
|
|
Jul 30 07:28:44 PM PDT 24 |
Jul 30 07:28:47 PM PDT 24 |
117165032 ps |
| T689 |
/workspace/coverage/default/20.sram_ctrl_bijection.1463229610 |
|
|
Jul 30 07:26:19 PM PDT 24 |
Jul 30 07:27:28 PM PDT 24 |
11310446558 ps |
| T690 |
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1136744247 |
|
|
Jul 30 07:24:47 PM PDT 24 |
Jul 30 07:26:23 PM PDT 24 |
1766090882 ps |
| T691 |
/workspace/coverage/default/41.sram_ctrl_partial_access_b2b.2546779704 |
|
|
Jul 30 07:30:02 PM PDT 24 |
Jul 30 07:33:34 PM PDT 24 |
19768986620 ps |
| T692 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.3216712868 |
|
|
Jul 30 07:26:39 PM PDT 24 |
Jul 30 07:35:55 PM PDT 24 |
43940491022 ps |
| T693 |
/workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3568427606 |
|
|
Jul 30 07:26:05 PM PDT 24 |
Jul 30 07:38:43 PM PDT 24 |
1399980681 ps |
| T694 |
/workspace/coverage/default/35.sram_ctrl_smoke.3426313309 |
|
|
Jul 30 07:28:43 PM PDT 24 |
Jul 30 07:28:46 PM PDT 24 |
207083356 ps |
| T695 |
/workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.16265676 |
|
|
Jul 30 07:29:14 PM PDT 24 |
Jul 30 07:29:27 PM PDT 24 |
151350323 ps |
| T696 |
/workspace/coverage/default/13.sram_ctrl_executable.233698867 |
|
|
Jul 30 07:25:10 PM PDT 24 |
Jul 30 07:34:05 PM PDT 24 |
5117898211 ps |
| T697 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.717262803 |
|
|
Jul 30 07:25:24 PM PDT 24 |
Jul 30 07:28:50 PM PDT 24 |
3020286137 ps |
| T698 |
/workspace/coverage/default/5.sram_ctrl_executable.1709479048 |
|
|
Jul 30 07:24:18 PM PDT 24 |
Jul 30 07:32:13 PM PDT 24 |
18301659447 ps |
| T699 |
/workspace/coverage/default/8.sram_ctrl_executable.3527297298 |
|
|
Jul 30 07:24:29 PM PDT 24 |
Jul 30 07:53:27 PM PDT 24 |
3011835735 ps |
| T700 |
/workspace/coverage/default/22.sram_ctrl_alert_test.246227040 |
|
|
Jul 30 07:26:43 PM PDT 24 |
Jul 30 07:26:43 PM PDT 24 |
31556315 ps |
| T701 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.1525387117 |
|
|
Jul 30 07:27:12 PM PDT 24 |
Jul 30 07:27:14 PM PDT 24 |
79116425 ps |
| T702 |
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.841539764 |
|
|
Jul 30 07:31:30 PM PDT 24 |
Jul 30 07:31:59 PM PDT 24 |
1518643931 ps |
| T703 |
/workspace/coverage/default/21.sram_ctrl_alert_test.3836574035 |
|
|
Jul 30 07:26:36 PM PDT 24 |
Jul 30 07:26:36 PM PDT 24 |
61673950 ps |
| T704 |
/workspace/coverage/default/29.sram_ctrl_regwen.4202204030 |
|
|
Jul 30 07:27:53 PM PDT 24 |
Jul 30 07:42:26 PM PDT 24 |
2392138552 ps |
| T705 |
/workspace/coverage/default/19.sram_ctrl_alert_test.3808109976 |
|
|
Jul 30 07:26:14 PM PDT 24 |
Jul 30 07:26:15 PM PDT 24 |
11344354 ps |
| T94 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.285686420 |
|
|
Jul 30 07:26:36 PM PDT 24 |
Jul 30 07:26:39 PM PDT 24 |
914396097 ps |
| T706 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.2831584328 |
|
|
Jul 30 07:27:11 PM PDT 24 |
Jul 30 07:27:12 PM PDT 24 |
82911472 ps |
| T707 |
/workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.4114476692 |
|
|
Jul 30 07:28:41 PM PDT 24 |
Jul 30 07:29:04 PM PDT 24 |
111873067 ps |
| T708 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.2228375245 |
|
|
Jul 30 07:24:31 PM PDT 24 |
Jul 30 07:24:36 PM PDT 24 |
471061240 ps |
| T709 |
/workspace/coverage/default/2.sram_ctrl_executable.2408724158 |
|
|
Jul 30 07:23:59 PM PDT 24 |
Jul 30 07:35:27 PM PDT 24 |
45893327783 ps |
| T710 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1521146245 |
|
|
Jul 30 07:30:51 PM PDT 24 |
Jul 30 07:33:32 PM PDT 24 |
21531716808 ps |
| T711 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.119078186 |
|
|
Jul 30 07:28:59 PM PDT 24 |
Jul 30 07:31:57 PM PDT 24 |
1907553387 ps |
| T712 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.3434245475 |
|
|
Jul 30 07:27:46 PM PDT 24 |
Jul 30 07:29:19 PM PDT 24 |
1042960597 ps |
| T713 |
/workspace/coverage/default/25.sram_ctrl_executable.1769295835 |
|
|
Jul 30 07:27:13 PM PDT 24 |
Jul 30 07:59:31 PM PDT 24 |
4517313369 ps |
| T714 |
/workspace/coverage/default/26.sram_ctrl_partial_access_b2b.2833603208 |
|
|
Jul 30 07:27:15 PM PDT 24 |
Jul 30 07:32:49 PM PDT 24 |
12900040849 ps |
| T715 |
/workspace/coverage/default/26.sram_ctrl_executable.3413281785 |
|
|
Jul 30 07:27:19 PM PDT 24 |
Jul 30 07:44:33 PM PDT 24 |
3010774348 ps |
| T716 |
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.3253739216 |
|
|
Jul 30 07:31:16 PM PDT 24 |
Jul 30 07:31:26 PM PDT 24 |
407553785 ps |
| T717 |
/workspace/coverage/default/34.sram_ctrl_alert_test.2918647497 |
|
|
Jul 30 07:28:45 PM PDT 24 |
Jul 30 07:28:46 PM PDT 24 |
160736984 ps |
| T718 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.1522484101 |
|
|
Jul 30 07:27:31 PM PDT 24 |
Jul 30 07:27:36 PM PDT 24 |
1673024859 ps |
| T719 |
/workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.401759595 |
|
|
Jul 30 07:30:12 PM PDT 24 |
Jul 30 07:31:23 PM PDT 24 |
4111312868 ps |
| T720 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.3767106479 |
|
|
Jul 30 07:31:27 PM PDT 24 |
Jul 30 07:31:35 PM PDT 24 |
137880813 ps |
| T721 |
/workspace/coverage/default/21.sram_ctrl_partial_access.2084492391 |
|
|
Jul 30 07:26:26 PM PDT 24 |
Jul 30 07:26:49 PM PDT 24 |
312739955 ps |
| T722 |
/workspace/coverage/default/12.sram_ctrl_bijection.1577407386 |
|
|
Jul 30 07:25:01 PM PDT 24 |
Jul 30 07:25:50 PM PDT 24 |
20162196927 ps |
| T723 |
/workspace/coverage/default/6.sram_ctrl_mem_walk.2884173067 |
|
|
Jul 30 07:24:19 PM PDT 24 |
Jul 30 07:24:26 PM PDT 24 |
1371656616 ps |
| T724 |
/workspace/coverage/default/4.sram_ctrl_ram_cfg.1051614788 |
|
|
Jul 30 07:24:12 PM PDT 24 |
Jul 30 07:24:13 PM PDT 24 |
76108712 ps |
| T725 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.3686137976 |
|
|
Jul 30 07:28:25 PM PDT 24 |
Jul 30 07:28:26 PM PDT 24 |
85903556 ps |
| T726 |
/workspace/coverage/default/2.sram_ctrl_regwen.2822506315 |
|
|
Jul 30 07:24:00 PM PDT 24 |
Jul 30 07:27:22 PM PDT 24 |
17621345523 ps |
| T727 |
/workspace/coverage/default/21.sram_ctrl_stress_pipeline.104680796 |
|
|
Jul 30 07:26:35 PM PDT 24 |
Jul 30 07:30:02 PM PDT 24 |
2418087789 ps |
| T728 |
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.819078383 |
|
|
Jul 30 07:31:34 PM PDT 24 |
Jul 30 07:32:20 PM PDT 24 |
103853492 ps |
| T729 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.3384183053 |
|
|
Jul 30 07:26:40 PM PDT 24 |
Jul 30 07:26:41 PM PDT 24 |
31068068 ps |
| T730 |
/workspace/coverage/default/19.sram_ctrl_regwen.2522513263 |
|
|
Jul 30 07:26:15 PM PDT 24 |
Jul 30 07:45:06 PM PDT 24 |
26552441435 ps |
| T731 |
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2329311132 |
|
|
Jul 30 07:24:29 PM PDT 24 |
Jul 30 07:24:45 PM PDT 24 |
1138443523 ps |
| T732 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2047159004 |
|
|
Jul 30 07:27:27 PM PDT 24 |
Jul 30 07:30:12 PM PDT 24 |
2235200251 ps |
| T733 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.1321163370 |
|
|
Jul 30 07:25:14 PM PDT 24 |
Jul 30 07:25:42 PM PDT 24 |
99712154 ps |
| T734 |
/workspace/coverage/default/30.sram_ctrl_access_during_key_req.1952396524 |
|
|
Jul 30 07:28:07 PM PDT 24 |
Jul 30 07:30:54 PM PDT 24 |
947263185 ps |
| T735 |
/workspace/coverage/default/36.sram_ctrl_smoke.505268283 |
|
|
Jul 30 07:28:59 PM PDT 24 |
Jul 30 07:29:09 PM PDT 24 |
167893802 ps |
| T736 |
/workspace/coverage/default/18.sram_ctrl_regwen.2678779574 |
|
|
Jul 30 07:26:02 PM PDT 24 |
Jul 30 07:55:53 PM PDT 24 |
64743380508 ps |
| T737 |
/workspace/coverage/default/17.sram_ctrl_alert_test.2648090099 |
|
|
Jul 30 07:25:53 PM PDT 24 |
Jul 30 07:25:54 PM PDT 24 |
56033737 ps |
| T738 |
/workspace/coverage/default/28.sram_ctrl_mem_walk.2179084167 |
|
|
Jul 30 07:27:48 PM PDT 24 |
Jul 30 07:27:54 PM PDT 24 |
647359677 ps |
| T739 |
/workspace/coverage/default/2.sram_ctrl_bijection.747384346 |
|
|
Jul 30 07:23:56 PM PDT 24 |
Jul 30 07:25:09 PM PDT 24 |
17772505930 ps |
| T740 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1250437904 |
|
|
Jul 30 07:30:31 PM PDT 24 |
Jul 30 07:31:00 PM PDT 24 |
353253999 ps |
| T741 |
/workspace/coverage/default/24.sram_ctrl_partial_access.1463791351 |
|
|
Jul 30 07:26:59 PM PDT 24 |
Jul 30 07:27:01 PM PDT 24 |
380137828 ps |
| T742 |
/workspace/coverage/default/45.sram_ctrl_partial_access.1445754899 |
|
|
Jul 30 07:30:51 PM PDT 24 |
Jul 30 07:31:05 PM PDT 24 |
3331667447 ps |
| T743 |
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.556628754 |
|
|
Jul 30 07:31:27 PM PDT 24 |
Jul 30 07:38:14 PM PDT 24 |
5785559400 ps |
| T744 |
/workspace/coverage/default/29.sram_ctrl_executable.2620786038 |
|
|
Jul 30 07:27:51 PM PDT 24 |
Jul 30 07:43:54 PM PDT 24 |
44110340522 ps |
| T745 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.2909146233 |
|
|
Jul 30 07:24:12 PM PDT 24 |
Jul 30 07:24:26 PM PDT 24 |
251621838 ps |
| T746 |
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1471044394 |
|
|
Jul 30 07:24:19 PM PDT 24 |
Jul 30 07:26:13 PM PDT 24 |
8083469855 ps |
| T747 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.2184620386 |
|
|
Jul 30 07:26:38 PM PDT 24 |
Jul 30 07:30:00 PM PDT 24 |
1127691783 ps |
| T748 |
/workspace/coverage/default/5.sram_ctrl_ram_cfg.357020386 |
|
|
Jul 30 07:24:16 PM PDT 24 |
Jul 30 07:24:17 PM PDT 24 |
92626172 ps |
| T749 |
/workspace/coverage/default/30.sram_ctrl_mem_partial_access.203024396 |
|
|
Jul 30 07:28:04 PM PDT 24 |
Jul 30 07:28:08 PM PDT 24 |
120143896 ps |
| T750 |
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1114079892 |
|
|
Jul 30 07:24:28 PM PDT 24 |
Jul 30 07:24:29 PM PDT 24 |
73205543 ps |
| T751 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1359680034 |
|
|
Jul 30 07:24:53 PM PDT 24 |
Jul 30 07:25:46 PM PDT 24 |
129256368 ps |
| T752 |
/workspace/coverage/default/36.sram_ctrl_partial_access.657575627 |
|
|
Jul 30 07:28:58 PM PDT 24 |
Jul 30 07:29:04 PM PDT 24 |
638106845 ps |
| T753 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3556484053 |
|
|
Jul 30 07:31:38 PM PDT 24 |
Jul 30 07:31:42 PM PDT 24 |
91715363 ps |
| T754 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.2168905540 |
|
|
Jul 30 07:25:48 PM PDT 24 |
Jul 30 07:27:31 PM PDT 24 |
1936842449 ps |
| T755 |
/workspace/coverage/default/22.sram_ctrl_partial_access.151111651 |
|
|
Jul 30 07:26:38 PM PDT 24 |
Jul 30 07:26:42 PM PDT 24 |
542616536 ps |
| T756 |
/workspace/coverage/default/8.sram_ctrl_regwen.487010189 |
|
|
Jul 30 07:24:29 PM PDT 24 |
Jul 30 07:34:46 PM PDT 24 |
48195967001 ps |
| T757 |
/workspace/coverage/default/36.sram_ctrl_regwen.1983208531 |
|
|
Jul 30 07:29:00 PM PDT 24 |
Jul 30 07:45:21 PM PDT 24 |
68877300459 ps |
| T758 |
/workspace/coverage/default/6.sram_ctrl_smoke.1671756023 |
|
|
Jul 30 07:24:18 PM PDT 24 |
Jul 30 07:26:30 PM PDT 24 |
383301135 ps |
| T759 |
/workspace/coverage/default/16.sram_ctrl_regwen.3094604911 |
|
|
Jul 30 07:25:40 PM PDT 24 |
Jul 30 07:32:13 PM PDT 24 |
18281842888 ps |
| T760 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.518883519 |
|
|
Jul 30 07:25:06 PM PDT 24 |
Jul 30 07:35:28 PM PDT 24 |
7374035478 ps |
| T761 |
/workspace/coverage/default/49.sram_ctrl_executable.2179604120 |
|
|
Jul 30 07:31:35 PM PDT 24 |
Jul 30 07:43:28 PM PDT 24 |
10867298237 ps |
| T762 |
/workspace/coverage/default/32.sram_ctrl_executable.2989237824 |
|
|
Jul 30 07:28:25 PM PDT 24 |
Jul 30 07:41:58 PM PDT 24 |
32197409510 ps |
| T763 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.3010261176 |
|
|
Jul 30 07:30:56 PM PDT 24 |
Jul 30 07:31:26 PM PDT 24 |
179000293 ps |
| T764 |
/workspace/coverage/default/44.sram_ctrl_stress_all.3598442947 |
|
|
Jul 30 07:30:45 PM PDT 24 |
Jul 30 09:01:38 PM PDT 24 |
56115853730 ps |
| T765 |
/workspace/coverage/default/27.sram_ctrl_executable.4247440069 |
|
|
Jul 30 07:27:31 PM PDT 24 |
Jul 30 07:53:30 PM PDT 24 |
11264785396 ps |
| T766 |
/workspace/coverage/default/0.sram_ctrl_bijection.2407818228 |
|
|
Jul 30 07:23:50 PM PDT 24 |
Jul 30 07:24:16 PM PDT 24 |
404087551 ps |
| T767 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.3915129322 |
|
|
Jul 30 07:30:02 PM PDT 24 |
Jul 30 07:30:04 PM PDT 24 |
70617864 ps |
| T768 |
/workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1198066696 |
|
|
Jul 30 07:25:08 PM PDT 24 |
Jul 30 07:25:13 PM PDT 24 |
64606237 ps |
| T769 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2534031837 |
|
|
Jul 30 07:31:27 PM PDT 24 |
Jul 30 07:31:29 PM PDT 24 |
811454775 ps |
| T770 |
/workspace/coverage/default/44.sram_ctrl_partial_access.3997569840 |
|
|
Jul 30 07:30:37 PM PDT 24 |
Jul 30 07:30:54 PM PDT 24 |
1249747617 ps |
| T771 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.3791139810 |
|
|
Jul 30 07:25:16 PM PDT 24 |
Jul 30 07:25:21 PM PDT 24 |
1552956941 ps |
| T772 |
/workspace/coverage/default/35.sram_ctrl_partial_access.2877248574 |
|
|
Jul 30 07:28:47 PM PDT 24 |
Jul 30 07:28:50 PM PDT 24 |
207993668 ps |
| T773 |
/workspace/coverage/default/41.sram_ctrl_partial_access.3097517268 |
|
|
Jul 30 07:30:02 PM PDT 24 |
Jul 30 07:30:21 PM PDT 24 |
967921440 ps |
| T774 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.1996726122 |
|
|
Jul 30 07:30:23 PM PDT 24 |
Jul 30 07:30:24 PM PDT 24 |
42982777 ps |
| T775 |
/workspace/coverage/default/40.sram_ctrl_executable.2097070126 |
|
|
Jul 30 07:29:53 PM PDT 24 |
Jul 30 07:42:56 PM PDT 24 |
51897657579 ps |
| T776 |
/workspace/coverage/default/31.sram_ctrl_ram_cfg.2631300768 |
|
|
Jul 30 07:28:10 PM PDT 24 |
Jul 30 07:28:11 PM PDT 24 |
51841703 ps |
| T777 |
/workspace/coverage/default/27.sram_ctrl_partial_access.3993793634 |
|
|
Jul 30 07:27:28 PM PDT 24 |
Jul 30 07:28:18 PM PDT 24 |
414675966 ps |
| T778 |
/workspace/coverage/default/20.sram_ctrl_lc_escalation.2639752223 |
|
|
Jul 30 07:26:23 PM PDT 24 |
Jul 30 07:26:30 PM PDT 24 |
1901967267 ps |
| T779 |
/workspace/coverage/default/40.sram_ctrl_bijection.3563344095 |
|
|
Jul 30 07:29:46 PM PDT 24 |
Jul 30 07:30:47 PM PDT 24 |
10396848635 ps |
| T780 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.1230345812 |
|
|
Jul 30 07:28:35 PM PDT 24 |
Jul 30 07:28:35 PM PDT 24 |
41564420 ps |
| T781 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.1728689563 |
|
|
Jul 30 07:31:18 PM PDT 24 |
Jul 30 07:33:33 PM PDT 24 |
5284195550 ps |
| T782 |
/workspace/coverage/default/16.sram_ctrl_partial_access.1831072259 |
|
|
Jul 30 07:25:37 PM PDT 24 |
Jul 30 07:26:34 PM PDT 24 |
284896221 ps |
| T783 |
/workspace/coverage/default/33.sram_ctrl_stress_pipeline.1469517326 |
|
|
Jul 30 07:28:32 PM PDT 24 |
Jul 30 07:30:44 PM PDT 24 |
5719355298 ps |
| T30 |
/workspace/coverage/default/0.sram_ctrl_sec_cm.1628425277 |
|
|
Jul 30 07:23:51 PM PDT 24 |
Jul 30 07:23:54 PM PDT 24 |
1643382372 ps |
| T784 |
/workspace/coverage/default/18.sram_ctrl_ram_cfg.996350471 |
|
|
Jul 30 07:26:01 PM PDT 24 |
Jul 30 07:26:02 PM PDT 24 |
97597345 ps |
| T785 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.754283834 |
|
|
Jul 30 07:24:09 PM PDT 24 |
Jul 30 07:24:15 PM PDT 24 |
202569332 ps |
| T786 |
/workspace/coverage/default/1.sram_ctrl_partial_access.455794700 |
|
|
Jul 30 07:23:52 PM PDT 24 |
Jul 30 07:23:57 PM PDT 24 |
344808649 ps |
| T787 |
/workspace/coverage/default/14.sram_ctrl_alert_test.2480604976 |
|
|
Jul 30 07:25:20 PM PDT 24 |
Jul 30 07:25:21 PM PDT 24 |
28907946 ps |
| T788 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.2191739736 |
|
|
Jul 30 07:28:45 PM PDT 24 |
Jul 30 07:28:46 PM PDT 24 |
75388551 ps |
| T31 |
/workspace/coverage/default/4.sram_ctrl_sec_cm.1506759923 |
|
|
Jul 30 07:24:12 PM PDT 24 |
Jul 30 07:24:16 PM PDT 24 |
688599604 ps |