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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1025
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T558 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.763454105 Jul 31 07:40:40 PM PDT 24 Jul 31 07:40:45 PM PDT 24 516038340 ps
T559 /workspace/coverage/default/39.sram_ctrl_smoke.631054262 Jul 31 07:42:34 PM PDT 24 Jul 31 07:43:25 PM PDT 24 300864422 ps
T560 /workspace/coverage/default/29.sram_ctrl_smoke.2656998451 Jul 31 07:41:10 PM PDT 24 Jul 31 07:42:01 PM PDT 24 342989460 ps
T561 /workspace/coverage/default/8.sram_ctrl_regwen.3998639938 Jul 31 07:39:17 PM PDT 24 Jul 31 07:58:09 PM PDT 24 8915770452 ps
T562 /workspace/coverage/default/36.sram_ctrl_mem_walk.2862367198 Jul 31 07:42:11 PM PDT 24 Jul 31 07:42:23 PM PDT 24 11273436397 ps
T563 /workspace/coverage/default/49.sram_ctrl_alert_test.2979897156 Jul 31 07:44:30 PM PDT 24 Jul 31 07:44:31 PM PDT 24 13013674 ps
T564 /workspace/coverage/default/29.sram_ctrl_max_throughput.2917961845 Jul 31 07:41:23 PM PDT 24 Jul 31 07:42:20 PM PDT 24 622519194 ps
T565 /workspace/coverage/default/42.sram_ctrl_stress_all.2038846317 Jul 31 07:43:14 PM PDT 24 Jul 31 08:46:48 PM PDT 24 113053181120 ps
T566 /workspace/coverage/default/6.sram_ctrl_ram_cfg.1173358415 Jul 31 07:39:08 PM PDT 24 Jul 31 07:39:09 PM PDT 24 144785897 ps
T567 /workspace/coverage/default/19.sram_ctrl_smoke.498693398 Jul 31 07:40:03 PM PDT 24 Jul 31 07:40:19 PM PDT 24 261073234 ps
T568 /workspace/coverage/default/16.sram_ctrl_bijection.2866832700 Jul 31 07:39:48 PM PDT 24 Jul 31 07:40:34 PM PDT 24 1455184170 ps
T569 /workspace/coverage/default/22.sram_ctrl_executable.84677714 Jul 31 07:40:31 PM PDT 24 Jul 31 07:52:23 PM PDT 24 13320284501 ps
T570 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.1796990105 Jul 31 07:38:50 PM PDT 24 Jul 31 07:39:50 PM PDT 24 137994423 ps
T571 /workspace/coverage/default/30.sram_ctrl_lc_escalation.1517454726 Jul 31 07:41:21 PM PDT 24 Jul 31 07:41:30 PM PDT 24 857592578 ps
T572 /workspace/coverage/default/31.sram_ctrl_smoke.4032245286 Jul 31 07:41:32 PM PDT 24 Jul 31 07:44:13 PM PDT 24 282607013 ps
T573 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.593665037 Jul 31 07:41:57 PM PDT 24 Jul 31 07:47:02 PM PDT 24 15139819945 ps
T574 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.1777942394 Jul 31 07:41:31 PM PDT 24 Jul 31 07:57:47 PM PDT 24 11810581116 ps
T575 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.692301070 Jul 31 07:44:23 PM PDT 24 Jul 31 07:58:23 PM PDT 24 15347704931 ps
T576 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3913913372 Jul 31 07:42:03 PM PDT 24 Jul 31 07:48:44 PM PDT 24 25711100814 ps
T51 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3016788878 Jul 31 07:39:49 PM PDT 24 Jul 31 07:39:57 PM PDT 24 794633568 ps
T577 /workspace/coverage/default/38.sram_ctrl_ram_cfg.2884142044 Jul 31 07:42:29 PM PDT 24 Jul 31 07:42:30 PM PDT 24 92113098 ps
T578 /workspace/coverage/default/37.sram_ctrl_regwen.2671964990 Jul 31 07:42:28 PM PDT 24 Jul 31 07:45:25 PM PDT 24 3806243764 ps
T579 /workspace/coverage/default/1.sram_ctrl_alert_test.605787016 Jul 31 07:38:50 PM PDT 24 Jul 31 07:38:50 PM PDT 24 14134347 ps
T580 /workspace/coverage/default/14.sram_ctrl_partial_access.2230816577 Jul 31 07:39:42 PM PDT 24 Jul 31 07:40:03 PM PDT 24 1207272023 ps
T581 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.1743765671 Jul 31 07:39:14 PM PDT 24 Jul 31 07:45:24 PM PDT 24 1649913019 ps
T582 /workspace/coverage/default/31.sram_ctrl_alert_test.2320479540 Jul 31 07:41:33 PM PDT 24 Jul 31 07:41:34 PM PDT 24 15212770 ps
T583 /workspace/coverage/default/18.sram_ctrl_bijection.2173917565 Jul 31 07:40:00 PM PDT 24 Jul 31 07:40:54 PM PDT 24 837634608 ps
T584 /workspace/coverage/default/31.sram_ctrl_regwen.1368259945 Jul 31 07:41:34 PM PDT 24 Jul 31 07:51:10 PM PDT 24 8967351171 ps
T585 /workspace/coverage/default/19.sram_ctrl_regwen.2861219837 Jul 31 07:40:10 PM PDT 24 Jul 31 07:52:57 PM PDT 24 38432589482 ps
T586 /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.1485611797 Jul 31 07:42:41 PM PDT 24 Jul 31 07:50:19 PM PDT 24 6813848755 ps
T587 /workspace/coverage/default/28.sram_ctrl_executable.2520911985 Jul 31 07:41:12 PM PDT 24 Jul 31 07:59:50 PM PDT 24 18692454696 ps
T588 /workspace/coverage/default/48.sram_ctrl_mem_walk.1818164241 Jul 31 07:44:17 PM PDT 24 Jul 31 07:44:23 PM PDT 24 430811300 ps
T589 /workspace/coverage/default/17.sram_ctrl_stress_all.1390546657 Jul 31 07:39:55 PM PDT 24 Jul 31 08:08:46 PM PDT 24 105629582349 ps
T590 /workspace/coverage/default/27.sram_ctrl_ram_cfg.2318286343 Jul 31 07:41:03 PM PDT 24 Jul 31 07:41:04 PM PDT 24 97765374 ps
T591 /workspace/coverage/default/3.sram_ctrl_bijection.3501482665 Jul 31 07:39:01 PM PDT 24 Jul 31 07:39:37 PM PDT 24 9064722986 ps
T592 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.1466235357 Jul 31 07:43:59 PM PDT 24 Jul 31 07:52:40 PM PDT 24 4242456293 ps
T593 /workspace/coverage/default/29.sram_ctrl_bijection.3352177093 Jul 31 07:41:11 PM PDT 24 Jul 31 07:41:57 PM PDT 24 5741832473 ps
T594 /workspace/coverage/default/31.sram_ctrl_multiple_keys.668740089 Jul 31 07:41:34 PM PDT 24 Jul 31 08:00:10 PM PDT 24 10237312776 ps
T595 /workspace/coverage/default/24.sram_ctrl_max_throughput.2863640131 Jul 31 07:40:38 PM PDT 24 Jul 31 07:40:41 PM PDT 24 127909247 ps
T596 /workspace/coverage/default/38.sram_ctrl_smoke.3481086128 Jul 31 07:42:21 PM PDT 24 Jul 31 07:42:34 PM PDT 24 1444331931 ps
T597 /workspace/coverage/default/3.sram_ctrl_stress_all.1267838931 Jul 31 07:39:02 PM PDT 24 Jul 31 08:07:18 PM PDT 24 56998653007 ps
T598 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.4051729768 Jul 31 07:38:53 PM PDT 24 Jul 31 07:44:34 PM PDT 24 13530891039 ps
T599 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.2242534498 Jul 31 07:41:02 PM PDT 24 Jul 31 07:42:30 PM PDT 24 2401891584 ps
T600 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.2758414214 Jul 31 07:38:51 PM PDT 24 Jul 31 07:41:32 PM PDT 24 1678493133 ps
T601 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.4130082931 Jul 31 07:41:21 PM PDT 24 Jul 31 07:43:54 PM PDT 24 3394535761 ps
T602 /workspace/coverage/default/34.sram_ctrl_mem_walk.2096750954 Jul 31 07:41:52 PM PDT 24 Jul 31 07:41:58 PM PDT 24 236105619 ps
T603 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.1436755834 Jul 31 07:39:01 PM PDT 24 Jul 31 07:44:55 PM PDT 24 14146583792 ps
T604 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2090525951 Jul 31 07:42:54 PM PDT 24 Jul 31 07:45:05 PM PDT 24 1899288172 ps
T605 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.3721527990 Jul 31 07:39:48 PM PDT 24 Jul 31 07:39:52 PM PDT 24 97486420 ps
T606 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1733207105 Jul 31 07:41:01 PM PDT 24 Jul 31 07:41:02 PM PDT 24 89543784 ps
T607 /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.2815476522 Jul 31 07:38:56 PM PDT 24 Jul 31 07:39:15 PM PDT 24 496900481 ps
T608 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.3686338444 Jul 31 07:39:51 PM PDT 24 Jul 31 07:46:03 PM PDT 24 4649953142 ps
T609 /workspace/coverage/default/46.sram_ctrl_ram_cfg.2571824065 Jul 31 07:43:57 PM PDT 24 Jul 31 07:43:58 PM PDT 24 94798775 ps
T610 /workspace/coverage/default/43.sram_ctrl_multiple_keys.3546060902 Jul 31 07:43:13 PM PDT 24 Jul 31 07:56:29 PM PDT 24 44138102765 ps
T611 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.373342443 Jul 31 07:39:31 PM PDT 24 Jul 31 07:43:57 PM PDT 24 14703235257 ps
T612 /workspace/coverage/default/11.sram_ctrl_smoke.3497555519 Jul 31 07:39:21 PM PDT 24 Jul 31 07:39:24 PM PDT 24 212594159 ps
T613 /workspace/coverage/default/2.sram_ctrl_smoke.594751587 Jul 31 07:38:49 PM PDT 24 Jul 31 07:39:48 PM PDT 24 101860404 ps
T614 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.2932201281 Jul 31 07:42:24 PM PDT 24 Jul 31 07:42:29 PM PDT 24 166399322 ps
T615 /workspace/coverage/default/35.sram_ctrl_stress_all.3919470050 Jul 31 07:42:04 PM PDT 24 Jul 31 09:05:10 PM PDT 24 14468149100 ps
T616 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3245284631 Jul 31 07:40:36 PM PDT 24 Jul 31 07:40:37 PM PDT 24 71544520 ps
T617 /workspace/coverage/default/20.sram_ctrl_smoke.1323109628 Jul 31 07:40:09 PM PDT 24 Jul 31 07:40:24 PM PDT 24 905430345 ps
T618 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1135687689 Jul 31 07:43:54 PM PDT 24 Jul 31 07:49:41 PM PDT 24 7050755521 ps
T619 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.3544208666 Jul 31 07:44:17 PM PDT 24 Jul 31 07:47:07 PM PDT 24 6112988882 ps
T620 /workspace/coverage/default/29.sram_ctrl_mem_walk.338086285 Jul 31 07:41:25 PM PDT 24 Jul 31 07:41:31 PM PDT 24 1206629964 ps
T621 /workspace/coverage/default/22.sram_ctrl_alert_test.1622122211 Jul 31 07:40:40 PM PDT 24 Jul 31 07:40:41 PM PDT 24 16009149 ps
T622 /workspace/coverage/default/4.sram_ctrl_mem_walk.2551784977 Jul 31 07:38:57 PM PDT 24 Jul 31 07:39:02 PM PDT 24 825145523 ps
T623 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2418708857 Jul 31 07:43:31 PM PDT 24 Jul 31 07:46:27 PM PDT 24 3961493129 ps
T624 /workspace/coverage/default/30.sram_ctrl_max_throughput.2526459697 Jul 31 07:41:21 PM PDT 24 Jul 31 07:41:23 PM PDT 24 45402932 ps
T625 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3437907081 Jul 31 07:39:10 PM PDT 24 Jul 31 07:39:12 PM PDT 24 49787369 ps
T126 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2951247894 Jul 31 07:43:50 PM PDT 24 Jul 31 07:44:39 PM PDT 24 3428550998 ps
T626 /workspace/coverage/default/12.sram_ctrl_max_throughput.1343050469 Jul 31 07:39:27 PM PDT 24 Jul 31 07:39:29 PM PDT 24 143927256 ps
T627 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.4032805261 Jul 31 07:41:03 PM PDT 24 Jul 31 07:45:33 PM PDT 24 3078969827 ps
T628 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.591655979 Jul 31 07:39:01 PM PDT 24 Jul 31 07:43:32 PM PDT 24 5610598898 ps
T629 /workspace/coverage/default/41.sram_ctrl_bijection.3529806207 Jul 31 07:42:54 PM PDT 24 Jul 31 07:43:10 PM PDT 24 253771169 ps
T630 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.455633946 Jul 31 07:42:27 PM PDT 24 Jul 31 07:54:14 PM PDT 24 6490307264 ps
T631 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3091137436 Jul 31 07:41:31 PM PDT 24 Jul 31 07:43:13 PM PDT 24 8701890942 ps
T632 /workspace/coverage/default/3.sram_ctrl_lc_escalation.3904995467 Jul 31 07:38:59 PM PDT 24 Jul 31 07:39:03 PM PDT 24 816932171 ps
T17 /workspace/coverage/default/4.sram_ctrl_sec_cm.3688797390 Jul 31 07:38:59 PM PDT 24 Jul 31 07:39:01 PM PDT 24 251926258 ps
T633 /workspace/coverage/default/9.sram_ctrl_mem_walk.3755793482 Jul 31 07:39:19 PM PDT 24 Jul 31 07:39:28 PM PDT 24 145756141 ps
T634 /workspace/coverage/default/26.sram_ctrl_partial_access.965041433 Jul 31 07:40:51 PM PDT 24 Jul 31 07:41:05 PM PDT 24 552267007 ps
T635 /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1890921769 Jul 31 07:39:10 PM PDT 24 Jul 31 07:40:20 PM PDT 24 200729983 ps
T636 /workspace/coverage/default/45.sram_ctrl_mem_walk.3429248443 Jul 31 07:43:44 PM PDT 24 Jul 31 07:43:55 PM PDT 24 1708290752 ps
T637 /workspace/coverage/default/26.sram_ctrl_alert_test.2503442744 Jul 31 07:41:02 PM PDT 24 Jul 31 07:41:03 PM PDT 24 42151010 ps
T638 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.3409339402 Jul 31 07:42:29 PM PDT 24 Jul 31 07:46:14 PM PDT 24 2641305637 ps
T639 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.1411313598 Jul 31 07:42:50 PM PDT 24 Jul 31 07:45:29 PM PDT 24 6284597763 ps
T640 /workspace/coverage/default/48.sram_ctrl_alert_test.516109184 Jul 31 07:44:16 PM PDT 24 Jul 31 07:44:17 PM PDT 24 200075408 ps
T641 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3222309545 Jul 31 07:43:32 PM PDT 24 Jul 31 07:43:59 PM PDT 24 180346606 ps
T642 /workspace/coverage/default/37.sram_ctrl_smoke.4083254027 Jul 31 07:42:17 PM PDT 24 Jul 31 07:42:54 PM PDT 24 425207520 ps
T643 /workspace/coverage/default/17.sram_ctrl_max_throughput.1940969441 Jul 31 07:39:56 PM PDT 24 Jul 31 07:40:06 PM PDT 24 316991971 ps
T644 /workspace/coverage/default/29.sram_ctrl_ram_cfg.3801956286 Jul 31 07:41:21 PM PDT 24 Jul 31 07:41:22 PM PDT 24 127900392 ps
T645 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.564440004 Jul 31 07:39:15 PM PDT 24 Jul 31 07:55:52 PM PDT 24 18732928197 ps
T646 /workspace/coverage/default/48.sram_ctrl_lc_escalation.690183649 Jul 31 07:44:09 PM PDT 24 Jul 31 07:44:15 PM PDT 24 865735009 ps
T647 /workspace/coverage/default/29.sram_ctrl_executable.921280065 Jul 31 07:41:22 PM PDT 24 Jul 31 08:02:14 PM PDT 24 33032669938 ps
T648 /workspace/coverage/default/44.sram_ctrl_executable.2139449169 Jul 31 07:43:37 PM PDT 24 Jul 31 08:01:23 PM PDT 24 94347710171 ps
T649 /workspace/coverage/default/36.sram_ctrl_regwen.2687245902 Jul 31 07:42:12 PM PDT 24 Jul 31 08:01:59 PM PDT 24 12372639447 ps
T650 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3138727147 Jul 31 07:38:58 PM PDT 24 Jul 31 07:42:27 PM PDT 24 8563433918 ps
T651 /workspace/coverage/default/43.sram_ctrl_stress_all.1548786109 Jul 31 07:43:31 PM PDT 24 Jul 31 08:09:51 PM PDT 24 5965992006 ps
T652 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.91955055 Jul 31 07:41:03 PM PDT 24 Jul 31 07:44:02 PM PDT 24 24485598878 ps
T653 /workspace/coverage/default/19.sram_ctrl_max_throughput.327499730 Jul 31 07:40:10 PM PDT 24 Jul 31 07:40:36 PM PDT 24 86545055 ps
T654 /workspace/coverage/default/20.sram_ctrl_partial_access.3154700232 Jul 31 07:40:16 PM PDT 24 Jul 31 07:41:30 PM PDT 24 247488425 ps
T655 /workspace/coverage/default/22.sram_ctrl_max_throughput.3730220319 Jul 31 07:40:30 PM PDT 24 Jul 31 07:40:40 PM PDT 24 64802028 ps
T656 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.871051817 Jul 31 07:42:10 PM PDT 24 Jul 31 07:46:27 PM PDT 24 19739459827 ps
T657 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.358626034 Jul 31 07:39:02 PM PDT 24 Jul 31 07:44:45 PM PDT 24 102617178835 ps
T658 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.3546537982 Jul 31 07:43:31 PM PDT 24 Jul 31 08:17:15 PM PDT 24 10406934804 ps
T659 /workspace/coverage/default/8.sram_ctrl_mem_walk.4017570314 Jul 31 07:39:16 PM PDT 24 Jul 31 07:39:21 PM PDT 24 376817717 ps
T660 /workspace/coverage/default/41.sram_ctrl_smoke.346391412 Jul 31 07:42:55 PM PDT 24 Jul 31 07:43:01 PM PDT 24 289388802 ps
T661 /workspace/coverage/default/33.sram_ctrl_regwen.2665752637 Jul 31 07:41:51 PM PDT 24 Jul 31 08:11:49 PM PDT 24 42454365970 ps
T662 /workspace/coverage/default/26.sram_ctrl_mem_walk.285890657 Jul 31 07:41:00 PM PDT 24 Jul 31 07:41:10 PM PDT 24 359138892 ps
T663 /workspace/coverage/default/5.sram_ctrl_bijection.1099127876 Jul 31 07:38:59 PM PDT 24 Jul 31 07:39:54 PM PDT 24 819970286 ps
T664 /workspace/coverage/default/36.sram_ctrl_stress_all.736745622 Jul 31 07:42:16 PM PDT 24 Jul 31 08:26:26 PM PDT 24 11553299804 ps
T665 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.2513806062 Jul 31 07:43:14 PM PDT 24 Jul 31 07:47:02 PM PDT 24 9317799683 ps
T666 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.1045275414 Jul 31 07:40:38 PM PDT 24 Jul 31 07:44:06 PM PDT 24 8411617022 ps
T667 /workspace/coverage/default/35.sram_ctrl_regwen.1242661238 Jul 31 07:42:04 PM PDT 24 Jul 31 07:58:57 PM PDT 24 18799720674 ps
T668 /workspace/coverage/default/36.sram_ctrl_lc_escalation.1611498883 Jul 31 07:42:11 PM PDT 24 Jul 31 07:42:14 PM PDT 24 175863850 ps
T669 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.3458306893 Jul 31 07:41:49 PM PDT 24 Jul 31 07:41:53 PM PDT 24 1913066433 ps
T670 /workspace/coverage/default/14.sram_ctrl_regwen.204019504 Jul 31 07:39:44 PM PDT 24 Jul 31 08:07:37 PM PDT 24 102039341196 ps
T671 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.3140587678 Jul 31 07:40:08 PM PDT 24 Jul 31 07:43:07 PM PDT 24 13445750224 ps
T672 /workspace/coverage/default/35.sram_ctrl_partial_access.3128728484 Jul 31 07:42:05 PM PDT 24 Jul 31 07:42:14 PM PDT 24 170955331 ps
T673 /workspace/coverage/default/4.sram_ctrl_executable.168626709 Jul 31 07:39:00 PM PDT 24 Jul 31 07:40:51 PM PDT 24 5794039967 ps
T674 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1453826758 Jul 31 07:38:56 PM PDT 24 Jul 31 07:38:57 PM PDT 24 117739779 ps
T675 /workspace/coverage/default/13.sram_ctrl_stress_all.2660945647 Jul 31 07:39:36 PM PDT 24 Jul 31 07:57:03 PM PDT 24 16947492159 ps
T676 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.4003855707 Jul 31 07:41:33 PM PDT 24 Jul 31 07:45:45 PM PDT 24 48669599323 ps
T677 /workspace/coverage/default/32.sram_ctrl_smoke.3259887347 Jul 31 07:41:32 PM PDT 24 Jul 31 07:41:45 PM PDT 24 141147240 ps
T678 /workspace/coverage/default/14.sram_ctrl_mem_partial_access.3811753481 Jul 31 07:39:42 PM PDT 24 Jul 31 07:39:48 PM PDT 24 949572801 ps
T679 /workspace/coverage/default/41.sram_ctrl_executable.4067048841 Jul 31 07:43:02 PM PDT 24 Jul 31 07:52:42 PM PDT 24 6199679871 ps
T680 /workspace/coverage/default/13.sram_ctrl_regwen.272191619 Jul 31 07:39:35 PM PDT 24 Jul 31 07:46:01 PM PDT 24 5294166549 ps
T681 /workspace/coverage/default/13.sram_ctrl_smoke.2052549995 Jul 31 07:39:29 PM PDT 24 Jul 31 07:40:09 PM PDT 24 3254384088 ps
T682 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3923100237 Jul 31 07:39:13 PM PDT 24 Jul 31 07:39:44 PM PDT 24 213046478 ps
T683 /workspace/coverage/default/2.sram_ctrl_alert_test.611229867 Jul 31 07:39:01 PM PDT 24 Jul 31 07:39:02 PM PDT 24 49203639 ps
T684 /workspace/coverage/default/36.sram_ctrl_ram_cfg.62651167 Jul 31 07:42:11 PM PDT 24 Jul 31 07:42:12 PM PDT 24 92762767 ps
T685 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1153362536 Jul 31 07:40:37 PM PDT 24 Jul 31 07:45:36 PM PDT 24 3074608817 ps
T686 /workspace/coverage/default/21.sram_ctrl_access_during_key_req.4259493293 Jul 31 07:40:21 PM PDT 24 Jul 31 07:46:37 PM PDT 24 1996668017 ps
T687 /workspace/coverage/default/5.sram_ctrl_partial_access.890598941 Jul 31 07:38:57 PM PDT 24 Jul 31 07:39:09 PM PDT 24 822287023 ps
T688 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.2855688858 Jul 31 07:40:10 PM PDT 24 Jul 31 07:40:13 PM PDT 24 103780420 ps
T689 /workspace/coverage/default/5.sram_ctrl_max_throughput.1214575936 Jul 31 07:39:00 PM PDT 24 Jul 31 07:39:02 PM PDT 24 42168108 ps
T690 /workspace/coverage/default/23.sram_ctrl_smoke.1125722119 Jul 31 07:40:41 PM PDT 24 Jul 31 07:40:46 PM PDT 24 340255230 ps
T691 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1049732834 Jul 31 07:41:21 PM PDT 24 Jul 31 07:43:41 PM PDT 24 151478886 ps
T692 /workspace/coverage/default/5.sram_ctrl_executable.1516374317 Jul 31 07:39:02 PM PDT 24 Jul 31 08:02:00 PM PDT 24 7814416682 ps
T693 /workspace/coverage/default/10.sram_ctrl_stress_all.3476119572 Jul 31 07:39:19 PM PDT 24 Jul 31 07:57:51 PM PDT 24 59850310333 ps
T694 /workspace/coverage/default/39.sram_ctrl_regwen.1163134409 Jul 31 07:42:37 PM PDT 24 Jul 31 08:03:23 PM PDT 24 3192531545 ps
T695 /workspace/coverage/default/39.sram_ctrl_partial_access.2271844775 Jul 31 07:42:38 PM PDT 24 Jul 31 07:44:14 PM PDT 24 195627164 ps
T696 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3626830720 Jul 31 07:39:16 PM PDT 24 Jul 31 07:43:57 PM PDT 24 3697823511 ps
T697 /workspace/coverage/default/35.sram_ctrl_mem_walk.2739692728 Jul 31 07:42:08 PM PDT 24 Jul 31 07:42:18 PM PDT 24 467692507 ps
T698 /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2041915651 Jul 31 07:39:27 PM PDT 24 Jul 31 07:41:36 PM PDT 24 1328052593 ps
T699 /workspace/coverage/default/39.sram_ctrl_mem_walk.2649354325 Jul 31 07:42:42 PM PDT 24 Jul 31 07:42:53 PM PDT 24 1691796129 ps
T700 /workspace/coverage/default/30.sram_ctrl_bijection.2677873670 Jul 31 07:41:21 PM PDT 24 Jul 31 07:42:38 PM PDT 24 4160057915 ps
T701 /workspace/coverage/default/6.sram_ctrl_stress_all.915460573 Jul 31 07:39:10 PM PDT 24 Jul 31 09:08:32 PM PDT 24 62328466303 ps
T702 /workspace/coverage/default/11.sram_ctrl_multiple_keys.3377993789 Jul 31 07:39:21 PM PDT 24 Jul 31 07:51:49 PM PDT 24 12230700662 ps
T703 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1760379978 Jul 31 07:43:21 PM PDT 24 Jul 31 07:44:34 PM PDT 24 467943817 ps
T704 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2534482056 Jul 31 07:41:32 PM PDT 24 Jul 31 07:41:45 PM PDT 24 83821019 ps
T705 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.2769324196 Jul 31 07:44:07 PM PDT 24 Jul 31 07:50:23 PM PDT 24 19343177482 ps
T706 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2308264236 Jul 31 07:39:48 PM PDT 24 Jul 31 07:46:13 PM PDT 24 52131692228 ps
T707 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.736084606 Jul 31 07:38:51 PM PDT 24 Jul 31 07:40:09 PM PDT 24 5255578673 ps
T708 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3331188160 Jul 31 07:39:32 PM PDT 24 Jul 31 07:40:40 PM PDT 24 1266550987 ps
T709 /workspace/coverage/default/21.sram_ctrl_ram_cfg.3608672836 Jul 31 07:40:24 PM PDT 24 Jul 31 07:40:25 PM PDT 24 86067062 ps
T710 /workspace/coverage/default/18.sram_ctrl_access_during_key_req.3537130865 Jul 31 07:40:02 PM PDT 24 Jul 31 07:58:59 PM PDT 24 2626356247 ps
T711 /workspace/coverage/default/27.sram_ctrl_partial_access.3712761149 Jul 31 07:41:01 PM PDT 24 Jul 31 07:41:12 PM PDT 24 5160804176 ps
T712 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.3021872349 Jul 31 07:40:46 PM PDT 24 Jul 31 07:40:49 PM PDT 24 109985329 ps
T713 /workspace/coverage/default/24.sram_ctrl_multiple_keys.1276149990 Jul 31 07:40:37 PM PDT 24 Jul 31 08:08:15 PM PDT 24 14371799326 ps
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T715 /workspace/coverage/default/18.sram_ctrl_partial_access.2210353060 Jul 31 07:40:02 PM PDT 24 Jul 31 07:41:05 PM PDT 24 1718299463 ps
T716 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.824023156 Jul 31 07:39:58 PM PDT 24 Jul 31 07:41:45 PM PDT 24 1204744947 ps
T717 /workspace/coverage/default/49.sram_ctrl_ram_cfg.1408680231 Jul 31 07:44:21 PM PDT 24 Jul 31 07:44:22 PM PDT 24 75865797 ps
T718 /workspace/coverage/default/39.sram_ctrl_max_throughput.2429037916 Jul 31 07:42:35 PM PDT 24 Jul 31 07:43:35 PM PDT 24 141602070 ps
T719 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.2747153232 Jul 31 07:39:13 PM PDT 24 Jul 31 07:42:13 PM PDT 24 3378323936 ps
T720 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.1161319812 Jul 31 07:39:49 PM PDT 24 Jul 31 07:40:21 PM PDT 24 434263462 ps
T721 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.2174372288 Jul 31 07:39:56 PM PDT 24 Jul 31 07:58:38 PM PDT 24 21320417253 ps
T722 /workspace/coverage/default/40.sram_ctrl_regwen.2210735246 Jul 31 07:43:00 PM PDT 24 Jul 31 07:46:40 PM PDT 24 6275869789 ps
T723 /workspace/coverage/default/0.sram_ctrl_bijection.139652374 Jul 31 07:38:50 PM PDT 24 Jul 31 07:39:30 PM PDT 24 2099126525 ps
T724 /workspace/coverage/default/2.sram_ctrl_regwen.1600430494 Jul 31 07:38:51 PM PDT 24 Jul 31 08:10:43 PM PDT 24 25845305782 ps
T725 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.858916904 Jul 31 07:41:41 PM PDT 24 Jul 31 08:01:19 PM PDT 24 3414082826 ps
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T728 /workspace/coverage/default/13.sram_ctrl_ram_cfg.4150020284 Jul 31 07:39:36 PM PDT 24 Jul 31 07:39:37 PM PDT 24 51056707 ps
T729 /workspace/coverage/default/26.sram_ctrl_multiple_keys.2731943241 Jul 31 07:40:52 PM PDT 24 Jul 31 08:07:45 PM PDT 24 8599678849 ps
T730 /workspace/coverage/default/13.sram_ctrl_multiple_keys.3156151037 Jul 31 07:39:27 PM PDT 24 Jul 31 08:01:28 PM PDT 24 78356231186 ps
T731 /workspace/coverage/default/16.sram_ctrl_alert_test.2255380400 Jul 31 07:39:55 PM PDT 24 Jul 31 07:39:56 PM PDT 24 12902849 ps
T732 /workspace/coverage/default/23.sram_ctrl_regwen.3673488204 Jul 31 07:40:36 PM PDT 24 Jul 31 07:49:10 PM PDT 24 14120306793 ps
T733 /workspace/coverage/default/33.sram_ctrl_multiple_keys.3144915214 Jul 31 07:41:42 PM PDT 24 Jul 31 07:51:19 PM PDT 24 11255441848 ps
T734 /workspace/coverage/default/48.sram_ctrl_partial_access.381354850 Jul 31 07:44:08 PM PDT 24 Jul 31 07:44:24 PM PDT 24 286794012 ps
T735 /workspace/coverage/default/42.sram_ctrl_access_during_key_req.2928113466 Jul 31 07:43:07 PM PDT 24 Jul 31 07:50:29 PM PDT 24 1625215859 ps
T736 /workspace/coverage/default/30.sram_ctrl_executable.2766313668 Jul 31 07:41:21 PM PDT 24 Jul 31 07:59:21 PM PDT 24 11058439154 ps
T737 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3500696711 Jul 31 07:38:50 PM PDT 24 Jul 31 07:45:04 PM PDT 24 36664745492 ps
T738 /workspace/coverage/default/47.sram_ctrl_smoke.3442970646 Jul 31 07:43:55 PM PDT 24 Jul 31 07:45:44 PM PDT 24 513388435 ps
T739 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2684915499 Jul 31 07:40:15 PM PDT 24 Jul 31 07:49:45 PM PDT 24 91200393202 ps
T740 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.732528114 Jul 31 07:38:48 PM PDT 24 Jul 31 07:45:11 PM PDT 24 4071681397 ps
T741 /workspace/coverage/default/22.sram_ctrl_mem_walk.2853602462 Jul 31 07:40:31 PM PDT 24 Jul 31 07:40:39 PM PDT 24 140438955 ps
T742 /workspace/coverage/default/24.sram_ctrl_mem_walk.1673815832 Jul 31 07:40:44 PM PDT 24 Jul 31 07:40:49 PM PDT 24 476017198 ps
T743 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.1421578398 Jul 31 07:41:32 PM PDT 24 Jul 31 07:41:35 PM PDT 24 99134630 ps
T744 /workspace/coverage/default/6.sram_ctrl_alert_test.3697419211 Jul 31 07:39:07 PM PDT 24 Jul 31 07:39:08 PM PDT 24 11664069 ps
T745 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.2737967310 Jul 31 07:40:15 PM PDT 24 Jul 31 07:41:50 PM PDT 24 518591780 ps
T746 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.789360075 Jul 31 07:39:55 PM PDT 24 Jul 31 07:40:00 PM PDT 24 2015821008 ps
T747 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.313483251 Jul 31 07:44:20 PM PDT 24 Jul 31 07:44:39 PM PDT 24 93259829 ps
T748 /workspace/coverage/default/36.sram_ctrl_bijection.256792227 Jul 31 07:42:12 PM PDT 24 Jul 31 07:42:36 PM PDT 24 359353178 ps
T749 /workspace/coverage/default/45.sram_ctrl_ram_cfg.1652544970 Jul 31 07:43:44 PM PDT 24 Jul 31 07:43:45 PM PDT 24 91333344 ps
T750 /workspace/coverage/default/23.sram_ctrl_lc_escalation.2042114564 Jul 31 07:40:36 PM PDT 24 Jul 31 07:40:41 PM PDT 24 1516994022 ps
T751 /workspace/coverage/default/16.sram_ctrl_lc_escalation.3657068140 Jul 31 07:39:51 PM PDT 24 Jul 31 07:39:58 PM PDT 24 466507092 ps
T752 /workspace/coverage/default/15.sram_ctrl_bijection.3004579163 Jul 31 07:39:40 PM PDT 24 Jul 31 07:40:15 PM PDT 24 1146768438 ps
T753 /workspace/coverage/default/11.sram_ctrl_regwen.1508165570 Jul 31 07:39:27 PM PDT 24 Jul 31 08:01:00 PM PDT 24 5625457443 ps
T754 /workspace/coverage/default/36.sram_ctrl_executable.1362484326 Jul 31 07:42:09 PM PDT 24 Jul 31 07:49:13 PM PDT 24 4852852340 ps
T755 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.1546243054 Jul 31 07:41:33 PM PDT 24 Jul 31 07:42:08 PM PDT 24 1591277363 ps
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T758 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2265607923 Jul 31 07:38:43 PM PDT 24 Jul 31 07:45:02 PM PDT 24 61301167900 ps
T759 /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1757107122 Jul 31 07:39:13 PM PDT 24 Jul 31 07:40:49 PM PDT 24 6116706045 ps
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T127 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.3907985826 Jul 31 07:40:11 PM PDT 24 Jul 31 07:40:50 PM PDT 24 1881171271 ps
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T762 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.1760919131 Jul 31 07:39:29 PM PDT 24 Jul 31 07:39:34 PM PDT 24 1153120293 ps
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T764 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3257660504 Jul 31 07:39:19 PM PDT 24 Jul 31 07:39:26 PM PDT 24 1661201329 ps
T765 /workspace/coverage/default/26.sram_ctrl_mem_partial_access.1883198173 Jul 31 07:41:04 PM PDT 24 Jul 31 07:41:10 PM PDT 24 702588464 ps
T766 /workspace/coverage/default/6.sram_ctrl_executable.2067192949 Jul 31 07:39:16 PM PDT 24 Jul 31 07:57:28 PM PDT 24 1918445768 ps
T767 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.4184392805 Jul 31 07:42:47 PM PDT 24 Jul 31 07:48:50 PM PDT 24 211512619765 ps
T768 /workspace/coverage/default/27.sram_ctrl_stress_all.1962253819 Jul 31 07:41:02 PM PDT 24 Jul 31 09:26:08 PM PDT 24 16835172878 ps
T769 /workspace/coverage/default/41.sram_ctrl_alert_test.3390655607 Jul 31 07:43:09 PM PDT 24 Jul 31 07:43:10 PM PDT 24 55333952 ps
T770 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.156996503 Jul 31 07:38:57 PM PDT 24 Jul 31 07:56:40 PM PDT 24 14422459106 ps
T771 /workspace/coverage/default/35.sram_ctrl_lc_escalation.1506434531 Jul 31 07:42:02 PM PDT 24 Jul 31 07:42:09 PM PDT 24 1218102392 ps
T772 /workspace/coverage/default/17.sram_ctrl_executable.2223616784 Jul 31 07:39:57 PM PDT 24 Jul 31 07:57:58 PM PDT 24 3800883480 ps
T773 /workspace/coverage/default/20.sram_ctrl_stress_all.3240878542 Jul 31 07:40:14 PM PDT 24 Jul 31 08:15:50 PM PDT 24 179439130297 ps
T774 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3316109172 Jul 31 07:41:10 PM PDT 24 Jul 31 07:47:41 PM PDT 24 5214061295 ps
T775 /workspace/coverage/default/22.sram_ctrl_regwen.1581922526 Jul 31 07:40:30 PM PDT 24 Jul 31 08:08:21 PM PDT 24 8720268669 ps
T776 /workspace/coverage/default/43.sram_ctrl_bijection.789411572 Jul 31 07:43:14 PM PDT 24 Jul 31 07:43:45 PM PDT 24 2767532607 ps
T777 /workspace/coverage/default/21.sram_ctrl_mem_walk.2992234871 Jul 31 07:40:21 PM PDT 24 Jul 31 07:40:26 PM PDT 24 73507422 ps
T778 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.2369425207 Jul 31 07:39:35 PM PDT 24 Jul 31 07:43:36 PM PDT 24 712934331 ps
T779 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3970736720 Jul 31 07:40:38 PM PDT 24 Jul 31 07:40:44 PM PDT 24 148050961 ps
T780 /workspace/coverage/default/9.sram_ctrl_regwen.2949884737 Jul 31 07:39:12 PM PDT 24 Jul 31 07:56:35 PM PDT 24 19004940187 ps
T781 /workspace/coverage/default/13.sram_ctrl_alert_test.2532248853 Jul 31 07:39:38 PM PDT 24 Jul 31 07:39:39 PM PDT 24 15359867 ps
T782 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.4074005121 Jul 31 07:40:01 PM PDT 24 Jul 31 07:47:10 PM PDT 24 7241513601 ps
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T784 /workspace/coverage/default/22.sram_ctrl_smoke.1626058431 Jul 31 07:40:32 PM PDT 24 Jul 31 07:40:37 PM PDT 24 45025689 ps
T785 /workspace/coverage/default/3.sram_ctrl_partial_access.2590330773 Jul 31 07:38:58 PM PDT 24 Jul 31 07:39:06 PM PDT 24 649497009 ps
T786 /workspace/coverage/default/1.sram_ctrl_max_throughput.1827291900 Jul 31 07:38:49 PM PDT 24 Jul 31 07:40:06 PM PDT 24 2278025651 ps
T787 /workspace/coverage/default/40.sram_ctrl_smoke.2135074559 Jul 31 07:42:49 PM PDT 24 Jul 31 07:43:00 PM PDT 24 733220669 ps
T788 /workspace/coverage/default/46.sram_ctrl_multiple_keys.2097907223 Jul 31 07:43:57 PM PDT 24 Jul 31 07:58:47 PM PDT 24 7202359485 ps
T789 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.885117330 Jul 31 07:40:53 PM PDT 24 Jul 31 07:41:55 PM PDT 24 2548041033 ps
T790 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.2050058970 Jul 31 07:39:27 PM PDT 24 Jul 31 07:48:40 PM PDT 24 1828155206 ps
T791 /workspace/coverage/default/44.sram_ctrl_alert_test.575655555 Jul 31 07:43:37 PM PDT 24 Jul 31 07:43:38 PM PDT 24 22047591 ps
T792 /workspace/coverage/default/1.sram_ctrl_multiple_keys.493002038 Jul 31 07:38:42 PM PDT 24 Jul 31 07:45:45 PM PDT 24 4821878387 ps
T793 /workspace/coverage/default/0.sram_ctrl_regwen.1503314294 Jul 31 07:38:51 PM PDT 24 Jul 31 07:42:52 PM PDT 24 12236542312 ps
T794 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.1073468489 Jul 31 07:39:18 PM PDT 24 Jul 31 07:45:16 PM PDT 24 9886687645 ps
T795 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.2576992733 Jul 31 07:39:01 PM PDT 24 Jul 31 07:48:43 PM PDT 24 1664357932 ps
T796 /workspace/coverage/default/20.sram_ctrl_max_throughput.2072282651 Jul 31 07:40:17 PM PDT 24 Jul 31 07:41:35 PM PDT 24 1453958325 ps
T797 /workspace/coverage/default/25.sram_ctrl_ram_cfg.1020325537 Jul 31 07:40:46 PM PDT 24 Jul 31 07:40:47 PM PDT 24 56059969 ps
T798 /workspace/coverage/default/12.sram_ctrl_multiple_keys.2796539368 Jul 31 07:39:29 PM PDT 24 Jul 31 07:44:51 PM PDT 24 762170567 ps
T799 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.200564049 Jul 31 07:42:11 PM PDT 24 Jul 31 07:42:30 PM PDT 24 163414991 ps
T800 /workspace/coverage/default/27.sram_ctrl_bijection.2094085483 Jul 31 07:41:02 PM PDT 24 Jul 31 07:42:14 PM PDT 24 12722776646 ps
T801 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3343433726 Jul 31 07:41:43 PM PDT 24 Jul 31 07:47:29 PM PDT 24 4815024118 ps
T802 /workspace/coverage/default/45.sram_ctrl_multiple_keys.3082640711 Jul 31 07:43:38 PM PDT 24 Jul 31 08:02:18 PM PDT 24 13502179240 ps
T803 /workspace/coverage/default/31.sram_ctrl_bijection.476463204 Jul 31 07:41:30 PM PDT 24 Jul 31 07:42:57 PM PDT 24 22513859513 ps
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