Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1026
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
77.58 77.58 92.29 92.29 81.16 81.16 92.65 92.65 23.81 23.81 83.09 83.09 93.66 93.66 76.42 76.42 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3158541187
89.47 11.88 97.20 4.92 84.48 3.32 92.68 0.03 90.48 66.67 90.58 7.49 94.25 0.59 76.60 0.18 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.2889276667
93.26 3.79 98.73 1.53 87.68 3.20 93.93 1.25 100.00 9.52 93.96 3.38 94.40 0.15 84.10 7.50 /workspace/coverage/default/48.sram_ctrl_stress_all.2489646852
94.29 1.03 98.90 0.17 88.51 0.83 94.14 0.21 100.00 0.00 94.69 0.72 94.40 0.00 89.40 5.30 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.4152444987
95.06 0.77 98.90 0.00 88.51 0.00 96.98 2.84 100.00 0.00 94.93 0.24 96.17 1.77 89.95 0.55 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.2834726215
95.77 0.71 99.07 0.17 90.28 1.78 97.75 0.76 100.00 0.00 95.65 0.72 96.76 0.59 90.86 0.91 /workspace/coverage/default/4.sram_ctrl_sec_cm.754795804
96.17 0.40 99.07 0.00 90.52 0.24 97.75 0.00 100.00 0.00 95.65 0.00 96.76 0.00 93.42 2.56 /workspace/coverage/default/35.sram_ctrl_stress_all.3500045665
96.42 0.26 99.07 0.00 90.52 0.00 97.75 0.00 100.00 0.00 95.65 0.00 96.90 0.15 95.06 1.65 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3483553667
96.64 0.21 99.07 0.00 90.52 0.00 98.51 0.76 100.00 0.00 95.65 0.00 96.90 0.00 95.80 0.73 /workspace/coverage/default/24.sram_ctrl_stress_all.3373155880
96.83 0.20 99.07 0.00 90.52 0.00 98.58 0.07 100.00 0.00 95.65 0.00 98.23 1.33 95.80 0.00 /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.296256230
97.03 0.19 99.07 0.00 90.64 0.12 98.58 0.00 100.00 0.00 96.14 0.48 98.97 0.74 95.80 0.00 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.777201583
97.16 0.13 99.15 0.08 90.64 0.00 99.41 0.83 100.00 0.00 96.14 0.00 98.97 0.00 95.80 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3193136781
97.24 0.08 99.15 0.00 91.00 0.36 99.62 0.21 100.00 0.00 96.14 0.00 98.97 0.00 95.80 0.00 /workspace/coverage/default/31.sram_ctrl_alert_test.1270456809
97.32 0.08 99.15 0.00 91.00 0.00 99.62 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.34 0.55 /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3375243771
97.38 0.07 99.15 0.00 91.00 0.00 99.72 0.10 100.00 0.00 96.14 0.00 98.97 0.00 96.71 0.37 /workspace/coverage/default/22.sram_ctrl_regwen.295506430
97.44 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 98.97 0.00 97.07 0.37 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1469527100
97.48 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.26 0.18 /workspace/coverage/default/0.sram_ctrl_executable.3121482111
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.485479002


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3225326092
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1926392114
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.630760867
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1416392080
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2972951736
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3522252303
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2888742514
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3280815951
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3777420670
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.2341936141
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1785308822
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3395675668
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2541001004
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3946432402
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2469768597
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1964884671
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3901660850
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.4249810318
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3744787802
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.4105464273
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.793086528
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.3533729761
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.823916250
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1515634684
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1779496814
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3464446617
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2206226517
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4095677628
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.4253360883
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3674924079
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.321970847
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.2247173687
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3096422213
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3195868266
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3990056706
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1318674169
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2483357153
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3270318677
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.520702686
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3211426143
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1494664539
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.452911810
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.646799274
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2230870697
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2914384662
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.482681840
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3698845285
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1567161171
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2556176583
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3435247660
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2628655609
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.1879737815
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.2667419234
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3791789311
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.1709199796
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.1653249894
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.758970063
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2483314051
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2916815941
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1522194477
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.2990875382
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3956204374
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3315317761
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1039992832
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3039875181
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1914267413
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.21482833
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.4265886146
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4158628353
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3239338781
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3878567047
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2194746771
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2775203250
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.598769298
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3349050879
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.492921188
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.150859357
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1802014880
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2621303164
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.286489334
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3314245579
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2527579817
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1312992731
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.365699638
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3146854541
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1311573927
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.240443287
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3826799075
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3176291294
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2792202849
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.1829713435
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.955382614
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1112769704
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.579507312
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.38654959
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.4066425232
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1831501919
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2089569743
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.650627653
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.1091596849
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1560111363
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2499455563
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2936876218
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2478727653
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3076573316
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.1847099007
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3236919528
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.203823174
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3681194068
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3049804975
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2547002543
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.3107265244
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.574849814
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.360487711
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.2218329742
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.859017973
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1361377646
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.1322824326
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1829850563
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3788411963
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1178926165
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.1351511680
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3557009471
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.931462745
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.4041262142
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1515402742
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3227634442
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3784732019
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1107045724
/workspace/coverage/default/0.sram_ctrl_alert_test.130913282
/workspace/coverage/default/0.sram_ctrl_bijection.1448745275
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3128998209
/workspace/coverage/default/0.sram_ctrl_max_throughput.2838277615
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1790436216
/workspace/coverage/default/0.sram_ctrl_mem_walk.2062890363
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2515119649
/workspace/coverage/default/0.sram_ctrl_partial_access.2110462951
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.4178889607
/workspace/coverage/default/0.sram_ctrl_regwen.848810193
/workspace/coverage/default/0.sram_ctrl_sec_cm.751718124
/workspace/coverage/default/0.sram_ctrl_smoke.1122389665
/workspace/coverage/default/0.sram_ctrl_stress_all.2930405511
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3429715348
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.3494227017
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2870380630
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.115417491
/workspace/coverage/default/1.sram_ctrl_alert_test.3292186609
/workspace/coverage/default/1.sram_ctrl_bijection.2615696018
/workspace/coverage/default/1.sram_ctrl_executable.3411376014
/workspace/coverage/default/1.sram_ctrl_lc_escalation.762223804
/workspace/coverage/default/1.sram_ctrl_max_throughput.2506527113
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1089950460
/workspace/coverage/default/1.sram_ctrl_mem_walk.3240230111
/workspace/coverage/default/1.sram_ctrl_multiple_keys.2401445935
/workspace/coverage/default/1.sram_ctrl_partial_access.2114055752
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.79779560
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3125006801
/workspace/coverage/default/1.sram_ctrl_regwen.267921499
/workspace/coverage/default/1.sram_ctrl_sec_cm.3948899995
/workspace/coverage/default/1.sram_ctrl_smoke.1077763472
/workspace/coverage/default/1.sram_ctrl_stress_all.3525587460
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1898533681
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2380638034
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2709215793
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1445057604
/workspace/coverage/default/10.sram_ctrl_alert_test.2628874371
/workspace/coverage/default/10.sram_ctrl_bijection.3370480796
/workspace/coverage/default/10.sram_ctrl_executable.580604809
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3105637777
/workspace/coverage/default/10.sram_ctrl_max_throughput.2418890594
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.420342475
/workspace/coverage/default/10.sram_ctrl_mem_walk.3346121646
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3011661959
/workspace/coverage/default/10.sram_ctrl_partial_access.1339616489
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.409259546
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1480524824
/workspace/coverage/default/10.sram_ctrl_regwen.3141026709
/workspace/coverage/default/10.sram_ctrl_smoke.1587999247
/workspace/coverage/default/10.sram_ctrl_stress_all.4163302584
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3100060555
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3986280338
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3595545494
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2065095148
/workspace/coverage/default/11.sram_ctrl_alert_test.1297657620
/workspace/coverage/default/11.sram_ctrl_bijection.2966275690
/workspace/coverage/default/11.sram_ctrl_executable.3996605109
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1388364487
/workspace/coverage/default/11.sram_ctrl_max_throughput.1215259493
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.558449019
/workspace/coverage/default/11.sram_ctrl_mem_walk.3693674779
/workspace/coverage/default/11.sram_ctrl_multiple_keys.1350412646
/workspace/coverage/default/11.sram_ctrl_partial_access.4161933692
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1364038072
/workspace/coverage/default/11.sram_ctrl_regwen.3420563439
/workspace/coverage/default/11.sram_ctrl_smoke.629704137
/workspace/coverage/default/11.sram_ctrl_stress_all.1276137104
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.814951042
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2333559881
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2449446353
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1489045033
/workspace/coverage/default/12.sram_ctrl_alert_test.3513582037
/workspace/coverage/default/12.sram_ctrl_bijection.1806379016
/workspace/coverage/default/12.sram_ctrl_executable.2844777961
/workspace/coverage/default/12.sram_ctrl_lc_escalation.1257290641
/workspace/coverage/default/12.sram_ctrl_max_throughput.451426648
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.442830504
/workspace/coverage/default/12.sram_ctrl_mem_walk.2284826476
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1302279141
/workspace/coverage/default/12.sram_ctrl_partial_access.447956767
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.874910522
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/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3006060649
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2573299529
/workspace/coverage/default/43.sram_ctrl_regwen.3797107027
/workspace/coverage/default/43.sram_ctrl_smoke.620368154
/workspace/coverage/default/43.sram_ctrl_stress_all.2137734717
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1459800359
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3336350568
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.242323341
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.4029854380
/workspace/coverage/default/44.sram_ctrl_alert_test.391519396
/workspace/coverage/default/44.sram_ctrl_bijection.3730507220
/workspace/coverage/default/44.sram_ctrl_executable.3244435782
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3211495159
/workspace/coverage/default/44.sram_ctrl_max_throughput.1447028502
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.2576104099
/workspace/coverage/default/44.sram_ctrl_mem_walk.172005415
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1421623049
/workspace/coverage/default/44.sram_ctrl_partial_access.3460169217
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.86868337
/workspace/coverage/default/44.sram_ctrl_ram_cfg.636393181
/workspace/coverage/default/44.sram_ctrl_regwen.2041893734
/workspace/coverage/default/44.sram_ctrl_smoke.3372505932
/workspace/coverage/default/44.sram_ctrl_stress_all.1673864950
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2819093569
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.215040006
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.227210411
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3518782831
/workspace/coverage/default/45.sram_ctrl_alert_test.1612166947
/workspace/coverage/default/45.sram_ctrl_bijection.3611998789
/workspace/coverage/default/45.sram_ctrl_executable.2430752123
/workspace/coverage/default/45.sram_ctrl_lc_escalation.619762203
/workspace/coverage/default/45.sram_ctrl_max_throughput.1256741785
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2818720831
/workspace/coverage/default/45.sram_ctrl_mem_walk.2806742930
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3778197904
/workspace/coverage/default/45.sram_ctrl_partial_access.3540886909
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2728088027
/workspace/coverage/default/45.sram_ctrl_ram_cfg.1978076716
/workspace/coverage/default/45.sram_ctrl_regwen.830747839
/workspace/coverage/default/45.sram_ctrl_smoke.2235562052
/workspace/coverage/default/45.sram_ctrl_stress_all.2843897924
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1228115311
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2939416423
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4070275765
/workspace/coverage/default/46.sram_ctrl_alert_test.3337883517
/workspace/coverage/default/46.sram_ctrl_bijection.3371345380
/workspace/coverage/default/46.sram_ctrl_executable.4289718231
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1366050515
/workspace/coverage/default/46.sram_ctrl_max_throughput.1193998546
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.4058686418
/workspace/coverage/default/46.sram_ctrl_mem_walk.775437268
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1361460494
/workspace/coverage/default/46.sram_ctrl_partial_access.1604738553
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1904726001
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2874608320
/workspace/coverage/default/46.sram_ctrl_regwen.4292267702
/workspace/coverage/default/46.sram_ctrl_smoke.1207293631
/workspace/coverage/default/46.sram_ctrl_stress_all.2070780249
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3915239674
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.2457047852
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2365163095
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2667195116
/workspace/coverage/default/47.sram_ctrl_alert_test.3248975959
/workspace/coverage/default/47.sram_ctrl_bijection.3338853386
/workspace/coverage/default/47.sram_ctrl_executable.4090102939
/workspace/coverage/default/47.sram_ctrl_lc_escalation.39570350
/workspace/coverage/default/47.sram_ctrl_max_throughput.1515493691
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.630663975
/workspace/coverage/default/47.sram_ctrl_mem_walk.3338117432
/workspace/coverage/default/47.sram_ctrl_multiple_keys.1198165430
/workspace/coverage/default/47.sram_ctrl_partial_access.4063529084
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1874054972
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2004985922
/workspace/coverage/default/47.sram_ctrl_regwen.2156991285
/workspace/coverage/default/47.sram_ctrl_smoke.845315613
/workspace/coverage/default/47.sram_ctrl_stress_all.2704745433
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.136774735
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1150363564
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2034577250
/workspace/coverage/default/48.sram_ctrl_alert_test.592207595
/workspace/coverage/default/48.sram_ctrl_bijection.3772231305
/workspace/coverage/default/48.sram_ctrl_executable.3586078958
/workspace/coverage/default/48.sram_ctrl_lc_escalation.362041608
/workspace/coverage/default/48.sram_ctrl_max_throughput.2910051395
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2824335970
/workspace/coverage/default/48.sram_ctrl_mem_walk.3015309615
/workspace/coverage/default/48.sram_ctrl_multiple_keys.438060616
/workspace/coverage/default/48.sram_ctrl_partial_access.4200511872
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2616754611
/workspace/coverage/default/48.sram_ctrl_ram_cfg.912746147
/workspace/coverage/default/48.sram_ctrl_regwen.2311818198
/workspace/coverage/default/48.sram_ctrl_smoke.1848244974
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.217277878
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3616298443
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.503129754
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3398798145
/workspace/coverage/default/49.sram_ctrl_alert_test.1591722441
/workspace/coverage/default/49.sram_ctrl_bijection.2021609624
/workspace/coverage/default/49.sram_ctrl_executable.3750523691
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3279587375
/workspace/coverage/default/49.sram_ctrl_max_throughput.3038559242
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.722830026
/workspace/coverage/default/49.sram_ctrl_mem_walk.4270267116
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1633800211
/workspace/coverage/default/49.sram_ctrl_partial_access.2258476443
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.546250124
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3040092702
/workspace/coverage/default/49.sram_ctrl_regwen.184980129
/workspace/coverage/default/49.sram_ctrl_smoke.1846905056
/workspace/coverage/default/49.sram_ctrl_stress_all.164311693
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1994026596
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.300543953
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3105098021
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1304846247
/workspace/coverage/default/5.sram_ctrl_alert_test.1281020241
/workspace/coverage/default/5.sram_ctrl_bijection.3593865795
/workspace/coverage/default/5.sram_ctrl_executable.4226995586
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2225184930
/workspace/coverage/default/5.sram_ctrl_max_throughput.3094660716
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2749793447
/workspace/coverage/default/5.sram_ctrl_mem_walk.3888072271
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4268353656
/workspace/coverage/default/5.sram_ctrl_partial_access.541322930
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3975721578
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3924287415
/workspace/coverage/default/5.sram_ctrl_regwen.3286689115
/workspace/coverage/default/5.sram_ctrl_smoke.3355719191
/workspace/coverage/default/5.sram_ctrl_stress_all.1034893049
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.1585629682
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.335112854
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1836415269
/workspace/coverage/default/6.sram_ctrl_alert_test.3321622423
/workspace/coverage/default/6.sram_ctrl_bijection.4258395790
/workspace/coverage/default/6.sram_ctrl_executable.1027893132
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2703709474
/workspace/coverage/default/6.sram_ctrl_max_throughput.1979968986
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2864574968
/workspace/coverage/default/6.sram_ctrl_mem_walk.3727193527
/workspace/coverage/default/6.sram_ctrl_multiple_keys.579677927
/workspace/coverage/default/6.sram_ctrl_partial_access.3180724964
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.761788821
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3447292942
/workspace/coverage/default/6.sram_ctrl_regwen.2887511283
/workspace/coverage/default/6.sram_ctrl_smoke.1468608324
/workspace/coverage/default/6.sram_ctrl_stress_all.261828013
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.629449466
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1626002175
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.334393348
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.3805099077
/workspace/coverage/default/7.sram_ctrl_alert_test.3927825090
/workspace/coverage/default/7.sram_ctrl_bijection.3153822966
/workspace/coverage/default/7.sram_ctrl_executable.433932234
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2456442277
/workspace/coverage/default/7.sram_ctrl_max_throughput.2867865339
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2983894098
/workspace/coverage/default/7.sram_ctrl_mem_walk.421712949
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1571277625
/workspace/coverage/default/7.sram_ctrl_partial_access.752106339
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.965162114
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1267966326
/workspace/coverage/default/7.sram_ctrl_regwen.2029671974
/workspace/coverage/default/7.sram_ctrl_smoke.1645778118
/workspace/coverage/default/7.sram_ctrl_stress_all.1229675668
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.3977431644
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.2714427729
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3475956170
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3003929548
/workspace/coverage/default/8.sram_ctrl_alert_test.1812399777
/workspace/coverage/default/8.sram_ctrl_bijection.248849349
/workspace/coverage/default/8.sram_ctrl_executable.1600617954
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3611993309
/workspace/coverage/default/8.sram_ctrl_max_throughput.2753686606
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2924201731
/workspace/coverage/default/8.sram_ctrl_mem_walk.2810373932
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3720649196
/workspace/coverage/default/8.sram_ctrl_partial_access.2670988858
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2516636062
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2959500885
/workspace/coverage/default/8.sram_ctrl_regwen.2913783748
/workspace/coverage/default/8.sram_ctrl_smoke.3290390634
/workspace/coverage/default/8.sram_ctrl_stress_all.1835094816
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2648883491
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.4154088528
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2372955979
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.79824172
/workspace/coverage/default/9.sram_ctrl_alert_test.2763502325
/workspace/coverage/default/9.sram_ctrl_bijection.1939263114
/workspace/coverage/default/9.sram_ctrl_executable.1866206102
/workspace/coverage/default/9.sram_ctrl_lc_escalation.495993367
/workspace/coverage/default/9.sram_ctrl_max_throughput.3641920644
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3164984663
/workspace/coverage/default/9.sram_ctrl_mem_walk.3942235386
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2060943447
/workspace/coverage/default/9.sram_ctrl_partial_access.2393115633
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2970481864
/workspace/coverage/default/9.sram_ctrl_ram_cfg.832844724
/workspace/coverage/default/9.sram_ctrl_regwen.557535888
/workspace/coverage/default/9.sram_ctrl_smoke.329081836
/workspace/coverage/default/9.sram_ctrl_stress_all.1742010760
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2530177798
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.287529954
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3430537491




Total test records in report: 1026
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/45.sram_ctrl_bijection.3611998789 Aug 01 06:38:12 PM PDT 24 Aug 01 06:38:38 PM PDT 24 1625037638 ps
T2 /workspace/coverage/default/3.sram_ctrl_max_throughput.158569816 Aug 01 06:32:14 PM PDT 24 Aug 01 06:34:15 PM PDT 24 263500299 ps
T3 /workspace/coverage/default/0.sram_ctrl_executable.3121482111 Aug 01 06:32:17 PM PDT 24 Aug 01 06:50:22 PM PDT 24 56430183437 ps
T4 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1228115311 Aug 01 06:38:11 PM PDT 24 Aug 01 06:43:42 PM PDT 24 14599020203 ps
T5 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3158541187 Aug 01 06:38:38 PM PDT 24 Aug 01 06:39:48 PM PDT 24 1096171961 ps
T11 /workspace/coverage/default/38.sram_ctrl_alert_test.2560614037 Aug 01 06:36:38 PM PDT 24 Aug 01 06:36:39 PM PDT 24 30329357 ps
T12 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2365163095 Aug 01 06:38:22 PM PDT 24 Aug 01 06:39:08 PM PDT 24 479112652 ps
T6 /workspace/coverage/default/49.sram_ctrl_smoke.1846905056 Aug 01 06:39:01 PM PDT 24 Aug 01 06:39:02 PM PDT 24 40041213 ps
T7 /workspace/coverage/default/27.sram_ctrl_mem_partial_access.2834726215 Aug 01 06:34:00 PM PDT 24 Aug 01 06:34:04 PM PDT 24 91583332 ps
T13 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2094775387 Aug 01 06:36:13 PM PDT 24 Aug 01 06:36:16 PM PDT 24 69855511 ps
T19 /workspace/coverage/default/42.sram_ctrl_bijection.1767748618 Aug 01 06:37:24 PM PDT 24 Aug 01 06:37:59 PM PDT 24 7798710710 ps
T22 /workspace/coverage/default/15.sram_ctrl_regwen.2475846500 Aug 01 06:32:56 PM PDT 24 Aug 01 06:41:00 PM PDT 24 49596712987 ps
T24 /workspace/coverage/default/31.sram_ctrl_ram_cfg.3187215924 Aug 01 06:34:48 PM PDT 24 Aug 01 06:34:50 PM PDT 24 183620512 ps
T39 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.3115204800 Aug 01 06:35:39 PM PDT 24 Aug 01 06:42:19 PM PDT 24 1242165133 ps
T20 /workspace/coverage/default/29.sram_ctrl_regwen.711181589 Aug 01 06:34:19 PM PDT 24 Aug 01 06:46:53 PM PDT 24 14747966130 ps
T8 /workspace/coverage/default/25.sram_ctrl_lc_escalation.1027426870 Aug 01 06:33:36 PM PDT 24 Aug 01 06:33:46 PM PDT 24 1024670690 ps
T52 /workspace/coverage/default/43.sram_ctrl_partial_access.586334993 Aug 01 06:37:36 PM PDT 24 Aug 01 06:37:48 PM PDT 24 300463634 ps
T53 /workspace/coverage/default/1.sram_ctrl_partial_access.2114055752 Aug 01 06:32:13 PM PDT 24 Aug 01 06:33:09 PM PDT 24 1204695126 ps
T54 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1169512069 Aug 01 06:32:48 PM PDT 24 Aug 01 06:32:52 PM PDT 24 174066028 ps
T71 /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.1909780456 Aug 01 06:34:36 PM PDT 24 Aug 01 06:34:37 PM PDT 24 67778037 ps
T72 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.1086675412 Aug 01 06:33:35 PM PDT 24 Aug 01 06:33:41 PM PDT 24 602650803 ps
T14 /workspace/coverage/default/31.sram_ctrl_alert_test.1270456809 Aug 01 06:34:57 PM PDT 24 Aug 01 06:34:58 PM PDT 24 26126270 ps
T21 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.3615211266 Aug 01 06:36:24 PM PDT 24 Aug 01 06:38:42 PM PDT 24 450854804 ps
T38 /workspace/coverage/default/26.sram_ctrl_partial_access.810338513 Aug 01 06:33:57 PM PDT 24 Aug 01 06:34:22 PM PDT 24 751201780 ps
T40 /workspace/coverage/default/26.sram_ctrl_access_during_key_req.2266905808 Aug 01 06:33:48 PM PDT 24 Aug 01 07:01:27 PM PDT 24 19903929108 ps
T97 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.79779560 Aug 01 06:32:13 PM PDT 24 Aug 01 06:39:53 PM PDT 24 36061308115 ps
T139 /workspace/coverage/default/48.sram_ctrl_partial_access.4200511872 Aug 01 06:38:47 PM PDT 24 Aug 01 06:39:05 PM PDT 24 4479633885 ps
T9 /workspace/coverage/default/48.sram_ctrl_stress_all.2489646852 Aug 01 06:39:01 PM PDT 24 Aug 01 07:37:17 PM PDT 24 42027951619 ps
T140 /workspace/coverage/default/36.sram_ctrl_partial_access.2938652902 Aug 01 06:36:03 PM PDT 24 Aug 01 06:37:37 PM PDT 24 1338291279 ps
T60 /workspace/coverage/default/22.sram_ctrl_regwen.295506430 Aug 01 06:33:22 PM PDT 24 Aug 01 06:53:10 PM PDT 24 32116028757 ps
T15 /workspace/coverage/default/20.sram_ctrl_alert_test.3831835348 Aug 01 06:33:10 PM PDT 24 Aug 01 06:33:11 PM PDT 24 66095064 ps
T98 /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.2203519910 Aug 01 06:32:10 PM PDT 24 Aug 01 06:37:11 PM PDT 24 4184818538 ps
T42 /workspace/coverage/default/24.sram_ctrl_mem_walk.3674203069 Aug 01 06:33:36 PM PDT 24 Aug 01 06:33:46 PM PDT 24 444474863 ps
T131 /workspace/coverage/default/19.sram_ctrl_executable.1674054957 Aug 01 06:33:05 PM PDT 24 Aug 01 06:38:11 PM PDT 24 97934659771 ps
T64 /workspace/coverage/default/19.sram_ctrl_regwen.2458568900 Aug 01 06:33:02 PM PDT 24 Aug 01 06:40:38 PM PDT 24 10365172774 ps
T137 /workspace/coverage/default/9.sram_ctrl_mem_walk.3942235386 Aug 01 06:32:38 PM PDT 24 Aug 01 06:32:47 PM PDT 24 569595636 ps
T141 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3844358692 Aug 01 06:32:59 PM PDT 24 Aug 01 06:33:59 PM PDT 24 129819267 ps
T138 /workspace/coverage/default/19.sram_ctrl_partial_access.239640894 Aug 01 06:32:58 PM PDT 24 Aug 01 06:33:16 PM PDT 24 972414477 ps
T65 /workspace/coverage/default/36.sram_ctrl_regwen.1570698798 Aug 01 06:36:22 PM PDT 24 Aug 01 06:42:19 PM PDT 24 976562606 ps
T25 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3193136781 Aug 01 06:32:19 PM PDT 24 Aug 01 06:32:20 PM PDT 24 45656158 ps
T142 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.1746206052 Aug 01 06:36:03 PM PDT 24 Aug 01 06:36:04 PM PDT 24 38908890 ps
T23 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.217277878 Aug 01 06:39:02 PM PDT 24 Aug 01 06:48:58 PM PDT 24 2735058942 ps
T99 /workspace/coverage/default/47.sram_ctrl_stress_pipeline.136774735 Aug 01 06:38:22 PM PDT 24 Aug 01 06:45:01 PM PDT 24 5881938617 ps
T50 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1898533681 Aug 01 06:32:10 PM PDT 24 Aug 01 06:41:12 PM PDT 24 6201419681 ps
T132 /workspace/coverage/default/5.sram_ctrl_executable.4226995586 Aug 01 06:32:23 PM PDT 24 Aug 01 06:52:15 PM PDT 24 28919364450 ps
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T10 /workspace/coverage/default/16.sram_ctrl_lc_escalation.3638918147 Aug 01 06:32:53 PM PDT 24 Aug 01 06:33:01 PM PDT 24 1781104055 ps
T100 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3483553667 Aug 01 06:32:45 PM PDT 24 Aug 01 06:37:40 PM PDT 24 12966478733 ps
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T101 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2736643209 Aug 01 06:32:49 PM PDT 24 Aug 01 06:36:07 PM PDT 24 2076000811 ps
T145 /workspace/coverage/default/33.sram_ctrl_executable.2381800488 Aug 01 06:35:31 PM PDT 24 Aug 01 06:40:06 PM PDT 24 14590807134 ps
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T133 /workspace/coverage/default/39.sram_ctrl_executable.780569428 Aug 01 06:36:57 PM PDT 24 Aug 01 06:38:19 PM PDT 24 7510805390 ps
T68 /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3741927956 Aug 01 06:33:12 PM PDT 24 Aug 01 06:34:16 PM PDT 24 2166311193 ps
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T113 /workspace/coverage/default/4.sram_ctrl_max_throughput.3368661026 Aug 01 06:32:19 PM PDT 24 Aug 01 06:32:22 PM PDT 24 174712054 ps
T114 /workspace/coverage/default/26.sram_ctrl_max_throughput.1809429040 Aug 01 06:33:59 PM PDT 24 Aug 01 06:35:45 PM PDT 24 269945848 ps
T115 /workspace/coverage/default/23.sram_ctrl_bijection.2407249531 Aug 01 06:33:21 PM PDT 24 Aug 01 06:33:58 PM PDT 24 14613834249 ps
T116 /workspace/coverage/default/49.sram_ctrl_max_throughput.3038559242 Aug 01 06:39:00 PM PDT 24 Aug 01 06:39:15 PM PDT 24 67458195 ps
T49 /workspace/coverage/default/34.sram_ctrl_mem_walk.2837070190 Aug 01 06:35:38 PM PDT 24 Aug 01 06:35:51 PM PDT 24 2635975439 ps
T102 /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.3393038791 Aug 01 06:35:56 PM PDT 24 Aug 01 06:41:27 PM PDT 24 58879737711 ps
T87 /workspace/coverage/default/40.sram_ctrl_access_during_key_req.4035104554 Aug 01 06:37:02 PM PDT 24 Aug 01 06:57:19 PM PDT 24 6092125153 ps
T117 /workspace/coverage/default/25.sram_ctrl_executable.4227370155 Aug 01 06:33:49 PM PDT 24 Aug 01 06:40:32 PM PDT 24 17761234783 ps
T70 /workspace/coverage/default/48.sram_ctrl_lc_escalation.362041608 Aug 01 06:38:49 PM PDT 24 Aug 01 06:38:54 PM PDT 24 1540425045 ps
T147 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1198899285 Aug 01 06:32:13 PM PDT 24 Aug 01 06:32:14 PM PDT 24 114714684 ps
T148 /workspace/coverage/default/39.sram_ctrl_max_throughput.2527328421 Aug 01 06:36:39 PM PDT 24 Aug 01 06:36:45 PM PDT 24 56104476 ps
T149 /workspace/coverage/default/43.sram_ctrl_max_throughput.750827678 Aug 01 06:37:36 PM PDT 24 Aug 01 06:38:31 PM PDT 24 542092608 ps
T150 /workspace/coverage/default/15.sram_ctrl_smoke.1666102370 Aug 01 06:32:57 PM PDT 24 Aug 01 06:35:21 PM PDT 24 482937692 ps
T151 /workspace/coverage/default/37.sram_ctrl_partial_access.226019338 Aug 01 06:36:13 PM PDT 24 Aug 01 06:36:27 PM PDT 24 258996334 ps
T152 /workspace/coverage/default/41.sram_ctrl_alert_test.3583046887 Aug 01 06:37:23 PM PDT 24 Aug 01 06:37:24 PM PDT 24 12802820 ps
T48 /workspace/coverage/default/6.sram_ctrl_mem_partial_access.2864574968 Aug 01 06:32:24 PM PDT 24 Aug 01 06:32:27 PM PDT 24 189371306 ps
T153 /workspace/coverage/default/33.sram_ctrl_multiple_keys.24654051 Aug 01 06:35:20 PM PDT 24 Aug 01 06:39:07 PM PDT 24 14506948281 ps
T154 /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3595545494 Aug 01 06:32:33 PM PDT 24 Aug 01 06:33:37 PM PDT 24 462817141 ps
T155 /workspace/coverage/default/44.sram_ctrl_max_throughput.1447028502 Aug 01 06:38:00 PM PDT 24 Aug 01 06:38:01 PM PDT 24 146814775 ps
T103 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.3498531149 Aug 01 06:33:50 PM PDT 24 Aug 01 06:36:59 PM PDT 24 6997020689 ps
T88 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.14119860 Aug 01 06:33:50 PM PDT 24 Aug 01 07:04:06 PM PDT 24 10963256119 ps
T156 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.357993647 Aug 01 06:33:23 PM PDT 24 Aug 01 06:34:53 PM PDT 24 478930713 ps
T104 /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.86868337 Aug 01 06:37:59 PM PDT 24 Aug 01 06:46:25 PM PDT 24 38230951155 ps
T157 /workspace/coverage/default/7.sram_ctrl_smoke.1645778118 Aug 01 06:32:23 PM PDT 24 Aug 01 06:32:30 PM PDT 24 102865224 ps
T16 /workspace/coverage/default/4.sram_ctrl_sec_cm.754795804 Aug 01 06:32:24 PM PDT 24 Aug 01 06:32:26 PM PDT 24 452093469 ps
T29 /workspace/coverage/default/5.sram_ctrl_stress_all.1034893049 Aug 01 06:32:23 PM PDT 24 Aug 01 08:26:48 PM PDT 24 33461350241 ps
T30 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.2889276667 Aug 01 06:36:38 PM PDT 24 Aug 01 06:36:44 PM PDT 24 201888400 ps
T31 /workspace/coverage/default/40.sram_ctrl_bijection.1609147718 Aug 01 06:36:57 PM PDT 24 Aug 01 06:38:12 PM PDT 24 6624232888 ps
T32 /workspace/coverage/default/22.sram_ctrl_lc_escalation.657817152 Aug 01 06:33:14 PM PDT 24 Aug 01 06:33:19 PM PDT 24 362159115 ps
T33 /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.269431023 Aug 01 06:33:12 PM PDT 24 Aug 01 06:33:35 PM PDT 24 98703532 ps
T34 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.442830504 Aug 01 06:32:54 PM PDT 24 Aug 01 06:33:00 PM PDT 24 716026362 ps
T35 /workspace/coverage/default/27.sram_ctrl_mem_walk.874300201 Aug 01 06:33:57 PM PDT 24 Aug 01 06:34:10 PM PDT 24 596460504 ps
T36 /workspace/coverage/default/9.sram_ctrl_smoke.329081836 Aug 01 06:32:42 PM PDT 24 Aug 01 06:32:57 PM PDT 24 307442136 ps
T37 /workspace/coverage/default/46.sram_ctrl_regwen.4292267702 Aug 01 06:38:24 PM PDT 24 Aug 01 06:39:02 PM PDT 24 636876840 ps
T158 /workspace/coverage/default/3.sram_ctrl_mem_walk.530734129 Aug 01 06:32:14 PM PDT 24 Aug 01 06:32:20 PM PDT 24 295264152 ps
T159 /workspace/coverage/default/3.sram_ctrl_stress_all.238789309 Aug 01 06:32:16 PM PDT 24 Aug 01 07:00:43 PM PDT 24 119872250649 ps
T135 /workspace/coverage/default/37.sram_ctrl_regwen.4139277046 Aug 01 06:36:27 PM PDT 24 Aug 01 07:08:43 PM PDT 24 4086296888 ps
T136 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1953603668 Aug 01 06:35:39 PM PDT 24 Aug 01 06:44:21 PM PDT 24 23334116386 ps
T160 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.115417491 Aug 01 06:32:13 PM PDT 24 Aug 01 06:45:01 PM PDT 24 14826718148 ps
T161 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.3986280338 Aug 01 06:32:35 PM PDT 24 Aug 01 06:37:41 PM PDT 24 3246366701 ps
T162 /workspace/coverage/default/41.sram_ctrl_max_throughput.1463977110 Aug 01 06:37:13 PM PDT 24 Aug 01 06:38:00 PM PDT 24 95003319 ps
T163 /workspace/coverage/default/27.sram_ctrl_partial_access.1222025296 Aug 01 06:33:59 PM PDT 24 Aug 01 06:35:15 PM PDT 24 721967317 ps
T164 /workspace/coverage/default/16.sram_ctrl_mem_walk.2648585449 Aug 01 06:32:57 PM PDT 24 Aug 01 06:33:03 PM PDT 24 333694985 ps
T165 /workspace/coverage/default/38.sram_ctrl_partial_access.581415541 Aug 01 06:36:28 PM PDT 24 Aug 01 06:36:48 PM PDT 24 181459294 ps
T166 /workspace/coverage/default/8.sram_ctrl_alert_test.1812399777 Aug 01 06:32:46 PM PDT 24 Aug 01 06:32:47 PM PDT 24 29448845 ps
T167 /workspace/coverage/default/14.sram_ctrl_alert_test.194635428 Aug 01 06:32:55 PM PDT 24 Aug 01 06:32:56 PM PDT 24 22317638 ps
T168 /workspace/coverage/default/41.sram_ctrl_multiple_keys.1014958118 Aug 01 06:37:13 PM PDT 24 Aug 01 06:58:50 PM PDT 24 73110578175 ps
T169 /workspace/coverage/default/0.sram_ctrl_bijection.1448745275 Aug 01 06:32:02 PM PDT 24 Aug 01 06:32:24 PM PDT 24 321598245 ps
T134 /workspace/coverage/default/24.sram_ctrl_stress_all.3373155880 Aug 01 06:33:35 PM PDT 24 Aug 01 07:13:55 PM PDT 24 10078870723 ps
T170 /workspace/coverage/default/5.sram_ctrl_bijection.3593865795 Aug 01 06:32:23 PM PDT 24 Aug 01 06:33:51 PM PDT 24 11072397059 ps
T171 /workspace/coverage/default/29.sram_ctrl_mem_walk.2407537515 Aug 01 06:34:21 PM PDT 24 Aug 01 06:34:26 PM PDT 24 116455534 ps
T172 /workspace/coverage/default/6.sram_ctrl_mem_walk.3727193527 Aug 01 06:32:26 PM PDT 24 Aug 01 06:32:32 PM PDT 24 237376298 ps
T173 /workspace/coverage/default/9.sram_ctrl_bijection.1939263114 Aug 01 06:32:40 PM PDT 24 Aug 01 06:33:19 PM PDT 24 1844115119 ps
T174 /workspace/coverage/default/48.sram_ctrl_multiple_keys.438060616 Aug 01 06:38:56 PM PDT 24 Aug 01 07:04:13 PM PDT 24 13602599056 ps
T175 /workspace/coverage/default/18.sram_ctrl_max_throughput.1057344995 Aug 01 06:33:04 PM PDT 24 Aug 01 06:35:49 PM PDT 24 136389037 ps
T176 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.2905431750 Aug 01 06:32:50 PM PDT 24 Aug 01 06:38:44 PM PDT 24 9377894743 ps
T177 /workspace/coverage/default/38.sram_ctrl_executable.1311360451 Aug 01 06:36:38 PM PDT 24 Aug 01 06:45:31 PM PDT 24 10126450500 ps
T178 /workspace/coverage/default/31.sram_ctrl_bijection.3308039780 Aug 01 06:34:51 PM PDT 24 Aug 01 06:35:21 PM PDT 24 6563596212 ps
T179 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.1627684236 Aug 01 06:35:30 PM PDT 24 Aug 01 06:38:19 PM PDT 24 1771877997 ps
T180 /workspace/coverage/default/4.sram_ctrl_regwen.4276338929 Aug 01 06:32:19 PM PDT 24 Aug 01 06:43:07 PM PDT 24 9846746094 ps
T181 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.4029854380 Aug 01 06:37:57 PM PDT 24 Aug 01 06:40:11 PM PDT 24 3495247762 ps
T182 /workspace/coverage/default/0.sram_ctrl_partial_access.2110462951 Aug 01 06:32:11 PM PDT 24 Aug 01 06:32:14 PM PDT 24 216479489 ps
T183 /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.2364642448 Aug 01 06:32:52 PM PDT 24 Aug 01 06:37:20 PM PDT 24 14802190005 ps
T184 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.2039370210 Aug 01 06:34:19 PM PDT 24 Aug 01 06:35:21 PM PDT 24 443638602 ps
T185 /workspace/coverage/default/36.sram_ctrl_alert_test.3908664094 Aug 01 06:36:24 PM PDT 24 Aug 01 06:36:24 PM PDT 24 80956362 ps
T186 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.3226056836 Aug 01 06:32:48 PM PDT 24 Aug 01 06:35:37 PM PDT 24 149103621 ps
T187 /workspace/coverage/default/47.sram_ctrl_mem_walk.3338117432 Aug 01 06:38:34 PM PDT 24 Aug 01 06:38:44 PM PDT 24 855693382 ps
T188 /workspace/coverage/default/23.sram_ctrl_smoke.2648073345 Aug 01 06:33:34 PM PDT 24 Aug 01 06:35:42 PM PDT 24 2421710646 ps
T119 /workspace/coverage/default/17.sram_ctrl_lc_escalation.946253850 Aug 01 06:33:01 PM PDT 24 Aug 01 06:33:07 PM PDT 24 1148979999 ps
T189 /workspace/coverage/default/32.sram_ctrl_smoke.3113913438 Aug 01 06:35:02 PM PDT 24 Aug 01 06:35:21 PM PDT 24 1136082005 ps
T190 /workspace/coverage/default/23.sram_ctrl_partial_access.3750874310 Aug 01 06:33:33 PM PDT 24 Aug 01 06:33:54 PM PDT 24 4977743804 ps
T191 /workspace/coverage/default/31.sram_ctrl_lc_escalation.1807100765 Aug 01 06:34:53 PM PDT 24 Aug 01 06:35:00 PM PDT 24 912116159 ps
T192 /workspace/coverage/default/43.sram_ctrl_lc_escalation.877050484 Aug 01 06:37:44 PM PDT 24 Aug 01 06:37:51 PM PDT 24 687802389 ps
T193 /workspace/coverage/default/11.sram_ctrl_multiple_keys.1350412646 Aug 01 06:32:39 PM PDT 24 Aug 01 06:50:37 PM PDT 24 12259842193 ps
T194 /workspace/coverage/default/2.sram_ctrl_smoke.2428966522 Aug 01 06:32:14 PM PDT 24 Aug 01 06:32:23 PM PDT 24 146720107 ps
T195 /workspace/coverage/default/41.sram_ctrl_ram_cfg.1179978034 Aug 01 06:37:13 PM PDT 24 Aug 01 06:37:14 PM PDT 24 29352347 ps
T196 /workspace/coverage/default/15.sram_ctrl_max_throughput.1781963715 Aug 01 06:32:53 PM PDT 24 Aug 01 06:34:20 PM PDT 24 1710770370 ps
T197 /workspace/coverage/default/43.sram_ctrl_executable.67070993 Aug 01 06:37:44 PM PDT 24 Aug 01 06:43:18 PM PDT 24 9080236074 ps
T198 /workspace/coverage/default/7.sram_ctrl_multiple_keys.1571277625 Aug 01 06:32:27 PM PDT 24 Aug 01 06:51:34 PM PDT 24 57366777276 ps
T120 /workspace/coverage/default/35.sram_ctrl_stress_all.3500045665 Aug 01 06:35:50 PM PDT 24 Aug 01 07:26:20 PM PDT 24 247375444193 ps
T55 /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.814951042 Aug 01 06:32:46 PM PDT 24 Aug 01 06:44:20 PM PDT 24 11456574136 ps
T199 /workspace/coverage/default/34.sram_ctrl_multiple_keys.2413493217 Aug 01 06:35:31 PM PDT 24 Aug 01 06:47:25 PM PDT 24 3453564532 ps
T200 /workspace/coverage/default/43.sram_ctrl_alert_test.4194366872 Aug 01 06:37:45 PM PDT 24 Aug 01 06:37:46 PM PDT 24 18479523 ps
T201 /workspace/coverage/default/22.sram_ctrl_mem_walk.3090448651 Aug 01 06:33:24 PM PDT 24 Aug 01 06:33:31 PM PDT 24 1151122062 ps
T202 /workspace/coverage/default/48.sram_ctrl_executable.3586078958 Aug 01 06:38:48 PM PDT 24 Aug 01 07:00:09 PM PDT 24 3559435971 ps
T203 /workspace/coverage/default/41.sram_ctrl_smoke.1570723490 Aug 01 06:37:16 PM PDT 24 Aug 01 06:37:22 PM PDT 24 282588538 ps
T204 /workspace/coverage/default/44.sram_ctrl_mem_walk.172005415 Aug 01 06:37:59 PM PDT 24 Aug 01 06:38:09 PM PDT 24 372666308 ps
T205 /workspace/coverage/default/7.sram_ctrl_partial_access.752106339 Aug 01 06:32:23 PM PDT 24 Aug 01 06:32:43 PM PDT 24 1980300740 ps
T206 /workspace/coverage/default/46.sram_ctrl_max_throughput.1193998546 Aug 01 06:38:22 PM PDT 24 Aug 01 06:39:34 PM PDT 24 115646023 ps
T207 /workspace/coverage/default/22.sram_ctrl_partial_access.1899583168 Aug 01 06:33:11 PM PDT 24 Aug 01 06:33:15 PM PDT 24 621193660 ps
T208 /workspace/coverage/default/7.sram_ctrl_mem_walk.421712949 Aug 01 06:32:28 PM PDT 24 Aug 01 06:32:37 PM PDT 24 1868698961 ps
T209 /workspace/coverage/default/9.sram_ctrl_max_throughput.3641920644 Aug 01 06:32:39 PM PDT 24 Aug 01 06:32:44 PM PDT 24 95495395 ps
T210 /workspace/coverage/default/17.sram_ctrl_executable.4223592438 Aug 01 06:32:59 PM PDT 24 Aug 01 06:44:46 PM PDT 24 2578595700 ps
T211 /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1764961746 Aug 01 06:33:34 PM PDT 24 Aug 01 06:33:46 PM PDT 24 75953039 ps
T212 /workspace/coverage/default/17.sram_ctrl_multiple_keys.1263474802 Aug 01 06:32:54 PM PDT 24 Aug 01 06:49:03 PM PDT 24 2361745396 ps
T213 /workspace/coverage/default/6.sram_ctrl_partial_access.3180724964 Aug 01 06:32:28 PM PDT 24 Aug 01 06:32:33 PM PDT 24 302070885 ps
T214 /workspace/coverage/default/32.sram_ctrl_max_throughput.1560267098 Aug 01 06:35:02 PM PDT 24 Aug 01 06:36:26 PM PDT 24 111256051 ps
T215 /workspace/coverage/default/33.sram_ctrl_lc_escalation.1516969063 Aug 01 06:35:21 PM PDT 24 Aug 01 06:35:27 PM PDT 24 1526600874 ps
T216 /workspace/coverage/default/14.sram_ctrl_ram_cfg.680768243 Aug 01 06:32:51 PM PDT 24 Aug 01 06:32:51 PM PDT 24 31968106 ps
T217 /workspace/coverage/default/42.sram_ctrl_smoke.2390496182 Aug 01 06:37:27 PM PDT 24 Aug 01 06:37:35 PM PDT 24 1345339465 ps
T218 /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.2970436540 Aug 01 06:33:11 PM PDT 24 Aug 01 06:33:14 PM PDT 24 151182240 ps
T219 /workspace/coverage/default/21.sram_ctrl_alert_test.1765829628 Aug 01 06:33:12 PM PDT 24 Aug 01 06:33:13 PM PDT 24 61908263 ps
T220 /workspace/coverage/default/16.sram_ctrl_stress_pipeline.4248237560 Aug 01 06:32:52 PM PDT 24 Aug 01 06:38:40 PM PDT 24 3583053152 ps
T221 /workspace/coverage/default/7.sram_ctrl_stress_all.1229675668 Aug 01 06:32:30 PM PDT 24 Aug 01 07:29:57 PM PDT 24 13990187946 ps
T222 /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.2870380630 Aug 01 06:32:13 PM PDT 24 Aug 01 06:32:23 PM PDT 24 617596580 ps
T223 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1228864611 Aug 01 06:32:48 PM PDT 24 Aug 01 06:35:40 PM PDT 24 1907931052 ps
T224 /workspace/coverage/default/49.sram_ctrl_regwen.184980129 Aug 01 06:39:01 PM PDT 24 Aug 01 06:50:04 PM PDT 24 31180436326 ps
T225 /workspace/coverage/default/10.sram_ctrl_partial_access.1339616489 Aug 01 06:32:39 PM PDT 24 Aug 01 06:34:21 PM PDT 24 637830193 ps
T226 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.790262483 Aug 01 06:36:28 PM PDT 24 Aug 01 06:36:34 PM PDT 24 592363994 ps
T227 /workspace/coverage/default/9.sram_ctrl_lc_escalation.495993367 Aug 01 06:32:35 PM PDT 24 Aug 01 06:32:44 PM PDT 24 1520618184 ps
T228 /workspace/coverage/default/33.sram_ctrl_ram_cfg.1973815351 Aug 01 06:35:32 PM PDT 24 Aug 01 06:35:32 PM PDT 24 30203775 ps
T229 /workspace/coverage/default/2.sram_ctrl_regwen.178469390 Aug 01 06:32:21 PM PDT 24 Aug 01 06:40:01 PM PDT 24 5841109415 ps
T230 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.3992070441 Aug 01 06:33:03 PM PDT 24 Aug 01 06:33:06 PM PDT 24 89037723 ps
T231 /workspace/coverage/default/29.sram_ctrl_alert_test.157615113 Aug 01 06:34:19 PM PDT 24 Aug 01 06:34:20 PM PDT 24 20281430 ps
T232 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.315233796 Aug 01 06:33:10 PM PDT 24 Aug 01 06:33:14 PM PDT 24 55759174 ps
T233 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.3453695854 Aug 01 06:35:21 PM PDT 24 Aug 01 06:37:17 PM PDT 24 263206658 ps
T234 /workspace/coverage/default/8.sram_ctrl_lc_escalation.3611993309 Aug 01 06:32:27 PM PDT 24 Aug 01 06:32:34 PM PDT 24 1013320161 ps
T235 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.1087791888 Aug 01 06:34:19 PM PDT 24 Aug 01 06:38:45 PM PDT 24 6514986885 ps
T236 /workspace/coverage/default/12.sram_ctrl_regwen.2839454511 Aug 01 06:32:51 PM PDT 24 Aug 01 06:43:43 PM PDT 24 2116990989 ps
T237 /workspace/coverage/default/25.sram_ctrl_partial_access.944158710 Aug 01 06:33:44 PM PDT 24 Aug 01 06:33:57 PM PDT 24 231424367 ps
T238 /workspace/coverage/default/42.sram_ctrl_partial_access.3531797568 Aug 01 06:37:25 PM PDT 24 Aug 01 06:37:35 PM PDT 24 1823154850 ps
T239 /workspace/coverage/default/29.sram_ctrl_partial_access.3167927835 Aug 01 06:34:21 PM PDT 24 Aug 01 06:34:39 PM PDT 24 1264605241 ps
T240 /workspace/coverage/default/13.sram_ctrl_alert_test.2216811537 Aug 01 06:32:51 PM PDT 24 Aug 01 06:32:52 PM PDT 24 27906846 ps
T241 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3479691441 Aug 01 06:34:38 PM PDT 24 Aug 01 06:39:38 PM PDT 24 15797465768 ps
T242 /workspace/coverage/default/23.sram_ctrl_max_throughput.3242834993 Aug 01 06:33:23 PM PDT 24 Aug 01 06:34:21 PM PDT 24 268412034 ps
T243 /workspace/coverage/default/5.sram_ctrl_ram_cfg.3924287415 Aug 01 06:32:24 PM PDT 24 Aug 01 06:32:25 PM PDT 24 33245430 ps
T244 /workspace/coverage/default/20.sram_ctrl_max_throughput.2226907187 Aug 01 06:33:10 PM PDT 24 Aug 01 06:34:19 PM PDT 24 417809112 ps
T245 /workspace/coverage/default/11.sram_ctrl_alert_test.1297657620 Aug 01 06:32:41 PM PDT 24 Aug 01 06:32:42 PM PDT 24 43021930 ps
T246 /workspace/coverage/default/43.sram_ctrl_regwen.3797107027 Aug 01 06:37:46 PM PDT 24 Aug 01 06:54:16 PM PDT 24 42687986267 ps
T247 /workspace/coverage/default/4.sram_ctrl_ram_cfg.248968106 Aug 01 06:32:23 PM PDT 24 Aug 01 06:32:24 PM PDT 24 42307385 ps
T248 /workspace/coverage/default/2.sram_ctrl_ram_cfg.1740864561 Aug 01 06:32:12 PM PDT 24 Aug 01 06:32:13 PM PDT 24 107428075 ps
T56 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.2698619485 Aug 01 06:35:30 PM PDT 24 Aug 01 06:35:36 PM PDT 24 173173718 ps
T249 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.2306452446 Aug 01 06:36:54 PM PDT 24 Aug 01 06:41:35 PM PDT 24 6879642279 ps
T250 /workspace/coverage/default/32.sram_ctrl_multiple_keys.3500735936 Aug 01 06:34:56 PM PDT 24 Aug 01 06:40:08 PM PDT 24 1679000717 ps
T251 /workspace/coverage/default/36.sram_ctrl_stress_pipeline.1845239320 Aug 01 06:36:01 PM PDT 24 Aug 01 06:40:18 PM PDT 24 15017344106 ps
T252 /workspace/coverage/default/35.sram_ctrl_regwen.4059531679 Aug 01 06:35:52 PM PDT 24 Aug 01 06:48:25 PM PDT 24 26481438473 ps
T253 /workspace/coverage/default/31.sram_ctrl_max_throughput.424687857 Aug 01 06:34:48 PM PDT 24 Aug 01 06:34:50 PM PDT 24 166747011 ps
T254 /workspace/coverage/default/27.sram_ctrl_alert_test.800875359 Aug 01 06:33:59 PM PDT 24 Aug 01 06:33:59 PM PDT 24 17511256 ps
T255 /workspace/coverage/default/13.sram_ctrl_regwen.1810592788 Aug 01 06:32:49 PM PDT 24 Aug 01 06:46:45 PM PDT 24 20008436888 ps
T256 /workspace/coverage/default/32.sram_ctrl_bijection.683568402 Aug 01 06:34:55 PM PDT 24 Aug 01 06:36:01 PM PDT 24 984650165 ps
T257 /workspace/coverage/default/3.sram_ctrl_executable.2516982350 Aug 01 06:32:14 PM PDT 24 Aug 01 06:38:21 PM PDT 24 2064249907 ps
T258 /workspace/coverage/default/37.sram_ctrl_ram_cfg.1903783185 Aug 01 06:36:26 PM PDT 24 Aug 01 06:36:27 PM PDT 24 46557001 ps
T259 /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2410028715 Aug 01 06:33:02 PM PDT 24 Aug 01 06:39:52 PM PDT 24 10883146724 ps
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T262 /workspace/coverage/default/30.sram_ctrl_bijection.954380663 Aug 01 06:34:37 PM PDT 24 Aug 01 06:35:35 PM PDT 24 1692274565 ps
T263 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.1325748730 Aug 01 06:33:23 PM PDT 24 Aug 01 06:37:22 PM PDT 24 4888006382 ps
T264 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.2983894098 Aug 01 06:32:24 PM PDT 24 Aug 01 06:32:28 PM PDT 24 1144170583 ps
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T267 /workspace/coverage/default/0.sram_ctrl_regwen.848810193 Aug 01 06:32:11 PM PDT 24 Aug 01 06:41:49 PM PDT 24 38141697328 ps
T268 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.2370639849 Aug 01 06:33:47 PM PDT 24 Aug 01 06:37:57 PM PDT 24 5375182101 ps
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T269 /workspace/coverage/default/36.sram_ctrl_max_throughput.1250051679 Aug 01 06:36:02 PM PDT 24 Aug 01 06:36:11 PM PDT 24 134330749 ps
T270 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.4058686418 Aug 01 06:38:23 PM PDT 24 Aug 01 06:38:27 PM PDT 24 107525856 ps
T271 /workspace/coverage/default/40.sram_ctrl_smoke.941820891 Aug 01 06:36:55 PM PDT 24 Aug 01 06:38:28 PM PDT 24 2217965925 ps
T272 /workspace/coverage/default/6.sram_ctrl_ram_cfg.3447292942 Aug 01 06:32:23 PM PDT 24 Aug 01 06:32:24 PM PDT 24 28625479 ps
T273 /workspace/coverage/default/33.sram_ctrl_mem_walk.4269336721 Aug 01 06:35:30 PM PDT 24 Aug 01 06:35:41 PM PDT 24 1843830114 ps
T274 /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.965162114 Aug 01 06:32:26 PM PDT 24 Aug 01 06:38:51 PM PDT 24 19997139561 ps
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T276 /workspace/coverage/default/15.sram_ctrl_ram_cfg.621121028 Aug 01 06:32:54 PM PDT 24 Aug 01 06:32:55 PM PDT 24 47594595 ps
T277 /workspace/coverage/default/0.sram_ctrl_max_throughput.2838277615 Aug 01 06:32:05 PM PDT 24 Aug 01 06:34:31 PM PDT 24 2122233448 ps
T278 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.1314492900 Aug 01 06:33:32 PM PDT 24 Aug 01 06:35:55 PM PDT 24 1776970514 ps
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T280 /workspace/coverage/default/1.sram_ctrl_lc_escalation.762223804 Aug 01 06:32:14 PM PDT 24 Aug 01 06:32:23 PM PDT 24 924955109 ps
T281 /workspace/coverage/default/20.sram_ctrl_partial_access.1872984248 Aug 01 06:33:12 PM PDT 24 Aug 01 06:33:31 PM PDT 24 2494076026 ps
T282 /workspace/coverage/default/25.sram_ctrl_bijection.1729841812 Aug 01 06:33:34 PM PDT 24 Aug 01 06:34:36 PM PDT 24 914633453 ps
T283 /workspace/coverage/default/19.sram_ctrl_smoke.518300178 Aug 01 06:33:02 PM PDT 24 Aug 01 06:33:03 PM PDT 24 294281995 ps
T284 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2516636062 Aug 01 06:32:26 PM PDT 24 Aug 01 06:36:49 PM PDT 24 3485602069 ps
T285 /workspace/coverage/default/5.sram_ctrl_max_throughput.3094660716 Aug 01 06:32:26 PM PDT 24 Aug 01 06:34:19 PM PDT 24 139445939 ps
T286 /workspace/coverage/default/13.sram_ctrl_multiple_keys.2646476918 Aug 01 06:32:51 PM PDT 24 Aug 01 06:41:18 PM PDT 24 1675602195 ps
T287 /workspace/coverage/default/18.sram_ctrl_bijection.1562787979 Aug 01 06:32:58 PM PDT 24 Aug 01 06:33:29 PM PDT 24 1738455755 ps
T288 /workspace/coverage/default/26.sram_ctrl_alert_test.2008647548 Aug 01 06:33:46 PM PDT 24 Aug 01 06:33:47 PM PDT 24 15260352 ps
T289 /workspace/coverage/default/32.sram_ctrl_lc_escalation.4152752112 Aug 01 06:35:11 PM PDT 24 Aug 01 06:35:15 PM PDT 24 2086941393 ps
T290 /workspace/coverage/default/7.sram_ctrl_lc_escalation.2456442277 Aug 01 06:32:23 PM PDT 24 Aug 01 06:32:29 PM PDT 24 422392061 ps
T291 /workspace/coverage/default/28.sram_ctrl_ram_cfg.797152285 Aug 01 06:34:10 PM PDT 24 Aug 01 06:34:11 PM PDT 24 25332716 ps
T292 /workspace/coverage/default/42.sram_ctrl_multiple_keys.2284813335 Aug 01 06:37:24 PM PDT 24 Aug 01 06:45:46 PM PDT 24 4857033041 ps
T293 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2728088027 Aug 01 06:38:13 PM PDT 24 Aug 01 06:41:30 PM PDT 24 38831975054 ps
T294 /workspace/coverage/default/22.sram_ctrl_alert_test.1452668712 Aug 01 06:33:22 PM PDT 24 Aug 01 06:33:23 PM PDT 24 17821441 ps
T295 /workspace/coverage/default/7.sram_ctrl_access_during_key_req.3805099077 Aug 01 06:32:23 PM PDT 24 Aug 01 06:43:39 PM PDT 24 7395908713 ps
T296 /workspace/coverage/default/21.sram_ctrl_mem_partial_access.3815035672 Aug 01 06:33:11 PM PDT 24 Aug 01 06:33:16 PM PDT 24 168746240 ps
T297 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2939416423 Aug 01 06:38:10 PM PDT 24 Aug 01 06:39:17 PM PDT 24 153366958 ps
T298 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.2537890335 Aug 01 06:32:17 PM PDT 24 Aug 01 06:37:35 PM PDT 24 3521453221 ps
T299 /workspace/coverage/default/13.sram_ctrl_partial_access.3664929610 Aug 01 06:32:50 PM PDT 24 Aug 01 06:33:29 PM PDT 24 158503759 ps
T300 /workspace/coverage/default/15.sram_ctrl_mem_partial_access.1810991027 Aug 01 06:32:55 PM PDT 24 Aug 01 06:32:59 PM PDT 24 96231629 ps
T301 /workspace/coverage/default/4.sram_ctrl_lc_escalation.2496634596 Aug 01 06:32:16 PM PDT 24 Aug 01 06:32:19 PM PDT 24 710478757 ps
T302 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3632416209 Aug 01 06:37:01 PM PDT 24 Aug 01 06:39:05 PM PDT 24 184053211 ps
T303 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2709215793 Aug 01 06:32:13 PM PDT 24 Aug 01 06:32:53 PM PDT 24 1156205204 ps
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