| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2223935014 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.426065676 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1387153168 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.2758654278 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.1258597072 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1089027798 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.723451732 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3729434988 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.1925871808 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2357424880 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3361706414 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.774455696 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.3456538320 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.895069899 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.98449678 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.288636809 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2411909057 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.168766221 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1043634931 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2570791528 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4159394586 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3350447860 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.381530051 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.192668046 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3384791221 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.497119704 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2855202130 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3696218567 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3783639569 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.916434667 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2956556528 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3036016213 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1013124850 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3819820235 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.2514937019 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.4247625721 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2776469490 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.891046484 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2833210012 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2449418133 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.4278554500 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3681670778 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1802764412 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.109664248 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2094607252 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3482153676 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.135715741 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1383538912 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.570299833 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2624324669 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.61750333 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.699389732 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2878882166 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1776855887 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.1903567053 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1865186221 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.427175414 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2617246191 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3605914186 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2591627219 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3621118299 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1008747711 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2577072986 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.3047077849 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.578680444 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1203172637 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.997660997 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1270643557 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1688929638 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2419139452 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1841184379 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.514141346 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3536500531 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.797635555 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1582165251 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.996899417 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1675944743 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1768157407 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3406417248 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3299628322 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3701701856 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.70366315 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.3200900129 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1563015004 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3528551102 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.2958517995 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.2678154392 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2789092275 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.355267215 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3506027469 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.496051891 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1005895790 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1037306999 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1746643082 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3520155707 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2534825359 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.3590615936 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3784464131 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.4069140618 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1551634222 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2009602051 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.2920461042 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.541449497 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.166654773 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2163058489 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.114489915 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.2977752841 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.2953199499 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.475684367 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.4251031779 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.588711326 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2511000933 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2937947949 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.545672147 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2231210551 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2152140483 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.1328562473 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3391434216 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.901522521 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3957804134 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1643062162 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.3470057734 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1979893428 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2406460681 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3952112258 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3121251662 |
| /workspace/coverage/default/0.sram_ctrl_access_during_key_req.630236546 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.2226899883 |
| /workspace/coverage/default/0.sram_ctrl_bijection.1707267173 |
| /workspace/coverage/default/0.sram_ctrl_executable.1479936217 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.1478484670 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.4228861981 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.2573243187 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.73172035 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.4118809395 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.3626386707 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.1818198987 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.2309323731 |
| /workspace/coverage/default/0.sram_ctrl_regwen.3757235853 |
| /workspace/coverage/default/0.sram_ctrl_sec_cm.3666358696 |
| /workspace/coverage/default/0.sram_ctrl_smoke.3376609373 |
| /workspace/coverage/default/0.sram_ctrl_stress_all.3814002524 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.4041138703 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.670327982 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.4040721735 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.634024512 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.1179763670 |
| /workspace/coverage/default/1.sram_ctrl_bijection.436232902 |
| /workspace/coverage/default/1.sram_ctrl_executable.1626544812 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.2561383869 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.2960356948 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.253660560 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.63131072 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.3651563527 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.2668419692 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3061622199 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.3234936414 |
| /workspace/coverage/default/1.sram_ctrl_regwen.1715480778 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.1570708117 |
| /workspace/coverage/default/1.sram_ctrl_smoke.3429885852 |
| /workspace/coverage/default/1.sram_ctrl_stress_all.3263147818 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4042143872 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.3186762586 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.678537273 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.1341082589 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.1541863219 |
| /workspace/coverage/default/10.sram_ctrl_bijection.704740432 |
| /workspace/coverage/default/10.sram_ctrl_executable.1886070042 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.1511106023 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.4165616795 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.2633316070 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.1189168786 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.1465479370 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.491690550 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.27430068 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.3352706668 |
| /workspace/coverage/default/10.sram_ctrl_regwen.289331204 |
| /workspace/coverage/default/10.sram_ctrl_smoke.3828938034 |
| /workspace/coverage/default/10.sram_ctrl_stress_all.2039274890 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.527696384 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.858306354 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3209774589 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.35708169 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.3647633489 |
| /workspace/coverage/default/11.sram_ctrl_bijection.2245335873 |
| /workspace/coverage/default/11.sram_ctrl_executable.1747073781 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.773385091 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.2246664942 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.3153839059 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.552719083 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.291843347 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.1994113386 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.471472629 |
| /workspace/coverage/default/11.sram_ctrl_regwen.3406448080 |
| /workspace/coverage/default/11.sram_ctrl_smoke.2039855196 |
| /workspace/coverage/default/11.sram_ctrl_stress_all.3388916904 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.1854329865 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.4258250715 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.1072387792 |
| /workspace/coverage/default/12.sram_ctrl_alert_test.1333893021 |
| /workspace/coverage/default/12.sram_ctrl_bijection.743283367 |
| /workspace/coverage/default/12.sram_ctrl_executable.1573743214 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.2680620707 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.3329677695 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.2526820938 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.3042189467 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.3235216175 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.3781151988 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3281691145 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.414574515 |
| /workspace/coverage/default/12.sram_ctrl_regwen.3863440410 |
| /workspace/coverage/default/12.sram_ctrl_smoke.1317791955 |
| /workspace/coverage/default/12.sram_ctrl_stress_all.1289591640 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3996769590 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.2843850042 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.159548728 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.3335690977 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.4253476220 |
| /workspace/coverage/default/13.sram_ctrl_bijection.821557151 |
| /workspace/coverage/default/13.sram_ctrl_executable.1887979398 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.3811666499 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.403813076 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.3165768392 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.2948898710 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.1491030305 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.2701485704 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1574756064 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.3782584740 |
| /workspace/coverage/default/13.sram_ctrl_regwen.2002586859 |
| /workspace/coverage/default/13.sram_ctrl_smoke.3245724716 |
| /workspace/coverage/default/13.sram_ctrl_stress_all.37083108 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.1506853807 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.3533037646 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.2469525883 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.43222897 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.3724649071 |
| /workspace/coverage/default/14.sram_ctrl_bijection.2672344823 |
| /workspace/coverage/default/14.sram_ctrl_executable.618278689 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.1747851471 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.4044279199 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.972401989 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.3043768694 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.731674338 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.1107853929 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.515764805 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.3315673097 |
| /workspace/coverage/default/14.sram_ctrl_regwen.2197617619 |
| /workspace/coverage/default/14.sram_ctrl_smoke.3140394424 |
| /workspace/coverage/default/14.sram_ctrl_stress_all.3315991953 |
| /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.4052126071 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.4212584946 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3856769206 |
| /workspace/coverage/default/15.sram_ctrl_access_during_key_req.1443126679 |
| /workspace/coverage/default/15.sram_ctrl_alert_test.1663439616 |
| /workspace/coverage/default/15.sram_ctrl_bijection.370100227 |
| /workspace/coverage/default/15.sram_ctrl_executable.3358507867 |
| /workspace/coverage/default/15.sram_ctrl_lc_escalation.1819634027 |
| /workspace/coverage/default/15.sram_ctrl_max_throughput.222560888 |
| /workspace/coverage/default/15.sram_ctrl_mem_partial_access.4214488938 |
| /workspace/coverage/default/15.sram_ctrl_mem_walk.3739776283 |
| /workspace/coverage/default/15.sram_ctrl_multiple_keys.136200077 |
| /workspace/coverage/default/15.sram_ctrl_partial_access.2432499691 |
| /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2747896219 |
| /workspace/coverage/default/15.sram_ctrl_ram_cfg.2844480862 |
| /workspace/coverage/default/15.sram_ctrl_regwen.2205771507 |
| /workspace/coverage/default/15.sram_ctrl_smoke.134054092 |
| /workspace/coverage/default/15.sram_ctrl_stress_all.3395799733 |
| /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.3645758903 |
| /workspace/coverage/default/15.sram_ctrl_stress_pipeline.1717077278 |
| /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3645322726 |
| /workspace/coverage/default/16.sram_ctrl_access_during_key_req.1261496852 |
| /workspace/coverage/default/16.sram_ctrl_alert_test.3181251655 |
| /workspace/coverage/default/16.sram_ctrl_bijection.3658461899 |
| /workspace/coverage/default/16.sram_ctrl_executable.3487899743 |
| /workspace/coverage/default/16.sram_ctrl_lc_escalation.396424123 |
| /workspace/coverage/default/16.sram_ctrl_max_throughput.315634545 |
| /workspace/coverage/default/16.sram_ctrl_mem_partial_access.2157435857 |
| /workspace/coverage/default/16.sram_ctrl_mem_walk.1736040388 |
| /workspace/coverage/default/16.sram_ctrl_multiple_keys.855415119 |
| /workspace/coverage/default/16.sram_ctrl_partial_access.3815618287 |
| /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.666567759 |
| /workspace/coverage/default/16.sram_ctrl_ram_cfg.205789231 |
| /workspace/coverage/default/16.sram_ctrl_regwen.250494980 |
| /workspace/coverage/default/16.sram_ctrl_smoke.1714661618 |
| /workspace/coverage/default/16.sram_ctrl_stress_all.4121927404 |
| /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.405128447 |
| /workspace/coverage/default/16.sram_ctrl_stress_pipeline.1514280893 |
| /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.3740264670 |
| /workspace/coverage/default/17.sram_ctrl_access_during_key_req.1332641110 |
| /workspace/coverage/default/17.sram_ctrl_alert_test.594647630 |
| /workspace/coverage/default/17.sram_ctrl_bijection.3196962301 |
| /workspace/coverage/default/17.sram_ctrl_executable.3991996804 |
| /workspace/coverage/default/17.sram_ctrl_lc_escalation.3945543960 |
| /workspace/coverage/default/17.sram_ctrl_max_throughput.2273540446 |
| /workspace/coverage/default/17.sram_ctrl_mem_partial_access.297765855 |
| /workspace/coverage/default/17.sram_ctrl_mem_walk.2736501958 |
| /workspace/coverage/default/17.sram_ctrl_multiple_keys.411533131 |
| /workspace/coverage/default/17.sram_ctrl_partial_access.2990108081 |
| /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.2647797107 |
| /workspace/coverage/default/17.sram_ctrl_ram_cfg.3197383 |
| /workspace/coverage/default/17.sram_ctrl_regwen.3059411867 |
| /workspace/coverage/default/17.sram_ctrl_smoke.1828702175 |
| /workspace/coverage/default/17.sram_ctrl_stress_all.419369397 |
| /workspace/coverage/default/17.sram_ctrl_stress_pipeline.608132370 |
| /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.3065339638 |
| /workspace/coverage/default/18.sram_ctrl_access_during_key_req.1417350135 |
| /workspace/coverage/default/18.sram_ctrl_alert_test.2552068474 |
| /workspace/coverage/default/18.sram_ctrl_bijection.1567986810 |
| /workspace/coverage/default/18.sram_ctrl_executable.3774109150 |
| /workspace/coverage/default/18.sram_ctrl_lc_escalation.3171516439 |
| /workspace/coverage/default/18.sram_ctrl_max_throughput.1923204108 |
| /workspace/coverage/default/18.sram_ctrl_mem_partial_access.1825915174 |
| /workspace/coverage/default/18.sram_ctrl_mem_walk.664367262 |
| /workspace/coverage/default/18.sram_ctrl_multiple_keys.1270434800 |
| /workspace/coverage/default/18.sram_ctrl_partial_access.1791529574 |
| /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2594762461 |
| /workspace/coverage/default/18.sram_ctrl_ram_cfg.2701509444 |
| /workspace/coverage/default/18.sram_ctrl_regwen.521365993 |
| /workspace/coverage/default/18.sram_ctrl_smoke.3860429217 |
| /workspace/coverage/default/18.sram_ctrl_stress_all.3495467442 |
| /workspace/coverage/default/18.sram_ctrl_stress_pipeline.208772962 |
| /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3319187915 |
| /workspace/coverage/default/19.sram_ctrl_access_during_key_req.127381440 |
| /workspace/coverage/default/19.sram_ctrl_alert_test.821818205 |
| /workspace/coverage/default/19.sram_ctrl_bijection.2416066193 |
| /workspace/coverage/default/19.sram_ctrl_executable.992643251 |
| /workspace/coverage/default/19.sram_ctrl_lc_escalation.4027561123 |
| /workspace/coverage/default/19.sram_ctrl_max_throughput.3574347499 |
| /workspace/coverage/default/19.sram_ctrl_mem_partial_access.656455290 |
| /workspace/coverage/default/19.sram_ctrl_mem_walk.3035601152 |
| /workspace/coverage/default/19.sram_ctrl_multiple_keys.1181219196 |
| /workspace/coverage/default/19.sram_ctrl_partial_access.4125779207 |
| /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.2442601815 |
| /workspace/coverage/default/19.sram_ctrl_ram_cfg.3756621921 |
| /workspace/coverage/default/19.sram_ctrl_regwen.2755683943 |
| /workspace/coverage/default/19.sram_ctrl_smoke.2538904194 |
| /workspace/coverage/default/19.sram_ctrl_stress_all.53333839 |
| /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2750312848 |
| /workspace/coverage/default/19.sram_ctrl_stress_pipeline.1720543529 |
| /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.955920115 |
| /workspace/coverage/default/2.sram_ctrl_access_during_key_req.718236858 |
| /workspace/coverage/default/2.sram_ctrl_alert_test.1481827562 |
| /workspace/coverage/default/2.sram_ctrl_bijection.824180328 |
| /workspace/coverage/default/2.sram_ctrl_executable.2100266595 |
| /workspace/coverage/default/2.sram_ctrl_lc_escalation.2528040140 |
| /workspace/coverage/default/2.sram_ctrl_max_throughput.1966153774 |
| /workspace/coverage/default/2.sram_ctrl_mem_partial_access.1425179600 |
| /workspace/coverage/default/2.sram_ctrl_mem_walk.2828174363 |
| /workspace/coverage/default/2.sram_ctrl_multiple_keys.3142090252 |
| /workspace/coverage/default/2.sram_ctrl_partial_access.3585384617 |
| /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3959066001 |
| /workspace/coverage/default/2.sram_ctrl_ram_cfg.2647240535 |
| /workspace/coverage/default/2.sram_ctrl_regwen.281174841 |
| /workspace/coverage/default/2.sram_ctrl_smoke.2382765475 |
| /workspace/coverage/default/2.sram_ctrl_stress_all.703869432 |
| /workspace/coverage/default/2.sram_ctrl_stress_pipeline.3472429809 |
| /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2542143306 |
| /workspace/coverage/default/20.sram_ctrl_access_during_key_req.631292883 |
| /workspace/coverage/default/20.sram_ctrl_alert_test.2351123466 |
| /workspace/coverage/default/20.sram_ctrl_bijection.363926660 |
| /workspace/coverage/default/20.sram_ctrl_executable.219065875 |
| /workspace/coverage/default/20.sram_ctrl_lc_escalation.1780106009 |
| /workspace/coverage/default/20.sram_ctrl_max_throughput.1160167805 |
| /workspace/coverage/default/20.sram_ctrl_mem_partial_access.3479342831 |
| /workspace/coverage/default/20.sram_ctrl_mem_walk.2860691320 |
| /workspace/coverage/default/20.sram_ctrl_multiple_keys.814558982 |
| /workspace/coverage/default/20.sram_ctrl_partial_access.2975764942 |
| /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2884779735 |
| /workspace/coverage/default/20.sram_ctrl_ram_cfg.2239553485 |
| /workspace/coverage/default/20.sram_ctrl_regwen.1638204366 |
| /workspace/coverage/default/20.sram_ctrl_smoke.3243274041 |
| /workspace/coverage/default/20.sram_ctrl_stress_all.3011715582 |
| /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.2823225906 |
| /workspace/coverage/default/20.sram_ctrl_stress_pipeline.842413941 |
| /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.4141424018 |
| /workspace/coverage/default/21.sram_ctrl_access_during_key_req.4202521304 |
| /workspace/coverage/default/21.sram_ctrl_alert_test.3347863606 |
| /workspace/coverage/default/21.sram_ctrl_bijection.2658362540 |
| /workspace/coverage/default/21.sram_ctrl_executable.190027358 |
| /workspace/coverage/default/21.sram_ctrl_lc_escalation.273580903 |
| /workspace/coverage/default/21.sram_ctrl_max_throughput.2991588169 |
| /workspace/coverage/default/21.sram_ctrl_mem_partial_access.260914246 |
| /workspace/coverage/default/21.sram_ctrl_mem_walk.1165808721 |
| /workspace/coverage/default/21.sram_ctrl_multiple_keys.853159151 |
| /workspace/coverage/default/21.sram_ctrl_partial_access.193763679 |
| /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.973280137 |
| /workspace/coverage/default/21.sram_ctrl_ram_cfg.1942517583 |
| /workspace/coverage/default/21.sram_ctrl_regwen.964309204 |
| /workspace/coverage/default/21.sram_ctrl_smoke.419385679 |
| /workspace/coverage/default/21.sram_ctrl_stress_all.273926934 |
| /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.3546399132 |
| /workspace/coverage/default/21.sram_ctrl_stress_pipeline.3911817743 |
| /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2466485446 |
| /workspace/coverage/default/22.sram_ctrl_access_during_key_req.153970652 |
| /workspace/coverage/default/22.sram_ctrl_alert_test.714075943 |
| /workspace/coverage/default/22.sram_ctrl_bijection.2056132524 |
| /workspace/coverage/default/22.sram_ctrl_executable.2168190114 |
| /workspace/coverage/default/22.sram_ctrl_lc_escalation.3841616448 |
| /workspace/coverage/default/22.sram_ctrl_max_throughput.1733364957 |
| /workspace/coverage/default/22.sram_ctrl_mem_partial_access.3215163116 |
| /workspace/coverage/default/22.sram_ctrl_mem_walk.3672612037 |
| /workspace/coverage/default/22.sram_ctrl_multiple_keys.2710256858 |
| /workspace/coverage/default/22.sram_ctrl_partial_access.846289047 |
| /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1023086654 |
| /workspace/coverage/default/22.sram_ctrl_ram_cfg.2213256034 |
| /workspace/coverage/default/22.sram_ctrl_regwen.442193490 |
| /workspace/coverage/default/22.sram_ctrl_smoke.105264503 |
| /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.4171315872 |
| /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3388615207 |
| /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.1339038500 |
| /workspace/coverage/default/23.sram_ctrl_access_during_key_req.151596213 |
| /workspace/coverage/default/23.sram_ctrl_alert_test.3019367539 |
| /workspace/coverage/default/23.sram_ctrl_bijection.2748354882 |
| /workspace/coverage/default/23.sram_ctrl_executable.644781627 |
| /workspace/coverage/default/23.sram_ctrl_lc_escalation.1177385664 |
| /workspace/coverage/default/23.sram_ctrl_max_throughput.173769331 |
| /workspace/coverage/default/23.sram_ctrl_mem_partial_access.857740217 |
| /workspace/coverage/default/23.sram_ctrl_mem_walk.2623420877 |
| /workspace/coverage/default/23.sram_ctrl_multiple_keys.392319135 |
| /workspace/coverage/default/23.sram_ctrl_partial_access.541282715 |
| /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.4221271810 |
| /workspace/coverage/default/23.sram_ctrl_ram_cfg.2525231182 |
| /workspace/coverage/default/23.sram_ctrl_regwen.834926803 |
| /workspace/coverage/default/23.sram_ctrl_smoke.3039447519 |
| /workspace/coverage/default/23.sram_ctrl_stress_all.3244855500 |
| /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2028699325 |
| /workspace/coverage/default/23.sram_ctrl_stress_pipeline.219917522 |
| /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.4094452473 |
| /workspace/coverage/default/24.sram_ctrl_access_during_key_req.1212253210 |
| /workspace/coverage/default/24.sram_ctrl_alert_test.2610191963 |
| /workspace/coverage/default/24.sram_ctrl_bijection.1109625059 |
| /workspace/coverage/default/24.sram_ctrl_executable.3657146918 |
| /workspace/coverage/default/24.sram_ctrl_lc_escalation.378141819 |
| /workspace/coverage/default/24.sram_ctrl_max_throughput.2153191741 |
| /workspace/coverage/default/24.sram_ctrl_mem_partial_access.621301347 |
| /workspace/coverage/default/24.sram_ctrl_mem_walk.3378125606 |
| /workspace/coverage/default/24.sram_ctrl_multiple_keys.1461611590 |
| /workspace/coverage/default/24.sram_ctrl_partial_access.2921758606 |
| /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.2319239114 |
| /workspace/coverage/default/24.sram_ctrl_ram_cfg.1449754198 |
| /workspace/coverage/default/24.sram_ctrl_regwen.3634539032 |
| /workspace/coverage/default/24.sram_ctrl_smoke.3355265514 |
| /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2272333558 |
| /workspace/coverage/default/24.sram_ctrl_stress_pipeline.4290376823 |
| /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.3097918037 |
| /workspace/coverage/default/25.sram_ctrl_access_during_key_req.321407721 |
| /workspace/coverage/default/25.sram_ctrl_alert_test.4122391514 |
| /workspace/coverage/default/25.sram_ctrl_bijection.2076630996 |
| /workspace/coverage/default/25.sram_ctrl_executable.4002919594 |
| /workspace/coverage/default/25.sram_ctrl_lc_escalation.617569241 |
| /workspace/coverage/default/25.sram_ctrl_max_throughput.2783944370 |
| /workspace/coverage/default/25.sram_ctrl_mem_partial_access.1263749862 |
| /workspace/coverage/default/25.sram_ctrl_mem_walk.981092662 |
| /workspace/coverage/default/25.sram_ctrl_multiple_keys.49423889 |
| /workspace/coverage/default/25.sram_ctrl_partial_access.3402674317 |
| /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.2756521583 |
| /workspace/coverage/default/25.sram_ctrl_ram_cfg.940771874 |
| /workspace/coverage/default/25.sram_ctrl_regwen.2840821894 |
| /workspace/coverage/default/25.sram_ctrl_smoke.2547442366 |
| /workspace/coverage/default/25.sram_ctrl_stress_all.890081755 |
| /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2445075555 |
| /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.1967779335 |
| /workspace/coverage/default/26.sram_ctrl_access_during_key_req.4029116197 |
| /workspace/coverage/default/26.sram_ctrl_alert_test.923256557 |
| /workspace/coverage/default/26.sram_ctrl_bijection.3768904256 |
| /workspace/coverage/default/26.sram_ctrl_executable.2306941733 |
| /workspace/coverage/default/26.sram_ctrl_lc_escalation.501903979 |
| /workspace/coverage/default/26.sram_ctrl_max_throughput.2448271687 |
| /workspace/coverage/default/26.sram_ctrl_mem_partial_access.3556230259 |
| /workspace/coverage/default/26.sram_ctrl_mem_walk.686483442 |
| /workspace/coverage/default/26.sram_ctrl_multiple_keys.3287078263 |
| /workspace/coverage/default/26.sram_ctrl_partial_access.2900520399 |
| /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1034849831 |
| /workspace/coverage/default/26.sram_ctrl_ram_cfg.766260957 |
| /workspace/coverage/default/26.sram_ctrl_regwen.4145640747 |
| /workspace/coverage/default/26.sram_ctrl_smoke.905360257 |
| /workspace/coverage/default/26.sram_ctrl_stress_all.1452870666 |
| /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.336899283 |
| /workspace/coverage/default/26.sram_ctrl_stress_pipeline.1319719849 |
| /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.3584306346 |
| /workspace/coverage/default/27.sram_ctrl_access_during_key_req.3350548306 |
| /workspace/coverage/default/27.sram_ctrl_alert_test.739279073 |
| /workspace/coverage/default/27.sram_ctrl_bijection.1860233573 |
| /workspace/coverage/default/27.sram_ctrl_executable.1923837682 |
| /workspace/coverage/default/27.sram_ctrl_lc_escalation.3567309835 |
| /workspace/coverage/default/27.sram_ctrl_max_throughput.3953028489 |
| /workspace/coverage/default/27.sram_ctrl_mem_partial_access.2357096763 |
| /workspace/coverage/default/27.sram_ctrl_mem_walk.158337237 |
| /workspace/coverage/default/27.sram_ctrl_multiple_keys.3791774738 |
| /workspace/coverage/default/27.sram_ctrl_partial_access.3871047812 |
| /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1439695578 |
| /workspace/coverage/default/27.sram_ctrl_ram_cfg.3873149920 |
| /workspace/coverage/default/27.sram_ctrl_regwen.1982351240 |
| /workspace/coverage/default/27.sram_ctrl_smoke.3150874869 |
| /workspace/coverage/default/27.sram_ctrl_stress_all.4280803459 |
| /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3938397922 |
| /workspace/coverage/default/27.sram_ctrl_stress_pipeline.4064545772 |
| /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.279032345 |
| /workspace/coverage/default/28.sram_ctrl_access_during_key_req.298679525 |
| /workspace/coverage/default/28.sram_ctrl_alert_test.3020912987 |
| /workspace/coverage/default/28.sram_ctrl_bijection.3310117828 |
| /workspace/coverage/default/28.sram_ctrl_executable.1711499168 |
| /workspace/coverage/default/28.sram_ctrl_lc_escalation.2032848368 |
| /workspace/coverage/default/28.sram_ctrl_max_throughput.697705797 |
| /workspace/coverage/default/28.sram_ctrl_mem_partial_access.1382567536 |
| /workspace/coverage/default/28.sram_ctrl_mem_walk.2076301164 |
| /workspace/coverage/default/28.sram_ctrl_multiple_keys.1356925048 |
| /workspace/coverage/default/28.sram_ctrl_partial_access.2594757118 |
| /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3204886580 |
| /workspace/coverage/default/28.sram_ctrl_ram_cfg.1566531794 |
| /workspace/coverage/default/28.sram_ctrl_regwen.2401765458 |
| /workspace/coverage/default/28.sram_ctrl_smoke.3683111106 |
| /workspace/coverage/default/28.sram_ctrl_stress_all.3390874891 |
| /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.3829182012 |
| /workspace/coverage/default/28.sram_ctrl_stress_pipeline.3576379213 |
| /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.150101959 |
| /workspace/coverage/default/29.sram_ctrl_access_during_key_req.3812047659 |
| /workspace/coverage/default/29.sram_ctrl_alert_test.1885723607 |
| /workspace/coverage/default/29.sram_ctrl_bijection.1526788969 |
| /workspace/coverage/default/29.sram_ctrl_executable.3465249838 |
| /workspace/coverage/default/29.sram_ctrl_lc_escalation.2975194762 |
| /workspace/coverage/default/29.sram_ctrl_max_throughput.3437808491 |
| /workspace/coverage/default/29.sram_ctrl_mem_partial_access.4136798620 |
| /workspace/coverage/default/29.sram_ctrl_mem_walk.132639545 |
| /workspace/coverage/default/29.sram_ctrl_multiple_keys.3584791670 |
| /workspace/coverage/default/29.sram_ctrl_partial_access.3834489066 |
| /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.1242614911 |
| /workspace/coverage/default/29.sram_ctrl_ram_cfg.1965446333 |
| /workspace/coverage/default/29.sram_ctrl_regwen.2632769242 |
| /workspace/coverage/default/29.sram_ctrl_smoke.2315402500 |
| /workspace/coverage/default/29.sram_ctrl_stress_all.4048133077 |
| /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.35878076 |
| /workspace/coverage/default/29.sram_ctrl_stress_pipeline.3417005748 |
| /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.3763044500 |
| /workspace/coverage/default/3.sram_ctrl_access_during_key_req.479609114 |
| /workspace/coverage/default/3.sram_ctrl_alert_test.1133763290 |
| /workspace/coverage/default/3.sram_ctrl_bijection.2353646032 |
| /workspace/coverage/default/3.sram_ctrl_executable.843091775 |
| /workspace/coverage/default/3.sram_ctrl_lc_escalation.2263814077 |
| /workspace/coverage/default/3.sram_ctrl_max_throughput.3183840323 |
| /workspace/coverage/default/3.sram_ctrl_mem_partial_access.4095534956 |
| /workspace/coverage/default/3.sram_ctrl_mem_walk.730623769 |
| /workspace/coverage/default/3.sram_ctrl_multiple_keys.2063717254 |
| /workspace/coverage/default/3.sram_ctrl_partial_access.1480008717 |
| /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.3680038528 |
| /workspace/coverage/default/3.sram_ctrl_ram_cfg.1420952851 |
| /workspace/coverage/default/3.sram_ctrl_regwen.185093281 |
| /workspace/coverage/default/3.sram_ctrl_sec_cm.2414746309 |
| /workspace/coverage/default/3.sram_ctrl_smoke.3175362817 |
| /workspace/coverage/default/3.sram_ctrl_stress_all.2331672246 |
| /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1160423704 |
| /workspace/coverage/default/3.sram_ctrl_stress_pipeline.2471307241 |
| /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3797363960 |
| /workspace/coverage/default/30.sram_ctrl_access_during_key_req.588040014 |
| /workspace/coverage/default/30.sram_ctrl_alert_test.4229159206 |
| /workspace/coverage/default/30.sram_ctrl_bijection.4142895597 |
| /workspace/coverage/default/30.sram_ctrl_executable.912056183 |
| /workspace/coverage/default/30.sram_ctrl_lc_escalation.359305857 |
| /workspace/coverage/default/30.sram_ctrl_max_throughput.3113177076 |
| /workspace/coverage/default/30.sram_ctrl_mem_partial_access.4117251509 |
| /workspace/coverage/default/30.sram_ctrl_mem_walk.2915375417 |
| /workspace/coverage/default/30.sram_ctrl_multiple_keys.192092356 |
| /workspace/coverage/default/30.sram_ctrl_partial_access.3644222050 |
| /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.889983259 |
| /workspace/coverage/default/30.sram_ctrl_ram_cfg.3385530229 |
| /workspace/coverage/default/30.sram_ctrl_regwen.3100298701 |
| /workspace/coverage/default/30.sram_ctrl_smoke.3667509846 |
| /workspace/coverage/default/30.sram_ctrl_stress_all.3739509276 |
| /workspace/coverage/default/30.sram_ctrl_stress_pipeline.2941879346 |
| /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.3887698141 |
| /workspace/coverage/default/31.sram_ctrl_access_during_key_req.2319741793 |
| /workspace/coverage/default/31.sram_ctrl_bijection.932997961 |
| /workspace/coverage/default/31.sram_ctrl_executable.4156280977 |
| /workspace/coverage/default/31.sram_ctrl_lc_escalation.1189680773 |
| /workspace/coverage/default/31.sram_ctrl_max_throughput.3707465795 |
| /workspace/coverage/default/31.sram_ctrl_mem_partial_access.739673841 |
| /workspace/coverage/default/31.sram_ctrl_mem_walk.404436123 |
| /workspace/coverage/default/31.sram_ctrl_multiple_keys.3774390004 |
| /workspace/coverage/default/31.sram_ctrl_partial_access.2678041645 |
| /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.2968381420 |
| /workspace/coverage/default/31.sram_ctrl_ram_cfg.665138069 |
| /workspace/coverage/default/31.sram_ctrl_regwen.2743422557 |
| /workspace/coverage/default/31.sram_ctrl_smoke.1502219312 |
| /workspace/coverage/default/31.sram_ctrl_stress_all.2912424348 |
| /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.1911232034 |
| /workspace/coverage/default/31.sram_ctrl_stress_pipeline.2784755550 |
| /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.2017928819 |
| /workspace/coverage/default/32.sram_ctrl_access_during_key_req.4023500786 |
| /workspace/coverage/default/32.sram_ctrl_alert_test.103063449 |
| /workspace/coverage/default/32.sram_ctrl_bijection.93224800 |
| /workspace/coverage/default/32.sram_ctrl_executable.1511988876 |
| /workspace/coverage/default/32.sram_ctrl_lc_escalation.4262315217 |
| /workspace/coverage/default/32.sram_ctrl_max_throughput.3982055695 |
| /workspace/coverage/default/32.sram_ctrl_mem_partial_access.1259144692 |
| /workspace/coverage/default/32.sram_ctrl_mem_walk.420354080 |
| /workspace/coverage/default/32.sram_ctrl_multiple_keys.366602517 |
| /workspace/coverage/default/32.sram_ctrl_partial_access.2804916965 |
| /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.484035298 |
| /workspace/coverage/default/32.sram_ctrl_ram_cfg.1900138778 |
| /workspace/coverage/default/32.sram_ctrl_regwen.773718561 |
| /workspace/coverage/default/32.sram_ctrl_smoke.3344851658 |
| /workspace/coverage/default/32.sram_ctrl_stress_all.2349913173 |
| /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.2279537912 |
| /workspace/coverage/default/32.sram_ctrl_stress_pipeline.3204189380 |
| /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2485659073 |
| /workspace/coverage/default/33.sram_ctrl_access_during_key_req.4091609684 |
| /workspace/coverage/default/33.sram_ctrl_alert_test.2469756991 |
| /workspace/coverage/default/33.sram_ctrl_bijection.1767175013 |
| /workspace/coverage/default/33.sram_ctrl_executable.1220755148 |
| /workspace/coverage/default/33.sram_ctrl_lc_escalation.1280615088 |
| /workspace/coverage/default/33.sram_ctrl_max_throughput.2638263802 |
| /workspace/coverage/default/33.sram_ctrl_mem_partial_access.2276330608 |
| /workspace/coverage/default/33.sram_ctrl_mem_walk.3050932119 |
| /workspace/coverage/default/33.sram_ctrl_multiple_keys.2097663074 |
| /workspace/coverage/default/33.sram_ctrl_partial_access.1264782857 |
| /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3664765618 |
| /workspace/coverage/default/33.sram_ctrl_ram_cfg.421471866 |
| /workspace/coverage/default/33.sram_ctrl_regwen.3520732802 |
| /workspace/coverage/default/33.sram_ctrl_smoke.3876772199 |
| /workspace/coverage/default/33.sram_ctrl_stress_all.4017348441 |
| /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1689033678 |
| /workspace/coverage/default/33.sram_ctrl_stress_pipeline.2031628557 |
| /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.490599196 |
| /workspace/coverage/default/34.sram_ctrl_access_during_key_req.1061926197 |
| /workspace/coverage/default/34.sram_ctrl_alert_test.497617864 |
| /workspace/coverage/default/34.sram_ctrl_bijection.2436717081 |
| /workspace/coverage/default/34.sram_ctrl_executable.3270875897 |
| /workspace/coverage/default/34.sram_ctrl_lc_escalation.3726985969 |
| /workspace/coverage/default/34.sram_ctrl_max_throughput.2011123682 |
| /workspace/coverage/default/34.sram_ctrl_mem_partial_access.4153728686 |
| /workspace/coverage/default/34.sram_ctrl_mem_walk.3958872813 |
| /workspace/coverage/default/34.sram_ctrl_multiple_keys.191669836 |
| /workspace/coverage/default/34.sram_ctrl_partial_access.3001985054 |
| /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3539010754 |
| /workspace/coverage/default/34.sram_ctrl_ram_cfg.2161482830 |
| /workspace/coverage/default/34.sram_ctrl_regwen.2873345521 |
| /workspace/coverage/default/34.sram_ctrl_smoke.2969543731 |
| /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2181237095 |
| /workspace/coverage/default/34.sram_ctrl_stress_pipeline.4221027119 |
| /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.75059534 |
| /workspace/coverage/default/35.sram_ctrl_access_during_key_req.261906028 |
| /workspace/coverage/default/35.sram_ctrl_alert_test.3359195623 |
| /workspace/coverage/default/35.sram_ctrl_bijection.419745490 |
| /workspace/coverage/default/35.sram_ctrl_executable.4132814691 |
| /workspace/coverage/default/35.sram_ctrl_lc_escalation.1437855503 |
| /workspace/coverage/default/35.sram_ctrl_max_throughput.426239461 |
| /workspace/coverage/default/35.sram_ctrl_mem_partial_access.1254384787 |
| /workspace/coverage/default/35.sram_ctrl_mem_walk.4283859223 |
| /workspace/coverage/default/35.sram_ctrl_multiple_keys.3083824912 |
| /workspace/coverage/default/35.sram_ctrl_partial_access.945495875 |
| /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.1551884429 |
| /workspace/coverage/default/35.sram_ctrl_ram_cfg.1879370228 |
| /workspace/coverage/default/35.sram_ctrl_regwen.1957846143 |
| /workspace/coverage/default/35.sram_ctrl_smoke.1187422990 |
| /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.4098282163 |
| /workspace/coverage/default/35.sram_ctrl_stress_pipeline.1166730991 |
| /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1571166873 |
| /workspace/coverage/default/36.sram_ctrl_access_during_key_req.1622939891 |
| /workspace/coverage/default/36.sram_ctrl_alert_test.4090652733 |
| /workspace/coverage/default/36.sram_ctrl_bijection.1845536815 |
| /workspace/coverage/default/36.sram_ctrl_executable.2198210459 |
| /workspace/coverage/default/36.sram_ctrl_lc_escalation.3171141606 |
| /workspace/coverage/default/36.sram_ctrl_max_throughput.975887443 |
| /workspace/coverage/default/36.sram_ctrl_mem_partial_access.707135044 |
| /workspace/coverage/default/36.sram_ctrl_mem_walk.3637018250 |
| /workspace/coverage/default/36.sram_ctrl_multiple_keys.2827828448 |
| /workspace/coverage/default/36.sram_ctrl_partial_access.2476656948 |
| /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2133273795 |
| /workspace/coverage/default/36.sram_ctrl_ram_cfg.2351556864 |
| /workspace/coverage/default/36.sram_ctrl_regwen.2804151813 |
| /workspace/coverage/default/36.sram_ctrl_smoke.189054654 |
| /workspace/coverage/default/36.sram_ctrl_stress_all.861257145 |
| /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1922234018 |
| /workspace/coverage/default/36.sram_ctrl_stress_pipeline.2685618299 |
| /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.3172404319 |
| /workspace/coverage/default/37.sram_ctrl_access_during_key_req.2319703892 |
| /workspace/coverage/default/37.sram_ctrl_alert_test.991532823 |
| /workspace/coverage/default/37.sram_ctrl_bijection.3679963116 |
| /workspace/coverage/default/37.sram_ctrl_executable.1149310999 |
| /workspace/coverage/default/37.sram_ctrl_lc_escalation.2082340389 |
| /workspace/coverage/default/37.sram_ctrl_max_throughput.309705233 |
| /workspace/coverage/default/37.sram_ctrl_mem_partial_access.4014771889 |
| /workspace/coverage/default/37.sram_ctrl_mem_walk.2592144385 |
| /workspace/coverage/default/37.sram_ctrl_multiple_keys.3565583836 |
| /workspace/coverage/default/37.sram_ctrl_partial_access.2732079000 |
| /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.610600215 |
| /workspace/coverage/default/37.sram_ctrl_ram_cfg.747807005 |
| /workspace/coverage/default/37.sram_ctrl_regwen.2997614494 |
| /workspace/coverage/default/37.sram_ctrl_smoke.2048584194 |
| /workspace/coverage/default/37.sram_ctrl_stress_all.282143069 |
| /workspace/coverage/default/37.sram_ctrl_stress_pipeline.1190684191 |
| /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.2438356745 |
| /workspace/coverage/default/38.sram_ctrl_access_during_key_req.1217817614 |
| /workspace/coverage/default/38.sram_ctrl_alert_test.291312452 |
| /workspace/coverage/default/38.sram_ctrl_bijection.1452435598 |
| /workspace/coverage/default/38.sram_ctrl_executable.2333489277 |
| /workspace/coverage/default/38.sram_ctrl_lc_escalation.4064216690 |
| /workspace/coverage/default/38.sram_ctrl_max_throughput.2046262690 |
| /workspace/coverage/default/38.sram_ctrl_mem_partial_access.3765985185 |
| /workspace/coverage/default/38.sram_ctrl_mem_walk.4011663943 |
| /workspace/coverage/default/38.sram_ctrl_multiple_keys.1827487148 |
| /workspace/coverage/default/38.sram_ctrl_partial_access.2313774579 |
| /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.4027013557 |
| /workspace/coverage/default/38.sram_ctrl_ram_cfg.526924609 |
| /workspace/coverage/default/38.sram_ctrl_regwen.3359151329 |
| /workspace/coverage/default/38.sram_ctrl_smoke.1281208239 |
| /workspace/coverage/default/38.sram_ctrl_stress_all.1624009807 |
| /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.2810320332 |
| /workspace/coverage/default/38.sram_ctrl_stress_pipeline.2246505180 |
| /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.2410867654 |
| /workspace/coverage/default/39.sram_ctrl_access_during_key_req.1885112940 |
| /workspace/coverage/default/39.sram_ctrl_alert_test.2359999867 |
| /workspace/coverage/default/39.sram_ctrl_bijection.175208135 |
| /workspace/coverage/default/39.sram_ctrl_executable.2167818687 |
| /workspace/coverage/default/39.sram_ctrl_lc_escalation.496967442 |
| /workspace/coverage/default/39.sram_ctrl_max_throughput.2793567022 |
| /workspace/coverage/default/39.sram_ctrl_mem_partial_access.1393242565 |
| /workspace/coverage/default/39.sram_ctrl_mem_walk.3363395008 |
| /workspace/coverage/default/39.sram_ctrl_multiple_keys.2871033647 |
| /workspace/coverage/default/39.sram_ctrl_partial_access.2486207262 |
| /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.3953022958 |
| /workspace/coverage/default/39.sram_ctrl_ram_cfg.4285602658 |
| /workspace/coverage/default/39.sram_ctrl_regwen.304238739 |
| /workspace/coverage/default/39.sram_ctrl_smoke.1120054278 |
| /workspace/coverage/default/39.sram_ctrl_stress_all.4048510163 |
| /workspace/coverage/default/39.sram_ctrl_stress_pipeline.1461196442 |
| /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.1958095944 |
| /workspace/coverage/default/4.sram_ctrl_access_during_key_req.55865726 |
| /workspace/coverage/default/4.sram_ctrl_alert_test.2797222828 |
| /workspace/coverage/default/4.sram_ctrl_bijection.1638972473 |
| /workspace/coverage/default/4.sram_ctrl_executable.2141525773 |
| /workspace/coverage/default/4.sram_ctrl_lc_escalation.1404063271 |
| /workspace/coverage/default/4.sram_ctrl_max_throughput.3415071071 |
| /workspace/coverage/default/4.sram_ctrl_mem_partial_access.2764494523 |
| /workspace/coverage/default/4.sram_ctrl_mem_walk.906994508 |
| /workspace/coverage/default/4.sram_ctrl_multiple_keys.363023299 |
| /workspace/coverage/default/4.sram_ctrl_partial_access.3710943375 |
| /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2078563 |
| /workspace/coverage/default/4.sram_ctrl_ram_cfg.117475290 |
| /workspace/coverage/default/4.sram_ctrl_regwen.3654826793 |
| /workspace/coverage/default/4.sram_ctrl_sec_cm.4033818275 |
| /workspace/coverage/default/4.sram_ctrl_smoke.1814634800 |
| /workspace/coverage/default/4.sram_ctrl_stress_all.843740450 |
| /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1993020655 |
| /workspace/coverage/default/4.sram_ctrl_stress_pipeline.181539579 |
| /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1194914686 |
| /workspace/coverage/default/40.sram_ctrl_access_during_key_req.2376823064 |
| /workspace/coverage/default/40.sram_ctrl_alert_test.3960713487 |
| /workspace/coverage/default/40.sram_ctrl_bijection.1123507957 |
| /workspace/coverage/default/40.sram_ctrl_executable.4268689172 |
| /workspace/coverage/default/40.sram_ctrl_lc_escalation.3757129456 |
| /workspace/coverage/default/40.sram_ctrl_max_throughput.3666379321 |
| /workspace/coverage/default/40.sram_ctrl_mem_partial_access.2103321272 |
| /workspace/coverage/default/40.sram_ctrl_mem_walk.1360604853 |
| /workspace/coverage/default/40.sram_ctrl_multiple_keys.3187734070 |
| /workspace/coverage/default/40.sram_ctrl_partial_access.2357091106 |
| /workspace/coverage/default/40.sram_ctrl_ram_cfg.894195861 |
| /workspace/coverage/default/40.sram_ctrl_regwen.2031750874 |
| /workspace/coverage/default/40.sram_ctrl_smoke.2214234222 |
| /workspace/coverage/default/40.sram_ctrl_stress_all.1439256684 |
| /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2016718147 |
| /workspace/coverage/default/40.sram_ctrl_stress_pipeline.408062232 |
| /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2236472217 |
| /workspace/coverage/default/41.sram_ctrl_access_during_key_req.3320113861 |
| /workspace/coverage/default/41.sram_ctrl_alert_test.3842274857 |
| /workspace/coverage/default/41.sram_ctrl_bijection.4231535775 |
| /workspace/coverage/default/41.sram_ctrl_executable.2165946180 |
| /workspace/coverage/default/41.sram_ctrl_lc_escalation.932455161 |
| /workspace/coverage/default/41.sram_ctrl_max_throughput.3061773806 |
| /workspace/coverage/default/41.sram_ctrl_mem_partial_access.2871327713 |
| /workspace/coverage/default/41.sram_ctrl_mem_walk.428000057 |
| /workspace/coverage/default/41.sram_ctrl_multiple_keys.936315927 |
| /workspace/coverage/default/41.sram_ctrl_partial_access.79201105 |
| /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.200591331 |
| /workspace/coverage/default/41.sram_ctrl_ram_cfg.702924083 |
| /workspace/coverage/default/41.sram_ctrl_regwen.1164164589 |
| /workspace/coverage/default/41.sram_ctrl_smoke.420029002 |
| /workspace/coverage/default/41.sram_ctrl_stress_all.716943351 |
| /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.2281962717 |
| /workspace/coverage/default/41.sram_ctrl_stress_pipeline.2810870109 |
| /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.2076544975 |
| /workspace/coverage/default/42.sram_ctrl_alert_test.3171745712 |
| /workspace/coverage/default/42.sram_ctrl_bijection.749598480 |
| /workspace/coverage/default/42.sram_ctrl_executable.1361004461 |
| /workspace/coverage/default/42.sram_ctrl_lc_escalation.1457953990 |
| /workspace/coverage/default/42.sram_ctrl_max_throughput.3332401450 |
| /workspace/coverage/default/42.sram_ctrl_mem_partial_access.1921383551 |
| /workspace/coverage/default/42.sram_ctrl_mem_walk.228487023 |
| /workspace/coverage/default/42.sram_ctrl_multiple_keys.3072176100 |
| /workspace/coverage/default/42.sram_ctrl_partial_access.3915721226 |
| /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.3995740886 |
| /workspace/coverage/default/42.sram_ctrl_ram_cfg.350298630 |
| /workspace/coverage/default/42.sram_ctrl_regwen.2367971673 |
| /workspace/coverage/default/42.sram_ctrl_smoke.3625003525 |
| /workspace/coverage/default/42.sram_ctrl_stress_all.2270839077 |
| /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.1405026662 |
| /workspace/coverage/default/42.sram_ctrl_stress_pipeline.2832501786 |
| /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.100260640 |
| /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2525586501 |
| /workspace/coverage/default/43.sram_ctrl_alert_test.252690682 |
| /workspace/coverage/default/43.sram_ctrl_bijection.2176527480 |
| /workspace/coverage/default/43.sram_ctrl_executable.1486504273 |
| /workspace/coverage/default/43.sram_ctrl_lc_escalation.765956839 |
| /workspace/coverage/default/43.sram_ctrl_max_throughput.3665149929 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.1337028950 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.3821364761 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.3404446975 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.2959616236 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.668676163 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.2584275077 |
| /workspace/coverage/default/43.sram_ctrl_regwen.4042993951 |
| /workspace/coverage/default/43.sram_ctrl_smoke.4294712174 |
| /workspace/coverage/default/43.sram_ctrl_stress_all.3601263607 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.4169657236 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4161561814 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.3706285048 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.1094317038 |
| /workspace/coverage/default/44.sram_ctrl_bijection.2551653572 |
| /workspace/coverage/default/44.sram_ctrl_executable.3876874411 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.3641747076 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.2257517437 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3458907299 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.3533199157 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.2051125295 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.744326110 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3508887690 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.1032946123 |
| /workspace/coverage/default/44.sram_ctrl_regwen.61608239 |
| /workspace/coverage/default/44.sram_ctrl_smoke.3896038767 |
| /workspace/coverage/default/44.sram_ctrl_stress_all.4256676312 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.833626260 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2813203999 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.3099961834 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.3459513138 |
| /workspace/coverage/default/45.sram_ctrl_bijection.2199946752 |
| /workspace/coverage/default/45.sram_ctrl_executable.600386180 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.853037982 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.408789382 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.3082485290 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.3263721969 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.434617452 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.1979284522 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.1931997625 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.257684107 |
| /workspace/coverage/default/45.sram_ctrl_regwen.26731106 |
| /workspace/coverage/default/45.sram_ctrl_smoke.3004444959 |
| /workspace/coverage/default/45.sram_ctrl_stress_all.962309563 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.813354032 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.145413281 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1585639642 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.843254219 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.2091024731 |
| /workspace/coverage/default/46.sram_ctrl_bijection.1462024219 |
| /workspace/coverage/default/46.sram_ctrl_executable.1292300031 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.1643477043 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.2061629744 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.1600641119 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.750194084 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.4143801834 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.794852881 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2323115738 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.2532863884 |
| /workspace/coverage/default/46.sram_ctrl_regwen.1581542443 |
| /workspace/coverage/default/46.sram_ctrl_smoke.329801299 |
| /workspace/coverage/default/46.sram_ctrl_stress_all.3331485040 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3566147055 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2484993348 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.3594602047 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.173007033 |
| /workspace/coverage/default/47.sram_ctrl_bijection.2752412722 |
| /workspace/coverage/default/47.sram_ctrl_executable.3507632008 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.1072322159 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.649584335 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.4279120823 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.88454117 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.2788927642 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.2146468029 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1820158824 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.2620018135 |
| /workspace/coverage/default/47.sram_ctrl_regwen.105397397 |
| /workspace/coverage/default/47.sram_ctrl_smoke.2103289707 |
| /workspace/coverage/default/47.sram_ctrl_stress_all.2249960125 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.4003513493 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.2381094596 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.1048672574 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.156643330 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.1095384572 |
| /workspace/coverage/default/48.sram_ctrl_bijection.2052756976 |
| /workspace/coverage/default/48.sram_ctrl_executable.4151052321 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.1378676673 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.4132858660 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.3757972078 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.122840123 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.621067441 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.1161627928 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.9388285 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.2853831165 |
| /workspace/coverage/default/48.sram_ctrl_regwen.3732127015 |
| /workspace/coverage/default/48.sram_ctrl_smoke.1022076714 |
| /workspace/coverage/default/48.sram_ctrl_stress_all.235702575 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.3871645394 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3195197885 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.3188879044 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.1736537769 |
| /workspace/coverage/default/49.sram_ctrl_bijection.2755652067 |
| /workspace/coverage/default/49.sram_ctrl_executable.2310539209 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.4288949136 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.322943668 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.3224670034 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.2403554753 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.999858321 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.3911639956 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.92263826 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.3509094182 |
| /workspace/coverage/default/49.sram_ctrl_regwen.2721308847 |
| /workspace/coverage/default/49.sram_ctrl_smoke.943543913 |
| /workspace/coverage/default/49.sram_ctrl_stress_all.2501061486 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.2998592226 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1997804251 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4173554292 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.1748149611 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.2085616571 |
| /workspace/coverage/default/5.sram_ctrl_bijection.877110558 |
| /workspace/coverage/default/5.sram_ctrl_executable.1149441755 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.2560993759 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.373070611 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.1292913247 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.2115541819 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.2888014630 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.4167959672 |
| /workspace/coverage/default/5.sram_ctrl_partial_access_b2b.2383128719 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.2515975921 |
| /workspace/coverage/default/5.sram_ctrl_regwen.1776950884 |
| /workspace/coverage/default/5.sram_ctrl_smoke.2222843393 |
| /workspace/coverage/default/5.sram_ctrl_stress_all.4112601876 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2216480903 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.658444768 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3700879840 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.1309641063 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.3492823061 |
| /workspace/coverage/default/6.sram_ctrl_bijection.536649560 |
| /workspace/coverage/default/6.sram_ctrl_executable.2355303239 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.1054551513 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.3967336649 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.3967859671 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.1830335536 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.1796458797 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.4181097035 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3812797145 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.385059204 |
| /workspace/coverage/default/6.sram_ctrl_regwen.2821220791 |
| /workspace/coverage/default/6.sram_ctrl_smoke.1630123014 |
| /workspace/coverage/default/6.sram_ctrl_stress_all.2591227916 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.1714776463 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3170039985 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.2291064450 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.3106947482 |
| /workspace/coverage/default/7.sram_ctrl_bijection.2457989802 |
| /workspace/coverage/default/7.sram_ctrl_executable.1935950670 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.1457573709 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.355353799 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.2734932095 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.1622346117 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.2638130484 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.2854887698 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2412255902 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.4111416446 |
| /workspace/coverage/default/7.sram_ctrl_regwen.20584122 |
| /workspace/coverage/default/7.sram_ctrl_smoke.2902502241 |
| /workspace/coverage/default/7.sram_ctrl_stress_all.1491386286 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.4211251516 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3920586470 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2554270014 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3801742484 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.3338024483 |
| /workspace/coverage/default/8.sram_ctrl_bijection.3155664457 |
| /workspace/coverage/default/8.sram_ctrl_executable.1598263645 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.2482274710 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.2115261055 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2185406114 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.598653865 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.2482251416 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.1327560833 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2841254629 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.1618097252 |
| /workspace/coverage/default/8.sram_ctrl_regwen.788286708 |
| /workspace/coverage/default/8.sram_ctrl_smoke.1132662869 |
| /workspace/coverage/default/8.sram_ctrl_stress_all.3567512699 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.350825262 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2460852747 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1487621747 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.3108664633 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.1387841919 |
| /workspace/coverage/default/9.sram_ctrl_bijection.569783719 |
| /workspace/coverage/default/9.sram_ctrl_executable.1832213853 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.2754092805 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.1635619356 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.3595884681 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.744530203 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.1696877065 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.3933699260 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3068431495 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.3678222296 |
| /workspace/coverage/default/9.sram_ctrl_regwen.3786451845 |
| /workspace/coverage/default/9.sram_ctrl_smoke.1860946546 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1225037103 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.848855055 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/24.sram_ctrl_stress_all.482377959 |
|
|
Aug 02 07:07:34 PM PDT 24 |
Aug 02 07:49:39 PM PDT 24 |
71801478114 ps |
| T2 |
/workspace/coverage/default/29.sram_ctrl_stress_pipeline.3417005748 |
|
|
Aug 02 07:09:24 PM PDT 24 |
Aug 02 07:15:10 PM PDT 24 |
14540248234 ps |
| T3 |
/workspace/coverage/default/18.sram_ctrl_smoke.3860429217 |
|
|
Aug 02 07:04:55 PM PDT 24 |
Aug 02 07:07:04 PM PDT 24 |
285318621 ps |
| T8 |
/workspace/coverage/default/31.sram_ctrl_alert_test.2257714261 |
|
|
Aug 02 07:10:13 PM PDT 24 |
Aug 02 07:10:14 PM PDT 24 |
13620016 ps |
| T4 |
/workspace/coverage/default/40.sram_ctrl_partial_access_b2b.3311737100 |
|
|
Aug 02 07:12:46 PM PDT 24 |
Aug 02 07:19:16 PM PDT 24 |
17653618521 ps |
| T5 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.3082485290 |
|
|
Aug 02 07:14:46 PM PDT 24 |
Aug 02 07:14:52 PM PDT 24 |
592924289 ps |
| T9 |
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2412255902 |
|
|
Aug 02 07:01:40 PM PDT 24 |
Aug 02 07:08:43 PM PDT 24 |
32430714360 ps |
| T10 |
/workspace/coverage/default/38.sram_ctrl_stress_pipeline.2246505180 |
|
|
Aug 02 07:12:11 PM PDT 24 |
Aug 02 07:16:31 PM PDT 24 |
2832966761 ps |
| T11 |
/workspace/coverage/default/4.sram_ctrl_alert_test.2797222828 |
|
|
Aug 02 07:00:18 PM PDT 24 |
Aug 02 07:00:19 PM PDT 24 |
13778656 ps |
| T12 |
/workspace/coverage/default/46.sram_ctrl_mem_walk.750194084 |
|
|
Aug 02 07:15:05 PM PDT 24 |
Aug 02 07:15:11 PM PDT 24 |
1243490047 ps |
| T22 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1465479370 |
|
|
Aug 02 07:02:34 PM PDT 24 |
Aug 02 07:09:08 PM PDT 24 |
12501695367 ps |
| T41 |
/workspace/coverage/default/23.sram_ctrl_partial_access.541282715 |
|
|
Aug 02 07:07:03 PM PDT 24 |
Aug 02 07:07:14 PM PDT 24 |
570699999 ps |
| T6 |
/workspace/coverage/default/45.sram_ctrl_lc_escalation.853037982 |
|
|
Aug 02 07:14:24 PM PDT 24 |
Aug 02 07:14:30 PM PDT 24 |
947031435 ps |
| T55 |
/workspace/coverage/default/35.sram_ctrl_max_throughput.426239461 |
|
|
Aug 02 07:11:39 PM PDT 24 |
Aug 02 07:13:03 PM PDT 24 |
493623199 ps |
| T23 |
/workspace/coverage/default/20.sram_ctrl_partial_access.2975764942 |
|
|
Aug 02 07:05:56 PM PDT 24 |
Aug 02 07:06:02 PM PDT 24 |
68642820 ps |
| T56 |
/workspace/coverage/default/40.sram_ctrl_stress_pipeline.408062232 |
|
|
Aug 02 07:12:45 PM PDT 24 |
Aug 02 07:16:18 PM PDT 24 |
4200774822 ps |
| T21 |
/workspace/coverage/default/40.sram_ctrl_regwen.2031750874 |
|
|
Aug 02 07:13:03 PM PDT 24 |
Aug 02 07:47:24 PM PDT 24 |
23996005505 ps |
| T17 |
/workspace/coverage/default/49.sram_ctrl_bijection.2755652067 |
|
|
Aug 02 07:15:53 PM PDT 24 |
Aug 02 07:16:45 PM PDT 24 |
793438526 ps |
| T57 |
/workspace/coverage/default/28.sram_ctrl_smoke.3683111106 |
|
|
Aug 02 07:08:55 PM PDT 24 |
Aug 02 07:09:41 PM PDT 24 |
3011685515 ps |
| T18 |
/workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3938397922 |
|
|
Aug 02 07:08:34 PM PDT 24 |
Aug 02 07:09:03 PM PDT 24 |
1623941170 ps |
| T58 |
/workspace/coverage/default/39.sram_ctrl_partial_access.2486207262 |
|
|
Aug 02 07:12:28 PM PDT 24 |
Aug 02 07:12:45 PM PDT 24 |
1209968078 ps |
| T24 |
/workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.3644801011 |
|
|
Aug 02 07:07:46 PM PDT 24 |
Aug 02 07:09:07 PM PDT 24 |
2055280067 ps |
| T59 |
/workspace/coverage/default/22.sram_ctrl_max_throughput.1733364957 |
|
|
Aug 02 07:06:42 PM PDT 24 |
Aug 02 07:08:20 PM PDT 24 |
126107001 ps |
| T47 |
/workspace/coverage/default/37.sram_ctrl_mem_partial_access.4014771889 |
|
|
Aug 02 07:11:57 PM PDT 24 |
Aug 02 07:12:03 PM PDT 24 |
353375463 ps |
| T60 |
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.668676163 |
|
|
Aug 02 07:13:44 PM PDT 24 |
Aug 02 07:18:42 PM PDT 24 |
4120551019 ps |
| T7 |
/workspace/coverage/default/29.sram_ctrl_lc_escalation.2975194762 |
|
|
Aug 02 07:09:27 PM PDT 24 |
Aug 02 07:09:35 PM PDT 24 |
7843062732 ps |
| T26 |
/workspace/coverage/default/7.sram_ctrl_executable.1935950670 |
|
|
Aug 02 07:01:39 PM PDT 24 |
Aug 02 07:14:36 PM PDT 24 |
16627270370 ps |
| T61 |
/workspace/coverage/default/26.sram_ctrl_max_throughput.2448271687 |
|
|
Aug 02 07:07:58 PM PDT 24 |
Aug 02 07:08:54 PM PDT 24 |
415001288 ps |
| T62 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.1023086654 |
|
|
Aug 02 07:06:42 PM PDT 24 |
Aug 02 07:14:46 PM PDT 24 |
92652799376 ps |
| T25 |
/workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.2272333558 |
|
|
Aug 02 07:07:35 PM PDT 24 |
Aug 02 07:08:43 PM PDT 24 |
4236039092 ps |
| T50 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3042189467 |
|
|
Aug 02 07:03:08 PM PDT 24 |
Aug 02 07:03:14 PM PDT 24 |
231514495 ps |
| T127 |
/workspace/coverage/default/33.sram_ctrl_partial_access.1264782857 |
|
|
Aug 02 07:10:26 PM PDT 24 |
Aug 02 07:10:28 PM PDT 24 |
229704556 ps |
| T102 |
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1225037103 |
|
|
Aug 02 07:01:47 PM PDT 24 |
Aug 02 07:06:29 PM PDT 24 |
14800515510 ps |
| T134 |
/workspace/coverage/default/3.sram_ctrl_multiple_keys.2063717254 |
|
|
Aug 02 06:59:34 PM PDT 24 |
Aug 02 07:23:59 PM PDT 24 |
13463859953 ps |
| T103 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1854329865 |
|
|
Aug 02 07:02:41 PM PDT 24 |
Aug 02 07:08:46 PM PDT 24 |
3923260511 ps |
| T132 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.2046262690 |
|
|
Aug 02 07:12:16 PM PDT 24 |
Aug 02 07:14:43 PM PDT 24 |
137717474 ps |
| T13 |
/workspace/coverage/default/3.sram_ctrl_alert_test.1133763290 |
|
|
Aug 02 06:59:59 PM PDT 24 |
Aug 02 07:00:00 PM PDT 24 |
43781207 ps |
| T51 |
/workspace/coverage/default/11.sram_ctrl_mem_walk.552719083 |
|
|
Aug 02 07:02:44 PM PDT 24 |
Aug 02 07:02:55 PM PDT 24 |
1759839783 ps |
| T52 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.158337237 |
|
|
Aug 02 07:08:34 PM PDT 24 |
Aug 02 07:08:45 PM PDT 24 |
884862014 ps |
| T125 |
/workspace/coverage/default/10.sram_ctrl_executable.1886070042 |
|
|
Aug 02 07:02:33 PM PDT 24 |
Aug 02 07:20:39 PM PDT 24 |
75677329620 ps |
| T20 |
/workspace/coverage/default/24.sram_ctrl_lc_escalation.378141819 |
|
|
Aug 02 07:07:23 PM PDT 24 |
Aug 02 07:07:31 PM PDT 24 |
5006400481 ps |
| T53 |
/workspace/coverage/default/38.sram_ctrl_mem_partial_access.3765985185 |
|
|
Aug 02 07:12:26 PM PDT 24 |
Aug 02 07:12:29 PM PDT 24 |
209636147 ps |
| T27 |
/workspace/coverage/default/42.sram_ctrl_ram_cfg.350298630 |
|
|
Aug 02 07:13:29 PM PDT 24 |
Aug 02 07:13:30 PM PDT 24 |
25990717 ps |
| T135 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.2115261055 |
|
|
Aug 02 07:01:39 PM PDT 24 |
Aug 02 07:01:58 PM PDT 24 |
295220503 ps |
| T124 |
/workspace/coverage/default/44.sram_ctrl_executable.3876874411 |
|
|
Aug 02 07:13:59 PM PDT 24 |
Aug 02 07:40:29 PM PDT 24 |
10535604709 ps |
| T54 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1160423704 |
|
|
Aug 02 07:00:01 PM PDT 24 |
Aug 02 07:06:26 PM PDT 24 |
1720919082 ps |
| T128 |
/workspace/coverage/default/41.sram_ctrl_alert_test.3842274857 |
|
|
Aug 02 07:13:19 PM PDT 24 |
Aug 02 07:13:20 PM PDT 24 |
48438164 ps |
| T131 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.2948898710 |
|
|
Aug 02 07:03:41 PM PDT 24 |
Aug 02 07:03:51 PM PDT 24 |
756114738 ps |
| T66 |
/workspace/coverage/default/4.sram_ctrl_regwen.3654826793 |
|
|
Aug 02 07:00:18 PM PDT 24 |
Aug 02 07:20:39 PM PDT 24 |
15851271831 ps |
| T42 |
/workspace/coverage/default/42.sram_ctrl_access_during_key_req.666660982 |
|
|
Aug 02 07:13:31 PM PDT 24 |
Aug 02 07:35:42 PM PDT 24 |
9164063596 ps |
| T136 |
/workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.2485659073 |
|
|
Aug 02 07:10:25 PM PDT 24 |
Aug 02 07:12:40 PM PDT 24 |
906799035 ps |
| T19 |
/workspace/coverage/default/28.sram_ctrl_stress_all.3390874891 |
|
|
Aug 02 07:09:12 PM PDT 24 |
Aug 02 07:58:39 PM PDT 24 |
187249673802 ps |
| T137 |
/workspace/coverage/default/22.sram_ctrl_alert_test.714075943 |
|
|
Aug 02 07:06:52 PM PDT 24 |
Aug 02 07:06:52 PM PDT 24 |
23485867 ps |
| T48 |
/workspace/coverage/default/28.sram_ctrl_mem_partial_access.1382567536 |
|
|
Aug 02 07:09:13 PM PDT 24 |
Aug 02 07:09:19 PM PDT 24 |
774474690 ps |
| T138 |
/workspace/coverage/default/35.sram_ctrl_smoke.1187422990 |
|
|
Aug 02 07:11:39 PM PDT 24 |
Aug 02 07:12:28 PM PDT 24 |
411238206 ps |
| T87 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.621301347 |
|
|
Aug 02 07:07:34 PM PDT 24 |
Aug 02 07:07:38 PM PDT 24 |
75297496 ps |
| T129 |
/workspace/coverage/default/45.sram_ctrl_executable.600386180 |
|
|
Aug 02 07:14:28 PM PDT 24 |
Aug 02 07:25:22 PM PDT 24 |
6568637530 ps |
| T139 |
/workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.3797363960 |
|
|
Aug 02 06:59:46 PM PDT 24 |
Aug 02 07:01:52 PM PDT 24 |
978813749 ps |
| T140 |
/workspace/coverage/default/17.sram_ctrl_max_throughput.2273540446 |
|
|
Aug 02 07:04:49 PM PDT 24 |
Aug 02 07:07:00 PM PDT 24 |
566267487 ps |
| T130 |
/workspace/coverage/default/39.sram_ctrl_stress_pipeline.1461196442 |
|
|
Aug 02 07:12:29 PM PDT 24 |
Aug 02 07:18:06 PM PDT 24 |
6824318441 ps |
| T49 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.2764494523 |
|
|
Aug 02 07:00:20 PM PDT 24 |
Aug 02 07:00:26 PM PDT 24 |
389071084 ps |
| T45 |
/workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.1993020655 |
|
|
Aug 02 07:00:18 PM PDT 24 |
Aug 02 07:00:43 PM PDT 24 |
3921236070 ps |
| T141 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3492823061 |
|
|
Aug 02 07:01:40 PM PDT 24 |
Aug 02 07:01:41 PM PDT 24 |
68275945 ps |
| T126 |
/workspace/coverage/default/43.sram_ctrl_executable.1486504273 |
|
|
Aug 02 07:13:45 PM PDT 24 |
Aug 02 07:33:54 PM PDT 24 |
21420002883 ps |
| T43 |
/workspace/coverage/default/13.sram_ctrl_access_during_key_req.3335690977 |
|
|
Aug 02 07:03:39 PM PDT 24 |
Aug 02 07:10:42 PM PDT 24 |
5577081148 ps |
| T142 |
/workspace/coverage/default/21.sram_ctrl_smoke.419385679 |
|
|
Aug 02 07:06:15 PM PDT 24 |
Aug 02 07:06:17 PM PDT 24 |
324054472 ps |
| T73 |
/workspace/coverage/default/22.sram_ctrl_stress_all.1407832076 |
|
|
Aug 02 07:06:52 PM PDT 24 |
Aug 02 08:06:39 PM PDT 24 |
276436730177 ps |
| T44 |
/workspace/coverage/default/22.sram_ctrl_access_during_key_req.153970652 |
|
|
Aug 02 07:06:41 PM PDT 24 |
Aug 02 07:17:29 PM PDT 24 |
11903845933 ps |
| T143 |
/workspace/coverage/default/26.sram_ctrl_partial_access.2900520399 |
|
|
Aug 02 07:07:57 PM PDT 24 |
Aug 02 07:08:10 PM PDT 24 |
1724999966 ps |
| T144 |
/workspace/coverage/default/36.sram_ctrl_smoke.189054654 |
|
|
Aug 02 07:11:40 PM PDT 24 |
Aug 02 07:12:55 PM PDT 24 |
232642875 ps |
| T88 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.35708169 |
|
|
Aug 02 07:02:42 PM PDT 24 |
Aug 02 07:10:07 PM PDT 24 |
4726953152 ps |
| T145 |
/workspace/coverage/default/3.sram_ctrl_access_during_key_req.479609114 |
|
|
Aug 02 06:59:47 PM PDT 24 |
Aug 02 07:09:58 PM PDT 24 |
3020425103 ps |
| T146 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.3959066001 |
|
|
Aug 02 06:59:18 PM PDT 24 |
Aug 02 07:05:55 PM PDT 24 |
18796959846 ps |
| T14 |
/workspace/coverage/default/2.sram_ctrl_sec_cm.1754885460 |
|
|
Aug 02 06:59:31 PM PDT 24 |
Aug 02 06:59:34 PM PDT 24 |
745922906 ps |
| T32 |
/workspace/coverage/default/26.sram_ctrl_executable.2306941733 |
|
|
Aug 02 07:08:08 PM PDT 24 |
Aug 02 07:18:35 PM PDT 24 |
29586942316 ps |
| T33 |
/workspace/coverage/default/40.sram_ctrl_mem_walk.1360604853 |
|
|
Aug 02 07:13:04 PM PDT 24 |
Aug 02 07:13:09 PM PDT 24 |
237038167 ps |
| T34 |
/workspace/coverage/default/42.sram_ctrl_partial_access.3915721226 |
|
|
Aug 02 07:13:20 PM PDT 24 |
Aug 02 07:13:30 PM PDT 24 |
3502263787 ps |
| T35 |
/workspace/coverage/default/47.sram_ctrl_bijection.2752412722 |
|
|
Aug 02 07:15:18 PM PDT 24 |
Aug 02 07:15:33 PM PDT 24 |
232316467 ps |
| T36 |
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1820158824 |
|
|
Aug 02 07:15:17 PM PDT 24 |
Aug 02 07:21:04 PM PDT 24 |
13376490612 ps |
| T37 |
/workspace/coverage/default/32.sram_ctrl_partial_access_b2b.484035298 |
|
|
Aug 02 07:10:11 PM PDT 24 |
Aug 02 07:14:11 PM PDT 24 |
3309409397 ps |
| T38 |
/workspace/coverage/default/9.sram_ctrl_smoke.1860946546 |
|
|
Aug 02 07:01:50 PM PDT 24 |
Aug 02 07:03:07 PM PDT 24 |
579881378 ps |
| T39 |
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3153839059 |
|
|
Aug 02 07:02:43 PM PDT 24 |
Aug 02 07:02:49 PM PDT 24 |
684261583 ps |
| T40 |
/workspace/coverage/default/26.sram_ctrl_stress_all.1452870666 |
|
|
Aug 02 07:08:08 PM PDT 24 |
Aug 02 07:38:57 PM PDT 24 |
144770772168 ps |
| T147 |
/workspace/coverage/default/22.sram_ctrl_multiple_keys.2710256858 |
|
|
Aug 02 07:06:25 PM PDT 24 |
Aug 02 07:12:32 PM PDT 24 |
11874077721 ps |
| T148 |
/workspace/coverage/default/19.sram_ctrl_bijection.2416066193 |
|
|
Aug 02 07:05:30 PM PDT 24 |
Aug 02 07:06:01 PM PDT 24 |
2254001719 ps |
| T149 |
/workspace/coverage/default/23.sram_ctrl_mem_partial_access.857740217 |
|
|
Aug 02 07:07:21 PM PDT 24 |
Aug 02 07:07:24 PM PDT 24 |
98598547 ps |
| T150 |
/workspace/coverage/default/37.sram_ctrl_multiple_keys.3565583836 |
|
|
Aug 02 07:11:58 PM PDT 24 |
Aug 02 07:16:16 PM PDT 24 |
856175311 ps |
| T151 |
/workspace/coverage/default/13.sram_ctrl_partial_access.2701485704 |
|
|
Aug 02 07:03:28 PM PDT 24 |
Aug 02 07:05:17 PM PDT 24 |
3047679043 ps |
| T152 |
/workspace/coverage/default/14.sram_ctrl_partial_access_b2b.515764805 |
|
|
Aug 02 07:03:39 PM PDT 24 |
Aug 02 07:07:23 PM PDT 24 |
9789309955 ps |
| T153 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.2871033647 |
|
|
Aug 02 07:12:27 PM PDT 24 |
Aug 02 07:18:43 PM PDT 24 |
5352453233 ps |
| T154 |
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1714776463 |
|
|
Aug 02 07:01:17 PM PDT 24 |
Aug 02 07:04:39 PM PDT 24 |
7980887885 ps |
| T155 |
/workspace/coverage/default/21.sram_ctrl_partial_access.193763679 |
|
|
Aug 02 07:06:17 PM PDT 24 |
Aug 02 07:06:28 PM PDT 24 |
1204759986 ps |
| T156 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.3594602047 |
|
|
Aug 02 07:15:17 PM PDT 24 |
Aug 02 07:30:05 PM PDT 24 |
16486801860 ps |
| T157 |
/workspace/coverage/default/2.sram_ctrl_regwen.281174841 |
|
|
Aug 02 06:59:30 PM PDT 24 |
Aug 02 07:21:02 PM PDT 24 |
13781695217 ps |
| T158 |
/workspace/coverage/default/4.sram_ctrl_bijection.1638972473 |
|
|
Aug 02 07:00:04 PM PDT 24 |
Aug 02 07:00:59 PM PDT 24 |
3454860635 ps |
| T159 |
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1309641063 |
|
|
Aug 02 07:01:38 PM PDT 24 |
Aug 02 07:11:27 PM PDT 24 |
2492190561 ps |
| T160 |
/workspace/coverage/default/27.sram_ctrl_stress_pipeline.4064545772 |
|
|
Aug 02 07:08:21 PM PDT 24 |
Aug 02 07:10:28 PM PDT 24 |
1358016183 ps |
| T161 |
/workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.3856769206 |
|
|
Aug 02 07:03:49 PM PDT 24 |
Aug 02 07:06:10 PM PDT 24 |
1033243035 ps |
| T162 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.3567309835 |
|
|
Aug 02 07:08:20 PM PDT 24 |
Aug 02 07:08:25 PM PDT 24 |
494646903 ps |
| T163 |
/workspace/coverage/default/33.sram_ctrl_multiple_keys.2097663074 |
|
|
Aug 02 07:10:26 PM PDT 24 |
Aug 02 07:23:05 PM PDT 24 |
15444834957 ps |
| T164 |
/workspace/coverage/default/16.sram_ctrl_max_throughput.315634545 |
|
|
Aug 02 07:04:34 PM PDT 24 |
Aug 02 07:06:58 PM PDT 24 |
521073470 ps |
| T165 |
/workspace/coverage/default/7.sram_ctrl_regwen.20584122 |
|
|
Aug 02 07:01:40 PM PDT 24 |
Aug 02 07:06:43 PM PDT 24 |
3455586291 ps |
| T166 |
/workspace/coverage/default/8.sram_ctrl_regwen.788286708 |
|
|
Aug 02 07:01:39 PM PDT 24 |
Aug 02 07:04:19 PM PDT 24 |
2315230295 ps |
| T167 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.159548728 |
|
|
Aug 02 07:03:11 PM PDT 24 |
Aug 02 07:03:15 PM PDT 24 |
51333597 ps |
| T168 |
/workspace/coverage/default/13.sram_ctrl_multiple_keys.1491030305 |
|
|
Aug 02 07:03:10 PM PDT 24 |
Aug 02 07:16:42 PM PDT 24 |
10709905260 ps |
| T169 |
/workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.2542143306 |
|
|
Aug 02 06:59:31 PM PDT 24 |
Aug 02 06:59:40 PM PDT 24 |
271407415 ps |
| T133 |
/workspace/coverage/default/13.sram_ctrl_stress_all.37083108 |
|
|
Aug 02 07:03:41 PM PDT 24 |
Aug 02 08:21:30 PM PDT 24 |
172304004171 ps |
| T170 |
/workspace/coverage/default/14.sram_ctrl_stress_all.3315991953 |
|
|
Aug 02 07:03:49 PM PDT 24 |
Aug 02 07:07:53 PM PDT 24 |
8228119009 ps |
| T171 |
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.27430068 |
|
|
Aug 02 07:02:33 PM PDT 24 |
Aug 02 07:06:33 PM PDT 24 |
3413606358 ps |
| T28 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.2647240535 |
|
|
Aug 02 06:59:30 PM PDT 24 |
Aug 02 06:59:31 PM PDT 24 |
68244723 ps |
| T172 |
/workspace/coverage/default/8.sram_ctrl_bijection.3155664457 |
|
|
Aug 02 07:01:39 PM PDT 24 |
Aug 02 07:02:22 PM PDT 24 |
1272472651 ps |
| T173 |
/workspace/coverage/default/9.sram_ctrl_partial_access.3933699260 |
|
|
Aug 02 07:02:04 PM PDT 24 |
Aug 02 07:02:25 PM PDT 24 |
12393350776 ps |
| T174 |
/workspace/coverage/default/34.sram_ctrl_regwen.2873345521 |
|
|
Aug 02 07:11:03 PM PDT 24 |
Aug 02 07:24:19 PM PDT 24 |
2509673734 ps |
| T46 |
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.2591261302 |
|
|
Aug 02 07:15:02 PM PDT 24 |
Aug 02 07:15:56 PM PDT 24 |
1482065068 ps |
| T175 |
/workspace/coverage/default/44.sram_ctrl_partial_access.744326110 |
|
|
Aug 02 07:14:00 PM PDT 24 |
Aug 02 07:16:28 PM PDT 24 |
6525436163 ps |
| T176 |
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3209774589 |
|
|
Aug 02 07:02:32 PM PDT 24 |
Aug 02 07:02:54 PM PDT 24 |
93381884 ps |
| T177 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2526820938 |
|
|
Aug 02 07:03:11 PM PDT 24 |
Aug 02 07:03:14 PM PDT 24 |
86885148 ps |
| T178 |
/workspace/coverage/default/20.sram_ctrl_smoke.3243274041 |
|
|
Aug 02 07:05:41 PM PDT 24 |
Aug 02 07:05:45 PM PDT 24 |
384793371 ps |
| T179 |
/workspace/coverage/default/42.sram_ctrl_smoke.3625003525 |
|
|
Aug 02 07:13:18 PM PDT 24 |
Aug 02 07:13:35 PM PDT 24 |
2006384032 ps |
| T180 |
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.848855055 |
|
|
Aug 02 07:02:04 PM PDT 24 |
Aug 02 07:03:48 PM PDT 24 |
165932139 ps |
| T181 |
/workspace/coverage/default/9.sram_ctrl_regwen.3786451845 |
|
|
Aug 02 07:02:15 PM PDT 24 |
Aug 02 07:04:13 PM PDT 24 |
40778331682 ps |
| T182 |
/workspace/coverage/default/6.sram_ctrl_max_throughput.3967336649 |
|
|
Aug 02 07:01:18 PM PDT 24 |
Aug 02 07:01:21 PM PDT 24 |
187743256 ps |
| T183 |
/workspace/coverage/default/4.sram_ctrl_partial_access.3710943375 |
|
|
Aug 02 07:00:01 PM PDT 24 |
Aug 02 07:00:34 PM PDT 24 |
134540209 ps |
| T184 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.598653865 |
|
|
Aug 02 07:01:50 PM PDT 24 |
Aug 02 07:01:56 PM PDT 24 |
406217542 ps |
| T185 |
/workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.1571166873 |
|
|
Aug 02 07:11:36 PM PDT 24 |
Aug 02 07:12:04 PM PDT 24 |
295570056 ps |
| T186 |
/workspace/coverage/default/49.sram_ctrl_multiple_keys.999858321 |
|
|
Aug 02 07:15:38 PM PDT 24 |
Aug 02 07:19:22 PM PDT 24 |
16424133169 ps |
| T187 |
/workspace/coverage/default/39.sram_ctrl_regwen.304238739 |
|
|
Aug 02 07:12:44 PM PDT 24 |
Aug 02 07:39:31 PM PDT 24 |
9028144332 ps |
| T188 |
/workspace/coverage/default/3.sram_ctrl_partial_access.1480008717 |
|
|
Aug 02 06:59:45 PM PDT 24 |
Aug 02 07:00:00 PM PDT 24 |
780751776 ps |
| T29 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.414574515 |
|
|
Aug 02 07:03:13 PM PDT 24 |
Aug 02 07:03:13 PM PDT 24 |
103113964 ps |
| T189 |
/workspace/coverage/default/11.sram_ctrl_ram_cfg.832424923 |
|
|
Aug 02 07:02:42 PM PDT 24 |
Aug 02 07:02:43 PM PDT 24 |
31261779 ps |
| T190 |
/workspace/coverage/default/25.sram_ctrl_alert_test.4122391514 |
|
|
Aug 02 07:07:57 PM PDT 24 |
Aug 02 07:07:58 PM PDT 24 |
14650784 ps |
| T191 |
/workspace/coverage/default/6.sram_ctrl_executable.2355303239 |
|
|
Aug 02 07:01:40 PM PDT 24 |
Aug 02 07:15:25 PM PDT 24 |
11316722299 ps |
| T192 |
/workspace/coverage/default/12.sram_ctrl_smoke.1317791955 |
|
|
Aug 02 07:02:44 PM PDT 24 |
Aug 02 07:02:56 PM PDT 24 |
385286270 ps |
| T113 |
/workspace/coverage/default/29.sram_ctrl_stress_all.4048133077 |
|
|
Aug 02 07:09:27 PM PDT 24 |
Aug 02 07:57:00 PM PDT 24 |
52349644645 ps |
| T193 |
/workspace/coverage/default/3.sram_ctrl_max_throughput.3183840323 |
|
|
Aug 02 06:59:45 PM PDT 24 |
Aug 02 07:02:09 PM PDT 24 |
271634234 ps |
| T194 |
/workspace/coverage/default/41.sram_ctrl_executable.2165946180 |
|
|
Aug 02 07:13:19 PM PDT 24 |
Aug 02 07:20:28 PM PDT 24 |
20290672678 ps |
| T195 |
/workspace/coverage/default/15.sram_ctrl_mem_partial_access.4214488938 |
|
|
Aug 02 07:04:18 PM PDT 24 |
Aug 02 07:04:21 PM PDT 24 |
109324229 ps |
| T196 |
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1072387792 |
|
|
Aug 02 07:03:14 PM PDT 24 |
Aug 02 07:20:05 PM PDT 24 |
2954405981 ps |
| T197 |
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3224670034 |
|
|
Aug 02 07:15:52 PM PDT 24 |
Aug 02 07:15:55 PM PDT 24 |
128362588 ps |
| T198 |
/workspace/coverage/default/12.sram_ctrl_alert_test.1333893021 |
|
|
Aug 02 07:03:11 PM PDT 24 |
Aug 02 07:03:11 PM PDT 24 |
41580690 ps |
| T199 |
/workspace/coverage/default/37.sram_ctrl_ram_cfg.747807005 |
|
|
Aug 02 07:12:01 PM PDT 24 |
Aug 02 07:12:02 PM PDT 24 |
30380263 ps |
| T200 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3319187915 |
|
|
Aug 02 07:05:08 PM PDT 24 |
Aug 02 07:05:11 PM PDT 24 |
69684011 ps |
| T114 |
/workspace/coverage/default/1.sram_ctrl_stress_all.3263147818 |
|
|
Aug 02 06:59:06 PM PDT 24 |
Aug 02 07:45:57 PM PDT 24 |
173453886819 ps |
| T201 |
/workspace/coverage/default/42.sram_ctrl_lc_escalation.1457953990 |
|
|
Aug 02 07:13:28 PM PDT 24 |
Aug 02 07:13:33 PM PDT 24 |
338023727 ps |
| T202 |
/workspace/coverage/default/13.sram_ctrl_regwen.2002586859 |
|
|
Aug 02 07:03:40 PM PDT 24 |
Aug 02 07:18:47 PM PDT 24 |
39806100208 ps |
| T203 |
/workspace/coverage/default/14.sram_ctrl_executable.618278689 |
|
|
Aug 02 07:03:52 PM PDT 24 |
Aug 02 07:11:15 PM PDT 24 |
1534193611 ps |
| T204 |
/workspace/coverage/default/4.sram_ctrl_access_during_key_req.55865726 |
|
|
Aug 02 07:00:21 PM PDT 24 |
Aug 02 07:16:26 PM PDT 24 |
2725013942 ps |
| T205 |
/workspace/coverage/default/21.sram_ctrl_regwen.964309204 |
|
|
Aug 02 07:06:28 PM PDT 24 |
Aug 02 07:16:57 PM PDT 24 |
2502758968 ps |
| T206 |
/workspace/coverage/default/16.sram_ctrl_regwen.250494980 |
|
|
Aug 02 07:04:34 PM PDT 24 |
Aug 02 07:22:21 PM PDT 24 |
19353061575 ps |
| T207 |
/workspace/coverage/default/33.sram_ctrl_access_during_key_req.4091609684 |
|
|
Aug 02 07:10:39 PM PDT 24 |
Aug 02 07:23:19 PM PDT 24 |
4891754245 ps |
| T208 |
/workspace/coverage/default/26.sram_ctrl_stress_pipeline.1319719849 |
|
|
Aug 02 07:07:58 PM PDT 24 |
Aug 02 07:11:16 PM PDT 24 |
5027003009 ps |
| T69 |
/workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.2181237095 |
|
|
Aug 02 07:11:04 PM PDT 24 |
Aug 02 07:11:46 PM PDT 24 |
3235850149 ps |
| T209 |
/workspace/coverage/default/20.sram_ctrl_ram_cfg.2239553485 |
|
|
Aug 02 07:06:17 PM PDT 24 |
Aug 02 07:06:18 PM PDT 24 |
73368045 ps |
| T210 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.631292883 |
|
|
Aug 02 07:05:58 PM PDT 24 |
Aug 02 07:22:30 PM PDT 24 |
19520264177 ps |
| T211 |
/workspace/coverage/default/44.sram_ctrl_regwen.61608239 |
|
|
Aug 02 07:14:13 PM PDT 24 |
Aug 02 07:16:41 PM PDT 24 |
3270864149 ps |
| T212 |
/workspace/coverage/default/21.sram_ctrl_mem_partial_access.260914246 |
|
|
Aug 02 07:06:27 PM PDT 24 |
Aug 02 07:06:31 PM PDT 24 |
63418014 ps |
| T213 |
/workspace/coverage/default/8.sram_ctrl_executable.1598263645 |
|
|
Aug 02 07:01:39 PM PDT 24 |
Aug 02 07:10:54 PM PDT 24 |
13681228537 ps |
| T214 |
/workspace/coverage/default/8.sram_ctrl_alert_test.3338024483 |
|
|
Aug 02 07:01:50 PM PDT 24 |
Aug 02 07:01:51 PM PDT 24 |
45546131 ps |
| T215 |
/workspace/coverage/default/33.sram_ctrl_bijection.1767175013 |
|
|
Aug 02 07:10:27 PM PDT 24 |
Aug 02 07:11:39 PM PDT 24 |
6469664214 ps |
| T216 |
/workspace/coverage/default/41.sram_ctrl_smoke.420029002 |
|
|
Aug 02 07:13:02 PM PDT 24 |
Aug 02 07:13:10 PM PDT 24 |
269297723 ps |
| T217 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1600641119 |
|
|
Aug 02 07:15:04 PM PDT 24 |
Aug 02 07:15:07 PM PDT 24 |
88623607 ps |
| T218 |
/workspace/coverage/default/20.sram_ctrl_multiple_keys.814558982 |
|
|
Aug 02 07:05:42 PM PDT 24 |
Aug 02 07:28:20 PM PDT 24 |
63973957478 ps |
| T219 |
/workspace/coverage/default/48.sram_ctrl_stress_all.235702575 |
|
|
Aug 02 07:15:41 PM PDT 24 |
Aug 02 07:56:39 PM PDT 24 |
160248669530 ps |
| T220 |
/workspace/coverage/default/20.sram_ctrl_stress_all.3011715582 |
|
|
Aug 02 07:06:16 PM PDT 24 |
Aug 02 08:10:00 PM PDT 24 |
173058400415 ps |
| T221 |
/workspace/coverage/default/31.sram_ctrl_multiple_keys.3774390004 |
|
|
Aug 02 07:09:58 PM PDT 24 |
Aug 02 07:22:49 PM PDT 24 |
45579302804 ps |
| T222 |
/workspace/coverage/default/38.sram_ctrl_regwen.3359151329 |
|
|
Aug 02 07:12:15 PM PDT 24 |
Aug 02 07:22:37 PM PDT 24 |
43558837023 ps |
| T223 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2484993348 |
|
|
Aug 02 07:15:05 PM PDT 24 |
Aug 02 07:16:25 PM PDT 24 |
493573556 ps |
| T224 |
/workspace/coverage/default/49.sram_ctrl_partial_access.3911639956 |
|
|
Aug 02 07:15:54 PM PDT 24 |
Aug 02 07:15:56 PM PDT 24 |
267389770 ps |
| T225 |
/workspace/coverage/default/3.sram_ctrl_stress_all.2331672246 |
|
|
Aug 02 07:00:05 PM PDT 24 |
Aug 02 07:41:55 PM PDT 24 |
30815170593 ps |
| T226 |
/workspace/coverage/default/36.sram_ctrl_stress_all.861257145 |
|
|
Aug 02 07:11:58 PM PDT 24 |
Aug 02 07:49:39 PM PDT 24 |
26951030423 ps |
| T227 |
/workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.2076544975 |
|
|
Aug 02 07:13:18 PM PDT 24 |
Aug 02 07:13:32 PM PDT 24 |
122396474 ps |
| T228 |
/workspace/coverage/default/25.sram_ctrl_max_throughput.2783944370 |
|
|
Aug 02 07:07:36 PM PDT 24 |
Aug 02 07:09:53 PM PDT 24 |
538744817 ps |
| T229 |
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4161561814 |
|
|
Aug 02 07:13:46 PM PDT 24 |
Aug 02 07:14:24 PM PDT 24 |
100063692 ps |
| T230 |
/workspace/coverage/default/19.sram_ctrl_executable.992643251 |
|
|
Aug 02 07:05:42 PM PDT 24 |
Aug 02 07:17:03 PM PDT 24 |
8123741231 ps |
| T231 |
/workspace/coverage/default/46.sram_ctrl_max_throughput.2061629744 |
|
|
Aug 02 07:15:06 PM PDT 24 |
Aug 02 07:15:21 PM PDT 24 |
593503113 ps |
| T232 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3404446975 |
|
|
Aug 02 07:13:43 PM PDT 24 |
Aug 02 07:20:38 PM PDT 24 |
10313706848 ps |
| T233 |
/workspace/coverage/default/3.sram_ctrl_regwen.185093281 |
|
|
Aug 02 06:59:46 PM PDT 24 |
Aug 02 07:05:44 PM PDT 24 |
4336481178 ps |
| T234 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.3204189380 |
|
|
Aug 02 07:10:12 PM PDT 24 |
Aug 02 07:13:10 PM PDT 24 |
6759517238 ps |
| T235 |
/workspace/coverage/default/11.sram_ctrl_alert_test.3647633489 |
|
|
Aug 02 07:02:44 PM PDT 24 |
Aug 02 07:02:45 PM PDT 24 |
14669661 ps |
| T236 |
/workspace/coverage/default/32.sram_ctrl_stress_all.2349913173 |
|
|
Aug 02 07:10:26 PM PDT 24 |
Aug 02 08:54:39 PM PDT 24 |
296748358298 ps |
| T237 |
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.2633316070 |
|
|
Aug 02 07:02:33 PM PDT 24 |
Aug 02 07:02:36 PM PDT 24 |
123153797 ps |
| T238 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3068431495 |
|
|
Aug 02 07:02:03 PM PDT 24 |
Aug 02 07:06:13 PM PDT 24 |
10250757255 ps |
| T239 |
/workspace/coverage/default/22.sram_ctrl_regwen.442193490 |
|
|
Aug 02 07:06:41 PM PDT 24 |
Aug 02 07:20:27 PM PDT 24 |
62162374537 ps |
| T240 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.3533199157 |
|
|
Aug 02 07:14:11 PM PDT 24 |
Aug 02 07:14:19 PM PDT 24 |
141770325 ps |
| T241 |
/workspace/coverage/default/32.sram_ctrl_ram_cfg.1900138778 |
|
|
Aug 02 07:10:27 PM PDT 24 |
Aug 02 07:10:28 PM PDT 24 |
85258324 ps |
| T242 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2460852747 |
|
|
Aug 02 07:01:39 PM PDT 24 |
Aug 02 07:04:17 PM PDT 24 |
6669422482 ps |
| T243 |
/workspace/coverage/default/22.sram_ctrl_ram_cfg.2213256034 |
|
|
Aug 02 07:06:41 PM PDT 24 |
Aug 02 07:06:41 PM PDT 24 |
80593334 ps |
| T244 |
/workspace/coverage/default/49.sram_ctrl_lc_escalation.4288949136 |
|
|
Aug 02 07:15:51 PM PDT 24 |
Aug 02 07:15:54 PM PDT 24 |
170217313 ps |
| T245 |
/workspace/coverage/default/24.sram_ctrl_bijection.1109625059 |
|
|
Aug 02 07:07:14 PM PDT 24 |
Aug 02 07:08:36 PM PDT 24 |
18699425188 ps |
| T70 |
/workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2750312848 |
|
|
Aug 02 07:05:40 PM PDT 24 |
Aug 02 07:06:42 PM PDT 24 |
866753645 ps |
| T246 |
/workspace/coverage/default/41.sram_ctrl_ram_cfg.702924083 |
|
|
Aug 02 07:13:17 PM PDT 24 |
Aug 02 07:13:18 PM PDT 24 |
96561461 ps |
| T247 |
/workspace/coverage/default/14.sram_ctrl_alert_test.3724649071 |
|
|
Aug 02 07:04:10 PM PDT 24 |
Aug 02 07:04:11 PM PDT 24 |
28875823 ps |
| T248 |
/workspace/coverage/default/49.sram_ctrl_alert_test.1736537769 |
|
|
Aug 02 07:15:51 PM PDT 24 |
Aug 02 07:15:52 PM PDT 24 |
23728383 ps |
| T249 |
/workspace/coverage/default/22.sram_ctrl_smoke.105264503 |
|
|
Aug 02 07:06:25 PM PDT 24 |
Aug 02 07:07:17 PM PDT 24 |
429560432 ps |
| T250 |
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2381094596 |
|
|
Aug 02 07:15:16 PM PDT 24 |
Aug 02 07:21:33 PM PDT 24 |
3888604761 ps |
| T251 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.843254219 |
|
|
Aug 02 07:15:04 PM PDT 24 |
Aug 02 07:30:34 PM PDT 24 |
3407548656 ps |
| T252 |
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.3595884681 |
|
|
Aug 02 07:02:17 PM PDT 24 |
Aug 02 07:02:20 PM PDT 24 |
176494919 ps |
| T253 |
/workspace/coverage/default/13.sram_ctrl_partial_access_b2b.1574756064 |
|
|
Aug 02 07:03:28 PM PDT 24 |
Aug 02 07:11:22 PM PDT 24 |
20042155904 ps |
| T254 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.321407721 |
|
|
Aug 02 07:07:46 PM PDT 24 |
Aug 02 07:10:25 PM PDT 24 |
8420086580 ps |
| T71 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.4042143872 |
|
|
Aug 02 06:59:06 PM PDT 24 |
Aug 02 07:03:54 PM PDT 24 |
4473136573 ps |
| T255 |
/workspace/coverage/default/47.sram_ctrl_max_throughput.649584335 |
|
|
Aug 02 07:15:15 PM PDT 24 |
Aug 02 07:15:20 PM PDT 24 |
58868743 ps |
| T256 |
/workspace/coverage/default/17.sram_ctrl_executable.3991996804 |
|
|
Aug 02 07:05:00 PM PDT 24 |
Aug 02 07:24:11 PM PDT 24 |
29316706487 ps |
| T257 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.3812047659 |
|
|
Aug 02 07:09:27 PM PDT 24 |
Aug 02 07:20:15 PM PDT 24 |
8690804471 ps |
| T258 |
/workspace/coverage/default/20.sram_ctrl_bijection.363926660 |
|
|
Aug 02 07:05:43 PM PDT 24 |
Aug 02 07:06:53 PM PDT 24 |
4388197803 ps |
| T72 |
/workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.1689033678 |
|
|
Aug 02 07:10:38 PM PDT 24 |
Aug 02 07:17:54 PM PDT 24 |
2963861778 ps |
| T259 |
/workspace/coverage/default/38.sram_ctrl_executable.2333489277 |
|
|
Aug 02 07:12:16 PM PDT 24 |
Aug 02 07:22:50 PM PDT 24 |
9343186154 ps |
| T260 |
/workspace/coverage/default/23.sram_ctrl_partial_access_b2b.4221271810 |
|
|
Aug 02 07:07:02 PM PDT 24 |
Aug 02 07:11:43 PM PDT 24 |
15720646867 ps |
| T261 |
/workspace/coverage/default/34.sram_ctrl_bijection.2436717081 |
|
|
Aug 02 07:11:02 PM PDT 24 |
Aug 02 07:11:54 PM PDT 24 |
3393928227 ps |
| T105 |
/workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.405128447 |
|
|
Aug 02 07:04:50 PM PDT 24 |
Aug 02 07:05:52 PM PDT 24 |
1965441464 ps |
| T262 |
/workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.2028699325 |
|
|
Aug 02 07:07:14 PM PDT 24 |
Aug 02 07:09:50 PM PDT 24 |
820764732 ps |
| T263 |
/workspace/coverage/default/14.sram_ctrl_stress_pipeline.4212584946 |
|
|
Aug 02 07:03:41 PM PDT 24 |
Aug 02 07:10:17 PM PDT 24 |
16062610611 ps |
| T264 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.4095534956 |
|
|
Aug 02 07:00:01 PM PDT 24 |
Aug 02 07:00:08 PM PDT 24 |
88583514 ps |
| T265 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.936315927 |
|
|
Aug 02 07:13:04 PM PDT 24 |
Aug 02 07:19:38 PM PDT 24 |
3123375096 ps |
| T266 |
/workspace/coverage/default/37.sram_ctrl_alert_test.991532823 |
|
|
Aug 02 07:12:15 PM PDT 24 |
Aug 02 07:12:16 PM PDT 24 |
15478204 ps |
| T267 |
/workspace/coverage/default/0.sram_ctrl_regwen.3757235853 |
|
|
Aug 02 06:58:29 PM PDT 24 |
Aug 02 07:01:52 PM PDT 24 |
936438133 ps |
| T268 |
/workspace/coverage/default/44.sram_ctrl_alert_test.1094317038 |
|
|
Aug 02 07:14:11 PM PDT 24 |
Aug 02 07:14:12 PM PDT 24 |
19297862 ps |
| T269 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.408789382 |
|
|
Aug 02 07:14:26 PM PDT 24 |
Aug 02 07:14:29 PM PDT 24 |
140680471 ps |
| T270 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1618097252 |
|
|
Aug 02 07:01:39 PM PDT 24 |
Aug 02 07:01:40 PM PDT 24 |
28473535 ps |
| T271 |
/workspace/coverage/default/43.sram_ctrl_regwen.4042993951 |
|
|
Aug 02 07:13:46 PM PDT 24 |
Aug 02 07:24:05 PM PDT 24 |
2001530837 ps |
| T272 |
/workspace/coverage/default/7.sram_ctrl_partial_access.2854887698 |
|
|
Aug 02 07:01:38 PM PDT 24 |
Aug 02 07:02:14 PM PDT 24 |
1051783695 ps |
| T273 |
/workspace/coverage/default/11.sram_ctrl_max_throughput.2246664942 |
|
|
Aug 02 07:02:44 PM PDT 24 |
Aug 02 07:03:18 PM PDT 24 |
352742123 ps |
| T274 |
/workspace/coverage/default/15.sram_ctrl_mem_walk.3739776283 |
|
|
Aug 02 07:04:18 PM PDT 24 |
Aug 02 07:04:30 PM PDT 24 |
2454231000 ps |
| T275 |
/workspace/coverage/default/36.sram_ctrl_partial_access_b2b.2133273795 |
|
|
Aug 02 07:11:37 PM PDT 24 |
Aug 02 07:18:39 PM PDT 24 |
89330505189 ps |
| T276 |
/workspace/coverage/default/18.sram_ctrl_alert_test.2552068474 |
|
|
Aug 02 07:05:19 PM PDT 24 |
Aug 02 07:05:19 PM PDT 24 |
42321343 ps |
| T277 |
/workspace/coverage/default/6.sram_ctrl_regwen.2821220791 |
|
|
Aug 02 07:01:42 PM PDT 24 |
Aug 02 07:22:13 PM PDT 24 |
3197445130 ps |
| T278 |
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.2291064450 |
|
|
Aug 02 07:01:39 PM PDT 24 |
Aug 02 07:22:35 PM PDT 24 |
5984935966 ps |
| T279 |
/workspace/coverage/default/38.sram_ctrl_smoke.1281208239 |
|
|
Aug 02 07:12:17 PM PDT 24 |
Aug 02 07:12:35 PM PDT 24 |
73381222 ps |
| T280 |
/workspace/coverage/default/46.sram_ctrl_partial_access.794852881 |
|
|
Aug 02 07:15:04 PM PDT 24 |
Aug 02 07:15:19 PM PDT 24 |
5925333353 ps |
| T281 |
/workspace/coverage/default/20.sram_ctrl_executable.219065875 |
|
|
Aug 02 07:05:57 PM PDT 24 |
Aug 02 07:10:18 PM PDT 24 |
2152395057 ps |
| T282 |
/workspace/coverage/default/29.sram_ctrl_alert_test.1885723607 |
|
|
Aug 02 07:09:25 PM PDT 24 |
Aug 02 07:09:25 PM PDT 24 |
32299736 ps |
| T283 |
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2754092805 |
|
|
Aug 02 07:02:17 PM PDT 24 |
Aug 02 07:02:22 PM PDT 24 |
441170865 ps |
| T284 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.1461611590 |
|
|
Aug 02 07:07:14 PM PDT 24 |
Aug 02 07:20:16 PM PDT 24 |
9619873628 ps |
| T285 |
/workspace/coverage/default/36.sram_ctrl_alert_test.4090652733 |
|
|
Aug 02 07:11:57 PM PDT 24 |
Aug 02 07:11:58 PM PDT 24 |
53627398 ps |
| T286 |
/workspace/coverage/default/37.sram_ctrl_mem_walk.2592144385 |
|
|
Aug 02 07:11:57 PM PDT 24 |
Aug 02 07:12:08 PM PDT 24 |
691575341 ps |
| T287 |
/workspace/coverage/default/11.sram_ctrl_partial_access.1994113386 |
|
|
Aug 02 07:02:42 PM PDT 24 |
Aug 02 07:03:10 PM PDT 24 |
340123932 ps |
| T288 |
/workspace/coverage/default/44.sram_ctrl_stress_all.4256676312 |
|
|
Aug 02 07:14:11 PM PDT 24 |
Aug 02 07:17:41 PM PDT 24 |
23672527155 ps |
| T289 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.1194914686 |
|
|
Aug 02 07:00:01 PM PDT 24 |
Aug 02 07:00:26 PM PDT 24 |
93235407 ps |
| T290 |
/workspace/coverage/default/28.sram_ctrl_alert_test.3020912987 |
|
|
Aug 02 07:09:14 PM PDT 24 |
Aug 02 07:09:15 PM PDT 24 |
24510918 ps |
| T291 |
/workspace/coverage/default/34.sram_ctrl_partial_access.3001985054 |
|
|
Aug 02 07:11:04 PM PDT 24 |
Aug 02 07:11:18 PM PDT 24 |
2600526694 ps |
| T292 |
/workspace/coverage/default/19.sram_ctrl_stress_all.53333839 |
|
|
Aug 02 07:05:43 PM PDT 24 |
Aug 02 07:40:32 PM PDT 24 |
45404593935 ps |
| T293 |
/workspace/coverage/default/37.sram_ctrl_access_during_key_req.2319703892 |
|
|
Aug 02 07:11:58 PM PDT 24 |
Aug 02 07:27:48 PM PDT 24 |
19430026058 ps |
| T294 |
/workspace/coverage/default/25.sram_ctrl_stress_all.890081755 |
|
|
Aug 02 07:07:58 PM PDT 24 |
Aug 02 07:34:42 PM PDT 24 |
8419292421 ps |
| T295 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.2813203999 |
|
|
Aug 02 07:14:00 PM PDT 24 |
Aug 02 07:14:51 PM PDT 24 |
389345487 ps |
| T296 |
/workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.2823225906 |
|
|
Aug 02 07:06:16 PM PDT 24 |
Aug 02 07:15:46 PM PDT 24 |
2470630276 ps |
| T297 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.1965446333 |
|
|
Aug 02 07:09:25 PM PDT 24 |
Aug 02 07:09:26 PM PDT 24 |
29801373 ps |
| T298 |
/workspace/coverage/default/14.sram_ctrl_ram_cfg.3315673097 |
|
|
Aug 02 07:03:50 PM PDT 24 |
Aug 02 07:03:51 PM PDT 24 |
27591690 ps |
| T299 |
/workspace/coverage/default/25.sram_ctrl_ram_cfg.940771874 |
|
|
Aug 02 07:07:47 PM PDT 24 |
Aug 02 07:07:48 PM PDT 24 |
325248766 ps |
| T300 |
/workspace/coverage/default/15.sram_ctrl_partial_access_b2b.2747896219 |
|
|
Aug 02 07:04:02 PM PDT 24 |
Aug 02 07:09:12 PM PDT 24 |
4326715309 ps |
| T301 |
/workspace/coverage/default/16.sram_ctrl_partial_access_b2b.666567759 |
|
|
Aug 02 07:04:34 PM PDT 24 |
Aug 02 07:09:02 PM PDT 24 |
3914584786 ps |
| T302 |
/workspace/coverage/default/19.sram_ctrl_mem_walk.3035601152 |
|
|
Aug 02 07:05:42 PM PDT 24 |
Aug 02 07:05:53 PM PDT 24 |
2715177461 ps |