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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total test records in report: 1027
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T314 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.3842548300 Aug 03 05:53:36 PM PDT 24 Aug 03 06:12:57 PM PDT 24 3935836823 ps
T315 /workspace/coverage/default/6.sram_ctrl_stress_all.2924852125 Aug 03 05:53:34 PM PDT 24 Aug 03 07:19:22 PM PDT 24 60434424251 ps
T316 /workspace/coverage/default/42.sram_ctrl_ram_cfg.4106838468 Aug 03 06:03:54 PM PDT 24 Aug 03 06:03:55 PM PDT 24 57008917 ps
T317 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3237621222 Aug 03 06:05:31 PM PDT 24 Aug 03 06:21:45 PM PDT 24 7598136347 ps
T318 /workspace/coverage/default/24.sram_ctrl_stress_all.2265462645 Aug 03 05:58:11 PM PDT 24 Aug 03 06:50:41 PM PDT 24 37353989315 ps
T319 /workspace/coverage/default/7.sram_ctrl_ram_cfg.1783192101 Aug 03 05:53:36 PM PDT 24 Aug 03 05:53:37 PM PDT 24 47360208 ps
T17 /workspace/coverage/default/1.sram_ctrl_sec_cm.1394973870 Aug 03 05:53:20 PM PDT 24 Aug 03 05:53:23 PM PDT 24 818449826 ps
T320 /workspace/coverage/default/28.sram_ctrl_lc_escalation.2256535992 Aug 03 05:59:28 PM PDT 24 Aug 03 05:59:35 PM PDT 24 2327532435 ps
T321 /workspace/coverage/default/45.sram_ctrl_ram_cfg.543949360 Aug 03 06:04:35 PM PDT 24 Aug 03 06:04:35 PM PDT 24 112741590 ps
T322 /workspace/coverage/default/20.sram_ctrl_mem_walk.1727554806 Aug 03 05:56:42 PM PDT 24 Aug 03 05:56:47 PM PDT 24 340166502 ps
T323 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.3147225893 Aug 03 05:53:51 PM PDT 24 Aug 03 05:53:55 PM PDT 24 1360179270 ps
T324 /workspace/coverage/default/0.sram_ctrl_multiple_keys.4262315469 Aug 03 05:53:04 PM PDT 24 Aug 03 06:06:36 PM PDT 24 28069289035 ps
T325 /workspace/coverage/default/38.sram_ctrl_partial_access.2858963407 Aug 03 06:02:45 PM PDT 24 Aug 03 06:05:28 PM PDT 24 2566660470 ps
T326 /workspace/coverage/default/25.sram_ctrl_multiple_keys.307803779 Aug 03 05:58:18 PM PDT 24 Aug 03 06:08:28 PM PDT 24 34906013531 ps
T327 /workspace/coverage/default/5.sram_ctrl_multiple_keys.2255748113 Aug 03 05:53:29 PM PDT 24 Aug 03 06:06:21 PM PDT 24 127657967135 ps
T328 /workspace/coverage/default/16.sram_ctrl_mem_walk.1470658258 Aug 03 05:55:39 PM PDT 24 Aug 03 05:55:45 PM PDT 24 352973577 ps
T329 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1911421422 Aug 03 05:54:19 PM PDT 24 Aug 03 05:54:27 PM PDT 24 66101282 ps
T330 /workspace/coverage/default/35.sram_ctrl_regwen.1989512021 Aug 03 06:01:46 PM PDT 24 Aug 03 06:09:40 PM PDT 24 35133277978 ps
T331 /workspace/coverage/default/18.sram_ctrl_partial_access.1375763918 Aug 03 05:56:00 PM PDT 24 Aug 03 05:57:09 PM PDT 24 2527835579 ps
T332 /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3608063096 Aug 03 05:53:30 PM PDT 24 Aug 03 05:54:22 PM PDT 24 763539040 ps
T333 /workspace/coverage/default/27.sram_ctrl_stress_all.998222275 Aug 03 05:59:12 PM PDT 24 Aug 03 06:06:42 PM PDT 24 2717332957 ps
T334 /workspace/coverage/default/1.sram_ctrl_executable.3719317091 Aug 03 05:53:16 PM PDT 24 Aug 03 06:05:42 PM PDT 24 2380722652 ps
T335 /workspace/coverage/default/32.sram_ctrl_lc_escalation.4128443903 Aug 03 06:00:41 PM PDT 24 Aug 03 06:00:51 PM PDT 24 5235740960 ps
T336 /workspace/coverage/default/30.sram_ctrl_stress_all.3456047985 Aug 03 06:00:12 PM PDT 24 Aug 03 07:10:21 PM PDT 24 64855347681 ps
T337 /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.3752167997 Aug 03 05:54:35 PM PDT 24 Aug 03 05:57:43 PM PDT 24 12456199193 ps
T338 /workspace/coverage/default/46.sram_ctrl_stress_all.1426489426 Aug 03 06:04:55 PM PDT 24 Aug 03 06:44:23 PM PDT 24 13140842339 ps
T339 /workspace/coverage/default/44.sram_ctrl_bijection.2193287662 Aug 03 06:04:14 PM PDT 24 Aug 03 06:05:23 PM PDT 24 12659415595 ps
T340 /workspace/coverage/default/35.sram_ctrl_partial_access.3839790334 Aug 03 06:01:45 PM PDT 24 Aug 03 06:02:22 PM PDT 24 1943070409 ps
T341 /workspace/coverage/default/31.sram_ctrl_ram_cfg.789780944 Aug 03 06:00:30 PM PDT 24 Aug 03 06:00:31 PM PDT 24 29137034 ps
T342 /workspace/coverage/default/41.sram_ctrl_regwen.2392094443 Aug 03 06:03:35 PM PDT 24 Aug 03 06:08:23 PM PDT 24 9076570427 ps
T343 /workspace/coverage/default/1.sram_ctrl_ram_cfg.2671666595 Aug 03 05:53:12 PM PDT 24 Aug 03 05:53:13 PM PDT 24 49093403 ps
T344 /workspace/coverage/default/7.sram_ctrl_partial_access.2349005942 Aug 03 05:53:41 PM PDT 24 Aug 03 05:53:43 PM PDT 24 49587909 ps
T345 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.3958985514 Aug 03 06:02:08 PM PDT 24 Aug 03 06:02:13 PM PDT 24 134175122 ps
T346 /workspace/coverage/default/28.sram_ctrl_max_throughput.1919588697 Aug 03 05:59:31 PM PDT 24 Aug 03 06:00:12 PM PDT 24 100191205 ps
T347 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.2624274866 Aug 03 05:55:52 PM PDT 24 Aug 03 05:55:56 PM PDT 24 325611187 ps
T348 /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.1005198085 Aug 03 06:02:16 PM PDT 24 Aug 03 06:07:42 PM PDT 24 3910548993 ps
T349 /workspace/coverage/default/23.sram_ctrl_mem_walk.114498508 Aug 03 05:57:45 PM PDT 24 Aug 03 05:57:55 PM PDT 24 889270895 ps
T117 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1900689435 Aug 03 06:04:33 PM PDT 24 Aug 03 06:06:09 PM PDT 24 4879382907 ps
T49 /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.3676159949 Aug 03 05:55:01 PM PDT 24 Aug 03 05:56:35 PM PDT 24 3192807227 ps
T350 /workspace/coverage/default/17.sram_ctrl_partial_access.2293503305 Aug 03 05:55:41 PM PDT 24 Aug 03 05:55:49 PM PDT 24 629701542 ps
T351 /workspace/coverage/default/37.sram_ctrl_multiple_keys.1187343613 Aug 03 06:02:16 PM PDT 24 Aug 03 06:12:40 PM PDT 24 1338315266 ps
T352 /workspace/coverage/default/36.sram_ctrl_bijection.1951621146 Aug 03 06:02:07 PM PDT 24 Aug 03 06:03:15 PM PDT 24 5384630589 ps
T353 /workspace/coverage/default/16.sram_ctrl_alert_test.1238460088 Aug 03 05:55:43 PM PDT 24 Aug 03 05:55:44 PM PDT 24 20970955 ps
T354 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2381976798 Aug 03 05:59:42 PM PDT 24 Aug 03 06:03:14 PM PDT 24 2258368950 ps
T355 /workspace/coverage/default/12.sram_ctrl_regwen.2449547612 Aug 03 05:54:31 PM PDT 24 Aug 03 06:22:28 PM PDT 24 55226021875 ps
T356 /workspace/coverage/default/36.sram_ctrl_stress_all.1864669215 Aug 03 06:02:15 PM PDT 24 Aug 03 06:54:44 PM PDT 24 241380242287 ps
T357 /workspace/coverage/default/34.sram_ctrl_multiple_keys.2713465980 Aug 03 06:01:13 PM PDT 24 Aug 03 06:17:33 PM PDT 24 28971389680 ps
T358 /workspace/coverage/default/22.sram_ctrl_multiple_keys.3595962822 Aug 03 05:57:11 PM PDT 24 Aug 03 06:14:02 PM PDT 24 35471263228 ps
T359 /workspace/coverage/default/37.sram_ctrl_mem_walk.3229982032 Aug 03 06:02:27 PM PDT 24 Aug 03 06:02:39 PM PDT 24 682960094 ps
T360 /workspace/coverage/default/41.sram_ctrl_multiple_keys.3221377425 Aug 03 06:03:30 PM PDT 24 Aug 03 06:08:50 PM PDT 24 23573603961 ps
T361 /workspace/coverage/default/44.sram_ctrl_alert_test.516400888 Aug 03 06:04:27 PM PDT 24 Aug 03 06:04:28 PM PDT 24 47436000 ps
T362 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.528343824 Aug 03 05:59:46 PM PDT 24 Aug 03 06:04:41 PM PDT 24 7154058753 ps
T363 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1464624548 Aug 03 05:58:06 PM PDT 24 Aug 03 05:58:13 PM PDT 24 3124748449 ps
T364 /workspace/coverage/default/16.sram_ctrl_regwen.2693760370 Aug 03 05:55:36 PM PDT 24 Aug 03 06:21:24 PM PDT 24 4613384404 ps
T365 /workspace/coverage/default/47.sram_ctrl_smoke.2128256746 Aug 03 06:04:54 PM PDT 24 Aug 03 06:07:12 PM PDT 24 573188123 ps
T366 /workspace/coverage/default/36.sram_ctrl_ram_cfg.2757315380 Aug 03 06:02:11 PM PDT 24 Aug 03 06:02:12 PM PDT 24 69085885 ps
T367 /workspace/coverage/default/32.sram_ctrl_access_during_key_req.853325614 Aug 03 06:00:41 PM PDT 24 Aug 03 06:07:20 PM PDT 24 1060164196 ps
T368 /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.2003865546 Aug 03 05:59:28 PM PDT 24 Aug 03 05:59:47 PM PDT 24 79605225 ps
T369 /workspace/coverage/default/15.sram_ctrl_max_throughput.159523089 Aug 03 05:55:12 PM PDT 24 Aug 03 05:55:14 PM PDT 24 37819799 ps
T370 /workspace/coverage/default/14.sram_ctrl_partial_access.4061549142 Aug 03 05:54:56 PM PDT 24 Aug 03 05:55:13 PM PDT 24 320471065 ps
T371 /workspace/coverage/default/34.sram_ctrl_lc_escalation.3022002833 Aug 03 06:01:21 PM PDT 24 Aug 03 06:01:25 PM PDT 24 535701309 ps
T372 /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.3913903278 Aug 03 06:00:51 PM PDT 24 Aug 03 06:04:26 PM PDT 24 46462033266 ps
T373 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.39447967 Aug 03 06:00:35 PM PDT 24 Aug 03 06:06:21 PM PDT 24 6969312646 ps
T374 /workspace/coverage/default/27.sram_ctrl_bijection.4177255073 Aug 03 05:59:01 PM PDT 24 Aug 03 06:00:06 PM PDT 24 4249670021 ps
T375 /workspace/coverage/default/39.sram_ctrl_mem_partial_access.3812178240 Aug 03 06:03:10 PM PDT 24 Aug 03 06:03:15 PM PDT 24 177300614 ps
T376 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3613416374 Aug 03 05:56:04 PM PDT 24 Aug 03 05:56:07 PM PDT 24 315153010 ps
T377 /workspace/coverage/default/48.sram_ctrl_regwen.1069942484 Aug 03 06:05:19 PM PDT 24 Aug 03 06:26:38 PM PDT 24 5266398287 ps
T378 /workspace/coverage/default/30.sram_ctrl_partial_access.2084784426 Aug 03 05:59:56 PM PDT 24 Aug 03 06:00:07 PM PDT 24 321803833 ps
T379 /workspace/coverage/default/33.sram_ctrl_bijection.3832737299 Aug 03 06:01:13 PM PDT 24 Aug 03 06:01:47 PM PDT 24 1832453271 ps
T380 /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1972273261 Aug 03 06:04:02 PM PDT 24 Aug 03 06:04:27 PM PDT 24 315581548 ps
T381 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.1546076158 Aug 03 05:56:32 PM PDT 24 Aug 03 06:00:36 PM PDT 24 12187295012 ps
T382 /workspace/coverage/default/20.sram_ctrl_mem_partial_access.3153079642 Aug 03 05:56:41 PM PDT 24 Aug 03 05:56:44 PM PDT 24 113588288 ps
T383 /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.3547676610 Aug 03 05:56:04 PM PDT 24 Aug 03 05:57:14 PM PDT 24 438785352 ps
T384 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.2392280219 Aug 03 05:55:29 PM PDT 24 Aug 03 05:55:31 PM PDT 24 65340518 ps
T385 /workspace/coverage/default/17.sram_ctrl_smoke.3963626475 Aug 03 05:55:40 PM PDT 24 Aug 03 05:55:49 PM PDT 24 568755807 ps
T386 /workspace/coverage/default/28.sram_ctrl_stress_pipeline.4077461739 Aug 03 05:59:21 PM PDT 24 Aug 03 06:03:25 PM PDT 24 5095903448 ps
T387 /workspace/coverage/default/2.sram_ctrl_stress_pipeline.3754209496 Aug 03 05:53:14 PM PDT 24 Aug 03 05:58:16 PM PDT 24 13896962808 ps
T388 /workspace/coverage/default/16.sram_ctrl_lc_escalation.2467204594 Aug 03 05:55:34 PM PDT 24 Aug 03 05:55:45 PM PDT 24 17344059854 ps
T389 /workspace/coverage/default/25.sram_ctrl_executable.1228003598 Aug 03 05:58:27 PM PDT 24 Aug 03 06:40:55 PM PDT 24 18060200287 ps
T390 /workspace/coverage/default/40.sram_ctrl_regwen.3496534462 Aug 03 06:03:20 PM PDT 24 Aug 03 06:05:02 PM PDT 24 1573410065 ps
T391 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2614946735 Aug 03 06:04:46 PM PDT 24 Aug 03 06:05:24 PM PDT 24 605911483 ps
T392 /workspace/coverage/default/34.sram_ctrl_executable.1790085454 Aug 03 06:01:21 PM PDT 24 Aug 03 06:08:35 PM PDT 24 1379440704 ps
T393 /workspace/coverage/default/8.sram_ctrl_bijection.2198276789 Aug 03 05:53:47 PM PDT 24 Aug 03 05:54:38 PM PDT 24 791641056 ps
T394 /workspace/coverage/default/27.sram_ctrl_partial_access.940609748 Aug 03 05:59:07 PM PDT 24 Aug 03 06:00:01 PM PDT 24 462640046 ps
T395 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1181744625 Aug 03 05:58:56 PM PDT 24 Aug 03 05:58:57 PM PDT 24 35841964 ps
T396 /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3634009724 Aug 03 05:53:12 PM PDT 24 Aug 03 05:56:35 PM PDT 24 13890503119 ps
T397 /workspace/coverage/default/13.sram_ctrl_multiple_keys.920056048 Aug 03 05:54:36 PM PDT 24 Aug 03 05:55:48 PM PDT 24 5407364383 ps
T398 /workspace/coverage/default/32.sram_ctrl_mem_walk.4221015148 Aug 03 06:00:46 PM PDT 24 Aug 03 06:00:51 PM PDT 24 72223218 ps
T399 /workspace/coverage/default/28.sram_ctrl_regwen.526827658 Aug 03 05:59:30 PM PDT 24 Aug 03 06:25:09 PM PDT 24 14823315584 ps
T400 /workspace/coverage/default/37.sram_ctrl_max_throughput.1967662956 Aug 03 06:02:28 PM PDT 24 Aug 03 06:04:21 PM PDT 24 1321201313 ps
T401 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.1065721940 Aug 03 06:03:47 PM PDT 24 Aug 03 06:03:54 PM PDT 24 113016919 ps
T402 /workspace/coverage/default/14.sram_ctrl_ram_cfg.345093813 Aug 03 05:55:02 PM PDT 24 Aug 03 05:55:03 PM PDT 24 84565814 ps
T403 /workspace/coverage/default/1.sram_ctrl_stress_all.2102157756 Aug 03 05:53:12 PM PDT 24 Aug 03 06:35:59 PM PDT 24 9059775631 ps
T404 /workspace/coverage/default/11.sram_ctrl_executable.125241275 Aug 03 05:54:20 PM PDT 24 Aug 03 06:23:12 PM PDT 24 7812912741 ps
T405 /workspace/coverage/default/39.sram_ctrl_smoke.139304769 Aug 03 06:02:51 PM PDT 24 Aug 03 06:03:05 PM PDT 24 242903401 ps
T406 /workspace/coverage/default/11.sram_ctrl_alert_test.2483921699 Aug 03 05:54:20 PM PDT 24 Aug 03 05:54:20 PM PDT 24 33894769 ps
T407 /workspace/coverage/default/46.sram_ctrl_ram_cfg.494793263 Aug 03 06:04:55 PM PDT 24 Aug 03 06:04:56 PM PDT 24 29592019 ps
T408 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.2880323598 Aug 03 05:55:58 PM PDT 24 Aug 03 06:02:40 PM PDT 24 15913494866 ps
T409 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.3258920601 Aug 03 05:58:55 PM PDT 24 Aug 03 05:59:35 PM PDT 24 901057184 ps
T410 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3956785102 Aug 03 05:53:53 PM PDT 24 Aug 03 05:55:14 PM PDT 24 679128917 ps
T411 /workspace/coverage/default/19.sram_ctrl_regwen.2133112166 Aug 03 05:56:24 PM PDT 24 Aug 03 06:07:18 PM PDT 24 48554580481 ps
T412 /workspace/coverage/default/7.sram_ctrl_alert_test.4284945307 Aug 03 05:53:43 PM PDT 24 Aug 03 05:53:44 PM PDT 24 13976243 ps
T413 /workspace/coverage/default/15.sram_ctrl_lc_escalation.898576413 Aug 03 05:55:20 PM PDT 24 Aug 03 05:55:24 PM PDT 24 1191691213 ps
T414 /workspace/coverage/default/31.sram_ctrl_max_throughput.14621445 Aug 03 06:00:19 PM PDT 24 Aug 03 06:01:26 PM PDT 24 370530737 ps
T415 /workspace/coverage/default/36.sram_ctrl_max_throughput.3246918054 Aug 03 06:02:11 PM PDT 24 Aug 03 06:04:53 PM PDT 24 280007269 ps
T416 /workspace/coverage/default/11.sram_ctrl_stress_pipeline.3495888183 Aug 03 05:54:14 PM PDT 24 Aug 03 05:56:32 PM PDT 24 9079758838 ps
T417 /workspace/coverage/default/18.sram_ctrl_ram_cfg.714907879 Aug 03 05:56:04 PM PDT 24 Aug 03 05:56:05 PM PDT 24 28908317 ps
T418 /workspace/coverage/default/25.sram_ctrl_bijection.2636523806 Aug 03 05:58:22 PM PDT 24 Aug 03 05:59:33 PM PDT 24 1420675809 ps
T419 /workspace/coverage/default/34.sram_ctrl_max_throughput.118107493 Aug 03 06:01:15 PM PDT 24 Aug 03 06:03:18 PM PDT 24 509918431 ps
T420 /workspace/coverage/default/7.sram_ctrl_max_throughput.1583979715 Aug 03 05:53:38 PM PDT 24 Aug 03 05:54:08 PM PDT 24 127212229 ps
T421 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2040109257 Aug 03 05:53:03 PM PDT 24 Aug 03 05:58:35 PM PDT 24 60673203468 ps
T422 /workspace/coverage/default/11.sram_ctrl_regwen.3351698447 Aug 03 05:54:20 PM PDT 24 Aug 03 06:04:36 PM PDT 24 9440727092 ps
T423 /workspace/coverage/default/8.sram_ctrl_alert_test.3409862480 Aug 03 05:53:51 PM PDT 24 Aug 03 05:53:52 PM PDT 24 13017166 ps
T424 /workspace/coverage/default/12.sram_ctrl_executable.62834900 Aug 03 05:54:31 PM PDT 24 Aug 03 06:00:11 PM PDT 24 7456778564 ps
T425 /workspace/coverage/default/29.sram_ctrl_regwen.1893709196 Aug 03 05:59:51 PM PDT 24 Aug 03 06:01:25 PM PDT 24 1235371590 ps
T426 /workspace/coverage/default/8.sram_ctrl_mem_walk.1153362417 Aug 03 05:53:53 PM PDT 24 Aug 03 05:53:59 PM PDT 24 315428554 ps
T427 /workspace/coverage/default/47.sram_ctrl_multiple_keys.711561789 Aug 03 06:04:56 PM PDT 24 Aug 03 06:08:18 PM PDT 24 5336602178 ps
T428 /workspace/coverage/default/13.sram_ctrl_regwen.2186623287 Aug 03 05:54:47 PM PDT 24 Aug 03 06:07:22 PM PDT 24 9510158833 ps
T429 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.470684906 Aug 03 05:54:57 PM PDT 24 Aug 03 05:55:05 PM PDT 24 243721326 ps
T430 /workspace/coverage/default/24.sram_ctrl_mem_walk.1630413998 Aug 03 05:58:06 PM PDT 24 Aug 03 05:58:11 PM PDT 24 99173980 ps
T431 /workspace/coverage/default/25.sram_ctrl_mem_walk.1708146088 Aug 03 05:58:26 PM PDT 24 Aug 03 05:58:35 PM PDT 24 520143743 ps
T432 /workspace/coverage/default/23.sram_ctrl_alert_test.1450616691 Aug 03 05:57:50 PM PDT 24 Aug 03 05:57:51 PM PDT 24 74559784 ps
T433 /workspace/coverage/default/14.sram_ctrl_stress_all.1976316656 Aug 03 05:55:01 PM PDT 24 Aug 03 06:34:08 PM PDT 24 7903829270 ps
T434 /workspace/coverage/default/11.sram_ctrl_max_throughput.3878101122 Aug 03 05:54:21 PM PDT 24 Aug 03 05:54:25 PM PDT 24 52039924 ps
T435 /workspace/coverage/default/2.sram_ctrl_smoke.1965042994 Aug 03 05:53:12 PM PDT 24 Aug 03 05:55:02 PM PDT 24 559922506 ps
T436 /workspace/coverage/default/16.sram_ctrl_smoke.274809656 Aug 03 05:55:24 PM PDT 24 Aug 03 05:55:43 PM PDT 24 299541629 ps
T437 /workspace/coverage/default/16.sram_ctrl_max_throughput.2976450918 Aug 03 05:55:29 PM PDT 24 Aug 03 05:57:45 PM PDT 24 540706278 ps
T438 /workspace/coverage/default/30.sram_ctrl_mem_walk.4157875631 Aug 03 06:00:06 PM PDT 24 Aug 03 06:00:13 PM PDT 24 671604679 ps
T439 /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.209764150 Aug 03 06:05:24 PM PDT 24 Aug 03 06:09:50 PM PDT 24 6256951628 ps
T440 /workspace/coverage/default/37.sram_ctrl_smoke.1615119855 Aug 03 06:02:16 PM PDT 24 Aug 03 06:02:53 PM PDT 24 193589564 ps
T441 /workspace/coverage/default/17.sram_ctrl_alert_test.930425249 Aug 03 05:55:50 PM PDT 24 Aug 03 05:55:51 PM PDT 24 13471184 ps
T442 /workspace/coverage/default/21.sram_ctrl_mem_walk.3644960990 Aug 03 05:57:05 PM PDT 24 Aug 03 05:57:11 PM PDT 24 425238118 ps
T443 /workspace/coverage/default/16.sram_ctrl_stress_all.962195807 Aug 03 05:55:41 PM PDT 24 Aug 03 06:35:31 PM PDT 24 132005873904 ps
T444 /workspace/coverage/default/41.sram_ctrl_smoke.2252336772 Aug 03 06:03:30 PM PDT 24 Aug 03 06:03:33 PM PDT 24 292109364 ps
T445 /workspace/coverage/default/38.sram_ctrl_alert_test.1621692894 Aug 03 06:02:54 PM PDT 24 Aug 03 06:02:54 PM PDT 24 49616725 ps
T446 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.2059926811 Aug 03 05:56:09 PM PDT 24 Aug 03 06:05:30 PM PDT 24 5879133780 ps
T447 /workspace/coverage/default/0.sram_ctrl_mem_walk.3622276279 Aug 03 05:53:08 PM PDT 24 Aug 03 05:53:19 PM PDT 24 457781279 ps
T448 /workspace/coverage/default/35.sram_ctrl_stress_all.558623218 Aug 03 06:01:57 PM PDT 24 Aug 03 06:57:29 PM PDT 24 29154107550 ps
T449 /workspace/coverage/default/49.sram_ctrl_partial_access.4233216630 Aug 03 06:05:32 PM PDT 24 Aug 03 06:05:46 PM PDT 24 504843767 ps
T450 /workspace/coverage/default/2.sram_ctrl_partial_access.4151509617 Aug 03 05:53:17 PM PDT 24 Aug 03 05:53:27 PM PDT 24 873991730 ps
T451 /workspace/coverage/default/2.sram_ctrl_bijection.1792442902 Aug 03 05:53:17 PM PDT 24 Aug 03 05:54:28 PM PDT 24 5833918170 ps
T452 /workspace/coverage/default/31.sram_ctrl_executable.2971211256 Aug 03 06:00:29 PM PDT 24 Aug 03 06:12:38 PM PDT 24 21625320653 ps
T453 /workspace/coverage/default/47.sram_ctrl_partial_access.3125457731 Aug 03 06:05:00 PM PDT 24 Aug 03 06:05:20 PM PDT 24 1952404887 ps
T454 /workspace/coverage/default/12.sram_ctrl_ram_cfg.568321472 Aug 03 05:54:30 PM PDT 24 Aug 03 05:54:30 PM PDT 24 117038651 ps
T455 /workspace/coverage/default/27.sram_ctrl_lc_escalation.2897209067 Aug 03 05:59:09 PM PDT 24 Aug 03 05:59:13 PM PDT 24 238368857 ps
T456 /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3778128938 Aug 03 06:05:32 PM PDT 24 Aug 03 06:07:19 PM PDT 24 668793182 ps
T457 /workspace/coverage/default/38.sram_ctrl_stress_pipeline.3073876541 Aug 03 06:02:45 PM PDT 24 Aug 03 06:09:21 PM PDT 24 4220691807 ps
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T531 /workspace/coverage/default/4.sram_ctrl_regwen.2108646877 Aug 03 05:53:28 PM PDT 24 Aug 03 05:55:16 PM PDT 24 351081137 ps
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T540 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.3191908690 Aug 03 06:01:04 PM PDT 24 Aug 03 06:03:16 PM PDT 24 423977827 ps
T541 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.3178133452 Aug 03 05:56:37 PM PDT 24 Aug 03 06:08:03 PM PDT 24 12530891818 ps
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T543 /workspace/coverage/default/26.sram_ctrl_lc_escalation.730011041 Aug 03 05:58:50 PM PDT 24 Aug 03 05:58:54 PM PDT 24 186063133 ps
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T545 /workspace/coverage/default/35.sram_ctrl_stress_pipeline.4101313399 Aug 03 06:01:42 PM PDT 24 Aug 03 06:06:36 PM PDT 24 12116498755 ps
T546 /workspace/coverage/default/2.sram_ctrl_alert_test.654948694 Aug 03 05:53:21 PM PDT 24 Aug 03 05:53:22 PM PDT 24 27604147 ps
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T548 /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.2377302834 Aug 03 05:54:55 PM PDT 24 Aug 03 06:01:47 PM PDT 24 17728197589 ps
T549 /workspace/coverage/default/22.sram_ctrl_bijection.3981120936 Aug 03 05:57:13 PM PDT 24 Aug 03 05:57:48 PM PDT 24 12053225814 ps
T550 /workspace/coverage/default/26.sram_ctrl_stress_all.2839000676 Aug 03 05:59:03 PM PDT 24 Aug 03 06:05:34 PM PDT 24 6843839003 ps
T551 /workspace/coverage/default/8.sram_ctrl_executable.3266614389 Aug 03 05:53:53 PM PDT 24 Aug 03 06:08:51 PM PDT 24 30070477864 ps
T552 /workspace/coverage/default/37.sram_ctrl_stress_pipeline.3919116965 Aug 03 06:02:22 PM PDT 24 Aug 03 06:05:53 PM PDT 24 2195040492 ps
T553 /workspace/coverage/default/6.sram_ctrl_alert_test.4159919791 Aug 03 05:53:31 PM PDT 24 Aug 03 05:53:32 PM PDT 24 19944029 ps
T554 /workspace/coverage/default/0.sram_ctrl_max_throughput.3593501586 Aug 03 05:53:03 PM PDT 24 Aug 03 05:53:13 PM PDT 24 70870855 ps
T555 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.92822805 Aug 03 06:02:33 PM PDT 24 Aug 03 06:12:51 PM PDT 24 1818587657 ps
T556 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.405812786 Aug 03 05:55:45 PM PDT 24 Aug 03 05:55:48 PM PDT 24 82701960 ps
T557 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.1703299892 Aug 03 06:03:17 PM PDT 24 Aug 03 06:03:52 PM PDT 24 107019653 ps
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