Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.98 99.16 94.27 99.72 100.00 95.95 99.12 97.62


Total tests in report: 1024
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
72.96 72.96 92.20 92.20 67.54 67.54 84.60 84.60 33.33 33.33 81.40 81.40 93.51 93.51 58.14 58.14 /workspace/coverage/default/11.sram_ctrl_stress_all.1312339249
87.57 14.61 97.54 5.34 80.92 13.39 87.79 3.19 80.95 47.62 90.10 8.70 95.43 1.92 80.26 22.12 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2828811041
91.18 3.61 98.56 1.02 83.29 2.37 87.79 0.00 100.00 19.05 92.75 2.66 95.43 0.00 80.44 0.18 /workspace/coverage/default/16.sram_ctrl_mem_walk.1816823188
93.11 1.93 98.56 0.00 85.55 2.25 95.87 8.08 100.00 0.00 93.24 0.48 95.58 0.15 83.00 2.56 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.726125612
94.25 1.14 98.73 0.17 87.44 1.90 96.22 0.35 100.00 0.00 94.20 0.97 95.58 0.00 87.57 4.57 /workspace/coverage/default/39.sram_ctrl_stress_all.2238448755
95.23 0.98 98.90 0.17 88.27 0.83 96.43 0.21 100.00 0.00 94.93 0.72 95.58 0.00 92.50 4.94 /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.3835570903
95.84 0.61 99.07 0.17 90.05 1.78 97.05 0.62 100.00 0.00 95.65 0.72 96.17 0.59 92.87 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.3136360450
96.15 0.32 99.07 0.00 90.17 0.12 97.50 0.45 100.00 0.00 95.65 0.00 96.17 0.00 94.52 1.65 /workspace/coverage/default/32.sram_ctrl_stress_all.1774200851
96.36 0.21 99.07 0.00 90.64 0.47 97.92 0.42 100.00 0.00 95.65 0.00 96.17 0.00 95.06 0.55 /workspace/coverage/default/1.sram_ctrl_alert_test.2144478524
96.56 0.20 99.07 0.00 90.64 0.00 97.99 0.07 100.00 0.00 95.65 0.00 97.49 1.33 95.06 0.00 /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3938590857
96.75 0.20 99.07 0.00 90.88 0.24 98.75 0.76 100.00 0.00 95.65 0.00 97.49 0.00 95.43 0.37 /workspace/coverage/default/37.sram_ctrl_executable.4032993044
96.94 0.19 99.07 0.00 91.00 0.12 98.75 0.00 100.00 0.00 96.14 0.48 98.23 0.74 95.43 0.00 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3311237263
97.08 0.14 99.07 0.00 91.00 0.00 98.82 0.07 100.00 0.00 96.14 0.00 99.12 0.88 95.43 0.00 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.3425452370
97.21 0.13 99.15 0.08 91.00 0.00 99.65 0.83 100.00 0.00 96.14 0.00 99.12 0.00 95.43 0.00 /workspace/coverage/default/0.sram_ctrl_ram_cfg.3088715851
97.29 0.08 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 95.98 0.55 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2800144225
97.34 0.05 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.37 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.650725414
97.39 0.05 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.71 0.37 /workspace/coverage/default/41.sram_ctrl_regwen.3267165686
97.42 0.03 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.18 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.4134007007
97.45 0.03 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3195344059
97.47 0.03 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2538201038
97.50 0.03 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1696776468
97.52 0.03 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.62 0.18 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.908824011
97.53 0.01 99.15 0.00 91.00 0.00 99.72 0.07 100.00 0.00 96.14 0.00 99.12 0.00 97.62 0.00 /workspace/coverage/default/0.sram_ctrl_lc_escalation.2056551949

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.2071775246
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2522494312
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.3573166745
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.1651760026
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3825195346
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.3981259068
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.473250001
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1331384515
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3679731716
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.3743393436
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.377332999
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3134106710
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.2030343480
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2982331778
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3764891018
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3534304698
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1318756375
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3954514142
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1260674132
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.820102984
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.743112357
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2859044441
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.563872622
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.4160784848
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.964783226
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1763633313
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1401927518
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1581404592
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.2519795481
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.1480733240
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1447364625
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3105785994
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.846943628
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1396827138
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2375311527
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.3188418381
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.105580064
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1582044390
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1515176396
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.3742681452
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3263974650
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2134074370
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.619166558
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3645036031
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1172734938
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2713319112
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.3408890613
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.173051399
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.1585536105
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3423776737
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1266783264
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3313011051
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.913602677
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.339093981
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.4015831678
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1799738051
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.3483041295
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.1902809376
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.997352771
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3891051239
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1931830247
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3262260431
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3906735715
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2258005989
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.2320118788
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.194074996
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.499330957
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1127697562
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3098765447
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2333757420
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1801646478
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2463064712
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2512566377
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3102439613
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3266209668
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3611414214
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.1099093543
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.3678469517
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2040968245
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3055081283
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1590747992
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1086516777
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1103770736
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2449384286
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2720122136
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3106175517
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.231347278
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1702894086
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.2299323757
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1024393391
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.3856707595
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.890201873
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2762827468
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.1490872181
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3285205040
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1956957919
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2929508856
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.270652665
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3065189439
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1194544601
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1133640127
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.479099194
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3768388926
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2405374333
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.712652241
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.27546075
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.3472769241
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3792273798
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1045069878
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2352849659
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.175841378
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1239041079
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1879566214
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3450374197
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.4229476003
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.884281104
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.1698230942
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2914762552
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1677495679
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3964657472
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2647768977
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.3358612630
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.618008752
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2720521520
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.958948151
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3026402459
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.391017228
/workspace/coverage/default/0.sram_ctrl_alert_test.4280391550
/workspace/coverage/default/0.sram_ctrl_bijection.2511875543
/workspace/coverage/default/0.sram_ctrl_executable.336412516
/workspace/coverage/default/0.sram_ctrl_max_throughput.4132309519
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3485506775
/workspace/coverage/default/0.sram_ctrl_mem_walk.198080595
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2837363182
/workspace/coverage/default/0.sram_ctrl_partial_access.27973396
/workspace/coverage/default/0.sram_ctrl_regwen.675992412
/workspace/coverage/default/0.sram_ctrl_smoke.3705038382
/workspace/coverage/default/0.sram_ctrl_stress_all.1731387259
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.2636393323
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2422635050
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1358731636
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2735906223
/workspace/coverage/default/1.sram_ctrl_bijection.587162845
/workspace/coverage/default/1.sram_ctrl_executable.2280991018
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3771397074
/workspace/coverage/default/1.sram_ctrl_max_throughput.1670067235
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3828751256
/workspace/coverage/default/1.sram_ctrl_mem_walk.3821876755
/workspace/coverage/default/1.sram_ctrl_multiple_keys.556481332
/workspace/coverage/default/1.sram_ctrl_partial_access.1419160164
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.110926330
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3383554553
/workspace/coverage/default/1.sram_ctrl_regwen.1607548043
/workspace/coverage/default/1.sram_ctrl_sec_cm.3919269788
/workspace/coverage/default/1.sram_ctrl_smoke.577135895
/workspace/coverage/default/1.sram_ctrl_stress_all.2538526416
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.3730936017
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.93647928
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2063082564
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1931876879
/workspace/coverage/default/10.sram_ctrl_alert_test.1499581722
/workspace/coverage/default/10.sram_ctrl_bijection.433391899
/workspace/coverage/default/10.sram_ctrl_executable.2166694413
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1084109662
/workspace/coverage/default/10.sram_ctrl_max_throughput.858816396
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3356448095
/workspace/coverage/default/10.sram_ctrl_mem_walk.2117772219
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2445644246
/workspace/coverage/default/10.sram_ctrl_partial_access.1468784476
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.520434591
/workspace/coverage/default/10.sram_ctrl_ram_cfg.358420461
/workspace/coverage/default/10.sram_ctrl_regwen.1633072503
/workspace/coverage/default/10.sram_ctrl_smoke.2913239285
/workspace/coverage/default/10.sram_ctrl_stress_all.2085692328
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.3026086826
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2318065441
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3558201305
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.1123509732
/workspace/coverage/default/11.sram_ctrl_alert_test.2785667084
/workspace/coverage/default/11.sram_ctrl_bijection.3980337018
/workspace/coverage/default/11.sram_ctrl_executable.3401210662
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3358991458
/workspace/coverage/default/11.sram_ctrl_max_throughput.273773310
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2152828808
/workspace/coverage/default/11.sram_ctrl_mem_walk.1658624959
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4216175457
/workspace/coverage/default/11.sram_ctrl_partial_access.2453098815
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.2428212579
/workspace/coverage/default/11.sram_ctrl_ram_cfg.2450450512
/workspace/coverage/default/11.sram_ctrl_regwen.1310743619
/workspace/coverage/default/11.sram_ctrl_smoke.1417742013
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.3779288330
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.2722948758
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.714327693
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2965896142
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/workspace/coverage/default/43.sram_ctrl_bijection.1426876957
/workspace/coverage/default/43.sram_ctrl_executable.2160498629
/workspace/coverage/default/43.sram_ctrl_lc_escalation.3757692201
/workspace/coverage/default/43.sram_ctrl_max_throughput.1669681498
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.2449879475
/workspace/coverage/default/43.sram_ctrl_mem_walk.3864712526
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3159134375
/workspace/coverage/default/43.sram_ctrl_partial_access.2126349470
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.2254040498
/workspace/coverage/default/43.sram_ctrl_ram_cfg.4074282943
/workspace/coverage/default/43.sram_ctrl_regwen.1082635415
/workspace/coverage/default/43.sram_ctrl_smoke.685509779
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2509342068
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.2597448437
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3098651113
/workspace/coverage/default/44.sram_ctrl_alert_test.4095182333
/workspace/coverage/default/44.sram_ctrl_bijection.4163260408
/workspace/coverage/default/44.sram_ctrl_executable.2911283306
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1131574342
/workspace/coverage/default/44.sram_ctrl_max_throughput.3378733953
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1856211121
/workspace/coverage/default/44.sram_ctrl_mem_walk.3924057997
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1790051359
/workspace/coverage/default/44.sram_ctrl_partial_access.2848092317
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2759590100
/workspace/coverage/default/44.sram_ctrl_ram_cfg.4195411179
/workspace/coverage/default/44.sram_ctrl_regwen.4259171768
/workspace/coverage/default/44.sram_ctrl_smoke.4015566168
/workspace/coverage/default/44.sram_ctrl_stress_all.554974490
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1261571403
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.290173347
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.319478234
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1485459376
/workspace/coverage/default/45.sram_ctrl_alert_test.2839164688
/workspace/coverage/default/45.sram_ctrl_bijection.2775251214
/workspace/coverage/default/45.sram_ctrl_executable.1198530136
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3022729802
/workspace/coverage/default/45.sram_ctrl_max_throughput.3115148717
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2524446466
/workspace/coverage/default/45.sram_ctrl_mem_walk.1625266159
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3620706681
/workspace/coverage/default/45.sram_ctrl_partial_access.1796875661
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3847606081
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2133559430
/workspace/coverage/default/45.sram_ctrl_regwen.4188760233
/workspace/coverage/default/45.sram_ctrl_smoke.129539754
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.122081042
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.3839662663
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1639166645
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2714017135
/workspace/coverage/default/46.sram_ctrl_alert_test.3746026348
/workspace/coverage/default/46.sram_ctrl_bijection.3333460630
/workspace/coverage/default/46.sram_ctrl_executable.3268702746
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3253327119
/workspace/coverage/default/46.sram_ctrl_max_throughput.4208695540
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2152084144
/workspace/coverage/default/46.sram_ctrl_mem_walk.583919592
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2821311604
/workspace/coverage/default/46.sram_ctrl_partial_access.2923715153
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.149702645
/workspace/coverage/default/46.sram_ctrl_ram_cfg.2363278469
/workspace/coverage/default/46.sram_ctrl_regwen.2793779315
/workspace/coverage/default/46.sram_ctrl_smoke.486013010
/workspace/coverage/default/46.sram_ctrl_stress_all.4163035868
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.606406677
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3247043638
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1522510444
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.461229555
/workspace/coverage/default/47.sram_ctrl_alert_test.747187869
/workspace/coverage/default/47.sram_ctrl_bijection.1051569288
/workspace/coverage/default/47.sram_ctrl_executable.1451299114
/workspace/coverage/default/47.sram_ctrl_lc_escalation.823008189
/workspace/coverage/default/47.sram_ctrl_max_throughput.4239556535
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.2210878771
/workspace/coverage/default/47.sram_ctrl_mem_walk.3515982261
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3579565783
/workspace/coverage/default/47.sram_ctrl_partial_access.727704905
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.125499819
/workspace/coverage/default/47.sram_ctrl_ram_cfg.1811469841
/workspace/coverage/default/47.sram_ctrl_regwen.2275537388
/workspace/coverage/default/47.sram_ctrl_smoke.4114819680
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1671489794
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.43425101
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2030387222
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1666023863
/workspace/coverage/default/48.sram_ctrl_alert_test.3580723954
/workspace/coverage/default/48.sram_ctrl_bijection.3943645148
/workspace/coverage/default/48.sram_ctrl_executable.1795820459
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1355714104
/workspace/coverage/default/48.sram_ctrl_max_throughput.3274910932
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.280209276
/workspace/coverage/default/48.sram_ctrl_mem_walk.663177231
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2866170856
/workspace/coverage/default/48.sram_ctrl_partial_access.2700775564
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3779996585
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1278193977
/workspace/coverage/default/48.sram_ctrl_regwen.2641121370
/workspace/coverage/default/48.sram_ctrl_smoke.1765838256
/workspace/coverage/default/48.sram_ctrl_stress_all.293175735
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.689155418
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.2254203553
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2050047614
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2148132827
/workspace/coverage/default/49.sram_ctrl_alert_test.2344749624
/workspace/coverage/default/49.sram_ctrl_bijection.2405623371
/workspace/coverage/default/49.sram_ctrl_executable.3621112366
/workspace/coverage/default/49.sram_ctrl_lc_escalation.259383607
/workspace/coverage/default/49.sram_ctrl_max_throughput.1414510751
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.3568835484
/workspace/coverage/default/49.sram_ctrl_mem_walk.2582161546
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3466081780
/workspace/coverage/default/49.sram_ctrl_partial_access.3515744636
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1804827663
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3885907901
/workspace/coverage/default/49.sram_ctrl_regwen.3174753195
/workspace/coverage/default/49.sram_ctrl_smoke.35678765
/workspace/coverage/default/49.sram_ctrl_stress_all.813834539
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1218057643
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.3916596645
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.1145862459
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2221551152
/workspace/coverage/default/5.sram_ctrl_alert_test.2609829426
/workspace/coverage/default/5.sram_ctrl_bijection.1802296275
/workspace/coverage/default/5.sram_ctrl_executable.876310964
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3583235449
/workspace/coverage/default/5.sram_ctrl_max_throughput.3980108814
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.1902583079
/workspace/coverage/default/5.sram_ctrl_mem_walk.2174912310
/workspace/coverage/default/5.sram_ctrl_multiple_keys.196695177
/workspace/coverage/default/5.sram_ctrl_partial_access.1798156411
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.311503382
/workspace/coverage/default/5.sram_ctrl_ram_cfg.4124818900
/workspace/coverage/default/5.sram_ctrl_regwen.3546447421
/workspace/coverage/default/5.sram_ctrl_smoke.3568733892
/workspace/coverage/default/5.sram_ctrl_stress_all.2859481047
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.2629311700
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.2459061205
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.1863250954
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3899627846
/workspace/coverage/default/6.sram_ctrl_alert_test.2386453635
/workspace/coverage/default/6.sram_ctrl_bijection.1522210750
/workspace/coverage/default/6.sram_ctrl_executable.3244330123
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1707526845
/workspace/coverage/default/6.sram_ctrl_max_throughput.2891795030
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1939096784
/workspace/coverage/default/6.sram_ctrl_mem_walk.2380109379
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2461676846
/workspace/coverage/default/6.sram_ctrl_partial_access.3621772861
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3579552500
/workspace/coverage/default/6.sram_ctrl_ram_cfg.539864548
/workspace/coverage/default/6.sram_ctrl_regwen.479460232
/workspace/coverage/default/6.sram_ctrl_smoke.1531506347
/workspace/coverage/default/6.sram_ctrl_stress_all.1000698353
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.1540501969
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4153545319
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.533885039
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.256369669
/workspace/coverage/default/7.sram_ctrl_alert_test.2398259257
/workspace/coverage/default/7.sram_ctrl_bijection.3796199731
/workspace/coverage/default/7.sram_ctrl_executable.1247755503
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2183731664
/workspace/coverage/default/7.sram_ctrl_max_throughput.2055626786
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3988253754
/workspace/coverage/default/7.sram_ctrl_mem_walk.2050803366
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1694170052
/workspace/coverage/default/7.sram_ctrl_partial_access.274225630
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.3012818036
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2792820377
/workspace/coverage/default/7.sram_ctrl_regwen.1569961437
/workspace/coverage/default/7.sram_ctrl_smoke.1019396982
/workspace/coverage/default/7.sram_ctrl_stress_all.3368512793
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.998574392
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3407233012
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.2801606398
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.1281137228
/workspace/coverage/default/8.sram_ctrl_alert_test.1123468307
/workspace/coverage/default/8.sram_ctrl_bijection.258974238
/workspace/coverage/default/8.sram_ctrl_executable.913270141
/workspace/coverage/default/8.sram_ctrl_lc_escalation.471524531
/workspace/coverage/default/8.sram_ctrl_max_throughput.3120530796
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.4128151861
/workspace/coverage/default/8.sram_ctrl_mem_walk.2434186031
/workspace/coverage/default/8.sram_ctrl_multiple_keys.859789611
/workspace/coverage/default/8.sram_ctrl_partial_access.253380654
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.430373554
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1373864839
/workspace/coverage/default/8.sram_ctrl_regwen.2167722012
/workspace/coverage/default/8.sram_ctrl_smoke.3411811031
/workspace/coverage/default/8.sram_ctrl_stress_all.1193700649
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2299735030
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3757421512
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.748557537
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3616692699
/workspace/coverage/default/9.sram_ctrl_alert_test.2664026827
/workspace/coverage/default/9.sram_ctrl_bijection.3782188913
/workspace/coverage/default/9.sram_ctrl_executable.991857962
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2448792145
/workspace/coverage/default/9.sram_ctrl_max_throughput.1611221505
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1409423656
/workspace/coverage/default/9.sram_ctrl_mem_walk.3494558866
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3387325685
/workspace/coverage/default/9.sram_ctrl_partial_access.1102799480
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3847545968
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2380612632
/workspace/coverage/default/9.sram_ctrl_regwen.3531788989
/workspace/coverage/default/9.sram_ctrl_smoke.3887043245
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2313873099
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1201573529
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.954051621



Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/48.sram_ctrl_max_throughput.3274910932 Aug 04 05:46:00 PM PDT 24 Aug 04 05:46:03 PM PDT 24 49843851 ps
T2 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.2403683155 Aug 04 05:45:18 PM PDT 24 Aug 04 05:52:48 PM PDT 24 93520407157 ps
T3 /workspace/coverage/default/4.sram_ctrl_max_throughput.632173892 Aug 04 05:43:15 PM PDT 24 Aug 04 05:44:27 PM PDT 24 117492704 ps
T4 /workspace/coverage/default/11.sram_ctrl_stress_all.1312339249 Aug 04 05:43:26 PM PDT 24 Aug 04 06:17:53 PM PDT 24 117188303449 ps
T8 /workspace/coverage/default/29.sram_ctrl_max_throughput.817021526 Aug 04 05:44:09 PM PDT 24 Aug 04 05:46:39 PM PDT 24 544169251 ps
T5 /workspace/coverage/default/16.sram_ctrl_mem_walk.1816823188 Aug 04 05:43:28 PM PDT 24 Aug 04 05:43:34 PM PDT 24 1236929819 ps
T9 /workspace/coverage/default/10.sram_ctrl_max_throughput.858816396 Aug 04 05:43:23 PM PDT 24 Aug 04 05:44:35 PM PDT 24 118165944 ps
T10 /workspace/coverage/default/33.sram_ctrl_mem_walk.836548668 Aug 04 05:44:23 PM PDT 24 Aug 04 05:44:35 PM PDT 24 3417051338 ps
T11 /workspace/coverage/default/25.sram_ctrl_bijection.3497732981 Aug 04 05:43:51 PM PDT 24 Aug 04 05:44:16 PM PDT 24 1455335205 ps
T12 /workspace/coverage/default/48.sram_ctrl_smoke.1765838256 Aug 04 05:45:57 PM PDT 24 Aug 04 05:48:19 PM PDT 24 648753504 ps
T20 /workspace/coverage/default/47.sram_ctrl_bijection.1051569288 Aug 04 05:45:49 PM PDT 24 Aug 04 05:46:17 PM PDT 24 4780001783 ps
T6 /workspace/coverage/default/46.sram_ctrl_lc_escalation.3253327119 Aug 04 05:45:47 PM PDT 24 Aug 04 05:45:53 PM PDT 24 2061180882 ps
T44 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.403542635 Aug 04 05:44:51 PM PDT 24 Aug 04 05:52:35 PM PDT 24 6451365634 ps
T25 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.597134262 Aug 04 05:44:13 PM PDT 24 Aug 04 05:47:53 PM PDT 24 1201352562 ps
T27 /workspace/coverage/default/37.sram_ctrl_executable.4032993044 Aug 04 05:44:53 PM PDT 24 Aug 04 06:01:22 PM PDT 24 43212754810 ps
T13 /workspace/coverage/default/44.sram_ctrl_alert_test.4095182333 Aug 04 05:45:33 PM PDT 24 Aug 04 05:45:34 PM PDT 24 22881842 ps
T66 /workspace/coverage/default/3.sram_ctrl_max_throughput.2920487517 Aug 04 05:42:48 PM PDT 24 Aug 04 05:43:02 PM PDT 24 261538568 ps
T67 /workspace/coverage/default/28.sram_ctrl_max_throughput.1387941977 Aug 04 05:44:10 PM PDT 24 Aug 04 05:45:45 PM PDT 24 130673766 ps
T45 /workspace/coverage/default/30.sram_ctrl_partial_access.2498153865 Aug 04 05:44:09 PM PDT 24 Aug 04 05:44:27 PM PDT 24 962293699 ps
T59 /workspace/coverage/default/6.sram_ctrl_multiple_keys.2461676846 Aug 04 05:43:13 PM PDT 24 Aug 04 06:09:48 PM PDT 24 14894743125 ps
T7 /workspace/coverage/default/0.sram_ctrl_stress_all.1731387259 Aug 04 05:42:45 PM PDT 24 Aug 04 06:01:03 PM PDT 24 4439022310 ps
T43 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.908824011 Aug 04 05:42:43 PM PDT 24 Aug 04 05:51:21 PM PDT 24 24930793197 ps
T68 /workspace/coverage/default/23.sram_ctrl_max_throughput.2082248572 Aug 04 05:43:33 PM PDT 24 Aug 04 05:45:37 PM PDT 24 139183525 ps
T92 /workspace/coverage/default/1.sram_ctrl_multiple_keys.556481332 Aug 04 05:42:46 PM PDT 24 Aug 04 05:43:18 PM PDT 24 1670268389 ps
T93 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.726125612 Aug 04 05:45:03 PM PDT 24 Aug 04 05:50:39 PM PDT 24 25787744343 ps
T94 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.93647928 Aug 04 05:42:42 PM PDT 24 Aug 04 05:45:54 PM PDT 24 1890650655 ps
T123 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.430373554 Aug 04 05:43:16 PM PDT 24 Aug 04 05:49:26 PM PDT 24 44234681651 ps
T14 /workspace/coverage/default/1.sram_ctrl_alert_test.2144478524 Aug 04 05:42:47 PM PDT 24 Aug 04 05:42:47 PM PDT 24 16392071 ps
T28 /workspace/coverage/default/2.sram_ctrl_executable.1944526524 Aug 04 05:42:46 PM PDT 24 Aug 04 06:05:54 PM PDT 24 145607512971 ps
T29 /workspace/coverage/default/37.sram_ctrl_ram_cfg.2984615204 Aug 04 05:44:53 PM PDT 24 Aug 04 05:44:54 PM PDT 24 27369042 ps
T49 /workspace/coverage/default/11.sram_ctrl_executable.3401210662 Aug 04 05:43:28 PM PDT 24 Aug 04 06:15:17 PM PDT 24 36592337476 ps
T95 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.1882809438 Aug 04 05:44:41 PM PDT 24 Aug 04 05:44:44 PM PDT 24 172241109 ps
T96 /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.714327693 Aug 04 05:43:31 PM PDT 24 Aug 04 05:44:13 PM PDT 24 281112285 ps
T21 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.4234484897 Aug 04 05:44:13 PM PDT 24 Aug 04 05:49:52 PM PDT 24 2130357348 ps
T97 /workspace/coverage/default/4.sram_ctrl_executable.642202914 Aug 04 05:43:06 PM PDT 24 Aug 04 06:03:25 PM PDT 24 52685947971 ps
T98 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.3885516038 Aug 04 05:44:16 PM PDT 24 Aug 04 05:50:59 PM PDT 24 5511835213 ps
T99 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3407233012 Aug 04 05:43:15 PM PDT 24 Aug 04 05:47:07 PM PDT 24 9662254207 ps
T100 /workspace/coverage/default/46.sram_ctrl_partial_access.2923715153 Aug 04 05:45:44 PM PDT 24 Aug 04 05:47:53 PM PDT 24 1213463911 ps
T101 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1929590542 Aug 04 05:44:04 PM PDT 24 Aug 04 05:50:19 PM PDT 24 19108779593 ps
T102 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.560660797 Aug 04 05:43:36 PM PDT 24 Aug 04 05:50:22 PM PDT 24 22156283665 ps
T26 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2828811041 Aug 04 05:45:38 PM PDT 24 Aug 04 05:46:42 PM PDT 24 7044761720 ps
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T55 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.565560339 Aug 04 05:43:43 PM PDT 24 Aug 04 05:43:49 PM PDT 24 1891088364 ps
T181 /workspace/coverage/default/46.sram_ctrl_access_during_key_req.2714017135 Aug 04 05:45:47 PM PDT 24 Aug 04 05:56:14 PM PDT 24 1671054336 ps
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T184 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.1582235242 Aug 04 05:44:16 PM PDT 24 Aug 04 05:51:49 PM PDT 24 55500270554 ps
T185 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3728868705 Aug 04 05:43:52 PM PDT 24 Aug 04 05:48:20 PM PDT 24 35069795411 ps
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T157 /workspace/coverage/default/32.sram_ctrl_stress_all.1774200851 Aug 04 05:44:20 PM PDT 24 Aug 04 06:37:09 PM PDT 24 45278537564 ps
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T191 /workspace/coverage/default/25.sram_ctrl_partial_access.1026579127 Aug 04 05:43:51 PM PDT 24 Aug 04 05:43:55 PM PDT 24 170417411 ps
T192 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.3247043638 Aug 04 05:45:44 PM PDT 24 Aug 04 05:50:27 PM PDT 24 12517105689 ps
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T194 /workspace/coverage/default/20.sram_ctrl_alert_test.1535555802 Aug 04 05:43:34 PM PDT 24 Aug 04 05:43:35 PM PDT 24 39777486 ps
T195 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1365042614 Aug 04 05:44:00 PM PDT 24 Aug 04 05:44:01 PM PDT 24 87986540 ps
T196 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.2152084144 Aug 04 05:45:51 PM PDT 24 Aug 04 05:45:55 PM PDT 24 84133363 ps
T197 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2894742211 Aug 04 05:44:54 PM PDT 24 Aug 04 05:44:57 PM PDT 24 358169538 ps
T198 /workspace/coverage/default/46.sram_ctrl_stress_all.4163035868 Aug 04 05:45:56 PM PDT 24 Aug 04 06:00:27 PM PDT 24 11519738784 ps
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T63 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.3855928156 Aug 04 05:43:44 PM PDT 24 Aug 04 05:44:35 PM PDT 24 850262991 ps
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T215 /workspace/coverage/default/10.sram_ctrl_ram_cfg.358420461 Aug 04 05:43:33 PM PDT 24 Aug 04 05:43:34 PM PDT 24 94560718 ps
T216 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.760991905 Aug 04 05:44:10 PM PDT 24 Aug 04 05:48:57 PM PDT 24 6541134433 ps
T217 /workspace/coverage/default/5.sram_ctrl_regwen.3546447421 Aug 04 05:43:19 PM PDT 24 Aug 04 05:58:43 PM PDT 24 17626212844 ps
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T230 /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.1802275025 Aug 04 05:44:12 PM PDT 24 Aug 04 05:49:17 PM PDT 24 11422020491 ps
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T238 /workspace/coverage/default/17.sram_ctrl_multiple_keys.2478568184 Aug 04 05:43:32 PM PDT 24 Aug 04 06:00:31 PM PDT 24 2590884331 ps
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T240 /workspace/coverage/default/35.sram_ctrl_bijection.794237292 Aug 04 05:44:33 PM PDT 24 Aug 04 05:45:58 PM PDT 24 10185688701 ps
T241 /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3779996585 Aug 04 05:46:01 PM PDT 24 Aug 04 05:51:07 PM PDT 24 14058498596 ps
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T244 /workspace/coverage/default/47.sram_ctrl_executable.1451299114 Aug 04 05:45:56 PM PDT 24 Aug 04 06:04:22 PM PDT 24 16226836417 ps
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T78 /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.122081042 Aug 04 05:45:40 PM PDT 24 Aug 04 05:49:56 PM PDT 24 2475540299 ps
T79 /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.268039928 Aug 04 05:42:47 PM PDT 24 Aug 04 05:43:43 PM PDT 24 917755198 ps
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T250 /workspace/coverage/default/29.sram_ctrl_bijection.4202077231 Aug 04 05:44:09 PM PDT 24 Aug 04 05:44:30 PM PDT 24 4701138061 ps
T251 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.133100814 Aug 04 05:44:44 PM PDT 24 Aug 04 06:01:52 PM PDT 24 6111631889 ps
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T258 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2149034157 Aug 04 05:43:46 PM PDT 24 Aug 04 05:43:52 PM PDT 24 1072171446 ps
T259 /workspace/coverage/default/33.sram_ctrl_bijection.619522660 Aug 04 05:44:21 PM PDT 24 Aug 04 05:45:17 PM PDT 24 3555183221 ps
T260 /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.3164595485 Aug 04 05:43:35 PM PDT 24 Aug 04 05:43:41 PM PDT 24 210482539 ps
T261 /workspace/coverage/default/37.sram_ctrl_partial_access.2456610734 Aug 04 05:44:46 PM PDT 24 Aug 04 05:44:54 PM PDT 24 462308173 ps
T17 /workspace/coverage/default/1.sram_ctrl_sec_cm.3919269788 Aug 04 05:42:46 PM PDT 24 Aug 04 05:42:47 PM PDT 24 354546527 ps
T34 /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.551991232 Aug 04 05:44:14 PM PDT 24 Aug 04 05:44:17 PM PDT 24 136226748 ps
T35 /workspace/coverage/default/16.sram_ctrl_smoke.4136402442 Aug 04 05:43:34 PM PDT 24 Aug 04 05:45:19 PM PDT 24 736480090 ps
T36 /workspace/coverage/default/19.sram_ctrl_lc_escalation.1916998292 Aug 04 05:43:31 PM PDT 24 Aug 04 05:43:39 PM PDT 24 2260868215 ps
T37 /workspace/coverage/default/2.sram_ctrl_lc_escalation.59177571 Aug 04 05:42:45 PM PDT 24 Aug 04 05:42:50 PM PDT 24 1210072537 ps
T38 /workspace/coverage/default/39.sram_ctrl_max_throughput.4086040833 Aug 04 05:44:59 PM PDT 24 Aug 04 05:45:11 PM PDT 24 347103887 ps
T39 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2063082564 Aug 04 05:42:43 PM PDT 24 Aug 04 05:43:17 PM PDT 24 930274693 ps
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T318 /workspace/coverage/default/46.sram_ctrl_ram_cfg.2363278469 Aug 04 05:45:48 PM PDT 24 Aug 04 05:45:48 PM PDT 24 83283713 ps
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