Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13899711	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

56775400

1

T1

3093

T2

127

T3

88

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	35244063	1			T1	1570		T2	885		T3	866
values[0x0]	16328646	1			T1	744		T2	369		T3	344
values[0x1]	19102402	1			T1	779		T2	777		T3	749

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6926331	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

63748780

1

T1

3093

T2

918

T3

871

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	239638	1			T1	16		T2	6		T3	116
valid_sources[0x01]	268562	1			T1	8		T2	2		T3	1
valid_sources[0x02]	287846	1			T1	26		T4	102		T10	25
valid_sources[0x03]	269693	1			T1	7		T2	12		T3	19
valid_sources[0x04]	244246	1			T1	18		T4	87		T10	31
valid_sources[0x05]	240508	1			T1	16		T4	121		T10	21
valid_sources[0x06]	322446	1			T1	26		T2	4		T4	132
valid_sources[0x07]	263755	1			T1	8		T2	9		T3	4
valid_sources[0x08]	264104	1			T1	4		T4	144		T10	58
valid_sources[0x09]	280911	1			T1	21		T4	141		T10	35
valid_sources[0x0a]	244424	1			T1	22		T2	21		T4	174
valid_sources[0x0b]	245266	1			T1	18		T2	19		T3	4
valid_sources[0x0c]	312709	1			T1	1		T3	60		T4	147
valid_sources[0x0d]	297456	1			T1	11		T2	3		T3	35
valid_sources[0x0e]	281313	1			T1	11		T3	10		T4	128
valid_sources[0x0f]	301780	1			T1	13		T2	39		T4	92
valid_sources[0x10]	261083	1			T1	7		T2	2		T4	125
valid_sources[0x11]	238542	1			T1	18		T2	4		T4	97
valid_sources[0x12]	277503	1			T1	6		T2	6		T4	145
valid_sources[0x13]	279504	1			T1	18		T2	5		T3	15
valid_sources[0x14]	361670	1			T1	14		T2	1		T4	129
valid_sources[0x15]	260769	1			T1	15		T2	33		T3	20
valid_sources[0x16]	238708	1			T1	12		T4	136		T10	41
valid_sources[0x17]	338619	1			T1	14		T4	191		T10	23
valid_sources[0x18]	276313	1			T1	17		T2	16		T3	4
valid_sources[0x19]	259704	1			T1	7		T2	12		T4	97
valid_sources[0x1a]	249782	1			T1	12		T3	23		T4	101
valid_sources[0x1b]	254566	1			T1	3		T2	1		T4	162
valid_sources[0x1c]	261874	1			T1	6		T2	61		T3	45
valid_sources[0x1d]	245797	1			T1	7		T4	98		T10	31
valid_sources[0x1e]	285579	1			T1	13		T4	122		T10	41
valid_sources[0x1f]	238743	1			T1	5		T2	15		T3	20
valid_sources[0x20]	279152	1			T1	9		T2	11		T3	8
valid_sources[0x21]	250407	1			T1	3		T2	37		T4	142
valid_sources[0x22]	357796	1			T1	10		T2	8		T4	132
valid_sources[0x23]	276046	1			T1	28		T2	2		T4	100
valid_sources[0x24]	256408	1			T1	7		T2	8		T3	2
valid_sources[0x25]	275599	1			T1	22		T2	21		T4	146
valid_sources[0x26]	274793	1			T1	11		T2	7		T3	10
valid_sources[0x27]	252281	1			T1	9		T2	26		T4	142
valid_sources[0x28]	256982	1			T1	12		T4	138		T10	26
valid_sources[0x29]	309481	1			T1	13		T2	14		T4	108
valid_sources[0x2a]	273608	1			T1	13		T2	5		T4	139
valid_sources[0x2b]	243755	1			T1	9		T2	8		T3	3
valid_sources[0x2c]	269895	1			T1	17		T2	3		T4	123
valid_sources[0x2d]	354090	1			T1	13		T2	6		T3	3
valid_sources[0x2e]	241665	1			T1	6		T2	3		T4	123
valid_sources[0x2f]	266123	1			T1	9		T2	16		T3	31
valid_sources[0x30]	255349	1			T1	22		T2	4		T3	10
valid_sources[0x31]	283182	1			T1	6		T2	11		T3	36
valid_sources[0x32]	296010	1			T1	12		T2	1		T4	156
valid_sources[0x33]	265523	1			T1	18		T2	3		T4	141
valid_sources[0x34]	256246	1			T1	10		T2	37		T3	17
valid_sources[0x35]	284510	1			T1	17		T2	2		T4	142
valid_sources[0x36]	263951	1			T1	5		T2	7		T3	34
valid_sources[0x37]	242785	1			T1	13		T4	119		T10	17
valid_sources[0x38]	338497	1			T1	10		T3	28		T4	87
valid_sources[0x39]	255152	1			T1	9		T4	135		T10	18
valid_sources[0x3a]	273553	1			T1	10		T2	5		T3	13
valid_sources[0x3b]	340875	1			T1	14		T2	8		T3	11
valid_sources[0x3c]	249462	1			T1	10		T4	114		T10	14
valid_sources[0x3d]	294062	1			T1	12		T2	7		T4	104
valid_sources[0x3e]	301629	1			T1	13		T2	13		T4	119
valid_sources[0x3f]	258633	1			T1	2		T2	3		T3	12
valid_sources[0x40]	270456	1			T1	7		T2	17		T4	129
valid_sources[0x41]	276848	1			T1	10		T2	6		T3	10
valid_sources[0x42]	309929	1			T1	15		T2	13		T4	135
valid_sources[0x43]	268526	1			T1	10		T2	2		T4	113
valid_sources[0x44]	262716	1			T1	14		T2	32		T3	12
valid_sources[0x45]	269991	1			T1	20		T2	4		T4	139
valid_sources[0x46]	234970	1			T1	7		T2	5		T4	97
valid_sources[0x47]	239941	1			T1	29		T2	4		T4	152
valid_sources[0x48]	262133	1			T1	13		T3	126		T4	144
valid_sources[0x49]	396672	1			T1	20		T2	13		T3	29
valid_sources[0x4a]	234297	1			T1	4		T2	8		T4	149
valid_sources[0x4b]	283607	1			T1	11		T2	3		T4	136
valid_sources[0x4c]	244483	1			T1	10		T2	5		T4	133
valid_sources[0x4d]	258879	1			T1	10		T4	125		T10	44
valid_sources[0x4e]	260600	1			T1	18		T2	18		T4	149
valid_sources[0x4f]	266040	1			T1	9		T4	88		T10	25
valid_sources[0x50]	309283	1			T1	13		T4	136		T10	43
valid_sources[0x51]	297086	1			T1	20		T4	131		T10	28
valid_sources[0x52]	233661	1			T1	18		T2	22		T3	52
valid_sources[0x53]	280708	1			T1	4		T3	11		T4	148
valid_sources[0x54]	254111	1			T1	17		T4	175		T10	25
valid_sources[0x55]	293944	1			T1	11		T2	17		T4	132
valid_sources[0x56]	284933	1			T1	13		T2	11		T3	14
valid_sources[0x57]	236911	1			T1	8		T4	119		T10	26
valid_sources[0x58]	280977	1			T1	8		T3	66		T4	144
valid_sources[0x59]	277328	1			T1	21		T2	4		T4	141
valid_sources[0x5a]	307113	1			T1	15		T4	106		T10	41
valid_sources[0x5b]	279015	1			T1	23		T2	20		T3	41
valid_sources[0x5c]	308801	1			T1	14		T2	10		T4	117
valid_sources[0x5d]	252101	1			T1	11		T2	14		T3	10
valid_sources[0x5e]	287031	1			T1	13		T2	3		T4	137
valid_sources[0x5f]	233479	1			T1	5		T2	30		T4	73
valid_sources[0x60]	312361	1			T1	12		T2	4		T4	112
valid_sources[0x61]	270204	1			T1	11		T4	104		T10	18
valid_sources[0x62]	332728	1			T1	11		T2	12		T4	120
valid_sources[0x63]	287604	1			T1	19		T2	7		T4	110
valid_sources[0x64]	283248	1			T1	15		T2	20		T3	31
valid_sources[0x65]	288307	1			T1	11		T3	18		T4	138
valid_sources[0x66]	243693	1			T1	2		T2	11		T4	126
valid_sources[0x67]	278435	1			T1	20		T2	2		T4	105
valid_sources[0x68]	244580	1			T1	8		T2	15		T3	11
valid_sources[0x69]	326434	1			T1	11		T3	7		T4	144
valid_sources[0x6a]	246443	1			T1	4		T2	5		T3	25
valid_sources[0x6b]	278165	1			T1	15		T2	14		T4	114
valid_sources[0x6c]	316680	1			T1	6		T4	106		T10	31
valid_sources[0x6d]	274563	1			T1	14		T4	103		T10	25
valid_sources[0x6e]	265561	1			T1	13		T4	155		T10	40
valid_sources[0x6f]	240791	1			T1	12		T2	3		T4	123
valid_sources[0x70]	282526	1			T1	9		T2	11		T4	125
valid_sources[0x71]	251141	1			T1	23		T2	5		T3	66
valid_sources[0x72]	301447	1			T1	7		T4	108		T10	32
valid_sources[0x73]	308402	1			T1	11		T2	8		T4	119
valid_sources[0x74]	257671	1			T1	13		T2	3		T4	124
valid_sources[0x75]	275363	1			T1	11		T2	17		T4	131
valid_sources[0x76]	270096	1			T1	14		T2	14		T3	52
valid_sources[0x77]	308592	1			T1	9		T2	6		T4	124
valid_sources[0x78]	272973	1			T1	12		T2	25		T4	108
valid_sources[0x79]	257768	1			T1	12		T2	6		T3	89
valid_sources[0x7a]	253621	1			T1	10		T2	10		T4	97
valid_sources[0x7b]	250539	1			T1	24		T4	110		T10	44
valid_sources[0x7c]	370726	1			T1	7		T4	150		T10	46
valid_sources[0x7d]	253791	1			T1	10		T2	5		T3	17
valid_sources[0x7e]	319633	1			T1	6		T2	4		T4	140
valid_sources[0x7f]	243528	1			T1	15		T2	2		T4	119
valid_sources[0x80]	303452	1			T1	15		T2	1		T4	134

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

28296219

1

T1

1570

T2

7

T3

4

values[0x0]

all_enables

biggest_size

14241665

1

T1

744

T2

59

T3

38

values[0x1]

all_enables

biggest_size

14237516

1

T1

779

T2

61

T3

46

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	33330	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

131865

1

T3

1

T12

1

T14

2

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	47771	1			T8	80		T5	50		T26	601
values[0x0]	56768	1			T1	1		T2	1		T4	1
values[0x1]	60656	1			T1	1		T2	2		T3	3

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	25258	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

139937

1

T2

1

T3

2

T12

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	751	1			T26	11		T7	1		T43	21
valid_sources[0x01]	498	1			T27	2		T26	13		T22	2
valid_sources[0x02]	467	1			T9	1		T26	9		T7	2
valid_sources[0x03]	673	1			T26	13		T22	2		T24	53
valid_sources[0x04]	664	1			T5	1		T26	15		T43	21
valid_sources[0x05]	546	1			T5	1		T26	8		T21	15
valid_sources[0x06]	479	1			T5	5		T26	7		T6	30
valid_sources[0x07]	677	1			T26	10		T21	4		T7	2
valid_sources[0x08]	887	1			T26	6		T21	90		T7	1
valid_sources[0x09]	499	1			T5	1		T26	10		T21	1
valid_sources[0x0a]	854	1			T27	1		T26	6		T21	1
valid_sources[0x0b]	475	1			T26	5		T50	2		T43	21
valid_sources[0x0c]	497	1			T5	1		T26	13		T21	1
valid_sources[0x0d]	547	1			T26	9		T7	1		T93	1
valid_sources[0x0e]	472	1			T26	12		T130	1		T43	10
valid_sources[0x0f]	797	1			T26	10		T7	6		T43	14
valid_sources[0x10]	540	1			T1	2		T26	8		T21	1
valid_sources[0x11]	955	1			T5	9		T26	14		T21	138
valid_sources[0x12]	564	1			T26	8		T22	2		T7	3
valid_sources[0x13]	537	1			T26	16		T37	1		T43	38
valid_sources[0x14]	1121	1			T26	12		T21	2		T7	4
valid_sources[0x15]	664	1			T27	2		T26	15		T19	3
valid_sources[0x16]	457	1			T26	7		T43	11		T131	12
valid_sources[0x17]	717	1			T26	10		T21	4		T50	1
valid_sources[0x18]	661	1			T26	17		T132	1		T43	17
valid_sources[0x19]	478	1			T26	8		T21	5		T133	2
valid_sources[0x1a]	754	1			T26	9		T21	68		T7	1
valid_sources[0x1b]	779	1			T27	1		T26	7		T23	2
valid_sources[0x1c]	715	1			T26	11		T22	4		T23	148
valid_sources[0x1d]	505	1			T26	8		T43	15		T44	4
valid_sources[0x1e]	549	1			T5	1		T26	7		T21	2
valid_sources[0x1f]	715	1			T26	7		T23	98		T43	23
valid_sources[0x20]	1047	1			T27	1		T26	15		T21	5
valid_sources[0x21]	456	1			T5	3		T26	10		T122	2
valid_sources[0x22]	695	1			T14	1		T26	14		T50	2
valid_sources[0x23]	552	1			T26	9		T43	23		T44	30
valid_sources[0x24]	810	1			T26	8		T21	138		T122	2
valid_sources[0x25]	573	1			T4	2		T26	6		T134	1
valid_sources[0x26]	683	1			T5	2		T26	8		T43	13
valid_sources[0x27]	1015	1			T5	1		T26	6		T22	4
valid_sources[0x28]	618	1			T26	7		T7	2		T19	2
valid_sources[0x29]	826	1			T5	2		T26	4		T38	8
valid_sources[0x2a]	709	1			T26	9		T96	2		T43	13
valid_sources[0x2b]	593	1			T27	2		T26	7		T37	1
valid_sources[0x2c]	522	1			T26	13		T21	11		T50	3
valid_sources[0x2d]	415	1			T10	1		T5	1		T26	9
valid_sources[0x2e]	598	1			T26	14		T37	1		T22	1
valid_sources[0x2f]	450	1			T26	9		T21	3		T7	1
valid_sources[0x30]	544	1			T26	13		T21	84		T19	2
valid_sources[0x31]	512	1			T26	11		T7	3		T43	21
valid_sources[0x32]	452	1			T27	1		T26	3		T21	24
valid_sources[0x33]	1038	1			T26	4		T61	4		T132	1
valid_sources[0x34]	550	1			T26	4		T22	4		T135	4
valid_sources[0x35]	610	1			T26	5		T21	3		T43	16
valid_sources[0x36]	743	1			T5	2		T26	7		T21	1
valid_sources[0x37]	664	1			T5	1		T26	8		T21	1
valid_sources[0x38]	522	1			T5	1		T26	15		T43	21
valid_sources[0x39]	842	1			T26	5		T37	1		T43	21
valid_sources[0x3a]	678	1			T26	7		T21	1		T43	18
valid_sources[0x3b]	869	1			T26	7		T37	2		T22	2
valid_sources[0x3c]	587	1			T26	12		T21	4		T133	1
valid_sources[0x3d]	930	1			T26	7		T43	27		T44	26
valid_sources[0x3e]	597	1			T26	5		T43	24		T128	2
valid_sources[0x3f]	522	1			T26	12		T7	2		T132	1
valid_sources[0x40]	960	1			T5	6		T26	6		T21	2
valid_sources[0x41]	526	1			T3	3		T11	1		T26	8
valid_sources[0x42]	543	1			T5	2		T26	9		T43	39
valid_sources[0x43]	735	1			T26	5		T7	5		T43	32
valid_sources[0x44]	851	1			T26	9		T23	173		T43	23
valid_sources[0x45]	413	1			T26	6		T21	13		T7	2
valid_sources[0x46]	584	1			T26	12		T21	4		T22	2
valid_sources[0x47]	459	1			T5	5		T26	3		T7	1
valid_sources[0x48]	449	1			T26	5		T21	2		T22	1
valid_sources[0x49]	547	1			T2	2		T27	2		T26	13
valid_sources[0x4a]	593	1			T26	9		T7	3		T43	14
valid_sources[0x4b]	861	1			T26	13		T21	3		T22	3
valid_sources[0x4c]	580	1			T26	6		T21	3		T37	2
valid_sources[0x4d]	696	1			T5	2		T26	2		T22	7
valid_sources[0x4e]	521	1			T26	8		T21	3		T22	1
valid_sources[0x4f]	594	1			T26	15		T23	10		T43	13
valid_sources[0x50]	523	1			T26	13		T21	1		T7	1
valid_sources[0x51]	484	1			T26	14		T21	5		T22	3
valid_sources[0x52]	653	1			T26	11		T21	1		T7	1
valid_sources[0x53]	1062	1			T26	13		T7	1		T43	13
valid_sources[0x54]	440	1			T26	5		T22	5		T43	27
valid_sources[0x55]	467	1			T26	11		T43	11		T44	25
valid_sources[0x56]	643	1			T26	13		T7	2		T43	16
valid_sources[0x57]	588	1			T26	8		T7	1		T135	1
valid_sources[0x58]	608	1			T26	9		T7	3		T43	22
valid_sources[0x59]	713	1			T26	7		T50	1		T43	15
valid_sources[0x5a]	666	1			T26	7		T15	1		T23	39
valid_sources[0x5b]	912	1			T27	1		T26	10		T21	1
valid_sources[0x5c]	590	1			T26	8		T21	61		T43	14
valid_sources[0x5d]	480	1			T26	11		T43	21		T131	1
valid_sources[0x5e]	864	1			T26	6		T37	1		T22	5
valid_sources[0x5f]	456	1			T27	1		T26	14		T43	24
valid_sources[0x60]	657	1			T34	1		T26	9		T21	1
valid_sources[0x61]	513	1			T26	3		T21	1		T43	16
valid_sources[0x62]	471	1			T26	7		T21	3		T22	3
valid_sources[0x63]	586	1			T26	9		T37	1		T50	2
valid_sources[0x64]	834	1			T26	11		T91	1		T43	19
valid_sources[0x65]	656	1			T26	18		T21	1		T22	1
valid_sources[0x66]	545	1			T26	13		T22	3		T43	27
valid_sources[0x67]	498	1			T5	5		T26	15		T22	1
valid_sources[0x68]	784	1			T26	14		T22	3		T43	17
valid_sources[0x69]	715	1			T27	1		T26	11		T61	2
valid_sources[0x6a]	574	1			T8	80		T26	12		T43	17
valid_sources[0x6b]	779	1			T27	2		T26	12		T43	22
valid_sources[0x6c]	444	1			T26	4		T43	18		T25	1
valid_sources[0x6d]	660	1			T26	8		T43	15		T126	88
valid_sources[0x6e]	715	1			T26	10		T50	2		T7	2
valid_sources[0x6f]	687	1			T26	8		T21	1		T50	1
valid_sources[0x70]	640	1			T13	2		T26	10		T43	25
valid_sources[0x71]	670	1			T14	6		T26	11		T21	1
valid_sources[0x72]	665	1			T26	7		T16	3		T43	23
valid_sources[0x73]	669	1			T5	3		T26	5		T21	13
valid_sources[0x74]	503	1			T26	10		T22	2		T43	24
valid_sources[0x75]	630	1			T27	1		T26	5		T21	1
valid_sources[0x76]	442	1			T26	8		T22	1		T132	1
valid_sources[0x77]	481	1			T26	12		T37	1		T43	12
valid_sources[0x78]	450	1			T26	8		T43	20		T136	1
valid_sources[0x79]	716	1			T26	11		T21	125		T43	16
valid_sources[0x7a]	518	1			T26	12		T22	1		T43	18
valid_sources[0x7b]	412	1			T5	5		T26	14		T22	1
valid_sources[0x7c]	562	1			T26	9		T43	21		T25	3
valid_sources[0x7d]	726	1			T26	3		T19	5		T43	20
valid_sources[0x7e]	593	1			T26	9		T50	5		T23	20
valid_sources[0x7f]	624	1			T26	14		T37	1		T22	3
valid_sources[0x80]	718	1			T14	2		T27	1		T26	7

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

36097

1

T5

33

T26

558

T6

9

values[0x0]

all_enables

biggest_size

49063

1

T12

1

T14

1

T27

9

values[0x1]

all_enables

biggest_size

46705

1

T3

1

T14

1

T27

3