| T303 |
/workspace/coverage/default/12.sram_ctrl_ram_cfg.3276981309 |
|
|
Aug 05 05:50:18 PM PDT 24 |
Aug 05 05:50:19 PM PDT 24 |
27889261 ps |
| T304 |
/workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.1803564758 |
|
|
Aug 05 05:50:49 PM PDT 24 |
Aug 05 05:51:17 PM PDT 24 |
90396237 ps |
| T305 |
/workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.235638631 |
|
|
Aug 05 05:50:03 PM PDT 24 |
Aug 05 05:50:19 PM PDT 24 |
79370822 ps |
| T306 |
/workspace/coverage/default/17.sram_ctrl_stress_pipeline.2657478337 |
|
|
Aug 05 05:50:29 PM PDT 24 |
Aug 05 05:55:29 PM PDT 24 |
5892521896 ps |
| T307 |
/workspace/coverage/default/26.sram_ctrl_executable.3896133916 |
|
|
Aug 05 05:50:59 PM PDT 24 |
Aug 05 05:56:49 PM PDT 24 |
2122098264 ps |
| T308 |
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1051748508 |
|
|
Aug 05 05:52:44 PM PDT 24 |
Aug 05 05:52:49 PM PDT 24 |
71181809 ps |
| T309 |
/workspace/coverage/default/3.sram_ctrl_regwen.3280424273 |
|
|
Aug 05 05:50:02 PM PDT 24 |
Aug 05 06:02:32 PM PDT 24 |
18273633242 ps |
| T310 |
/workspace/coverage/default/31.sram_ctrl_partial_access_b2b.872457793 |
|
|
Aug 05 05:51:24 PM PDT 24 |
Aug 05 05:56:24 PM PDT 24 |
11969417648 ps |
| T311 |
/workspace/coverage/default/27.sram_ctrl_partial_access_b2b.1046740262 |
|
|
Aug 05 05:51:09 PM PDT 24 |
Aug 05 05:56:07 PM PDT 24 |
24412010080 ps |
| T312 |
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4132859144 |
|
|
Aug 05 05:50:07 PM PDT 24 |
Aug 05 05:50:08 PM PDT 24 |
27945656 ps |
| T313 |
/workspace/coverage/default/47.sram_ctrl_lc_escalation.872182808 |
|
|
Aug 05 05:53:12 PM PDT 24 |
Aug 05 05:53:15 PM PDT 24 |
663247293 ps |
| T314 |
/workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.1956911388 |
|
|
Aug 05 05:51:07 PM PDT 24 |
Aug 05 05:51:34 PM PDT 24 |
102918929 ps |
| T315 |
/workspace/coverage/default/4.sram_ctrl_stress_all.4230877614 |
|
|
Aug 05 05:50:04 PM PDT 24 |
Aug 05 06:37:28 PM PDT 24 |
105278518095 ps |
| T316 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.1573930564 |
|
|
Aug 05 05:52:59 PM PDT 24 |
Aug 05 06:08:47 PM PDT 24 |
14392918695 ps |
| T317 |
/workspace/coverage/default/8.sram_ctrl_mem_walk.3277955144 |
|
|
Aug 05 05:50:15 PM PDT 24 |
Aug 05 05:50:23 PM PDT 24 |
656711854 ps |
| T318 |
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3660322482 |
|
|
Aug 05 05:50:12 PM PDT 24 |
Aug 05 05:50:16 PM PDT 24 |
283725051 ps |
| T319 |
/workspace/coverage/default/10.sram_ctrl_max_throughput.3257753702 |
|
|
Aug 05 05:50:04 PM PDT 24 |
Aug 05 05:50:35 PM PDT 24 |
346564845 ps |
| T320 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.730430206 |
|
|
Aug 05 05:50:40 PM PDT 24 |
Aug 05 05:50:43 PM PDT 24 |
246513601 ps |
| T321 |
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1653911937 |
|
|
Aug 05 05:49:48 PM PDT 24 |
Aug 05 05:50:23 PM PDT 24 |
104992023 ps |
| T322 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.1564129193 |
|
|
Aug 05 05:50:02 PM PDT 24 |
Aug 05 06:01:58 PM PDT 24 |
33847757849 ps |
| T323 |
/workspace/coverage/default/43.sram_ctrl_max_throughput.2028738267 |
|
|
Aug 05 05:52:37 PM PDT 24 |
Aug 05 05:52:39 PM PDT 24 |
143541763 ps |
| T324 |
/workspace/coverage/default/23.sram_ctrl_stress_pipeline.772734779 |
|
|
Aug 05 05:50:45 PM PDT 24 |
Aug 05 05:55:58 PM PDT 24 |
6359340256 ps |
| T325 |
/workspace/coverage/default/32.sram_ctrl_max_throughput.1781956427 |
|
|
Aug 05 05:51:32 PM PDT 24 |
Aug 05 05:53:43 PM PDT 24 |
362283255 ps |
| T326 |
/workspace/coverage/default/22.sram_ctrl_smoke.1236580017 |
|
|
Aug 05 05:50:48 PM PDT 24 |
Aug 05 05:50:52 PM PDT 24 |
1102844948 ps |
| T327 |
/workspace/coverage/default/20.sram_ctrl_mem_partial_access.2012466584 |
|
|
Aug 05 05:50:48 PM PDT 24 |
Aug 05 05:50:51 PM PDT 24 |
49577453 ps |
| T328 |
/workspace/coverage/default/8.sram_ctrl_bijection.4093246095 |
|
|
Aug 05 05:50:28 PM PDT 24 |
Aug 05 05:50:55 PM PDT 24 |
1613758826 ps |
| T329 |
/workspace/coverage/default/3.sram_ctrl_bijection.1606366791 |
|
|
Aug 05 05:49:53 PM PDT 24 |
Aug 05 05:51:06 PM PDT 24 |
4105835305 ps |
| T330 |
/workspace/coverage/default/4.sram_ctrl_max_throughput.4066923355 |
|
|
Aug 05 05:50:01 PM PDT 24 |
Aug 05 05:51:09 PM PDT 24 |
463797893 ps |
| T331 |
/workspace/coverage/default/8.sram_ctrl_ram_cfg.1309068125 |
|
|
Aug 05 05:50:15 PM PDT 24 |
Aug 05 05:50:16 PM PDT 24 |
60270107 ps |
| T332 |
/workspace/coverage/default/28.sram_ctrl_alert_test.261914356 |
|
|
Aug 05 05:51:13 PM PDT 24 |
Aug 05 05:51:14 PM PDT 24 |
20468245 ps |
| T333 |
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.3258359522 |
|
|
Aug 05 05:50:07 PM PDT 24 |
Aug 05 05:59:14 PM PDT 24 |
96006065997 ps |
| T334 |
/workspace/coverage/default/49.sram_ctrl_alert_test.3788962741 |
|
|
Aug 05 05:53:32 PM PDT 24 |
Aug 05 05:53:32 PM PDT 24 |
12738385 ps |
| T335 |
/workspace/coverage/default/20.sram_ctrl_partial_access.4118978596 |
|
|
Aug 05 05:50:40 PM PDT 24 |
Aug 05 05:51:12 PM PDT 24 |
955309806 ps |
| T336 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.2587478731 |
|
|
Aug 05 05:51:35 PM PDT 24 |
Aug 05 05:51:35 PM PDT 24 |
47190054 ps |
| T337 |
/workspace/coverage/default/39.sram_ctrl_regwen.3074455568 |
|
|
Aug 05 05:52:11 PM PDT 24 |
Aug 05 05:59:49 PM PDT 24 |
30193997946 ps |
| T338 |
/workspace/coverage/default/20.sram_ctrl_regwen.3748548229 |
|
|
Aug 05 05:50:46 PM PDT 24 |
Aug 05 05:56:48 PM PDT 24 |
6548489333 ps |
| T339 |
/workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.4184079537 |
|
|
Aug 05 05:51:18 PM PDT 24 |
Aug 05 05:52:08 PM PDT 24 |
497422954 ps |
| T340 |
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1955304830 |
|
|
Aug 05 05:53:07 PM PDT 24 |
Aug 05 05:53:07 PM PDT 24 |
43696530 ps |
| T341 |
/workspace/coverage/default/33.sram_ctrl_partial_access.3916402475 |
|
|
Aug 05 05:51:27 PM PDT 24 |
Aug 05 05:51:40 PM PDT 24 |
216751599 ps |
| T342 |
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2890204933 |
|
|
Aug 05 05:50:33 PM PDT 24 |
Aug 05 06:14:32 PM PDT 24 |
4114101296 ps |
| T343 |
/workspace/coverage/default/4.sram_ctrl_mem_partial_access.1011729464 |
|
|
Aug 05 05:50:02 PM PDT 24 |
Aug 05 05:50:05 PM PDT 24 |
210479828 ps |
| T344 |
/workspace/coverage/default/46.sram_ctrl_partial_access.1975337873 |
|
|
Aug 05 05:53:02 PM PDT 24 |
Aug 05 05:55:51 PM PDT 24 |
1386314858 ps |
| T345 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.3301363276 |
|
|
Aug 05 05:51:41 PM PDT 24 |
Aug 05 05:51:42 PM PDT 24 |
26236819 ps |
| T346 |
/workspace/coverage/default/35.sram_ctrl_partial_access_b2b.260036956 |
|
|
Aug 05 05:51:40 PM PDT 24 |
Aug 05 05:56:02 PM PDT 24 |
5724093625 ps |
| T347 |
/workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.1003737491 |
|
|
Aug 05 05:51:08 PM PDT 24 |
Aug 05 05:53:23 PM PDT 24 |
610360255 ps |
| T348 |
/workspace/coverage/default/10.sram_ctrl_smoke.2187341449 |
|
|
Aug 05 05:50:11 PM PDT 24 |
Aug 05 05:51:21 PM PDT 24 |
98779676 ps |
| T349 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.124662938 |
|
|
Aug 05 05:51:45 PM PDT 24 |
Aug 05 05:51:46 PM PDT 24 |
39775662 ps |
| T350 |
/workspace/coverage/default/25.sram_ctrl_mem_walk.3985027089 |
|
|
Aug 05 05:50:57 PM PDT 24 |
Aug 05 05:51:03 PM PDT 24 |
1495562852 ps |
| T351 |
/workspace/coverage/default/3.sram_ctrl_mem_walk.4205606282 |
|
|
Aug 05 05:50:13 PM PDT 24 |
Aug 05 05:50:17 PM PDT 24 |
77576697 ps |
| T352 |
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3524929639 |
|
|
Aug 05 05:50:01 PM PDT 24 |
Aug 05 05:50:05 PM PDT 24 |
292301639 ps |
| T353 |
/workspace/coverage/default/46.sram_ctrl_lc_escalation.2308525418 |
|
|
Aug 05 05:53:05 PM PDT 24 |
Aug 05 05:53:07 PM PDT 24 |
1489331929 ps |
| T354 |
/workspace/coverage/default/38.sram_ctrl_smoke.1915116863 |
|
|
Aug 05 05:52:05 PM PDT 24 |
Aug 05 05:52:13 PM PDT 24 |
827401279 ps |
| T355 |
/workspace/coverage/default/38.sram_ctrl_regwen.1133988915 |
|
|
Aug 05 05:52:01 PM PDT 24 |
Aug 05 06:17:13 PM PDT 24 |
2970743978 ps |
| T356 |
/workspace/coverage/default/29.sram_ctrl_access_during_key_req.698606758 |
|
|
Aug 05 05:51:20 PM PDT 24 |
Aug 05 05:56:00 PM PDT 24 |
3460139303 ps |
| T357 |
/workspace/coverage/default/49.sram_ctrl_smoke.2952902027 |
|
|
Aug 05 05:53:25 PM PDT 24 |
Aug 05 05:53:28 PM PDT 24 |
323154466 ps |
| T358 |
/workspace/coverage/default/28.sram_ctrl_lc_escalation.2092212385 |
|
|
Aug 05 05:51:12 PM PDT 24 |
Aug 05 05:51:25 PM PDT 24 |
10157788488 ps |
| T359 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.3523849489 |
|
|
Aug 05 05:51:25 PM PDT 24 |
Aug 05 05:54:13 PM PDT 24 |
7129950807 ps |
| T360 |
/workspace/coverage/default/16.sram_ctrl_mem_walk.2054695437 |
|
|
Aug 05 05:50:34 PM PDT 24 |
Aug 05 05:50:43 PM PDT 24 |
548149243 ps |
| T361 |
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.556687781 |
|
|
Aug 05 05:52:54 PM PDT 24 |
Aug 05 05:57:54 PM PDT 24 |
34469128186 ps |
| T362 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.5400964 |
|
|
Aug 05 05:50:50 PM PDT 24 |
Aug 05 06:07:57 PM PDT 24 |
23301483479 ps |
| T363 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.2581460182 |
|
|
Aug 05 05:51:39 PM PDT 24 |
Aug 05 05:51:43 PM PDT 24 |
108144722 ps |
| T364 |
/workspace/coverage/default/17.sram_ctrl_partial_access.1689431580 |
|
|
Aug 05 05:50:28 PM PDT 24 |
Aug 05 05:50:47 PM PDT 24 |
1371102482 ps |
| T365 |
/workspace/coverage/default/17.sram_ctrl_bijection.2341571015 |
|
|
Aug 05 05:50:34 PM PDT 24 |
Aug 05 05:51:22 PM PDT 24 |
10857940431 ps |
| T366 |
/workspace/coverage/default/41.sram_ctrl_stress_pipeline.1362657169 |
|
|
Aug 05 05:52:25 PM PDT 24 |
Aug 05 05:55:14 PM PDT 24 |
6971267875 ps |
| T367 |
/workspace/coverage/default/41.sram_ctrl_bijection.2357595071 |
|
|
Aug 05 05:52:23 PM PDT 24 |
Aug 05 05:52:40 PM PDT 24 |
290852675 ps |
| T368 |
/workspace/coverage/default/18.sram_ctrl_access_during_key_req.2287500678 |
|
|
Aug 05 05:50:34 PM PDT 24 |
Aug 05 05:50:52 PM PDT 24 |
2058768452 ps |
| T369 |
/workspace/coverage/default/26.sram_ctrl_bijection.1809033706 |
|
|
Aug 05 05:50:58 PM PDT 24 |
Aug 05 05:51:48 PM PDT 24 |
2871213178 ps |
| T370 |
/workspace/coverage/default/25.sram_ctrl_regwen.350501517 |
|
|
Aug 05 05:50:56 PM PDT 24 |
Aug 05 05:55:40 PM PDT 24 |
18839917010 ps |
| T371 |
/workspace/coverage/default/25.sram_ctrl_access_during_key_req.2829773914 |
|
|
Aug 05 05:50:53 PM PDT 24 |
Aug 05 05:55:35 PM PDT 24 |
1886371714 ps |
| T372 |
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2471150875 |
|
|
Aug 05 05:50:07 PM PDT 24 |
Aug 05 05:50:10 PM PDT 24 |
259752779 ps |
| T373 |
/workspace/coverage/default/13.sram_ctrl_lc_escalation.1137270011 |
|
|
Aug 05 05:50:25 PM PDT 24 |
Aug 05 05:50:34 PM PDT 24 |
3628298026 ps |
| T374 |
/workspace/coverage/default/21.sram_ctrl_lc_escalation.3977876353 |
|
|
Aug 05 05:50:41 PM PDT 24 |
Aug 05 05:50:47 PM PDT 24 |
1136169917 ps |
| T375 |
/workspace/coverage/default/47.sram_ctrl_regwen.3023715051 |
|
|
Aug 05 05:53:15 PM PDT 24 |
Aug 05 05:53:48 PM PDT 24 |
378334293 ps |
| T376 |
/workspace/coverage/default/0.sram_ctrl_bijection.1877360619 |
|
|
Aug 05 05:50:04 PM PDT 24 |
Aug 05 05:50:49 PM PDT 24 |
3732529163 ps |
| T377 |
/workspace/coverage/default/45.sram_ctrl_bijection.3009619089 |
|
|
Aug 05 05:52:54 PM PDT 24 |
Aug 05 05:54:02 PM PDT 24 |
7690198142 ps |
| T378 |
/workspace/coverage/default/32.sram_ctrl_partial_access.1489731135 |
|
|
Aug 05 05:51:32 PM PDT 24 |
Aug 05 05:52:59 PM PDT 24 |
190289233 ps |
| T379 |
/workspace/coverage/default/40.sram_ctrl_executable.338415532 |
|
|
Aug 05 05:52:16 PM PDT 24 |
Aug 05 06:04:35 PM PDT 24 |
9269288862 ps |
| T380 |
/workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1032844226 |
|
|
Aug 05 05:50:05 PM PDT 24 |
Aug 05 05:58:04 PM PDT 24 |
2881644195 ps |
| T381 |
/workspace/coverage/default/19.sram_ctrl_max_throughput.3768036081 |
|
|
Aug 05 05:50:32 PM PDT 24 |
Aug 05 05:51:00 PM PDT 24 |
87134036 ps |
| T382 |
/workspace/coverage/default/3.sram_ctrl_alert_test.1249322327 |
|
|
Aug 05 05:49:54 PM PDT 24 |
Aug 05 05:49:55 PM PDT 24 |
15883544 ps |
| T383 |
/workspace/coverage/default/44.sram_ctrl_bijection.2065564156 |
|
|
Aug 05 05:52:44 PM PDT 24 |
Aug 05 05:53:34 PM PDT 24 |
9898616914 ps |
| T384 |
/workspace/coverage/default/4.sram_ctrl_multiple_keys.2479024998 |
|
|
Aug 05 05:50:05 PM PDT 24 |
Aug 05 05:58:21 PM PDT 24 |
58808968583 ps |
| T385 |
/workspace/coverage/default/21.sram_ctrl_access_during_key_req.1585293934 |
|
|
Aug 05 05:50:40 PM PDT 24 |
Aug 05 05:57:17 PM PDT 24 |
10300015199 ps |
| T386 |
/workspace/coverage/default/32.sram_ctrl_multiple_keys.101672744 |
|
|
Aug 05 05:51:31 PM PDT 24 |
Aug 05 06:13:50 PM PDT 24 |
82366739250 ps |
| T387 |
/workspace/coverage/default/19.sram_ctrl_mem_partial_access.1020747519 |
|
|
Aug 05 05:50:36 PM PDT 24 |
Aug 05 05:50:41 PM PDT 24 |
1401390152 ps |
| T388 |
/workspace/coverage/default/21.sram_ctrl_alert_test.1116696976 |
|
|
Aug 05 05:50:43 PM PDT 24 |
Aug 05 05:50:44 PM PDT 24 |
14255729 ps |
| T389 |
/workspace/coverage/default/23.sram_ctrl_ram_cfg.3586767913 |
|
|
Aug 05 05:50:52 PM PDT 24 |
Aug 05 05:50:53 PM PDT 24 |
34472889 ps |
| T390 |
/workspace/coverage/default/41.sram_ctrl_executable.675424410 |
|
|
Aug 05 05:52:21 PM PDT 24 |
Aug 05 06:15:04 PM PDT 24 |
6264364158 ps |
| T391 |
/workspace/coverage/default/5.sram_ctrl_stress_all.2802346275 |
|
|
Aug 05 05:50:04 PM PDT 24 |
Aug 05 06:25:40 PM PDT 24 |
148555566366 ps |
| T392 |
/workspace/coverage/default/11.sram_ctrl_bijection.2700579169 |
|
|
Aug 05 05:50:10 PM PDT 24 |
Aug 05 05:51:06 PM PDT 24 |
3198010049 ps |
| T393 |
/workspace/coverage/default/36.sram_ctrl_max_throughput.2183103160 |
|
|
Aug 05 05:51:52 PM PDT 24 |
Aug 05 05:51:54 PM PDT 24 |
74138803 ps |
| T394 |
/workspace/coverage/default/29.sram_ctrl_max_throughput.4273431213 |
|
|
Aug 05 05:51:17 PM PDT 24 |
Aug 05 05:53:07 PM PDT 24 |
136269497 ps |
| T395 |
/workspace/coverage/default/25.sram_ctrl_multiple_keys.1277897069 |
|
|
Aug 05 05:50:56 PM PDT 24 |
Aug 05 06:09:52 PM PDT 24 |
21566756480 ps |
| T396 |
/workspace/coverage/default/17.sram_ctrl_mem_walk.987386006 |
|
|
Aug 05 05:50:44 PM PDT 24 |
Aug 05 05:50:53 PM PDT 24 |
258885423 ps |
| T397 |
/workspace/coverage/default/31.sram_ctrl_stress_all.2559780134 |
|
|
Aug 05 05:51:30 PM PDT 24 |
Aug 05 06:20:34 PM PDT 24 |
34918014986 ps |
| T398 |
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2701947616 |
|
|
Aug 05 05:53:25 PM PDT 24 |
Aug 05 05:58:07 PM PDT 24 |
15495219267 ps |
| T399 |
/workspace/coverage/default/44.sram_ctrl_executable.704484447 |
|
|
Aug 05 05:52:54 PM PDT 24 |
Aug 05 06:02:56 PM PDT 24 |
22017129812 ps |
| T400 |
/workspace/coverage/default/20.sram_ctrl_alert_test.759586282 |
|
|
Aug 05 05:50:40 PM PDT 24 |
Aug 05 05:50:40 PM PDT 24 |
13000036 ps |
| T401 |
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1629347472 |
|
|
Aug 05 05:53:22 PM PDT 24 |
Aug 05 05:53:26 PM PDT 24 |
443818228 ps |
| T402 |
/workspace/coverage/default/31.sram_ctrl_smoke.2988308380 |
|
|
Aug 05 05:51:29 PM PDT 24 |
Aug 05 05:52:22 PM PDT 24 |
1909564848 ps |
| T403 |
/workspace/coverage/default/12.sram_ctrl_mem_walk.3622483087 |
|
|
Aug 05 05:50:12 PM PDT 24 |
Aug 05 05:50:18 PM PDT 24 |
938614264 ps |
| T404 |
/workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1754553325 |
|
|
Aug 05 05:50:01 PM PDT 24 |
Aug 05 05:58:04 PM PDT 24 |
286291230844 ps |
| T405 |
/workspace/coverage/default/34.sram_ctrl_regwen.422146632 |
|
|
Aug 05 05:51:40 PM PDT 24 |
Aug 05 05:56:34 PM PDT 24 |
950714465 ps |
| T406 |
/workspace/coverage/default/22.sram_ctrl_alert_test.449648499 |
|
|
Aug 05 05:50:54 PM PDT 24 |
Aug 05 05:50:55 PM PDT 24 |
46428478 ps |
| T407 |
/workspace/coverage/default/28.sram_ctrl_stress_all.1262382857 |
|
|
Aug 05 05:51:14 PM PDT 24 |
Aug 05 08:41:12 PM PDT 24 |
153147226486 ps |
| T408 |
/workspace/coverage/default/32.sram_ctrl_stress_all.346605714 |
|
|
Aug 05 05:51:27 PM PDT 24 |
Aug 05 07:18:41 PM PDT 24 |
283553830670 ps |
| T409 |
/workspace/coverage/default/15.sram_ctrl_smoke.2747809262 |
|
|
Aug 05 05:50:28 PM PDT 24 |
Aug 05 05:51:06 PM PDT 24 |
5950869873 ps |
| T410 |
/workspace/coverage/default/24.sram_ctrl_bijection.2153722992 |
|
|
Aug 05 05:50:56 PM PDT 24 |
Aug 05 05:51:21 PM PDT 24 |
967565571 ps |
| T411 |
/workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2912558253 |
|
|
Aug 05 05:52:33 PM PDT 24 |
Aug 05 05:54:42 PM PDT 24 |
514251690 ps |
| T412 |
/workspace/coverage/default/30.sram_ctrl_mem_walk.2718747890 |
|
|
Aug 05 05:51:23 PM PDT 24 |
Aug 05 05:51:28 PM PDT 24 |
77795779 ps |
| T413 |
/workspace/coverage/default/45.sram_ctrl_mem_walk.854377842 |
|
|
Aug 05 05:52:57 PM PDT 24 |
Aug 05 05:53:03 PM PDT 24 |
1317108676 ps |
| T414 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.3905445859 |
|
|
Aug 05 05:51:29 PM PDT 24 |
Aug 05 05:59:03 PM PDT 24 |
2495696358 ps |
| T415 |
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1715558436 |
|
|
Aug 05 05:53:32 PM PDT 24 |
Aug 05 05:54:55 PM PDT 24 |
1328222411 ps |
| T416 |
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3152173298 |
|
|
Aug 05 05:50:13 PM PDT 24 |
Aug 05 05:50:14 PM PDT 24 |
106190595 ps |
| T417 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.4034341920 |
|
|
Aug 05 05:50:41 PM PDT 24 |
Aug 05 05:50:47 PM PDT 24 |
183143788 ps |
| T418 |
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.206400819 |
|
|
Aug 05 05:53:01 PM PDT 24 |
Aug 05 05:53:16 PM PDT 24 |
286803571 ps |
| T419 |
/workspace/coverage/default/30.sram_ctrl_executable.1221080097 |
|
|
Aug 05 05:51:26 PM PDT 24 |
Aug 05 06:04:06 PM PDT 24 |
76511877396 ps |
| T420 |
/workspace/coverage/default/27.sram_ctrl_max_throughput.1017470091 |
|
|
Aug 05 05:51:07 PM PDT 24 |
Aug 05 05:51:37 PM PDT 24 |
421426665 ps |
| T421 |
/workspace/coverage/default/29.sram_ctrl_ram_cfg.4041836719 |
|
|
Aug 05 05:51:18 PM PDT 24 |
Aug 05 05:51:18 PM PDT 24 |
253807616 ps |
| T422 |
/workspace/coverage/default/37.sram_ctrl_bijection.1060828638 |
|
|
Aug 05 05:51:49 PM PDT 24 |
Aug 05 05:52:07 PM PDT 24 |
314982707 ps |
| T423 |
/workspace/coverage/default/38.sram_ctrl_partial_access_b2b.408129358 |
|
|
Aug 05 05:52:02 PM PDT 24 |
Aug 05 05:57:58 PM PDT 24 |
32185663540 ps |
| T424 |
/workspace/coverage/default/32.sram_ctrl_lc_escalation.161703346 |
|
|
Aug 05 05:51:30 PM PDT 24 |
Aug 05 05:51:38 PM PDT 24 |
663731304 ps |
| T425 |
/workspace/coverage/default/28.sram_ctrl_access_during_key_req.1788914043 |
|
|
Aug 05 05:51:15 PM PDT 24 |
Aug 05 05:57:08 PM PDT 24 |
1598440182 ps |
| T426 |
/workspace/coverage/default/48.sram_ctrl_lc_escalation.3532750582 |
|
|
Aug 05 05:53:19 PM PDT 24 |
Aug 05 05:53:25 PM PDT 24 |
4337177958 ps |
| T427 |
/workspace/coverage/default/27.sram_ctrl_lc_escalation.2639816682 |
|
|
Aug 05 05:51:09 PM PDT 24 |
Aug 05 05:51:11 PM PDT 24 |
712045469 ps |
| T428 |
/workspace/coverage/default/13.sram_ctrl_alert_test.1023891992 |
|
|
Aug 05 05:50:35 PM PDT 24 |
Aug 05 05:50:36 PM PDT 24 |
34194887 ps |
| T429 |
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.508020450 |
|
|
Aug 05 05:50:11 PM PDT 24 |
Aug 05 05:56:23 PM PDT 24 |
65341550500 ps |
| T430 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1995438493 |
|
|
Aug 05 05:50:05 PM PDT 24 |
Aug 05 05:50:08 PM PDT 24 |
394585645 ps |
| T431 |
/workspace/coverage/default/46.sram_ctrl_smoke.2642483561 |
|
|
Aug 05 05:53:02 PM PDT 24 |
Aug 05 05:53:27 PM PDT 24 |
226447133 ps |
| T432 |
/workspace/coverage/default/18.sram_ctrl_partial_access.99567099 |
|
|
Aug 05 05:50:29 PM PDT 24 |
Aug 05 05:52:27 PM PDT 24 |
1115957325 ps |
| T433 |
/workspace/coverage/default/26.sram_ctrl_smoke.681921285 |
|
|
Aug 05 05:50:57 PM PDT 24 |
Aug 05 05:51:12 PM PDT 24 |
994954231 ps |
| T434 |
/workspace/coverage/default/37.sram_ctrl_max_throughput.4155657444 |
|
|
Aug 05 05:51:56 PM PDT 24 |
Aug 05 05:54:02 PM PDT 24 |
253746574 ps |
| T435 |
/workspace/coverage/default/32.sram_ctrl_stress_pipeline.1922385104 |
|
|
Aug 05 05:51:28 PM PDT 24 |
Aug 05 05:55:09 PM PDT 24 |
8859285313 ps |
| T436 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.3161568437 |
|
|
Aug 05 05:52:31 PM PDT 24 |
Aug 05 05:57:57 PM PDT 24 |
7584777233 ps |
| T437 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.4192003388 |
|
|
Aug 05 05:53:10 PM PDT 24 |
Aug 05 05:53:19 PM PDT 24 |
868946651 ps |
| T438 |
/workspace/coverage/default/26.sram_ctrl_regwen.3026539150 |
|
|
Aug 05 05:50:56 PM PDT 24 |
Aug 05 06:10:20 PM PDT 24 |
16149113442 ps |
| T439 |
/workspace/coverage/default/48.sram_ctrl_max_throughput.3474640979 |
|
|
Aug 05 05:53:19 PM PDT 24 |
Aug 05 05:53:41 PM PDT 24 |
282532904 ps |
| T440 |
/workspace/coverage/default/10.sram_ctrl_multiple_keys.662190505 |
|
|
Aug 05 05:50:15 PM PDT 24 |
Aug 05 06:01:56 PM PDT 24 |
24818522269 ps |
| T441 |
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3401193623 |
|
|
Aug 05 05:53:19 PM PDT 24 |
Aug 05 06:01:42 PM PDT 24 |
5020895466 ps |
| T442 |
/workspace/coverage/default/32.sram_ctrl_mem_partial_access.3351584831 |
|
|
Aug 05 05:51:30 PM PDT 24 |
Aug 05 05:51:33 PM PDT 24 |
198575906 ps |
| T443 |
/workspace/coverage/default/33.sram_ctrl_alert_test.2615037553 |
|
|
Aug 05 05:51:36 PM PDT 24 |
Aug 05 05:51:37 PM PDT 24 |
28589004 ps |
| T444 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.1704259672 |
|
|
Aug 05 05:50:34 PM PDT 24 |
Aug 05 05:50:39 PM PDT 24 |
991787987 ps |
| T445 |
/workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3251896633 |
|
|
Aug 05 05:51:09 PM PDT 24 |
Aug 05 05:57:16 PM PDT 24 |
26419465489 ps |
| T20 |
/workspace/coverage/default/1.sram_ctrl_sec_cm.1437909108 |
|
|
Aug 05 05:49:56 PM PDT 24 |
Aug 05 05:50:00 PM PDT 24 |
532597552 ps |
| T446 |
/workspace/coverage/default/2.sram_ctrl_multiple_keys.3162883404 |
|
|
Aug 05 05:50:11 PM PDT 24 |
Aug 05 06:04:48 PM PDT 24 |
7395192170 ps |
| T447 |
/workspace/coverage/default/11.sram_ctrl_regwen.1655496670 |
|
|
Aug 05 05:50:14 PM PDT 24 |
Aug 05 06:09:58 PM PDT 24 |
53902965796 ps |
| T448 |
/workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.2088156188 |
|
|
Aug 05 05:50:58 PM PDT 24 |
Aug 05 05:51:49 PM PDT 24 |
211416154 ps |
| T449 |
/workspace/coverage/default/26.sram_ctrl_ram_cfg.4010378024 |
|
|
Aug 05 05:50:56 PM PDT 24 |
Aug 05 05:50:57 PM PDT 24 |
45497698 ps |
| T450 |
/workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.2981117702 |
|
|
Aug 05 05:50:50 PM PDT 24 |
Aug 05 05:50:58 PM PDT 24 |
362508643 ps |
| T451 |
/workspace/coverage/default/36.sram_ctrl_smoke.3987460990 |
|
|
Aug 05 05:51:46 PM PDT 24 |
Aug 05 05:52:02 PM PDT 24 |
1616264890 ps |
| T452 |
/workspace/coverage/default/9.sram_ctrl_max_throughput.2361544333 |
|
|
Aug 05 05:50:05 PM PDT 24 |
Aug 05 05:52:08 PM PDT 24 |
558151167 ps |
| T453 |
/workspace/coverage/default/41.sram_ctrl_smoke.516284439 |
|
|
Aug 05 05:52:23 PM PDT 24 |
Aug 05 05:52:39 PM PDT 24 |
325816854 ps |
| T454 |
/workspace/coverage/default/6.sram_ctrl_alert_test.3597392847 |
|
|
Aug 05 05:50:12 PM PDT 24 |
Aug 05 05:50:13 PM PDT 24 |
20538270 ps |
| T455 |
/workspace/coverage/default/38.sram_ctrl_stress_all.503502682 |
|
|
Aug 05 05:52:08 PM PDT 24 |
Aug 05 06:52:36 PM PDT 24 |
193358075526 ps |
| T456 |
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1367860444 |
|
|
Aug 05 05:53:11 PM PDT 24 |
Aug 05 06:12:43 PM PDT 24 |
6311978742 ps |
| T457 |
/workspace/coverage/default/1.sram_ctrl_regwen.3225435567 |
|
|
Aug 05 05:49:54 PM PDT 24 |
Aug 05 05:58:51 PM PDT 24 |
8744861997 ps |
| T458 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.3607568904 |
|
|
Aug 05 05:50:11 PM PDT 24 |
Aug 05 05:54:42 PM PDT 24 |
39259501257 ps |
| T459 |
/workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.4141632099 |
|
|
Aug 05 05:51:23 PM PDT 24 |
Aug 05 05:51:56 PM PDT 24 |
4323706419 ps |
| T460 |
/workspace/coverage/default/27.sram_ctrl_regwen.589399166 |
|
|
Aug 05 05:51:08 PM PDT 24 |
Aug 05 06:03:14 PM PDT 24 |
11074143304 ps |
| T461 |
/workspace/coverage/default/24.sram_ctrl_stress_pipeline.2349110422 |
|
|
Aug 05 05:50:56 PM PDT 24 |
Aug 05 05:55:55 PM PDT 24 |
6271136766 ps |
| T462 |
/workspace/coverage/default/17.sram_ctrl_stress_all.2417121412 |
|
|
Aug 05 05:50:42 PM PDT 24 |
Aug 05 06:12:57 PM PDT 24 |
24407832035 ps |
| T463 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.2178060397 |
|
|
Aug 05 05:52:22 PM PDT 24 |
Aug 05 05:58:13 PM PDT 24 |
2076653615 ps |
| T464 |
/workspace/coverage/default/19.sram_ctrl_stress_pipeline.2820892418 |
|
|
Aug 05 05:50:35 PM PDT 24 |
Aug 05 05:54:30 PM PDT 24 |
4435793272 ps |
| T465 |
/workspace/coverage/default/22.sram_ctrl_partial_access.2155615013 |
|
|
Aug 05 05:50:54 PM PDT 24 |
Aug 05 05:52:22 PM PDT 24 |
2152445681 ps |
| T466 |
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3729744686 |
|
|
Aug 05 05:52:45 PM PDT 24 |
Aug 05 06:03:51 PM PDT 24 |
1504745343 ps |
| T467 |
/workspace/coverage/default/1.sram_ctrl_mem_walk.636966051 |
|
|
Aug 05 05:50:11 PM PDT 24 |
Aug 05 05:50:16 PM PDT 24 |
284080121 ps |
| T468 |
/workspace/coverage/default/25.sram_ctrl_bijection.507679999 |
|
|
Aug 05 05:50:55 PM PDT 24 |
Aug 05 05:51:25 PM PDT 24 |
865294031 ps |
| T469 |
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1457073193 |
|
|
Aug 05 05:53:18 PM PDT 24 |
Aug 05 05:53:31 PM PDT 24 |
297638109 ps |
| T470 |
/workspace/coverage/default/0.sram_ctrl_max_throughput.2715094343 |
|
|
Aug 05 05:49:58 PM PDT 24 |
Aug 05 05:51:01 PM PDT 24 |
405652269 ps |
| T471 |
/workspace/coverage/default/23.sram_ctrl_executable.3044195140 |
|
|
Aug 05 05:50:46 PM PDT 24 |
Aug 05 06:07:26 PM PDT 24 |
7051084250 ps |
| T472 |
/workspace/coverage/default/20.sram_ctrl_access_during_key_req.39493510 |
|
|
Aug 05 05:50:33 PM PDT 24 |
Aug 05 06:02:04 PM PDT 24 |
1798001538 ps |
| T473 |
/workspace/coverage/default/25.sram_ctrl_stress_all.3336844453 |
|
|
Aug 05 05:50:58 PM PDT 24 |
Aug 05 06:18:31 PM PDT 24 |
8721220770 ps |
| T474 |
/workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.1317264760 |
|
|
Aug 05 05:50:47 PM PDT 24 |
Aug 05 05:50:54 PM PDT 24 |
954846245 ps |
| T475 |
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3689412797 |
|
|
Aug 05 05:53:06 PM PDT 24 |
Aug 05 05:53:09 PM PDT 24 |
176213942 ps |
| T476 |
/workspace/coverage/default/36.sram_ctrl_ram_cfg.3462834218 |
|
|
Aug 05 05:51:49 PM PDT 24 |
Aug 05 05:51:50 PM PDT 24 |
75049584 ps |
| T477 |
/workspace/coverage/default/48.sram_ctrl_alert_test.2719684139 |
|
|
Aug 05 05:53:22 PM PDT 24 |
Aug 05 05:53:23 PM PDT 24 |
39514482 ps |
| T478 |
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3226407259 |
|
|
Aug 05 05:53:00 PM PDT 24 |
Aug 05 06:17:02 PM PDT 24 |
3054206240 ps |
| T479 |
/workspace/coverage/default/26.sram_ctrl_mem_partial_access.2505174651 |
|
|
Aug 05 05:51:00 PM PDT 24 |
Aug 05 05:51:06 PM PDT 24 |
208194073 ps |
| T480 |
/workspace/coverage/default/44.sram_ctrl_stress_all.1531076478 |
|
|
Aug 05 05:52:51 PM PDT 24 |
Aug 05 06:47:38 PM PDT 24 |
7584925691 ps |
| T481 |
/workspace/coverage/default/12.sram_ctrl_bijection.2947161191 |
|
|
Aug 05 05:50:19 PM PDT 24 |
Aug 05 05:51:02 PM PDT 24 |
654800594 ps |
| T482 |
/workspace/coverage/default/19.sram_ctrl_bijection.4246310798 |
|
|
Aug 05 05:50:39 PM PDT 24 |
Aug 05 05:51:00 PM PDT 24 |
322640675 ps |
| T483 |
/workspace/coverage/default/42.sram_ctrl_multiple_keys.2850598525 |
|
|
Aug 05 05:52:27 PM PDT 24 |
Aug 05 06:08:38 PM PDT 24 |
18582040723 ps |
| T484 |
/workspace/coverage/default/44.sram_ctrl_max_throughput.3285021353 |
|
|
Aug 05 05:52:51 PM PDT 24 |
Aug 05 05:53:02 PM PDT 24 |
69561046 ps |
| T485 |
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1187178584 |
|
|
Aug 05 05:52:56 PM PDT 24 |
Aug 05 05:56:39 PM PDT 24 |
2601490650 ps |
| T486 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.4022627052 |
|
|
Aug 05 05:51:06 PM PDT 24 |
Aug 05 05:51:13 PM PDT 24 |
734921292 ps |
| T487 |
/workspace/coverage/default/36.sram_ctrl_mem_walk.3363038828 |
|
|
Aug 05 05:51:49 PM PDT 24 |
Aug 05 05:51:55 PM PDT 24 |
955785693 ps |
| T488 |
/workspace/coverage/default/48.sram_ctrl_executable.2975069459 |
|
|
Aug 05 05:53:18 PM PDT 24 |
Aug 05 06:10:50 PM PDT 24 |
43296664888 ps |
| T489 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.668086152 |
|
|
Aug 05 05:50:49 PM PDT 24 |
Aug 05 05:53:04 PM PDT 24 |
151813950 ps |
| T490 |
/workspace/coverage/default/40.sram_ctrl_alert_test.2403758642 |
|
|
Aug 05 05:52:22 PM PDT 24 |
Aug 05 05:52:23 PM PDT 24 |
19859076 ps |
| T491 |
/workspace/coverage/default/0.sram_ctrl_executable.4132516975 |
|
|
Aug 05 05:50:03 PM PDT 24 |
Aug 05 05:57:34 PM PDT 24 |
5516801999 ps |
| T492 |
/workspace/coverage/default/28.sram_ctrl_multiple_keys.3722579253 |
|
|
Aug 05 05:51:09 PM PDT 24 |
Aug 05 05:59:26 PM PDT 24 |
7361921836 ps |
| T493 |
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2576272319 |
|
|
Aug 05 05:50:11 PM PDT 24 |
Aug 05 05:53:44 PM PDT 24 |
2115288976 ps |
| T494 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.2854303344 |
|
|
Aug 05 05:50:54 PM PDT 24 |
Aug 05 05:50:55 PM PDT 24 |
83915345 ps |
| T495 |
/workspace/coverage/default/23.sram_ctrl_regwen.2830925877 |
|
|
Aug 05 05:50:49 PM PDT 24 |
Aug 05 06:08:42 PM PDT 24 |
10464076359 ps |
| T496 |
/workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.4281422505 |
|
|
Aug 05 05:50:03 PM PDT 24 |
Aug 05 05:59:55 PM PDT 24 |
3461490952 ps |
| T497 |
/workspace/coverage/default/40.sram_ctrl_bijection.2196740381 |
|
|
Aug 05 05:52:17 PM PDT 24 |
Aug 05 05:53:14 PM PDT 24 |
11568393620 ps |
| T498 |
/workspace/coverage/default/24.sram_ctrl_mem_partial_access.3424108277 |
|
|
Aug 05 05:50:52 PM PDT 24 |
Aug 05 05:50:56 PM PDT 24 |
103205619 ps |
| T499 |
/workspace/coverage/default/22.sram_ctrl_bijection.1443289180 |
|
|
Aug 05 05:50:52 PM PDT 24 |
Aug 05 05:51:41 PM PDT 24 |
1416916665 ps |
| T500 |
/workspace/coverage/default/38.sram_ctrl_mem_walk.3033519189 |
|
|
Aug 05 05:52:02 PM PDT 24 |
Aug 05 05:52:13 PM PDT 24 |
1845748577 ps |
| T501 |
/workspace/coverage/default/34.sram_ctrl_mem_walk.1908819358 |
|
|
Aug 05 05:51:40 PM PDT 24 |
Aug 05 05:51:51 PM PDT 24 |
901654353 ps |
| T502 |
/workspace/coverage/default/7.sram_ctrl_mem_walk.1525192421 |
|
|
Aug 05 05:50:12 PM PDT 24 |
Aug 05 05:50:23 PM PDT 24 |
1306739671 ps |
| T503 |
/workspace/coverage/default/11.sram_ctrl_lc_escalation.1300630763 |
|
|
Aug 05 05:50:11 PM PDT 24 |
Aug 05 05:50:18 PM PDT 24 |
728439635 ps |
| T504 |
/workspace/coverage/default/14.sram_ctrl_max_throughput.62826078 |
|
|
Aug 05 05:50:33 PM PDT 24 |
Aug 05 05:52:58 PM PDT 24 |
129870754 ps |
| T505 |
/workspace/coverage/default/8.sram_ctrl_smoke.4278952866 |
|
|
Aug 05 05:50:04 PM PDT 24 |
Aug 05 05:50:19 PM PDT 24 |
1181585033 ps |
| T506 |
/workspace/coverage/default/2.sram_ctrl_partial_access.137045095 |
|
|
Aug 05 05:50:05 PM PDT 24 |
Aug 05 05:50:21 PM PDT 24 |
1090017959 ps |
| T507 |
/workspace/coverage/default/26.sram_ctrl_alert_test.567429631 |
|
|
Aug 05 05:51:06 PM PDT 24 |
Aug 05 05:51:06 PM PDT 24 |
17461919 ps |
| T508 |
/workspace/coverage/default/2.sram_ctrl_bijection.460385815 |
|
|
Aug 05 05:50:06 PM PDT 24 |
Aug 05 05:50:56 PM PDT 24 |
2859387305 ps |
| T509 |
/workspace/coverage/default/14.sram_ctrl_partial_access.2359090989 |
|
|
Aug 05 05:50:39 PM PDT 24 |
Aug 05 05:50:57 PM PDT 24 |
1316892397 ps |
| T510 |
/workspace/coverage/default/7.sram_ctrl_bijection.2870771776 |
|
|
Aug 05 05:50:08 PM PDT 24 |
Aug 05 05:50:54 PM PDT 24 |
40588174198 ps |
| T511 |
/workspace/coverage/default/1.sram_ctrl_partial_access.2495179919 |
|
|
Aug 05 05:49:54 PM PDT 24 |
Aug 05 05:50:13 PM PDT 24 |
2071789006 ps |
| T512 |
/workspace/coverage/default/6.sram_ctrl_multiple_keys.970032568 |
|
|
Aug 05 05:50:03 PM PDT 24 |
Aug 05 06:00:35 PM PDT 24 |
22196567057 ps |
| T513 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.4191726133 |
|
|
Aug 05 05:51:46 PM PDT 24 |
Aug 05 05:54:46 PM PDT 24 |
3585689903 ps |
| T514 |
/workspace/coverage/default/9.sram_ctrl_bijection.718253499 |
|
|
Aug 05 05:50:12 PM PDT 24 |
Aug 05 05:50:59 PM PDT 24 |
2775805717 ps |
| T515 |
/workspace/coverage/default/17.sram_ctrl_alert_test.4075389617 |
|
|
Aug 05 05:50:38 PM PDT 24 |
Aug 05 05:50:39 PM PDT 24 |
37917440 ps |
| T516 |
/workspace/coverage/default/3.sram_ctrl_mem_partial_access.724639503 |
|
|
Aug 05 05:49:56 PM PDT 24 |
Aug 05 05:49:59 PM PDT 24 |
304020505 ps |
| T517 |
/workspace/coverage/default/14.sram_ctrl_lc_escalation.2647474612 |
|
|
Aug 05 05:50:37 PM PDT 24 |
Aug 05 05:50:43 PM PDT 24 |
433313154 ps |
| T518 |
/workspace/coverage/default/43.sram_ctrl_alert_test.2174104415 |
|
|
Aug 05 05:52:43 PM PDT 24 |
Aug 05 05:52:44 PM PDT 24 |
82589837 ps |
| T519 |
/workspace/coverage/default/48.sram_ctrl_mem_walk.4080278021 |
|
|
Aug 05 05:53:22 PM PDT 24 |
Aug 05 05:53:34 PM PDT 24 |
2049222767 ps |
| T520 |
/workspace/coverage/default/8.sram_ctrl_max_throughput.1631902306 |
|
|
Aug 05 05:50:06 PM PDT 24 |
Aug 05 05:51:01 PM PDT 24 |
109786440 ps |
| T521 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1284838276 |
|
|
Aug 05 05:50:06 PM PDT 24 |
Aug 05 06:08:05 PM PDT 24 |
15188217107 ps |
| T522 |
/workspace/coverage/default/34.sram_ctrl_bijection.515139755 |
|
|
Aug 05 05:51:40 PM PDT 24 |
Aug 05 05:52:03 PM PDT 24 |
368065001 ps |
| T523 |
/workspace/coverage/default/35.sram_ctrl_alert_test.3242573795 |
|
|
Aug 05 05:51:45 PM PDT 24 |
Aug 05 05:51:46 PM PDT 24 |
15822989 ps |
| T524 |
/workspace/coverage/default/32.sram_ctrl_regwen.124264775 |
|
|
Aug 05 05:51:28 PM PDT 24 |
Aug 05 06:01:39 PM PDT 24 |
38742614168 ps |
| T525 |
/workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.2505861859 |
|
|
Aug 05 05:52:20 PM PDT 24 |
Aug 05 05:52:49 PM PDT 24 |
3394214865 ps |
| T526 |
/workspace/coverage/default/40.sram_ctrl_stress_all.686904799 |
|
|
Aug 05 05:52:22 PM PDT 24 |
Aug 05 06:15:50 PM PDT 24 |
36194273550 ps |
| T527 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.3626160761 |
|
|
Aug 05 05:50:14 PM PDT 24 |
Aug 05 05:50:17 PM PDT 24 |
207868877 ps |
| T528 |
/workspace/coverage/default/42.sram_ctrl_executable.1651053869 |
|
|
Aug 05 05:52:31 PM PDT 24 |
Aug 05 06:04:28 PM PDT 24 |
31691297800 ps |
| T529 |
/workspace/coverage/default/41.sram_ctrl_mem_partial_access.40292120 |
|
|
Aug 05 05:52:26 PM PDT 24 |
Aug 05 05:52:33 PM PDT 24 |
167828623 ps |
| T530 |
/workspace/coverage/default/44.sram_ctrl_mem_walk.4140473240 |
|
|
Aug 05 05:52:51 PM PDT 24 |
Aug 05 05:53:00 PM PDT 24 |
275519867 ps |
| T531 |
/workspace/coverage/default/14.sram_ctrl_regwen.1016017966 |
|
|
Aug 05 05:50:32 PM PDT 24 |
Aug 05 06:10:16 PM PDT 24 |
35721361774 ps |
| T532 |
/workspace/coverage/default/12.sram_ctrl_multiple_keys.1618073806 |
|
|
Aug 05 05:50:06 PM PDT 24 |
Aug 05 05:56:12 PM PDT 24 |
16982534883 ps |
| T533 |
/workspace/coverage/default/15.sram_ctrl_partial_access.2068753691 |
|
|
Aug 05 05:50:30 PM PDT 24 |
Aug 05 05:52:39 PM PDT 24 |
215415235 ps |
| T534 |
/workspace/coverage/default/9.sram_ctrl_stress_all.332428255 |
|
|
Aug 05 05:50:15 PM PDT 24 |
Aug 05 05:59:10 PM PDT 24 |
10281694349 ps |
| T535 |
/workspace/coverage/default/34.sram_ctrl_stress_all.1759384206 |
|
|
Aug 05 05:51:41 PM PDT 24 |
Aug 05 06:29:48 PM PDT 24 |
28829480013 ps |
| T536 |
/workspace/coverage/default/24.sram_ctrl_max_throughput.3012591561 |
|
|
Aug 05 05:50:58 PM PDT 24 |
Aug 05 05:52:35 PM PDT 24 |
135409264 ps |
| T537 |
/workspace/coverage/default/30.sram_ctrl_stress_pipeline.1864068298 |
|
|
Aug 05 05:51:18 PM PDT 24 |
Aug 05 05:56:46 PM PDT 24 |
3358394873 ps |
| T538 |
/workspace/coverage/default/7.sram_ctrl_lc_escalation.99086326 |
|
|
Aug 05 05:50:07 PM PDT 24 |
Aug 05 05:50:15 PM PDT 24 |
8084060196 ps |
| T539 |
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3220643427 |
|
|
Aug 05 05:50:16 PM PDT 24 |
Aug 05 05:50:25 PM PDT 24 |
257761825 ps |
| T540 |
/workspace/coverage/default/29.sram_ctrl_smoke.4192799220 |
|
|
Aug 05 05:51:13 PM PDT 24 |
Aug 05 05:51:25 PM PDT 24 |
2646504820 ps |
| T541 |
/workspace/coverage/default/43.sram_ctrl_stress_all.3250434569 |
|
|
Aug 05 05:52:46 PM PDT 24 |
Aug 05 06:16:52 PM PDT 24 |
5690007358 ps |
| T542 |
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1969491685 |
|
|
Aug 05 05:50:12 PM PDT 24 |
Aug 05 05:50:14 PM PDT 24 |
783286334 ps |
| T543 |
/workspace/coverage/default/2.sram_ctrl_partial_access_b2b.4178590647 |
|
|
Aug 05 05:50:08 PM PDT 24 |
Aug 05 05:56:20 PM PDT 24 |
62721475970 ps |
| T544 |
/workspace/coverage/default/45.sram_ctrl_stress_all.558688081 |
|
|
Aug 05 05:52:55 PM PDT 24 |
Aug 05 06:53:27 PM PDT 24 |
9736466383 ps |
| T545 |
/workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.2949129814 |
|
|
Aug 05 05:50:33 PM PDT 24 |
Aug 05 05:50:59 PM PDT 24 |
1002243298 ps |
| T546 |
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.1314029178 |
|
|
Aug 05 05:53:00 PM PDT 24 |
Aug 05 05:57:20 PM PDT 24 |
10015406972 ps |
| T547 |
/workspace/coverage/default/36.sram_ctrl_access_during_key_req.1436387066 |
|
|
Aug 05 05:51:49 PM PDT 24 |
Aug 05 06:00:31 PM PDT 24 |
8315753570 ps |
| T548 |
/workspace/coverage/default/30.sram_ctrl_smoke.93178640 |
|
|
Aug 05 05:51:19 PM PDT 24 |
Aug 05 05:51:21 PM PDT 24 |
47301950 ps |
| T549 |
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.1528410765 |
|
|
Aug 05 05:50:06 PM PDT 24 |
Aug 05 05:56:38 PM PDT 24 |
2603233486 ps |
| T550 |
/workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.570337305 |
|
|
Aug 05 05:51:24 PM PDT 24 |
Aug 05 05:51:47 PM PDT 24 |
307126474 ps |
| T551 |
/workspace/coverage/default/16.sram_ctrl_alert_test.915158599 |
|
|
Aug 05 05:50:30 PM PDT 24 |
Aug 05 05:50:30 PM PDT 24 |
35737542 ps |