Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1021
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
74.81 74.81 93.05 93.05 76.90 76.90 86.62 86.62 33.33 33.33 85.27 85.27 93.51 93.51 55.03 55.03 /workspace/coverage/default/41.sram_ctrl_stress_all.3645080869
85.90 11.09 95.68 2.63 81.75 4.86 87.24 0.62 71.43 38.10 89.61 4.35 95.72 2.21 79.89 24.86 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.4151930885
92.14 6.24 98.47 2.80 86.73 4.98 93.62 6.38 95.24 23.81 94.69 5.07 96.17 0.44 80.07 0.18 /workspace/coverage/default/49.sram_ctrl_mem_walk.761395986
93.25 1.11 98.47 0.00 88.03 1.30 95.91 2.29 95.24 0.00 94.69 0.00 96.17 0.00 84.28 4.20 /workspace/coverage/default/27.sram_ctrl_stress_all.1868594314
94.13 0.88 98.64 0.17 88.86 0.83 96.12 0.21 95.24 0.00 95.41 0.72 96.17 0.00 88.48 4.20 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.335264471
94.96 0.83 98.64 0.00 88.86 0.00 96.12 0.00 100.00 4.76 95.41 0.00 97.05 0.88 88.67 0.18 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.641996203
95.54 0.58 98.81 0.17 90.64 1.78 96.53 0.42 100.00 0.00 96.14 0.72 97.64 0.59 89.03 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.1949960051
95.94 0.40 99.07 0.25 90.64 0.00 96.53 0.00 100.00 0.00 96.14 0.00 97.64 0.00 91.59 2.56 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2353025956
96.30 0.35 99.07 0.00 90.64 0.00 98.27 1.73 100.00 0.00 96.14 0.00 97.64 0.00 92.32 0.73 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.1099490322
96.51 0.22 99.07 0.00 90.64 0.00 98.34 0.07 100.00 0.00 96.14 0.00 97.64 0.00 93.78 1.46 /workspace/coverage/default/37.sram_ctrl_stress_all.364899248
96.71 0.20 99.07 0.00 90.64 0.00 98.40 0.07 100.00 0.00 96.14 0.00 98.97 1.33 93.78 0.00 /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2709117619
96.90 0.19 99.07 0.00 91.00 0.36 98.82 0.42 100.00 0.00 96.14 0.00 98.97 0.00 94.33 0.55 /workspace/coverage/default/13.sram_ctrl_alert_test.1105570656
97.09 0.18 99.07 0.00 91.00 0.00 98.82 0.00 100.00 0.00 96.14 0.00 98.97 0.00 95.61 1.28 /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.2405585062
97.22 0.13 99.15 0.08 91.00 0.00 99.65 0.83 100.00 0.00 96.14 0.00 98.97 0.00 95.61 0.00 /workspace/coverage/default/13.sram_ctrl_ram_cfg.4147275136
97.29 0.08 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.16 0.55 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3116076800
97.37 0.08 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 98.97 0.00 96.71 0.55 /workspace/coverage/default/38.sram_ctrl_executable.1537268516
97.45 0.07 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.15 97.07 0.37 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3931059121
97.50 0.05 99.15 0.00 91.00 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.37 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2048839928
97.51 0.01 99.15 0.00 91.00 0.00 99.72 0.07 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.00 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1541857794

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3302609720
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.2881231264
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1988087641
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.293073804
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2875978691
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1097626071
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4276524036
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3015442190
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2567859911
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3722527000
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1318600594
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.3496296116
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1421303475
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1908792889
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3582398643
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1136368997
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.2517969944
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3076269488
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.2883071557
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.14596346
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1675839878
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2294606125
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.987462706
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3480123207
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3576693086
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3591622433
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.2824286661
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.2230538796
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.485115975
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.3396047015
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1458579864
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3305692177
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.1292314375
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.899287760
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1145724266
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.2054143511
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.1914109681
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.3742887158
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3918575213
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1885630456
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1229637652
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2882247161
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.993926535
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.2465289217
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2038848284
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.936394902
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.122489978
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2431647164
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.1928100623
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3393437023
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.4179832606
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1173340923
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1873788311
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3552842917
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3685914753
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2467144362
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1619018246
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2084527218
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.979367290
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2170505807
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3182557854
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1860163382
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.690336254
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.725694069
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1469508098
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.647709124
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1479928175
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.2470607817
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.828267908
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.3751177786
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2314240509
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1482673229
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.1833621901
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1248904345
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.322580364
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2826978063
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2987172016
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.2837962413
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3907220214
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.3602584863
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3667427344
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.2429981292
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2535151178
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2758307590
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.898189543
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.2598118422
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.2773284362
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1760672425
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.1544789862
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.2219128756
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1257278450
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.855586198
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1407040508
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1434087244
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.2591744933
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.1689342361
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3658647562
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3639420457
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2082002528
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.307978673
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2228706872
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.1582377267
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3780786088
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1829773122
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.356376634
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1250501088
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2850115073
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2658187828
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.1474239024
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.651408647
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.901393915
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.369091065
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1636270149
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.2872645990
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2377669158
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3295127407
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.4004574604
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.194013727
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3015193882
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2326984677
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.3027383030
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1423439993
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.322420377
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2289615130
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1663092998
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.2934399069
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1093421197
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2445574214
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1599149486
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.4142241636
/workspace/coverage/default/0.sram_ctrl_alert_test.1951675417
/workspace/coverage/default/0.sram_ctrl_bijection.479870243
/workspace/coverage/default/0.sram_ctrl_executable.3029408123
/workspace/coverage/default/0.sram_ctrl_max_throughput.1901148660
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.102051152
/workspace/coverage/default/0.sram_ctrl_mem_walk.3672408074
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2151745430
/workspace/coverage/default/0.sram_ctrl_partial_access.451737500
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.483914741
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2174665281
/workspace/coverage/default/0.sram_ctrl_regwen.1078054299
/workspace/coverage/default/0.sram_ctrl_smoke.1136265117
/workspace/coverage/default/0.sram_ctrl_stress_all.1868922591
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.493808304
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.4072309115
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.1784616245
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.516044128
/workspace/coverage/default/1.sram_ctrl_alert_test.1633610359
/workspace/coverage/default/1.sram_ctrl_bijection.1181701119
/workspace/coverage/default/1.sram_ctrl_executable.3298572428
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4128909712
/workspace/coverage/default/1.sram_ctrl_max_throughput.1887597340
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.3643642133
/workspace/coverage/default/1.sram_ctrl_mem_walk.2916146611
/workspace/coverage/default/1.sram_ctrl_multiple_keys.3808847238
/workspace/coverage/default/1.sram_ctrl_partial_access.3684678784
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3599962970
/workspace/coverage/default/1.sram_ctrl_ram_cfg.3358641398
/workspace/coverage/default/1.sram_ctrl_regwen.1217434926
/workspace/coverage/default/1.sram_ctrl_sec_cm.1917537612
/workspace/coverage/default/1.sram_ctrl_smoke.301524956
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2418052868
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2590243577
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.966816537
/workspace/coverage/default/10.sram_ctrl_alert_test.165468425
/workspace/coverage/default/10.sram_ctrl_bijection.1676941433
/workspace/coverage/default/10.sram_ctrl_executable.3947464085
/workspace/coverage/default/10.sram_ctrl_lc_escalation.1526981432
/workspace/coverage/default/10.sram_ctrl_max_throughput.890631427
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3373708707
/workspace/coverage/default/10.sram_ctrl_mem_walk.1498505799
/workspace/coverage/default/10.sram_ctrl_multiple_keys.109525035
/workspace/coverage/default/10.sram_ctrl_partial_access.1827563051
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.2607705606
/workspace/coverage/default/10.sram_ctrl_ram_cfg.1810918914
/workspace/coverage/default/10.sram_ctrl_regwen.1261450529
/workspace/coverage/default/10.sram_ctrl_smoke.3365683100
/workspace/coverage/default/10.sram_ctrl_stress_all.1487105301
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.4060411923
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.3120544572
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2070320644
/workspace/coverage/default/11.sram_ctrl_alert_test.1590583716
/workspace/coverage/default/11.sram_ctrl_bijection.153172391
/workspace/coverage/default/11.sram_ctrl_executable.1698495619
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3873710105
/workspace/coverage/default/11.sram_ctrl_max_throughput.2195387330
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.904097400
/workspace/coverage/default/11.sram_ctrl_mem_walk.1045156149
/workspace/coverage/default/11.sram_ctrl_multiple_keys.2965357199
/workspace/coverage/default/11.sram_ctrl_partial_access.3022603112
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.549307196
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3223162012
/workspace/coverage/default/11.sram_ctrl_regwen.1985689280
/workspace/coverage/default/11.sram_ctrl_smoke.524975856
/workspace/coverage/default/11.sram_ctrl_stress_all.3892782739
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2070106466
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.3922158912
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.1910908203
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.2777787318
/workspace/coverage/default/12.sram_ctrl_alert_test.1986933189
/workspace/coverage/default/12.sram_ctrl_bijection.2269020790
/workspace/coverage/default/12.sram_ctrl_executable.1154141363
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2263493915
/workspace/coverage/default/12.sram_ctrl_max_throughput.3728194153
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1380406350
/workspace/coverage/default/12.sram_ctrl_mem_walk.2145801226
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/workspace/coverage/default/43.sram_ctrl_ram_cfg.3799620553
/workspace/coverage/default/43.sram_ctrl_regwen.1569269437
/workspace/coverage/default/43.sram_ctrl_smoke.2814258822
/workspace/coverage/default/43.sram_ctrl_stress_all.170329829
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2566529264
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1002673182
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.686187682
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.1533703280
/workspace/coverage/default/44.sram_ctrl_alert_test.21529854
/workspace/coverage/default/44.sram_ctrl_bijection.1269671010
/workspace/coverage/default/44.sram_ctrl_executable.1511521488
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1781266245
/workspace/coverage/default/44.sram_ctrl_max_throughput.1754445924
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3057622974
/workspace/coverage/default/44.sram_ctrl_mem_walk.71308460
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1029184425
/workspace/coverage/default/44.sram_ctrl_partial_access.557856144
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2005639363
/workspace/coverage/default/44.sram_ctrl_ram_cfg.458055866
/workspace/coverage/default/44.sram_ctrl_regwen.3938966968
/workspace/coverage/default/44.sram_ctrl_smoke.4214643411
/workspace/coverage/default/44.sram_ctrl_stress_all.859893530
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.1925181451
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.1687647771
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4075998054
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.3641205314
/workspace/coverage/default/45.sram_ctrl_alert_test.2759630789
/workspace/coverage/default/45.sram_ctrl_bijection.616472417
/workspace/coverage/default/45.sram_ctrl_executable.3919188209
/workspace/coverage/default/45.sram_ctrl_lc_escalation.944156128
/workspace/coverage/default/45.sram_ctrl_max_throughput.1381371663
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2471037797
/workspace/coverage/default/45.sram_ctrl_mem_walk.2772232963
/workspace/coverage/default/45.sram_ctrl_multiple_keys.625656177
/workspace/coverage/default/45.sram_ctrl_partial_access.257365258
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2065994146
/workspace/coverage/default/45.sram_ctrl_regwen.1871857669
/workspace/coverage/default/45.sram_ctrl_smoke.2374221221
/workspace/coverage/default/45.sram_ctrl_stress_all.668109485
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2181167295
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2787846408
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.979719798
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1284694325
/workspace/coverage/default/46.sram_ctrl_alert_test.1479599087
/workspace/coverage/default/46.sram_ctrl_bijection.2517617190
/workspace/coverage/default/46.sram_ctrl_executable.2131750663
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3824261741
/workspace/coverage/default/46.sram_ctrl_max_throughput.2024413310
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.386891607
/workspace/coverage/default/46.sram_ctrl_mem_walk.1373199858
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2938640254
/workspace/coverage/default/46.sram_ctrl_partial_access.2598324517
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.600287046
/workspace/coverage/default/46.sram_ctrl_ram_cfg.515683571
/workspace/coverage/default/46.sram_ctrl_regwen.1625967642
/workspace/coverage/default/46.sram_ctrl_smoke.3794458252
/workspace/coverage/default/46.sram_ctrl_stress_all.2477584527
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1931706402
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.4121590812
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1892451361
/workspace/coverage/default/47.sram_ctrl_alert_test.2531561420
/workspace/coverage/default/47.sram_ctrl_bijection.196439167
/workspace/coverage/default/47.sram_ctrl_executable.1819579399
/workspace/coverage/default/47.sram_ctrl_lc_escalation.132424866
/workspace/coverage/default/47.sram_ctrl_max_throughput.1031950026
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3517749810
/workspace/coverage/default/47.sram_ctrl_mem_walk.705004224
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3064222707
/workspace/coverage/default/47.sram_ctrl_partial_access.3837107853
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1506482841
/workspace/coverage/default/47.sram_ctrl_ram_cfg.550253438
/workspace/coverage/default/47.sram_ctrl_regwen.2242277515
/workspace/coverage/default/47.sram_ctrl_smoke.1779264834
/workspace/coverage/default/47.sram_ctrl_stress_all.2031722364
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.2218722522
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.2004913710
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.2233535708
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.3223056431
/workspace/coverage/default/48.sram_ctrl_alert_test.321123475
/workspace/coverage/default/48.sram_ctrl_bijection.4092568539
/workspace/coverage/default/48.sram_ctrl_executable.3185715589
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1227983651
/workspace/coverage/default/48.sram_ctrl_max_throughput.3301824393
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.1782192876
/workspace/coverage/default/48.sram_ctrl_mem_walk.2118226453
/workspace/coverage/default/48.sram_ctrl_multiple_keys.2878257501
/workspace/coverage/default/48.sram_ctrl_partial_access.2709806260
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.1471409668
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1978106747
/workspace/coverage/default/48.sram_ctrl_regwen.3683505080
/workspace/coverage/default/48.sram_ctrl_smoke.1549648945
/workspace/coverage/default/48.sram_ctrl_stress_all.1648052890
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.968639883
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2512540021
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1719986654
/workspace/coverage/default/49.sram_ctrl_alert_test.2742983083
/workspace/coverage/default/49.sram_ctrl_bijection.2018650650
/workspace/coverage/default/49.sram_ctrl_executable.337092094
/workspace/coverage/default/49.sram_ctrl_lc_escalation.3609065145
/workspace/coverage/default/49.sram_ctrl_max_throughput.2894650350
/workspace/coverage/default/49.sram_ctrl_multiple_keys.2725504456
/workspace/coverage/default/49.sram_ctrl_partial_access.1962531534
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.2974526777
/workspace/coverage/default/49.sram_ctrl_ram_cfg.1706465556
/workspace/coverage/default/49.sram_ctrl_regwen.3219362124
/workspace/coverage/default/49.sram_ctrl_smoke.1421937095
/workspace/coverage/default/49.sram_ctrl_stress_all.3464915148
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.270308291
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.4084414731
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.214411916
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2480684434
/workspace/coverage/default/5.sram_ctrl_alert_test.2389713839
/workspace/coverage/default/5.sram_ctrl_bijection.1572866989
/workspace/coverage/default/5.sram_ctrl_executable.2670942455
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1693781982
/workspace/coverage/default/5.sram_ctrl_max_throughput.3355881007
/workspace/coverage/default/5.sram_ctrl_mem_walk.1915709421
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3600117754
/workspace/coverage/default/5.sram_ctrl_partial_access.1527210600
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.516553017
/workspace/coverage/default/5.sram_ctrl_ram_cfg.221953679
/workspace/coverage/default/5.sram_ctrl_regwen.4285277058
/workspace/coverage/default/5.sram_ctrl_smoke.846380352
/workspace/coverage/default/5.sram_ctrl_stress_all.1024450621
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3681816862
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3614427567
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2084697855
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.1661814163
/workspace/coverage/default/6.sram_ctrl_alert_test.2362360171
/workspace/coverage/default/6.sram_ctrl_bijection.2606224294
/workspace/coverage/default/6.sram_ctrl_executable.2821189973
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2467975482
/workspace/coverage/default/6.sram_ctrl_max_throughput.79155200
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.2009524686
/workspace/coverage/default/6.sram_ctrl_mem_walk.1130067252
/workspace/coverage/default/6.sram_ctrl_multiple_keys.3520015235
/workspace/coverage/default/6.sram_ctrl_partial_access.1660696045
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3778996697
/workspace/coverage/default/6.sram_ctrl_ram_cfg.349784346
/workspace/coverage/default/6.sram_ctrl_regwen.1970493294
/workspace/coverage/default/6.sram_ctrl_smoke.2707949369
/workspace/coverage/default/6.sram_ctrl_stress_all.4092945399
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.343906537
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.1161703839
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4213418130
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1469858714
/workspace/coverage/default/7.sram_ctrl_alert_test.2658173959
/workspace/coverage/default/7.sram_ctrl_bijection.347338939
/workspace/coverage/default/7.sram_ctrl_executable.2538606099
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1941783357
/workspace/coverage/default/7.sram_ctrl_max_throughput.1087436078
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1840548572
/workspace/coverage/default/7.sram_ctrl_mem_walk.3757327031
/workspace/coverage/default/7.sram_ctrl_multiple_keys.811837749
/workspace/coverage/default/7.sram_ctrl_partial_access.2471576767
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2635801772
/workspace/coverage/default/7.sram_ctrl_ram_cfg.1142136774
/workspace/coverage/default/7.sram_ctrl_regwen.821506984
/workspace/coverage/default/7.sram_ctrl_smoke.21106285
/workspace/coverage/default/7.sram_ctrl_stress_all.2314743153
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.518395533
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.4082512394
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1617243152
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.431806371
/workspace/coverage/default/8.sram_ctrl_alert_test.3243851386
/workspace/coverage/default/8.sram_ctrl_bijection.2662947959
/workspace/coverage/default/8.sram_ctrl_executable.1596553276
/workspace/coverage/default/8.sram_ctrl_lc_escalation.4128381847
/workspace/coverage/default/8.sram_ctrl_max_throughput.355696323
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2227414970
/workspace/coverage/default/8.sram_ctrl_mem_walk.451360085
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3229642375
/workspace/coverage/default/8.sram_ctrl_partial_access.3516118647
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.544968229
/workspace/coverage/default/8.sram_ctrl_ram_cfg.4137667
/workspace/coverage/default/8.sram_ctrl_regwen.4211874824
/workspace/coverage/default/8.sram_ctrl_smoke.2461895817
/workspace/coverage/default/8.sram_ctrl_stress_all.2513467020
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1586757298
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2042274254
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1893941366
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.3888452341
/workspace/coverage/default/9.sram_ctrl_alert_test.667660192
/workspace/coverage/default/9.sram_ctrl_bijection.3317107120
/workspace/coverage/default/9.sram_ctrl_executable.3509074378
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2416040174
/workspace/coverage/default/9.sram_ctrl_max_throughput.1949656057
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.671922183
/workspace/coverage/default/9.sram_ctrl_mem_walk.3020414229
/workspace/coverage/default/9.sram_ctrl_multiple_keys.25505210
/workspace/coverage/default/9.sram_ctrl_partial_access.3922158000
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3305916331
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2696381187
/workspace/coverage/default/9.sram_ctrl_regwen.3216236213
/workspace/coverage/default/9.sram_ctrl_smoke.3381243873
/workspace/coverage/default/9.sram_ctrl_stress_all.103062001
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.4197017967
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1024058533
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3208674450



Total test records in report: 1021
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/0.sram_ctrl_lc_escalation.1541857794 Aug 07 06:03:26 PM PDT 24 Aug 07 06:03:29 PM PDT 24 331033091 ps
T2 /workspace/coverage/default/13.sram_ctrl_lc_escalation.1777118302 Aug 07 06:04:32 PM PDT 24 Aug 07 06:04:39 PM PDT 24 2999355816 ps
T3 /workspace/coverage/default/41.sram_ctrl_stress_all.3645080869 Aug 07 06:08:43 PM PDT 24 Aug 07 06:21:02 PM PDT 24 10628835617 ps
T4 /workspace/coverage/default/10.sram_ctrl_smoke.3365683100 Aug 07 06:04:15 PM PDT 24 Aug 07 06:04:26 PM PDT 24 186315164 ps
T5 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.1496243426 Aug 07 06:07:13 PM PDT 24 Aug 07 06:07:54 PM PDT 24 107617004 ps
T6 /workspace/coverage/default/40.sram_ctrl_alert_test.688510532 Aug 07 06:08:18 PM PDT 24 Aug 07 06:08:19 PM PDT 24 59339060 ps
T7 /workspace/coverage/default/27.sram_ctrl_stress_all.1868594314 Aug 07 06:06:11 PM PDT 24 Aug 07 08:09:47 PM PDT 24 16554894667 ps
T8 /workspace/coverage/default/39.sram_ctrl_partial_access.3300224463 Aug 07 06:08:01 PM PDT 24 Aug 07 06:08:21 PM PDT 24 9712596281 ps
T9 /workspace/coverage/default/28.sram_ctrl_ram_cfg.3691266887 Aug 07 06:06:17 PM PDT 24 Aug 07 06:06:18 PM PDT 24 30907859 ps
T10 /workspace/coverage/default/14.sram_ctrl_stress_pipeline.2610094743 Aug 07 06:04:45 PM PDT 24 Aug 07 06:07:53 PM PDT 24 7550260735 ps
T36 /workspace/coverage/default/36.sram_ctrl_mem_walk.336802811 Aug 07 06:07:40 PM PDT 24 Aug 07 06:07:44 PM PDT 24 147573642 ps
T23 /workspace/coverage/default/46.sram_ctrl_ram_cfg.515683571 Aug 07 06:09:33 PM PDT 24 Aug 07 06:09:33 PM PDT 24 68157452 ps
T37 /workspace/coverage/default/45.sram_ctrl_smoke.2374221221 Aug 07 06:09:03 PM PDT 24 Aug 07 06:09:14 PM PDT 24 1252477491 ps
T39 /workspace/coverage/default/29.sram_ctrl_smoke.1579073659 Aug 07 06:06:14 PM PDT 24 Aug 07 06:06:23 PM PDT 24 137825726 ps
T109 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.4075998054 Aug 07 06:08:53 PM PDT 24 Aug 07 06:09:38 PM PDT 24 445437081 ps
T110 /workspace/coverage/default/44.sram_ctrl_stress_pipeline.1687647771 Aug 07 06:08:54 PM PDT 24 Aug 07 06:13:45 PM PDT 24 6145498299 ps
T38 /workspace/coverage/default/49.sram_ctrl_multiple_keys.2725504456 Aug 07 06:09:57 PM PDT 24 Aug 07 06:32:44 PM PDT 24 78220718835 ps
T40 /workspace/coverage/default/11.sram_ctrl_access_during_key_req.2070320644 Aug 07 06:04:25 PM PDT 24 Aug 07 06:28:37 PM PDT 24 13506496042 ps
T76 /workspace/coverage/default/31.sram_ctrl_max_throughput.3186741219 Aug 07 06:06:36 PM PDT 24 Aug 07 06:06:38 PM PDT 24 38428801 ps
T79 /workspace/coverage/default/47.sram_ctrl_lc_escalation.132424866 Aug 07 06:09:39 PM PDT 24 Aug 07 06:09:45 PM PDT 24 1837827688 ps
T41 /workspace/coverage/default/28.sram_ctrl_access_during_key_req.1695847252 Aug 07 06:06:10 PM PDT 24 Aug 07 06:15:04 PM PDT 24 25068564152 ps
T43 /workspace/coverage/default/49.sram_ctrl_mem_walk.761395986 Aug 07 06:10:10 PM PDT 24 Aug 07 06:10:22 PM PDT 24 2591641368 ps
T22 /workspace/coverage/default/15.sram_ctrl_regwen.2582314729 Aug 07 06:04:45 PM PDT 24 Aug 07 06:20:39 PM PDT 24 10211850298 ps
T16 /workspace/coverage/default/45.sram_ctrl_stress_all.668109485 Aug 07 06:09:25 PM PDT 24 Aug 07 06:38:54 PM PDT 24 54148467241 ps
T42 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.516044128 Aug 07 06:03:46 PM PDT 24 Aug 07 06:21:15 PM PDT 24 15829215495 ps
T54 /workspace/coverage/default/31.sram_ctrl_partial_access.1754835438 Aug 07 06:06:36 PM PDT 24 Aug 07 06:08:38 PM PDT 24 7244814976 ps
T55 /workspace/coverage/default/42.sram_ctrl_executable.2008591783 Aug 07 06:08:40 PM PDT 24 Aug 07 06:21:26 PM PDT 24 15133660371 ps
T56 /workspace/coverage/default/5.sram_ctrl_multiple_keys.3600117754 Aug 07 06:03:45 PM PDT 24 Aug 07 06:32:30 PM PDT 24 18006133462 ps
T57 /workspace/coverage/default/44.sram_ctrl_executable.1511521488 Aug 07 06:09:00 PM PDT 24 Aug 07 06:27:20 PM PDT 24 12572132417 ps
T58 /workspace/coverage/default/29.sram_ctrl_max_throughput.2411528934 Aug 07 06:06:25 PM PDT 24 Aug 07 06:06:34 PM PDT 24 62875583 ps
T44 /workspace/coverage/default/47.sram_ctrl_mem_walk.705004224 Aug 07 06:09:39 PM PDT 24 Aug 07 06:09:45 PM PDT 24 598521947 ps
T11 /workspace/coverage/default/31.sram_ctrl_alert_test.1393333408 Aug 07 06:06:45 PM PDT 24 Aug 07 06:06:46 PM PDT 24 157656433 ps
T161 /workspace/coverage/default/6.sram_ctrl_multiple_keys.3520015235 Aug 07 06:03:47 PM PDT 24 Aug 07 06:20:48 PM PDT 24 44405305061 ps
T19 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.493808304 Aug 07 06:03:24 PM PDT 24 Aug 07 06:03:44 PM PDT 24 2299565024 ps
T84 /workspace/coverage/default/37.sram_ctrl_mem_partial_access.1503770140 Aug 07 06:07:52 PM PDT 24 Aug 07 06:07:57 PM PDT 24 173959176 ps
T47 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.641996203 Aug 07 06:03:46 PM PDT 24 Aug 07 06:03:52 PM PDT 24 181505260 ps
T64 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1024058533 Aug 07 06:04:16 PM PDT 24 Aug 07 06:07:16 PM PDT 24 1995748695 ps
T65 /workspace/coverage/default/41.sram_ctrl_max_throughput.146150722 Aug 07 06:08:27 PM PDT 24 Aug 07 06:08:59 PM PDT 24 341437963 ps
T66 /workspace/coverage/default/6.sram_ctrl_smoke.2707949369 Aug 07 06:03:51 PM PDT 24 Aug 07 06:03:53 PM PDT 24 141501887 ps
T67 /workspace/coverage/default/13.sram_ctrl_bijection.3399612579 Aug 07 06:04:34 PM PDT 24 Aug 07 06:05:30 PM PDT 24 868502987 ps
T68 /workspace/coverage/default/48.sram_ctrl_multiple_keys.2878257501 Aug 07 06:09:49 PM PDT 24 Aug 07 06:13:09 PM PDT 24 3145419235 ps
T69 /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3931059121 Aug 07 06:09:12 PM PDT 24 Aug 07 06:15:00 PM PDT 24 30162252414 ps
T70 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.102051152 Aug 07 06:03:24 PM PDT 24 Aug 07 06:03:29 PM PDT 24 629674859 ps
T71 /workspace/coverage/default/37.sram_ctrl_stress_all.364899248 Aug 07 06:07:51 PM PDT 24 Aug 07 08:31:53 PM PDT 24 102464215601 ps
T72 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.1893941366 Aug 07 06:04:03 PM PDT 24 Aug 07 06:05:01 PM PDT 24 113694747 ps
T162 /workspace/coverage/default/0.sram_ctrl_smoke.1136265117 Aug 07 06:03:16 PM PDT 24 Aug 07 06:04:51 PM PDT 24 5324565413 ps
T80 /workspace/coverage/default/5.sram_ctrl_stress_all.1024450621 Aug 07 06:03:51 PM PDT 24 Aug 07 07:12:24 PM PDT 24 39421891128 ps
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T174 /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.911689359 Aug 07 06:07:33 PM PDT 24 Aug 07 06:09:38 PM PDT 24 157467082 ps
T99 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.1551042637 Aug 07 06:05:52 PM PDT 24 Aug 07 06:26:38 PM PDT 24 3193551505 ps
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T49 /workspace/coverage/default/23.sram_ctrl_mem_walk.1511456302 Aug 07 06:05:39 PM PDT 24 Aug 07 06:05:46 PM PDT 24 658581870 ps
T175 /workspace/coverage/default/14.sram_ctrl_partial_access.3557205741 Aug 07 06:04:41 PM PDT 24 Aug 07 06:04:57 PM PDT 24 328770150 ps
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T160 /workspace/coverage/default/19.sram_ctrl_bijection.219215044 Aug 07 06:05:05 PM PDT 24 Aug 07 06:05:37 PM PDT 24 5866557628 ps
T21 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2353025956 Aug 07 06:04:54 PM PDT 24 Aug 07 06:06:12 PM PDT 24 337989668 ps
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T52 /workspace/coverage/default/29.sram_ctrl_mem_walk.3013113433 Aug 07 06:06:24 PM PDT 24 Aug 07 06:06:37 PM PDT 24 9378672494 ps
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T155 /workspace/coverage/default/24.sram_ctrl_lc_escalation.1983080315 Aug 07 06:05:44 PM PDT 24 Aug 07 06:05:52 PM PDT 24 2511254890 ps
T180 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.979719798 Aug 07 06:09:13 PM PDT 24 Aug 07 06:11:54 PM PDT 24 781210966 ps
T181 /workspace/coverage/default/12.sram_ctrl_max_throughput.3728194153 Aug 07 06:04:33 PM PDT 24 Aug 07 06:04:50 PM PDT 24 121028763 ps
T53 /workspace/coverage/default/22.sram_ctrl_mem_walk.3114595210 Aug 07 06:05:34 PM PDT 24 Aug 07 06:05:39 PM PDT 24 97651590 ps
T182 /workspace/coverage/default/37.sram_ctrl_alert_test.1141683991 Aug 07 06:07:53 PM PDT 24 Aug 07 06:07:53 PM PDT 24 16111748 ps
T183 /workspace/coverage/default/45.sram_ctrl_mem_walk.2772232963 Aug 07 06:09:24 PM PDT 24 Aug 07 06:09:30 PM PDT 24 96867356 ps
T184 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.1661814163 Aug 07 06:03:50 PM PDT 24 Aug 07 06:15:53 PM PDT 24 11754961175 ps
T185 /workspace/coverage/default/1.sram_ctrl_smoke.301524956 Aug 07 06:03:25 PM PDT 24 Aug 07 06:04:29 PM PDT 24 538577884 ps
T150 /workspace/coverage/default/13.sram_ctrl_regwen.1591896112 Aug 07 06:04:40 PM PDT 24 Aug 07 06:20:55 PM PDT 24 13790045742 ps
T186 /workspace/coverage/default/41.sram_ctrl_alert_test.936795471 Aug 07 06:08:37 PM PDT 24 Aug 07 06:08:38 PM PDT 24 11358979 ps
T116 /workspace/coverage/default/21.sram_ctrl_stress_pipeline.3604179644 Aug 07 06:05:22 PM PDT 24 Aug 07 06:09:34 PM PDT 24 2482971352 ps
T187 /workspace/coverage/default/9.sram_ctrl_alert_test.667660192 Aug 07 06:04:15 PM PDT 24 Aug 07 06:04:16 PM PDT 24 12214066 ps
T188 /workspace/coverage/default/20.sram_ctrl_partial_access.883520131 Aug 07 06:05:18 PM PDT 24 Aug 07 06:05:29 PM PDT 24 428459517 ps
T189 /workspace/coverage/default/18.sram_ctrl_alert_test.4236603991 Aug 07 06:05:11 PM PDT 24 Aug 07 06:05:11 PM PDT 24 27459812 ps
T190 /workspace/coverage/default/22.sram_ctrl_ram_cfg.2269962433 Aug 07 06:05:37 PM PDT 24 Aug 07 06:05:38 PM PDT 24 45020863 ps
T191 /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.1846181159 Aug 07 06:04:56 PM PDT 24 Aug 07 06:04:57 PM PDT 24 198700341 ps
T117 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.675242049 Aug 07 06:05:00 PM PDT 24 Aug 07 06:11:41 PM PDT 24 71458234151 ps
T192 /workspace/coverage/default/14.sram_ctrl_bijection.3600505786 Aug 07 06:04:44 PM PDT 24 Aug 07 06:05:45 PM PDT 24 10403799558 ps
T193 /workspace/coverage/default/7.sram_ctrl_mem_walk.3757327031 Aug 07 06:03:55 PM PDT 24 Aug 07 06:04:01 PM PDT 24 224860886 ps
T194 /workspace/coverage/default/16.sram_ctrl_max_throughput.1214049369 Aug 07 06:04:54 PM PDT 24 Aug 07 06:05:05 PM PDT 24 531164999 ps
T118 /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.2308830579 Aug 07 06:05:17 PM PDT 24 Aug 07 06:10:14 PM PDT 24 25286157049 ps
T195 /workspace/coverage/default/40.sram_ctrl_bijection.1616321412 Aug 07 06:08:07 PM PDT 24 Aug 07 06:09:06 PM PDT 24 2808616781 ps
T196 /workspace/coverage/default/48.sram_ctrl_regwen.3683505080 Aug 07 06:09:57 PM PDT 24 Aug 07 06:29:16 PM PDT 24 11556613993 ps
T197 /workspace/coverage/default/7.sram_ctrl_stress_all.2314743153 Aug 07 06:03:56 PM PDT 24 Aug 07 07:00:20 PM PDT 24 28930581371 ps
T198 /workspace/coverage/default/26.sram_ctrl_ram_cfg.3691188696 Aug 07 06:05:56 PM PDT 24 Aug 07 06:05:56 PM PDT 24 42970778 ps
T199 /workspace/coverage/default/25.sram_ctrl_alert_test.841026708 Aug 07 06:06:00 PM PDT 24 Aug 07 06:06:00 PM PDT 24 30243810 ps
T200 /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3305916331 Aug 07 06:04:03 PM PDT 24 Aug 07 06:08:49 PM PDT 24 10768287746 ps
T201 /workspace/coverage/default/27.sram_ctrl_mem_walk.3805204127 Aug 07 06:06:05 PM PDT 24 Aug 07 06:06:14 PM PDT 24 595247342 ps
T202 /workspace/coverage/default/3.sram_ctrl_max_throughput.175104281 Aug 07 06:03:33 PM PDT 24 Aug 07 06:03:51 PM PDT 24 307230003 ps
T203 /workspace/coverage/default/26.sram_ctrl_lc_escalation.2374316403 Aug 07 06:06:00 PM PDT 24 Aug 07 06:06:03 PM PDT 24 172013778 ps
T204 /workspace/coverage/default/6.sram_ctrl_executable.2821189973 Aug 07 06:03:53 PM PDT 24 Aug 07 06:30:30 PM PDT 24 3511827770 ps
T205 /workspace/coverage/default/14.sram_ctrl_executable.3295008921 Aug 07 06:04:47 PM PDT 24 Aug 07 06:18:02 PM PDT 24 37861245999 ps
T206 /workspace/coverage/default/5.sram_ctrl_max_throughput.3355881007 Aug 07 06:03:48 PM PDT 24 Aug 07 06:04:15 PM PDT 24 354089856 ps
T207 /workspace/coverage/default/0.sram_ctrl_max_throughput.1901148660 Aug 07 06:03:28 PM PDT 24 Aug 07 06:03:31 PM PDT 24 164845799 ps
T208 /workspace/coverage/default/27.sram_ctrl_max_throughput.1394391135 Aug 07 06:06:02 PM PDT 24 Aug 07 06:06:43 PM PDT 24 941526614 ps
T48 /workspace/coverage/default/3.sram_ctrl_mem_partial_access.1739709806 Aug 07 06:03:52 PM PDT 24 Aug 07 06:03:55 PM PDT 24 656031136 ps
T209 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1393238576 Aug 07 06:07:02 PM PDT 24 Aug 07 06:07:04 PM PDT 24 163204484 ps
T210 /workspace/coverage/default/34.sram_ctrl_mem_walk.4262704130 Aug 07 06:07:20 PM PDT 24 Aug 07 06:07:30 PM PDT 24 174921892 ps
T211 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.3541024151 Aug 07 06:07:57 PM PDT 24 Aug 07 06:08:02 PM PDT 24 760136836 ps
T45 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.4151930885 Aug 07 06:06:03 PM PDT 24 Aug 07 06:06:47 PM PDT 24 6265435874 ps
T127 /workspace/coverage/default/24.sram_ctrl_smoke.13530358 Aug 07 06:05:41 PM PDT 24 Aug 07 06:05:42 PM PDT 24 60390812 ps
T128 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.1931954974 Aug 07 06:07:15 PM PDT 24 Aug 07 06:17:03 PM PDT 24 304236530009 ps
T129 /workspace/coverage/default/29.sram_ctrl_lc_escalation.1294848901 Aug 07 06:06:22 PM PDT 24 Aug 07 06:06:28 PM PDT 24 554374525 ps
T130 /workspace/coverage/default/0.sram_ctrl_partial_access.451737500 Aug 07 06:03:22 PM PDT 24 Aug 07 06:04:33 PM PDT 24 1015026371 ps
T131 /workspace/coverage/default/27.sram_ctrl_alert_test.1898137179 Aug 07 06:06:12 PM PDT 24 Aug 07 06:06:13 PM PDT 24 14646512 ps
T132 /workspace/coverage/default/41.sram_ctrl_multiple_keys.2932595684 Aug 07 06:08:27 PM PDT 24 Aug 07 06:12:40 PM PDT 24 7200180935 ps
T133 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.2748520798 Aug 07 06:08:12 PM PDT 24 Aug 07 06:09:00 PM PDT 24 800489171 ps
T134 /workspace/coverage/default/11.sram_ctrl_stress_all.3892782739 Aug 07 06:04:38 PM PDT 24 Aug 07 06:28:56 PM PDT 24 22694822458 ps
T135 /workspace/coverage/default/9.sram_ctrl_executable.3509074378 Aug 07 06:04:08 PM PDT 24 Aug 07 06:24:48 PM PDT 24 3247967015 ps
T212 /workspace/coverage/default/20.sram_ctrl_max_throughput.3938610785 Aug 07 06:05:18 PM PDT 24 Aug 07 06:06:00 PM PDT 24 1275172821 ps
T213 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.2855409156 Aug 07 06:07:48 PM PDT 24 Aug 07 06:14:08 PM PDT 24 57024808809 ps
T214 /workspace/coverage/default/30.sram_ctrl_stress_pipeline.1676003824 Aug 07 06:06:25 PM PDT 24 Aug 07 06:12:20 PM PDT 24 37931527072 ps
T215 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.151841997 Aug 07 06:08:46 PM PDT 24 Aug 07 06:27:33 PM PDT 24 12986968557 ps
T151 /workspace/coverage/default/38.sram_ctrl_executable.1537268516 Aug 07 06:07:59 PM PDT 24 Aug 07 06:29:56 PM PDT 24 14053797364 ps
T216 /workspace/coverage/default/20.sram_ctrl_stress_all.620733828 Aug 07 06:05:19 PM PDT 24 Aug 07 07:17:45 PM PDT 24 205662364799 ps
T50 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.1462065895 Aug 07 06:04:43 PM PDT 24 Aug 07 06:04:59 PM PDT 24 1077133265 ps
T217 /workspace/coverage/default/44.sram_ctrl_smoke.4214643411 Aug 07 06:08:54 PM PDT 24 Aug 07 06:08:57 PM PDT 24 225917939 ps
T218 /workspace/coverage/default/26.sram_ctrl_multiple_keys.213829492 Aug 07 06:05:58 PM PDT 24 Aug 07 06:19:39 PM PDT 24 55045901048 ps
T219 /workspace/coverage/default/17.sram_ctrl_ram_cfg.3179367735 Aug 07 06:04:54 PM PDT 24 Aug 07 06:04:55 PM PDT 24 190378541 ps
T59 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.671922183 Aug 07 06:04:13 PM PDT 24 Aug 07 06:04:17 PM PDT 24 2074282675 ps
T220 /workspace/coverage/default/37.sram_ctrl_mem_walk.1399421609 Aug 07 06:07:53 PM PDT 24 Aug 07 06:08:05 PM PDT 24 667366202 ps
T221 /workspace/coverage/default/37.sram_ctrl_lc_escalation.3661869706 Aug 07 06:07:45 PM PDT 24 Aug 07 06:07:51 PM PDT 24 2843832979 ps
T222 /workspace/coverage/default/30.sram_ctrl_alert_test.616276866 Aug 07 06:06:38 PM PDT 24 Aug 07 06:06:38 PM PDT 24 14361002 ps
T223 /workspace/coverage/default/35.sram_ctrl_executable.4290210438 Aug 07 06:07:29 PM PDT 24 Aug 07 06:19:24 PM PDT 24 10556932997 ps
T224 /workspace/coverage/default/45.sram_ctrl_alert_test.2759630789 Aug 07 06:09:20 PM PDT 24 Aug 07 06:09:21 PM PDT 24 15269245 ps
T225 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.4096829920 Aug 07 06:05:32 PM PDT 24 Aug 07 06:05:57 PM PDT 24 173489169 ps
T226 /workspace/coverage/default/39.sram_ctrl_smoke.1469388688 Aug 07 06:08:04 PM PDT 24 Aug 07 06:08:17 PM PDT 24 6699916398 ps
T227 /workspace/coverage/default/39.sram_ctrl_stress_pipeline.136791554 Aug 07 06:08:02 PM PDT 24 Aug 07 06:14:33 PM PDT 24 22542872550 ps
T228 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.2418052868 Aug 07 06:03:28 PM PDT 24 Aug 07 06:06:27 PM PDT 24 1754659105 ps
T229 /workspace/coverage/default/11.sram_ctrl_alert_test.1590583716 Aug 07 06:04:25 PM PDT 24 Aug 07 06:04:26 PM PDT 24 40969493 ps
T230 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.3226827531 Aug 07 06:08:44 PM PDT 24 Aug 07 06:17:23 PM PDT 24 30832886941 ps
T231 /workspace/coverage/default/16.sram_ctrl_ram_cfg.3991480616 Aug 07 06:04:53 PM PDT 24 Aug 07 06:04:54 PM PDT 24 44148199 ps
T232 /workspace/coverage/default/2.sram_ctrl_lc_escalation.131225387 Aug 07 06:03:29 PM PDT 24 Aug 07 06:03:39 PM PDT 24 1383904132 ps
T233 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.719353240 Aug 07 06:05:32 PM PDT 24 Aug 07 06:11:25 PM PDT 24 12524158849 ps
T234 /workspace/coverage/default/20.sram_ctrl_smoke.3119712005 Aug 07 06:05:10 PM PDT 24 Aug 07 06:05:23 PM PDT 24 4297412263 ps
T235 /workspace/coverage/default/15.sram_ctrl_stress_pipeline.3370622494 Aug 07 06:04:48 PM PDT 24 Aug 07 06:09:43 PM PDT 24 3070631547 ps
T236 /workspace/coverage/default/21.sram_ctrl_lc_escalation.3035935876 Aug 07 06:05:26 PM PDT 24 Aug 07 06:05:33 PM PDT 24 1698603736 ps
T237 /workspace/coverage/default/1.sram_ctrl_multiple_keys.3808847238 Aug 07 06:03:26 PM PDT 24 Aug 07 06:14:36 PM PDT 24 30391552965 ps
T238 /workspace/coverage/default/12.sram_ctrl_mem_walk.2145801226 Aug 07 06:04:29 PM PDT 24 Aug 07 06:04:37 PM PDT 24 266381395 ps
T239 /workspace/coverage/default/49.sram_ctrl_smoke.1421937095 Aug 07 06:09:56 PM PDT 24 Aug 07 06:09:59 PM PDT 24 262421974 ps
T240 /workspace/coverage/default/14.sram_ctrl_mem_walk.124896246 Aug 07 06:04:47 PM PDT 24 Aug 07 06:04:56 PM PDT 24 270518507 ps
T241 /workspace/coverage/default/36.sram_ctrl_max_throughput.1332832376 Aug 07 06:07:33 PM PDT 24 Aug 07 06:09:54 PM PDT 24 321510981 ps
T242 /workspace/coverage/default/49.sram_ctrl_max_throughput.2894650350 Aug 07 06:10:08 PM PDT 24 Aug 07 06:11:35 PM PDT 24 606699167 ps
T243 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.840405514 Aug 07 06:03:35 PM PDT 24 Aug 07 06:03:38 PM PDT 24 107635738 ps
T244 /workspace/coverage/default/14.sram_ctrl_max_throughput.1514559813 Aug 07 06:04:43 PM PDT 24 Aug 07 06:05:43 PM PDT 24 120629177 ps
T245 /workspace/coverage/default/6.sram_ctrl_alert_test.2362360171 Aug 07 06:03:53 PM PDT 24 Aug 07 06:03:54 PM PDT 24 12944549 ps
T246 /workspace/coverage/default/25.sram_ctrl_partial_access.282435919 Aug 07 06:05:50 PM PDT 24 Aug 07 06:06:22 PM PDT 24 642720622 ps
T247 /workspace/coverage/default/35.sram_ctrl_max_throughput.1323085580 Aug 07 06:07:26 PM PDT 24 Aug 07 06:08:29 PM PDT 24 107679193 ps
T248 /workspace/coverage/default/44.sram_ctrl_lc_escalation.1781266245 Aug 07 06:08:59 PM PDT 24 Aug 07 06:09:00 PM PDT 24 144291759 ps
T249 /workspace/coverage/default/24.sram_ctrl_partial_access.2728063183 Aug 07 06:05:38 PM PDT 24 Aug 07 06:06:16 PM PDT 24 135129439 ps
T250 /workspace/coverage/default/25.sram_ctrl_multiple_keys.1395202944 Aug 07 06:05:46 PM PDT 24 Aug 07 06:28:33 PM PDT 24 91578293078 ps
T60 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.1754043679 Aug 07 06:08:01 PM PDT 24 Aug 07 06:16:26 PM PDT 24 6209456907 ps
T251 /workspace/coverage/default/17.sram_ctrl_smoke.2984538740 Aug 07 06:04:58 PM PDT 24 Aug 07 06:05:05 PM PDT 24 54644788 ps
T252 /workspace/coverage/default/46.sram_ctrl_mem_walk.1373199858 Aug 07 06:09:30 PM PDT 24 Aug 07 06:09:41 PM PDT 24 2765655333 ps
T253 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3042994377 Aug 07 06:06:28 PM PDT 24 Aug 07 06:10:50 PM PDT 24 10702789594 ps
T254 /workspace/coverage/default/5.sram_ctrl_partial_access.1527210600 Aug 07 06:03:48 PM PDT 24 Aug 07 06:03:49 PM PDT 24 31315052 ps
T255 /workspace/coverage/default/4.sram_ctrl_mem_walk.334281336 Aug 07 06:03:46 PM PDT 24 Aug 07 06:03:52 PM PDT 24 372560220 ps
T256 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.3209967438 Aug 07 06:05:38 PM PDT 24 Aug 07 06:10:59 PM PDT 24 13411160754 ps
T257 /workspace/coverage/default/16.sram_ctrl_regwen.1189320680 Aug 07 06:04:51 PM PDT 24 Aug 07 06:27:12 PM PDT 24 64831665853 ps
T258 /workspace/coverage/default/31.sram_ctrl_ram_cfg.3467104355 Aug 07 06:06:42 PM PDT 24 Aug 07 06:06:43 PM PDT 24 27114828 ps
T259 /workspace/coverage/default/9.sram_ctrl_lc_escalation.2416040174 Aug 07 06:04:06 PM PDT 24 Aug 07 06:04:08 PM PDT 24 249565375 ps
T260 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.2412300228 Aug 07 06:06:40 PM PDT 24 Aug 07 06:10:30 PM PDT 24 1116007621 ps
T261 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3799242063 Aug 07 06:06:31 PM PDT 24 Aug 07 06:06:37 PM PDT 24 544648745 ps
T262 /workspace/coverage/default/0.sram_ctrl_multiple_keys.2151745430 Aug 07 06:03:24 PM PDT 24 Aug 07 06:08:07 PM PDT 24 26606184613 ps
T263 /workspace/coverage/default/18.sram_ctrl_regwen.957850301 Aug 07 06:05:07 PM PDT 24 Aug 07 06:26:25 PM PDT 24 31487838500 ps
T264 /workspace/coverage/default/32.sram_ctrl_mem_walk.2622564650 Aug 07 06:06:55 PM PDT 24 Aug 07 06:07:05 PM PDT 24 180268129 ps
T265 /workspace/coverage/default/2.sram_ctrl_mem_walk.389573079 Aug 07 06:03:41 PM PDT 24 Aug 07 06:03:45 PM PDT 24 319661524 ps
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T267 /workspace/coverage/default/22.sram_ctrl_access_during_key_req.41976277 Aug 07 06:05:34 PM PDT 24 Aug 07 06:26:14 PM PDT 24 6364044890 ps
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