Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1024
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
70.91 70.91 92.20 92.20 67.42 67.42 84.60 84.60 33.33 33.33 81.40 81.40 93.51 93.51 43.88 43.88 /workspace/coverage/default/8.sram_ctrl_stress_all.1487372010
92.16 21.26 98.47 6.27 85.19 17.77 92.86 8.25 100.00 66.67 92.75 11.35 95.43 1.92 80.44 36.56 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1241810348
93.91 1.75 98.73 0.25 87.68 2.49 96.12 3.26 100.00 0.00 94.44 1.69 95.43 0.00 85.01 4.57 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2907982943
94.89 0.97 98.90 0.17 88.27 0.59 96.32 0.21 100.00 0.00 95.17 0.72 95.43 0.00 90.13 5.12 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.1659374760
95.59 0.71 99.07 0.17 90.05 1.78 97.09 0.76 100.00 0.00 95.89 0.72 96.02 0.59 91.04 0.91 /workspace/coverage/default/1.sram_ctrl_sec_cm.1288790658
96.27 0.68 99.07 0.00 90.17 0.12 98.75 1.66 100.00 0.00 96.14 0.24 96.02 0.00 93.78 2.74 /workspace/coverage/default/20.sram_ctrl_stress_all.1980050012
96.56 0.29 99.07 0.00 90.40 0.24 98.82 0.07 100.00 0.00 96.14 0.00 97.35 1.33 94.15 0.37 /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.132815618
96.84 0.28 99.07 0.00 90.40 0.00 98.82 0.00 100.00 0.00 96.14 0.00 97.49 0.15 95.98 1.83 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.4100401376
96.97 0.13 99.15 0.08 90.40 0.00 99.65 0.83 100.00 0.00 96.14 0.00 97.49 0.00 95.98 0.00 /workspace/coverage/default/11.sram_ctrl_ram_cfg.2668256558
97.10 0.13 99.15 0.00 90.40 0.00 99.65 0.00 100.00 0.00 96.14 0.00 98.38 0.88 95.98 0.00 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1350592860
97.21 0.11 99.15 0.00 90.40 0.00 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.74 95.98 0.00 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2626792327
97.29 0.09 99.15 0.00 90.64 0.24 99.65 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.37 /workspace/coverage/default/6.sram_ctrl_stress_all.2585326558
97.35 0.06 99.15 0.00 91.00 0.36 99.72 0.07 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.00 /workspace/coverage/default/14.sram_ctrl_alert_test.3679543780
97.40 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.71 0.37 /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.739360780
97.43 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.18 /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.986727436
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2581907453
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.558202739
97.51 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/default/2.sram_ctrl_stress_all.1516196605

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3074983407
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.3233683818
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1447519654
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.53792592
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.749228236
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.2387735394
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.4191444296
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.874438608
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1593228623
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2891269777
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.2353027982
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.254125408
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.1983703623
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2863058977
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1305450235
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1643586270
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.493010146
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2698608118
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1419501529
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.133514260
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.4265477624
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3602431159
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.2011116039
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.3119443815
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.611669374
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1238769179
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.3848570019
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.474646429
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.530338727
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3875168233
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2710647336
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.792752266
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1029398727
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.691438311
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.2273104696
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2044738231
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.918522310
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3693086175
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1337786102
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.1869453049
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.2093442908
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3478533112
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.3472464970
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.1335754969
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1420544707
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1669385205
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.3465191192
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2624424206
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3984459182
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1559593415
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3547665178
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.3096117076
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.2615544476
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.2511775776
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2781898738
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2905230784
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2525739779
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2949234466
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1290875418
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.2152225479
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2599723019
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.3092098324
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.1872681262
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3453330933
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.4217762300
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.3353477357
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.906272512
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.1900592326
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.2820597106
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.233137388
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.1452675011
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3848394242
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3643223088
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.606006631
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.285783000
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.156667772
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.2187418346
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2641220580
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1336308886
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1612183071
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.3249743884
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1945231920
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.4171199127
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1895904692
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.2599372660
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.798350545
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.1740401464
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.3316001132
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.12701610
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.1080832488
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.3961456580
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.1516908464
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1145913763
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1205813249
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3529941675
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.2687846179
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3905692153
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2346168315
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.500258530
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.3145411111
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2918025126
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.891403046
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1436625813
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1725575990
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.1942820013
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.482676149
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.2421600076
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.4007714753
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.1723979692
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.678803827
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1167366262
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.752820659
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.3111394166
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.776785708
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.2071150443
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.1740253267
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2765185857
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3815317806
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.260562934
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.698454842
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.1116537393
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3456200967
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3564111373
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1131824504
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1416844639
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.903393630
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.1760502976
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.2844310767
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.3731731507
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1173035260
/workspace/coverage/default/0.sram_ctrl_alert_test.2662869502
/workspace/coverage/default/0.sram_ctrl_bijection.2057699945
/workspace/coverage/default/0.sram_ctrl_lc_escalation.1719837233
/workspace/coverage/default/0.sram_ctrl_max_throughput.3747226577
/workspace/coverage/default/0.sram_ctrl_mem_walk.1871504475
/workspace/coverage/default/0.sram_ctrl_partial_access.1290923432
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3408963047
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1260404683
/workspace/coverage/default/0.sram_ctrl_regwen.2548815201
/workspace/coverage/default/0.sram_ctrl_sec_cm.1304669553
/workspace/coverage/default/0.sram_ctrl_smoke.898616522
/workspace/coverage/default/0.sram_ctrl_stress_all.1679863113
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.4196283587
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.640787693
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.2249677895
/workspace/coverage/default/1.sram_ctrl_alert_test.2041614648
/workspace/coverage/default/1.sram_ctrl_bijection.218435282
/workspace/coverage/default/1.sram_ctrl_executable.206908425
/workspace/coverage/default/1.sram_ctrl_lc_escalation.781105607
/workspace/coverage/default/1.sram_ctrl_max_throughput.307257651
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.2797309967
/workspace/coverage/default/1.sram_ctrl_mem_walk.3080952880
/workspace/coverage/default/1.sram_ctrl_multiple_keys.500740334
/workspace/coverage/default/1.sram_ctrl_partial_access.214391616
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3077994618
/workspace/coverage/default/1.sram_ctrl_ram_cfg.1635751914
/workspace/coverage/default/1.sram_ctrl_regwen.3597542478
/workspace/coverage/default/1.sram_ctrl_smoke.3735091308
/workspace/coverage/default/1.sram_ctrl_stress_all.3819920983
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2775869925
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.228978434
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.787982119
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.1082386120
/workspace/coverage/default/10.sram_ctrl_alert_test.1028194041
/workspace/coverage/default/10.sram_ctrl_bijection.3370133552
/workspace/coverage/default/10.sram_ctrl_executable.185715083
/workspace/coverage/default/10.sram_ctrl_lc_escalation.3198640123
/workspace/coverage/default/10.sram_ctrl_max_throughput.4055906213
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.4247322236
/workspace/coverage/default/10.sram_ctrl_mem_walk.1810008987
/workspace/coverage/default/10.sram_ctrl_multiple_keys.1799950861
/workspace/coverage/default/10.sram_ctrl_partial_access.670334150
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3757233088
/workspace/coverage/default/10.sram_ctrl_ram_cfg.514542821
/workspace/coverage/default/10.sram_ctrl_regwen.1828569580
/workspace/coverage/default/10.sram_ctrl_smoke.2396770877
/workspace/coverage/default/10.sram_ctrl_stress_all.1902898069
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.243240381
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1201844018
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2066025495
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2126713003
/workspace/coverage/default/11.sram_ctrl_alert_test.2159496094
/workspace/coverage/default/11.sram_ctrl_bijection.235745682
/workspace/coverage/default/11.sram_ctrl_executable.2386824991
/workspace/coverage/default/11.sram_ctrl_lc_escalation.2133417484
/workspace/coverage/default/11.sram_ctrl_max_throughput.2592636449
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2535809535
/workspace/coverage/default/11.sram_ctrl_mem_walk.2216765499
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3029641819
/workspace/coverage/default/11.sram_ctrl_partial_access.598833179
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1281568801
/workspace/coverage/default/11.sram_ctrl_regwen.1886642197
/workspace/coverage/default/11.sram_ctrl_smoke.2143304541
/workspace/coverage/default/11.sram_ctrl_stress_all.2033352915
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.65411553
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.1624506598
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.3739130358
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.1485551887
/workspace/coverage/default/12.sram_ctrl_alert_test.2792801169
/workspace/coverage/default/12.sram_ctrl_bijection.1157322812
/workspace/coverage/default/12.sram_ctrl_executable.1135091800
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3784064536
/workspace/coverage/default/12.sram_ctrl_max_throughput.2708611288
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.391440079
/workspace/coverage/default/12.sram_ctrl_mem_walk.2279003338
/workspace/coverage/default/12.sram_ctrl_multiple_keys.4088626781
/workspace/coverage/default/12.sram_ctrl_partial_access.659950196
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.2660343717
/workspace/coverage/default/12.sram_ctrl_ram_cfg.1112286173
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/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3435756637
/workspace/coverage/default/43.sram_ctrl_ram_cfg.1111209001
/workspace/coverage/default/43.sram_ctrl_regwen.2509322566
/workspace/coverage/default/43.sram_ctrl_smoke.296561075
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.2242672451
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.1552515717
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1191826358
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.3117139709
/workspace/coverage/default/44.sram_ctrl_alert_test.3238753236
/workspace/coverage/default/44.sram_ctrl_bijection.2788327417
/workspace/coverage/default/44.sram_ctrl_executable.78815
/workspace/coverage/default/44.sram_ctrl_lc_escalation.2332816805
/workspace/coverage/default/44.sram_ctrl_max_throughput.193351268
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1500408054
/workspace/coverage/default/44.sram_ctrl_mem_walk.670696348
/workspace/coverage/default/44.sram_ctrl_multiple_keys.1260926792
/workspace/coverage/default/44.sram_ctrl_partial_access.1652086928
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.1943961274
/workspace/coverage/default/44.sram_ctrl_ram_cfg.973263074
/workspace/coverage/default/44.sram_ctrl_regwen.3043763797
/workspace/coverage/default/44.sram_ctrl_smoke.499966926
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.3337537454
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3827731339
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3791507552
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.4247874300
/workspace/coverage/default/45.sram_ctrl_alert_test.3993162282
/workspace/coverage/default/45.sram_ctrl_bijection.1011000343
/workspace/coverage/default/45.sram_ctrl_executable.3044276627
/workspace/coverage/default/45.sram_ctrl_lc_escalation.4211424680
/workspace/coverage/default/45.sram_ctrl_max_throughput.3650931710
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.2388944100
/workspace/coverage/default/45.sram_ctrl_mem_walk.585302292
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3002912439
/workspace/coverage/default/45.sram_ctrl_partial_access.3184691900
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.4148986681
/workspace/coverage/default/45.sram_ctrl_ram_cfg.3146314476
/workspace/coverage/default/45.sram_ctrl_regwen.3664601618
/workspace/coverage/default/45.sram_ctrl_smoke.1235490148
/workspace/coverage/default/45.sram_ctrl_stress_all.335216058
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.1580130852
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.4267159109
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2472079622
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.4285133130
/workspace/coverage/default/46.sram_ctrl_alert_test.1748172130
/workspace/coverage/default/46.sram_ctrl_bijection.1314079625
/workspace/coverage/default/46.sram_ctrl_executable.4069344965
/workspace/coverage/default/46.sram_ctrl_lc_escalation.3722535856
/workspace/coverage/default/46.sram_ctrl_max_throughput.780246744
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.2077343515
/workspace/coverage/default/46.sram_ctrl_mem_walk.2333078246
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2609667935
/workspace/coverage/default/46.sram_ctrl_partial_access.2393815820
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.2196577437
/workspace/coverage/default/46.sram_ctrl_ram_cfg.3388475987
/workspace/coverage/default/46.sram_ctrl_regwen.3025683017
/workspace/coverage/default/46.sram_ctrl_smoke.3379302032
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.984366819
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1727264455
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.587484109
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.2405071746
/workspace/coverage/default/47.sram_ctrl_alert_test.3428219840
/workspace/coverage/default/47.sram_ctrl_bijection.1840262787
/workspace/coverage/default/47.sram_ctrl_executable.660762517
/workspace/coverage/default/47.sram_ctrl_lc_escalation.1892377080
/workspace/coverage/default/47.sram_ctrl_max_throughput.4058560109
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1506574151
/workspace/coverage/default/47.sram_ctrl_mem_walk.887357144
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3791375485
/workspace/coverage/default/47.sram_ctrl_partial_access.2168472338
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3841050075
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2746947360
/workspace/coverage/default/47.sram_ctrl_regwen.266250688
/workspace/coverage/default/47.sram_ctrl_smoke.2018727720
/workspace/coverage/default/47.sram_ctrl_stress_all.544560516
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1145677639
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3548093754
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.702983349
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1890557840
/workspace/coverage/default/48.sram_ctrl_alert_test.1809531777
/workspace/coverage/default/48.sram_ctrl_bijection.685676165
/workspace/coverage/default/48.sram_ctrl_executable.1863643503
/workspace/coverage/default/48.sram_ctrl_lc_escalation.1436435691
/workspace/coverage/default/48.sram_ctrl_max_throughput.1128587575
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.989188462
/workspace/coverage/default/48.sram_ctrl_mem_walk.548517459
/workspace/coverage/default/48.sram_ctrl_multiple_keys.3597207614
/workspace/coverage/default/48.sram_ctrl_partial_access.408368189
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.781007675
/workspace/coverage/default/48.sram_ctrl_ram_cfg.2119066207
/workspace/coverage/default/48.sram_ctrl_regwen.1893778739
/workspace/coverage/default/48.sram_ctrl_smoke.1309014976
/workspace/coverage/default/48.sram_ctrl_stress_all.2353176166
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.476466216
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.3035046984
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3099562495
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.3988421946
/workspace/coverage/default/49.sram_ctrl_alert_test.3126865552
/workspace/coverage/default/49.sram_ctrl_bijection.332109306
/workspace/coverage/default/49.sram_ctrl_executable.2875765293
/workspace/coverage/default/49.sram_ctrl_lc_escalation.2857487072
/workspace/coverage/default/49.sram_ctrl_max_throughput.3484875335
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2152497157
/workspace/coverage/default/49.sram_ctrl_mem_walk.3753445400
/workspace/coverage/default/49.sram_ctrl_multiple_keys.597615298
/workspace/coverage/default/49.sram_ctrl_partial_access.4294607276
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.485281737
/workspace/coverage/default/49.sram_ctrl_ram_cfg.4279287677
/workspace/coverage/default/49.sram_ctrl_regwen.64316202
/workspace/coverage/default/49.sram_ctrl_smoke.1825423111
/workspace/coverage/default/49.sram_ctrl_stress_all.2067589499
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3211851274
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2083445272
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.3094403614
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.2064039755
/workspace/coverage/default/5.sram_ctrl_alert_test.2362570496
/workspace/coverage/default/5.sram_ctrl_bijection.436781584
/workspace/coverage/default/5.sram_ctrl_executable.3494982213
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3798978551
/workspace/coverage/default/5.sram_ctrl_max_throughput.3021552378
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3354527842
/workspace/coverage/default/5.sram_ctrl_mem_walk.1714716192
/workspace/coverage/default/5.sram_ctrl_multiple_keys.4265875058
/workspace/coverage/default/5.sram_ctrl_partial_access.3546931565
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.538459621
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3169214539
/workspace/coverage/default/5.sram_ctrl_regwen.2002310459
/workspace/coverage/default/5.sram_ctrl_smoke.1224941280
/workspace/coverage/default/5.sram_ctrl_stress_all.2568114971
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.1382409923
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.683306514
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.2894922829
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.3616581922
/workspace/coverage/default/6.sram_ctrl_alert_test.65885537
/workspace/coverage/default/6.sram_ctrl_bijection.3216985352
/workspace/coverage/default/6.sram_ctrl_executable.4141162808
/workspace/coverage/default/6.sram_ctrl_lc_escalation.1121091236
/workspace/coverage/default/6.sram_ctrl_max_throughput.521759390
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.1050710569
/workspace/coverage/default/6.sram_ctrl_mem_walk.3733200125
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2557100980
/workspace/coverage/default/6.sram_ctrl_partial_access.724581633
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3611995264
/workspace/coverage/default/6.sram_ctrl_ram_cfg.3108431846
/workspace/coverage/default/6.sram_ctrl_regwen.3400804899
/workspace/coverage/default/6.sram_ctrl_smoke.54158534
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.217168860
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4293449187
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.214457627
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.527496812
/workspace/coverage/default/7.sram_ctrl_alert_test.3845527892
/workspace/coverage/default/7.sram_ctrl_bijection.4097131969
/workspace/coverage/default/7.sram_ctrl_executable.645279889
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1937995935
/workspace/coverage/default/7.sram_ctrl_max_throughput.3008811188
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.3769727602
/workspace/coverage/default/7.sram_ctrl_mem_walk.3419262955
/workspace/coverage/default/7.sram_ctrl_multiple_keys.780185151
/workspace/coverage/default/7.sram_ctrl_partial_access.338200218
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.1242679357
/workspace/coverage/default/7.sram_ctrl_ram_cfg.2164335413
/workspace/coverage/default/7.sram_ctrl_regwen.2253479989
/workspace/coverage/default/7.sram_ctrl_smoke.2021259789
/workspace/coverage/default/7.sram_ctrl_stress_all.1257794778
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.351911692
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.460067794
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.4015984460
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3145968052
/workspace/coverage/default/8.sram_ctrl_alert_test.2166461066
/workspace/coverage/default/8.sram_ctrl_bijection.4239847022
/workspace/coverage/default/8.sram_ctrl_executable.2254225470
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2025771139
/workspace/coverage/default/8.sram_ctrl_max_throughput.3511635869
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2442887391
/workspace/coverage/default/8.sram_ctrl_mem_walk.1288125106
/workspace/coverage/default/8.sram_ctrl_multiple_keys.4229095655
/workspace/coverage/default/8.sram_ctrl_partial_access.3307141763
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2164951529
/workspace/coverage/default/8.sram_ctrl_ram_cfg.2206039599
/workspace/coverage/default/8.sram_ctrl_regwen.3782919420
/workspace/coverage/default/8.sram_ctrl_smoke.3115885337
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2999233845
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2903426221
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.2280200461
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1845671052
/workspace/coverage/default/9.sram_ctrl_alert_test.2854991621
/workspace/coverage/default/9.sram_ctrl_bijection.1618301477
/workspace/coverage/default/9.sram_ctrl_executable.2953565584
/workspace/coverage/default/9.sram_ctrl_lc_escalation.2697285948
/workspace/coverage/default/9.sram_ctrl_max_throughput.2526916098
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.2335176463
/workspace/coverage/default/9.sram_ctrl_mem_walk.3685448576
/workspace/coverage/default/9.sram_ctrl_multiple_keys.2309516892
/workspace/coverage/default/9.sram_ctrl_partial_access.796448049
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.904667733
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2991408482
/workspace/coverage/default/9.sram_ctrl_regwen.3626984864
/workspace/coverage/default/9.sram_ctrl_smoke.1527772584
/workspace/coverage/default/9.sram_ctrl_stress_all.3468668397
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.751096818
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.1646200130
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.1489672575



Total test records in report: 1024
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/32.sram_ctrl_ram_cfg.162428224 Aug 10 04:46:20 PM PDT 24 Aug 10 04:46:21 PM PDT 24 73658277 ps
T2 /workspace/coverage/default/34.sram_ctrl_stress_pipeline.3446541575 Aug 10 04:46:39 PM PDT 24 Aug 10 04:49:56 PM PDT 24 4063516319 ps
T3 /workspace/coverage/default/4.sram_ctrl_max_throughput.114170277 Aug 10 04:43:12 PM PDT 24 Aug 10 04:43:13 PM PDT 24 136378606 ps
T4 /workspace/coverage/default/8.sram_ctrl_stress_all.1487372010 Aug 10 04:43:19 PM PDT 24 Aug 10 05:12:25 PM PDT 24 19955614489 ps
T5 /workspace/coverage/default/20.sram_ctrl_lc_escalation.2196383279 Aug 10 04:44:28 PM PDT 24 Aug 10 04:44:31 PM PDT 24 176455888 ps
T8 /workspace/coverage/default/2.sram_ctrl_mem_partial_access.466918110 Aug 10 04:43:11 PM PDT 24 Aug 10 04:43:14 PM PDT 24 181281909 ps
T6 /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.3795019207 Aug 10 04:45:00 PM PDT 24 Aug 10 04:50:50 PM PDT 24 4831175247 ps
T9 /workspace/coverage/default/39.sram_ctrl_max_throughput.212513250 Aug 10 04:47:46 PM PDT 24 Aug 10 04:49:00 PM PDT 24 1136113659 ps
T7 /workspace/coverage/default/44.sram_ctrl_lc_escalation.2332816805 Aug 10 04:48:58 PM PDT 24 Aug 10 04:49:06 PM PDT 24 2705036647 ps
T10 /workspace/coverage/default/12.sram_ctrl_mem_partial_access.391440079 Aug 10 04:43:34 PM PDT 24 Aug 10 04:43:39 PM PDT 24 174063459 ps
T40 /workspace/coverage/default/45.sram_ctrl_partial_access.3184691900 Aug 10 04:49:09 PM PDT 24 Aug 10 04:51:02 PM PDT 24 281566652 ps
T21 /workspace/coverage/default/48.sram_ctrl_ram_cfg.2119066207 Aug 10 04:50:06 PM PDT 24 Aug 10 04:50:07 PM PDT 24 79573611 ps
T25 /workspace/coverage/default/48.sram_ctrl_executable.1863643503 Aug 10 04:49:58 PM PDT 24 Aug 10 05:12:07 PM PDT 24 15833490981 ps
T41 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.3176632621 Aug 10 04:43:33 PM PDT 24 Aug 10 04:43:48 PM PDT 24 81183174 ps
T22 /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.4100401376 Aug 10 04:48:28 PM PDT 24 Aug 10 04:53:45 PM PDT 24 136263412593 ps
T28 /workspace/coverage/default/14.sram_ctrl_ram_cfg.3028765131 Aug 10 04:43:50 PM PDT 24 Aug 10 04:43:51 PM PDT 24 163784390 ps
T11 /workspace/coverage/default/20.sram_ctrl_alert_test.2454167891 Aug 10 04:44:40 PM PDT 24 Aug 10 04:44:40 PM PDT 24 32404347 ps
T23 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.1241810348 Aug 10 04:46:56 PM PDT 24 Aug 10 04:49:30 PM PDT 24 4623082757 ps
T53 /workspace/coverage/default/39.sram_ctrl_lc_escalation.2487292897 Aug 10 04:47:47 PM PDT 24 Aug 10 04:47:54 PM PDT 24 653358713 ps
T54 /workspace/coverage/default/25.sram_ctrl_lc_escalation.3194611211 Aug 10 04:45:09 PM PDT 24 Aug 10 04:45:10 PM PDT 24 94134425 ps
T55 /workspace/coverage/default/15.sram_ctrl_lc_escalation.57691711 Aug 10 04:43:51 PM PDT 24 Aug 10 04:43:53 PM PDT 24 65744934 ps
T44 /workspace/coverage/default/11.sram_ctrl_mem_walk.2216765499 Aug 10 04:43:26 PM PDT 24 Aug 10 04:43:37 PM PDT 24 185013325 ps
T56 /workspace/coverage/default/49.sram_ctrl_mem_walk.3753445400 Aug 10 04:50:11 PM PDT 24 Aug 10 04:50:16 PM PDT 24 278780178 ps
T57 /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.2472079622 Aug 10 04:49:17 PM PDT 24 Aug 10 04:49:18 PM PDT 24 41724091 ps
T58 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.3740067374 Aug 10 04:44:45 PM PDT 24 Aug 10 04:49:27 PM PDT 24 2865834444 ps
T26 /workspace/coverage/default/47.sram_ctrl_executable.660762517 Aug 10 04:49:45 PM PDT 24 Aug 10 05:05:48 PM PDT 24 5997790751 ps
T59 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.228978434 Aug 10 04:42:48 PM PDT 24 Aug 10 04:46:18 PM PDT 24 4074649088 ps
T134 /workspace/coverage/default/2.sram_ctrl_mem_walk.3715090947 Aug 10 04:43:09 PM PDT 24 Aug 10 04:43:19 PM PDT 24 561535955 ps
T69 /workspace/coverage/default/8.sram_ctrl_lc_escalation.2025771139 Aug 10 04:43:18 PM PDT 24 Aug 10 04:43:26 PM PDT 24 2573952356 ps
T98 /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.413043166 Aug 10 04:47:21 PM PDT 24 Aug 10 04:50:34 PM PDT 24 10571274958 ps
T42 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.1612706022 Aug 10 04:44:27 PM PDT 24 Aug 10 05:06:46 PM PDT 24 2644598046 ps
T27 /workspace/coverage/default/29.sram_ctrl_executable.3378631447 Aug 10 04:45:49 PM PDT 24 Aug 10 05:04:06 PM PDT 24 14025012239 ps
T133 /workspace/coverage/default/13.sram_ctrl_bijection.475910364 Aug 10 04:43:34 PM PDT 24 Aug 10 04:44:04 PM PDT 24 406526554 ps
T12 /workspace/coverage/default/44.sram_ctrl_alert_test.3238753236 Aug 10 04:49:02 PM PDT 24 Aug 10 04:49:03 PM PDT 24 21806190 ps
T70 /workspace/coverage/default/38.sram_ctrl_lc_escalation.3517721100 Aug 10 04:47:37 PM PDT 24 Aug 10 04:47:42 PM PDT 24 909051570 ps
T135 /workspace/coverage/default/19.sram_ctrl_smoke.1299319337 Aug 10 04:44:18 PM PDT 24 Aug 10 04:46:32 PM PDT 24 560702016 ps
T20 /workspace/coverage/default/20.sram_ctrl_stress_all.1980050012 Aug 10 04:44:28 PM PDT 24 Aug 10 05:39:13 PM PDT 24 80006121233 ps
T24 /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.1145677639 Aug 10 04:49:48 PM PDT 24 Aug 10 04:52:07 PM PDT 24 5593685738 ps
T109 /workspace/coverage/default/29.sram_ctrl_stress_all.432180988 Aug 10 04:45:48 PM PDT 24 Aug 10 05:01:40 PM PDT 24 47406307844 ps
T110 /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.132256209 Aug 10 04:44:52 PM PDT 24 Aug 10 04:45:32 PM PDT 24 509996137 ps
T72 /workspace/coverage/default/48.sram_ctrl_lc_escalation.1436435691 Aug 10 04:49:56 PM PDT 24 Aug 10 04:49:59 PM PDT 24 449049934 ps
T99 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.324145184 Aug 10 04:43:53 PM PDT 24 Aug 10 04:48:52 PM PDT 24 8895007234 ps
T17 /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.2907982943 Aug 10 04:44:01 PM PDT 24 Aug 10 04:47:11 PM PDT 24 3874722545 ps
T87 /workspace/coverage/default/42.sram_ctrl_mem_partial_access.901102937 Aug 10 04:48:36 PM PDT 24 Aug 10 04:48:41 PM PDT 24 69580636 ps
T13 /workspace/coverage/default/46.sram_ctrl_alert_test.1748172130 Aug 10 04:49:31 PM PDT 24 Aug 10 04:49:31 PM PDT 24 39136118 ps
T111 /workspace/coverage/default/14.sram_ctrl_alert_test.3679543780 Aug 10 04:43:52 PM PDT 24 Aug 10 04:43:53 PM PDT 24 64322289 ps
T43 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.2249677895 Aug 10 04:42:47 PM PDT 24 Aug 10 04:56:52 PM PDT 24 2418710176 ps
T136 /workspace/coverage/default/35.sram_ctrl_smoke.4145000065 Aug 10 04:46:48 PM PDT 24 Aug 10 04:47:02 PM PDT 24 903156287 ps
T100 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.1702981026 Aug 10 04:44:29 PM PDT 24 Aug 10 04:49:05 PM PDT 24 2724927601 ps
T137 /workspace/coverage/default/30.sram_ctrl_lc_escalation.3577822266 Aug 10 04:45:56 PM PDT 24 Aug 10 04:46:01 PM PDT 24 1644080220 ps
T47 /workspace/coverage/default/25.sram_ctrl_mem_walk.3948168778 Aug 10 04:45:22 PM PDT 24 Aug 10 04:45:28 PM PDT 24 287986950 ps
T125 /workspace/coverage/default/5.sram_ctrl_stress_all.2568114971 Aug 10 04:43:13 PM PDT 24 Aug 10 05:39:32 PM PDT 24 250600427096 ps
T48 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.3769727602 Aug 10 04:43:24 PM PDT 24 Aug 10 04:43:27 PM PDT 24 103749329 ps
T88 /workspace/coverage/default/10.sram_ctrl_mem_partial_access.4247322236 Aug 10 04:43:28 PM PDT 24 Aug 10 04:43:33 PM PDT 24 67048689 ps
T138 /workspace/coverage/default/32.sram_ctrl_multiple_keys.4070038018 Aug 10 04:46:21 PM PDT 24 Aug 10 04:47:32 PM PDT 24 1606932227 ps
T139 /workspace/coverage/default/38.sram_ctrl_mem_walk.4029725968 Aug 10 04:47:47 PM PDT 24 Aug 10 04:47:55 PM PDT 24 137201190 ps
T89 /workspace/coverage/default/0.sram_ctrl_mem_partial_access.1350592860 Aug 10 04:42:49 PM PDT 24 Aug 10 04:42:52 PM PDT 24 168821332 ps
T140 /workspace/coverage/default/22.sram_ctrl_bijection.2622375615 Aug 10 04:44:44 PM PDT 24 Aug 10 04:45:04 PM PDT 24 557057402 ps
T49 /workspace/coverage/default/40.sram_ctrl_mem_walk.1051916545 Aug 10 04:48:09 PM PDT 24 Aug 10 04:48:20 PM PDT 24 453048956 ps
T141 /workspace/coverage/default/42.sram_ctrl_ram_cfg.3472784340 Aug 10 04:48:35 PM PDT 24 Aug 10 04:48:36 PM PDT 24 41134969 ps
T112 /workspace/coverage/default/12.sram_ctrl_lc_escalation.3784064536 Aug 10 04:43:28 PM PDT 24 Aug 10 04:43:33 PM PDT 24 703799703 ps
T142 /workspace/coverage/default/17.sram_ctrl_lc_escalation.2716102509 Aug 10 04:44:11 PM PDT 24 Aug 10 04:44:16 PM PDT 24 373953959 ps
T143 /workspace/coverage/default/16.sram_ctrl_multiple_keys.2216158878 Aug 10 04:44:02 PM PDT 24 Aug 10 04:59:03 PM PDT 24 11571554560 ps
T144 /workspace/coverage/default/33.sram_ctrl_max_throughput.2271710885 Aug 10 04:46:30 PM PDT 24 Aug 10 04:48:04 PM PDT 24 126010007 ps
T18 /workspace/coverage/default/34.sram_ctrl_regwen.3873624747 Aug 10 04:46:48 PM PDT 24 Aug 10 04:53:05 PM PDT 24 14219717926 ps
T19 /workspace/coverage/default/6.sram_ctrl_stress_all.2585326558 Aug 10 04:43:18 PM PDT 24 Aug 10 05:42:09 PM PDT 24 148920381091 ps
T145 /workspace/coverage/default/14.sram_ctrl_max_throughput.242957534 Aug 10 04:43:43 PM PDT 24 Aug 10 04:45:16 PM PDT 24 565776231 ps
T90 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.2797309967 Aug 10 04:42:48 PM PDT 24 Aug 10 04:42:52 PM PDT 24 973493493 ps
T146 /workspace/coverage/default/17.sram_ctrl_bijection.3089210872 Aug 10 04:44:10 PM PDT 24 Aug 10 04:45:00 PM PDT 24 3172466692 ps
T127 /workspace/coverage/default/34.sram_ctrl_executable.1020321347 Aug 10 04:46:48 PM PDT 24 Aug 10 05:08:10 PM PDT 24 17345939854 ps
T50 /workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.977584509 Aug 10 04:47:46 PM PDT 24 Aug 10 04:50:38 PM PDT 24 1204233281 ps
T147 /workspace/coverage/default/30.sram_ctrl_bijection.1823049317 Aug 10 04:46:01 PM PDT 24 Aug 10 04:47:18 PM PDT 24 9934187967 ps
T148 /workspace/coverage/default/48.sram_ctrl_partial_access.408368189 Aug 10 04:49:56 PM PDT 24 Aug 10 04:50:18 PM PDT 24 4782795372 ps
T51 /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.2133113567 Aug 10 04:45:43 PM PDT 24 Aug 10 05:01:52 PM PDT 24 5233469572 ps
T149 /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.1650521909 Aug 10 04:46:28 PM PDT 24 Aug 10 04:46:36 PM PDT 24 62594661 ps
T132 /workspace/coverage/default/21.sram_ctrl_regwen.1878632168 Aug 10 04:44:37 PM PDT 24 Aug 10 05:04:38 PM PDT 24 38907869462 ps
T150 /workspace/coverage/default/17.sram_ctrl_max_throughput.3260739481 Aug 10 04:44:09 PM PDT 24 Aug 10 04:44:16 PM PDT 24 203698177 ps
T151 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3791507552 Aug 10 04:48:55 PM PDT 24 Aug 10 04:48:56 PM PDT 24 69065016 ps
T152 /workspace/coverage/default/26.sram_ctrl_bijection.3394579444 Aug 10 04:45:17 PM PDT 24 Aug 10 04:46:45 PM PDT 24 10789030955 ps
T52 /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.2626792327 Aug 10 04:44:01 PM PDT 24 Aug 10 04:45:42 PM PDT 24 7837374388 ps
T14 /workspace/coverage/default/1.sram_ctrl_sec_cm.1288790658 Aug 10 04:42:58 PM PDT 24 Aug 10 04:43:00 PM PDT 24 212210864 ps
T31 /workspace/coverage/default/24.sram_ctrl_partial_access.3269554255 Aug 10 04:45:00 PM PDT 24 Aug 10 04:47:20 PM PDT 24 2523655335 ps
T32 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.1396964061 Aug 10 04:47:37 PM PDT 24 Aug 10 04:49:01 PM PDT 24 544801044 ps
T33 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.1432914485 Aug 10 04:44:34 PM PDT 24 Aug 10 04:51:23 PM PDT 24 22248212242 ps
T34 /workspace/coverage/default/38.sram_ctrl_max_throughput.205403914 Aug 10 04:47:37 PM PDT 24 Aug 10 04:47:48 PM PDT 24 63127600 ps
T35 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.483546902 Aug 10 04:43:14 PM PDT 24 Aug 10 04:48:39 PM PDT 24 16064151419 ps
T36 /workspace/coverage/default/46.sram_ctrl_multiple_keys.2609667935 Aug 10 04:49:24 PM PDT 24 Aug 10 04:54:34 PM PDT 24 2379497999 ps
T37 /workspace/coverage/default/49.sram_ctrl_max_throughput.3484875335 Aug 10 04:50:12 PM PDT 24 Aug 10 04:52:00 PM PDT 24 491407332 ps
T38 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.3324147498 Aug 10 04:43:12 PM PDT 24 Aug 10 04:49:34 PM PDT 24 3061462854 ps
T39 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2177875169 Aug 10 04:47:11 PM PDT 24 Aug 10 04:47:14 PM PDT 24 808534105 ps
T153 /workspace/coverage/default/18.sram_ctrl_smoke.3722649485 Aug 10 04:44:11 PM PDT 24 Aug 10 04:44:15 PM PDT 24 228209053 ps
T15 /workspace/coverage/default/3.sram_ctrl_sec_cm.3290923704 Aug 10 04:43:10 PM PDT 24 Aug 10 04:43:12 PM PDT 24 236119439 ps
T154 /workspace/coverage/default/15.sram_ctrl_bijection.1005234545 Aug 10 04:43:50 PM PDT 24 Aug 10 04:44:27 PM PDT 24 1708251925 ps
T155 /workspace/coverage/default/12.sram_ctrl_ram_cfg.1112286173 Aug 10 04:43:37 PM PDT 24 Aug 10 04:43:38 PM PDT 24 98003223 ps
T156 /workspace/coverage/default/3.sram_ctrl_max_throughput.3957638391 Aug 10 04:43:08 PM PDT 24 Aug 10 04:44:17 PM PDT 24 776650244 ps
T157 /workspace/coverage/default/2.sram_ctrl_lc_escalation.553489744 Aug 10 04:43:00 PM PDT 24 Aug 10 04:43:03 PM PDT 24 233752705 ps
T158 /workspace/coverage/default/16.sram_ctrl_max_throughput.2625952212 Aug 10 04:44:00 PM PDT 24 Aug 10 04:44:36 PM PDT 24 98115389 ps
T159 /workspace/coverage/default/37.sram_ctrl_smoke.850342177 Aug 10 04:47:12 PM PDT 24 Aug 10 04:47:40 PM PDT 24 120161221 ps
T160 /workspace/coverage/default/37.sram_ctrl_partial_access.1889085572 Aug 10 04:47:21 PM PDT 24 Aug 10 04:47:41 PM PDT 24 2265782865 ps
T161 /workspace/coverage/default/41.sram_ctrl_access_during_key_req.4055284783 Aug 10 04:48:14 PM PDT 24 Aug 10 04:57:14 PM PDT 24 3949593953 ps
T162 /workspace/coverage/default/13.sram_ctrl_executable.4034424995 Aug 10 04:43:45 PM PDT 24 Aug 10 05:00:55 PM PDT 24 15774003011 ps
T163 /workspace/coverage/default/7.sram_ctrl_regwen.2253479989 Aug 10 04:43:22 PM PDT 24 Aug 10 04:57:16 PM PDT 24 15755877591 ps
T164 /workspace/coverage/default/17.sram_ctrl_regwen.1039443576 Aug 10 04:44:17 PM PDT 24 Aug 10 04:58:33 PM PDT 24 10769534335 ps
T165 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.702983349 Aug 10 04:49:45 PM PDT 24 Aug 10 04:52:04 PM PDT 24 177588562 ps
T166 /workspace/coverage/default/2.sram_ctrl_alert_test.3563639687 Aug 10 04:43:10 PM PDT 24 Aug 10 04:43:11 PM PDT 24 21891278 ps
T60 /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.3598164663 Aug 10 04:45:00 PM PDT 24 Aug 10 04:53:55 PM PDT 24 3091882554 ps
T61 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.2542331755 Aug 10 04:46:28 PM PDT 24 Aug 10 04:46:33 PM PDT 24 171201961 ps
T167 /workspace/coverage/default/1.sram_ctrl_smoke.3735091308 Aug 10 04:42:48 PM PDT 24 Aug 10 04:43:01 PM PDT 24 535592740 ps
T168 /workspace/coverage/default/49.sram_ctrl_smoke.1825423111 Aug 10 04:50:05 PM PDT 24 Aug 10 04:50:08 PM PDT 24 307176717 ps
T169 /workspace/coverage/default/26.sram_ctrl_smoke.3216205575 Aug 10 04:45:18 PM PDT 24 Aug 10 04:47:05 PM PDT 24 125875246 ps
T170 /workspace/coverage/default/19.sram_ctrl_mem_walk.145398894 Aug 10 04:44:19 PM PDT 24 Aug 10 04:44:24 PM PDT 24 370725842 ps
T171 /workspace/coverage/default/19.sram_ctrl_alert_test.3793525450 Aug 10 04:44:19 PM PDT 24 Aug 10 04:44:20 PM PDT 24 36927936 ps
T172 /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.825786889 Aug 10 04:44:02 PM PDT 24 Aug 10 04:44:32 PM PDT 24 465337544 ps
T45 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.4235182812 Aug 10 04:47:33 PM PDT 24 Aug 10 04:47:41 PM PDT 24 491762876 ps
T173 /workspace/coverage/default/38.sram_ctrl_partial_access.2584914826 Aug 10 04:47:37 PM PDT 24 Aug 10 04:47:56 PM PDT 24 4578526070 ps
T126 /workspace/coverage/default/28.sram_ctrl_stress_all.1520862456 Aug 10 04:45:41 PM PDT 24 Aug 10 05:58:24 PM PDT 24 41064016118 ps
T174 /workspace/coverage/default/18.sram_ctrl_max_throughput.4124053280 Aug 10 04:44:10 PM PDT 24 Aug 10 04:44:12 PM PDT 24 72484870 ps
T175 /workspace/coverage/default/36.sram_ctrl_multiple_keys.2623911540 Aug 10 04:47:04 PM PDT 24 Aug 10 05:02:03 PM PDT 24 7238298011 ps
T176 /workspace/coverage/default/42.sram_ctrl_bijection.3908446173 Aug 10 04:48:22 PM PDT 24 Aug 10 04:49:20 PM PDT 24 2920870092 ps
T177 /workspace/coverage/default/24.sram_ctrl_bijection.1851913438 Aug 10 04:45:00 PM PDT 24 Aug 10 04:46:06 PM PDT 24 14230671887 ps
T178 /workspace/coverage/default/37.sram_ctrl_lc_escalation.3118505163 Aug 10 04:47:22 PM PDT 24 Aug 10 04:47:28 PM PDT 24 883614277 ps
T179 /workspace/coverage/default/49.sram_ctrl_lc_escalation.2857487072 Aug 10 04:50:13 PM PDT 24 Aug 10 04:50:20 PM PDT 24 797412240 ps
T180 /workspace/coverage/default/24.sram_ctrl_mem_partial_access.2898852759 Aug 10 04:45:02 PM PDT 24 Aug 10 04:45:06 PM PDT 24 334794558 ps
T181 /workspace/coverage/default/43.sram_ctrl_smoke.296561075 Aug 10 04:48:38 PM PDT 24 Aug 10 04:48:47 PM PDT 24 350659166 ps
T182 /workspace/coverage/default/47.sram_ctrl_regwen.266250688 Aug 10 04:49:51 PM PDT 24 Aug 10 04:55:18 PM PDT 24 4605929894 ps
T183 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2903426221 Aug 10 04:43:20 PM PDT 24 Aug 10 04:45:37 PM PDT 24 1493027473 ps
T184 /workspace/coverage/default/12.sram_ctrl_smoke.1205387097 Aug 10 04:43:32 PM PDT 24 Aug 10 04:46:08 PM PDT 24 181160435 ps
T185 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.814588791 Aug 10 04:47:45 PM PDT 24 Aug 10 04:48:06 PM PDT 24 88923974 ps
T186 /workspace/coverage/default/47.sram_ctrl_bijection.1840262787 Aug 10 04:49:44 PM PDT 24 Aug 10 04:50:24 PM PDT 24 1766096979 ps
T128 /workspace/coverage/default/11.sram_ctrl_mem_partial_access.2535809535 Aug 10 04:43:30 PM PDT 24 Aug 10 04:43:37 PM PDT 24 381417688 ps
T187 /workspace/coverage/default/30.sram_ctrl_partial_access.3963993902 Aug 10 04:45:56 PM PDT 24 Aug 10 04:46:17 PM PDT 24 1219354422 ps
T188 /workspace/coverage/default/36.sram_ctrl_bijection.1581310653 Aug 10 04:47:03 PM PDT 24 Aug 10 04:48:06 PM PDT 24 1040089042 ps
T189 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.1858613262 Aug 10 04:48:49 PM PDT 24 Aug 10 05:10:55 PM PDT 24 4826765838 ps
T190 /workspace/coverage/default/25.sram_ctrl_bijection.653867294 Aug 10 04:45:09 PM PDT 24 Aug 10 04:45:28 PM PDT 24 2259716155 ps
T191 /workspace/coverage/default/16.sram_ctrl_mem_walk.3043952571 Aug 10 04:44:02 PM PDT 24 Aug 10 04:44:07 PM PDT 24 978519978 ps
T192 /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.2347755203 Aug 10 04:44:37 PM PDT 24 Aug 10 04:44:40 PM PDT 24 46693489 ps
T193 /workspace/coverage/default/9.sram_ctrl_lc_escalation.2697285948 Aug 10 04:43:20 PM PDT 24 Aug 10 04:43:28 PM PDT 24 4575926850 ps
T194 /workspace/coverage/default/49.sram_ctrl_partial_access.4294607276 Aug 10 04:50:05 PM PDT 24 Aug 10 04:50:10 PM PDT 24 298001167 ps
T195 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.1646200130 Aug 10 04:43:27 PM PDT 24 Aug 10 04:47:13 PM PDT 24 5327616307 ps
T196 /workspace/coverage/default/2.sram_ctrl_bijection.2192351231 Aug 10 04:42:58 PM PDT 24 Aug 10 04:43:49 PM PDT 24 2004907902 ps
T197 /workspace/coverage/default/2.sram_ctrl_access_during_key_req.32686301 Aug 10 04:42:58 PM PDT 24 Aug 10 04:49:33 PM PDT 24 2212642187 ps
T198 /workspace/coverage/default/35.sram_ctrl_bijection.2197010721 Aug 10 04:46:54 PM PDT 24 Aug 10 04:47:35 PM PDT 24 706391640 ps
T62 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.342205327 Aug 10 04:46:53 PM PDT 24 Aug 10 04:49:30 PM PDT 24 6784995228 ps
T199 /workspace/coverage/default/22.sram_ctrl_alert_test.2265325118 Aug 10 04:44:51 PM PDT 24 Aug 10 04:44:52 PM PDT 24 15867710 ps
T200 /workspace/coverage/default/44.sram_ctrl_executable.78815 Aug 10 04:49:03 PM PDT 24 Aug 10 04:57:12 PM PDT 24 6841810531 ps
T201 /workspace/coverage/default/42.sram_ctrl_lc_escalation.1984615532 Aug 10 04:48:29 PM PDT 24 Aug 10 04:48:36 PM PDT 24 1143585587 ps
T202 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.2819841087 Aug 10 04:45:41 PM PDT 24 Aug 10 04:52:10 PM PDT 24 9809241013 ps
T129 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.1245172612 Aug 10 04:46:39 PM PDT 24 Aug 10 04:46:42 PM PDT 24 347633698 ps
T203 /workspace/coverage/default/47.sram_ctrl_ram_cfg.2746947360 Aug 10 04:49:48 PM PDT 24 Aug 10 04:49:49 PM PDT 24 77494375 ps
T71 /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.984366819 Aug 10 04:49:31 PM PDT 24 Aug 10 04:54:09 PM PDT 24 3479949895 ps
T204 /workspace/coverage/default/30.sram_ctrl_executable.1691606702 Aug 10 04:45:58 PM PDT 24 Aug 10 05:06:55 PM PDT 24 21021360521 ps
T205 /workspace/coverage/default/21.sram_ctrl_mem_walk.1331437641 Aug 10 04:44:35 PM PDT 24 Aug 10 04:44:46 PM PDT 24 1828062764 ps
T206 /workspace/coverage/default/34.sram_ctrl_mem_walk.444547656 Aug 10 04:46:49 PM PDT 24 Aug 10 04:46:55 PM PDT 24 888128442 ps
T207 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.4293449187 Aug 10 04:43:10 PM PDT 24 Aug 10 04:48:23 PM PDT 24 3386875264 ps
T208 /workspace/coverage/default/40.sram_ctrl_smoke.4150807506 Aug 10 04:47:52 PM PDT 24 Aug 10 04:48:07 PM PDT 24 252357566 ps
T209 /workspace/coverage/default/11.sram_ctrl_regwen.1886642197 Aug 10 04:43:29 PM PDT 24 Aug 10 04:44:38 PM PDT 24 1502333926 ps
T210 /workspace/coverage/default/38.sram_ctrl_alert_test.4119640689 Aug 10 04:47:45 PM PDT 24 Aug 10 04:47:46 PM PDT 24 12249264 ps
T211 /workspace/coverage/default/6.sram_ctrl_partial_access.724581633 Aug 10 04:43:12 PM PDT 24 Aug 10 04:45:37 PM PDT 24 193790677 ps
T212 /workspace/coverage/default/13.sram_ctrl_ram_cfg.4209516135 Aug 10 04:43:45 PM PDT 24 Aug 10 04:43:45 PM PDT 24 90721084 ps
T213 /workspace/coverage/default/14.sram_ctrl_regwen.693603321 Aug 10 04:43:53 PM PDT 24 Aug 10 05:05:41 PM PDT 24 21707834292 ps
T214 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.965254756 Aug 10 04:48:37 PM PDT 24 Aug 10 04:48:47 PM PDT 24 2498568170 ps
T215 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.1129203123 Aug 10 04:47:12 PM PDT 24 Aug 10 05:04:45 PM PDT 24 3632170864 ps
T216 /workspace/coverage/default/9.sram_ctrl_bijection.1618301477 Aug 10 04:43:19 PM PDT 24 Aug 10 04:44:15 PM PDT 24 3749490338 ps
T217 /workspace/coverage/default/35.sram_ctrl_max_throughput.1506681440 Aug 10 04:46:56 PM PDT 24 Aug 10 04:46:57 PM PDT 24 46657079 ps
T218 /workspace/coverage/default/46.sram_ctrl_bijection.1314079625 Aug 10 04:49:25 PM PDT 24 Aug 10 04:50:29 PM PDT 24 2769384751 ps
T219 /workspace/coverage/default/10.sram_ctrl_bijection.3370133552 Aug 10 04:43:19 PM PDT 24 Aug 10 04:44:20 PM PDT 24 2775216098 ps
T220 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.587484109 Aug 10 04:49:31 PM PDT 24 Aug 10 04:52:07 PM PDT 24 707480156 ps
T221 /workspace/coverage/default/5.sram_ctrl_bijection.436781584 Aug 10 04:43:11 PM PDT 24 Aug 10 04:44:05 PM PDT 24 2484385946 ps
T222 /workspace/coverage/default/32.sram_ctrl_regwen.2276209751 Aug 10 04:46:20 PM PDT 24 Aug 10 05:07:31 PM PDT 24 55089192319 ps
T223 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.1727264455 Aug 10 04:49:24 PM PDT 24 Aug 10 04:55:17 PM PDT 24 7159127057 ps
T224 /workspace/coverage/default/39.sram_ctrl_alert_test.4179449988 Aug 10 04:47:55 PM PDT 24 Aug 10 04:47:55 PM PDT 24 60827487 ps
T130 /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.3077994618 Aug 10 04:42:50 PM PDT 24 Aug 10 04:46:58 PM PDT 24 9099229579 ps
T225 /workspace/coverage/default/22.sram_ctrl_partial_access.704592418 Aug 10 04:44:44 PM PDT 24 Aug 10 04:44:47 PM PDT 24 442207949 ps
T226 /workspace/coverage/default/25.sram_ctrl_smoke.3646089829 Aug 10 04:45:09 PM PDT 24 Aug 10 04:45:21 PM PDT 24 197820078 ps
T227 /workspace/coverage/default/36.sram_ctrl_lc_escalation.1358344836 Aug 10 04:47:04 PM PDT 24 Aug 10 04:47:10 PM PDT 24 1762231278 ps
T228 /workspace/coverage/default/35.sram_ctrl_alert_test.1202428830 Aug 10 04:46:58 PM PDT 24 Aug 10 04:46:59 PM PDT 24 15900717 ps
T229 /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.3211851274 Aug 10 04:50:13 PM PDT 24 Aug 10 04:50:35 PM PDT 24 1168791661 ps
T230 /workspace/coverage/default/10.sram_ctrl_alert_test.1028194041 Aug 10 04:43:27 PM PDT 24 Aug 10 04:43:28 PM PDT 24 39559936 ps
T231 /workspace/coverage/default/2.sram_ctrl_stress_all.1516196605 Aug 10 04:43:12 PM PDT 24 Aug 10 06:01:04 PM PDT 24 12308440125 ps
T232 /workspace/coverage/default/35.sram_ctrl_mem_walk.961030480 Aug 10 04:46:55 PM PDT 24 Aug 10 04:47:02 PM PDT 24 1377874661 ps
T233 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1446186004 Aug 10 04:43:43 PM PDT 24 Aug 10 04:43:47 PM PDT 24 938371008 ps
T234 /workspace/coverage/default/9.sram_ctrl_stress_all.3468668397 Aug 10 04:43:21 PM PDT 24 Aug 10 05:30:51 PM PDT 24 191129835937 ps
T235 /workspace/coverage/default/0.sram_ctrl_mem_walk.1871504475 Aug 10 04:42:49 PM PDT 24 Aug 10 04:43:01 PM PDT 24 2340113740 ps
T236 /workspace/coverage/default/20.sram_ctrl_smoke.802114551 Aug 10 04:44:18 PM PDT 24 Aug 10 04:44:37 PM PDT 24 4184101318 ps
T237 /workspace/coverage/default/11.sram_ctrl_ram_cfg.2668256558 Aug 10 04:43:28 PM PDT 24 Aug 10 04:43:29 PM PDT 24 96792320 ps
T238 /workspace/coverage/default/6.sram_ctrl_access_during_key_req.3616581922 Aug 10 04:43:19 PM PDT 24 Aug 10 04:45:40 PM PDT 24 494344655 ps
T239 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3518258100 Aug 10 04:43:09 PM PDT 24 Aug 10 04:46:21 PM PDT 24 8421934403 ps
T240 /workspace/coverage/default/23.sram_ctrl_alert_test.3677259311 Aug 10 04:44:59 PM PDT 24 Aug 10 04:45:00 PM PDT 24 35232699 ps
T241 /workspace/coverage/default/23.sram_ctrl_mem_partial_access.3909143318 Aug 10 04:45:00 PM PDT 24 Aug 10 04:45:03 PM PDT 24 921180181 ps
T242 /workspace/coverage/default/34.sram_ctrl_ram_cfg.4248468774 Aug 10 04:46:48 PM PDT 24 Aug 10 04:46:48 PM PDT 24 126356923 ps
T243 /workspace/coverage/default/3.sram_ctrl_ram_cfg.992471118 Aug 10 04:43:11 PM PDT 24 Aug 10 04:43:12 PM PDT 24 43882742 ps
T244 /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.854484578 Aug 10 04:45:48 PM PDT 24 Aug 10 04:46:00 PM PDT 24 75679127 ps
T245 /workspace/coverage/default/18.sram_ctrl_ram_cfg.798935329 Aug 10 04:44:12 PM PDT 24 Aug 10 04:44:13 PM PDT 24 91041570 ps
T246 /workspace/coverage/default/41.sram_ctrl_executable.1068735024 Aug 10 04:48:15 PM PDT 24 Aug 10 05:20:46 PM PDT 24 14134920879 ps
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T292 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.3145968052 Aug 10 04:43:17 PM PDT 24 Aug 10 05:04:24 PM PDT 24 12786704163 ps
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T297 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.1925346927 Aug 10 04:46:04 PM PDT 24 Aug 10 04:46:07 PM PDT 24 351131304 ps
T298 /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3435756637 Aug 10 04:48:47 PM PDT 24 Aug 10 04:53:29 PM PDT 24 17805509586 ps
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T300 /workspace/coverage/default/39.sram_ctrl_mem_walk.1537103022 Aug 10 04:47:52 PM PDT 24 Aug 10 04:48:02 PM PDT 24 363728390 ps
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