Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.93 99.16 94.27 99.72 100.00 95.95 99.12 97.26


Total tests in report: 1030
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
72.41 72.41 95.42 95.42 67.77 67.77 46.67 46.67 85.71 85.71 85.27 85.27 94.40 94.40 31.63 31.63 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.790062823
84.33 11.92 96.53 1.10 78.32 10.55 93.86 47.19 90.48 4.76 88.89 3.62 94.69 0.29 47.53 15.90 /workspace/coverage/default/40.sram_ctrl_executable.292032191
90.40 6.07 97.37 0.85 82.35 4.03 95.32 1.46 90.48 0.00 90.10 1.21 96.76 2.06 80.44 32.91 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3442088670
93.85 3.45 98.56 1.19 85.78 3.44 97.50 2.18 100.00 9.52 93.24 3.14 97.05 0.29 84.83 4.39 /workspace/coverage/default/26.sram_ctrl_stress_all.1947020067
94.81 0.95 98.73 0.17 86.61 0.83 97.71 0.21 100.00 0.00 93.96 0.72 97.05 0.00 89.58 4.75 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.1932157020
95.47 0.66 98.90 0.17 88.63 2.01 97.92 0.21 100.00 0.00 94.93 0.97 97.05 0.00 90.86 1.28 /workspace/coverage/default/1.sram_ctrl_stress_all.2609854577
96.05 0.58 99.07 0.17 90.40 1.78 98.34 0.42 100.00 0.00 95.65 0.72 97.64 0.59 91.22 0.37 /workspace/coverage/default/0.sram_ctrl_sec_cm.3881404273
96.33 0.28 99.07 0.00 90.40 0.00 98.34 0.00 100.00 0.00 95.65 0.00 97.79 0.15 93.05 1.83 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1801865151
96.55 0.22 99.07 0.00 90.76 0.36 98.82 0.49 100.00 0.00 95.65 0.00 97.79 0.00 93.78 0.73 /workspace/coverage/default/31.sram_ctrl_alert_test.1706633862
96.77 0.22 99.07 0.00 90.88 0.12 98.82 0.00 100.00 0.00 96.14 0.48 97.79 0.00 94.70 0.91 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2730628782
96.97 0.20 99.07 0.00 90.88 0.00 98.89 0.07 100.00 0.00 96.14 0.00 99.12 1.33 94.70 0.00 /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.3365329950
97.12 0.15 99.15 0.08 91.00 0.12 99.72 0.83 100.00 0.00 96.14 0.00 99.12 0.00 94.70 0.00 /workspace/coverage/default/22.sram_ctrl_ram_cfg.565622805
97.25 0.13 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 95.61 0.91 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.2593303704
97.33 0.08 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.16 0.55 /workspace/coverage/default/10.sram_ctrl_lc_escalation.100265067
97.35 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.18 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.2392177441
97.38 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.53 0.18 /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.961134515
97.40 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.71 0.18 /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.369377022
97.43 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.18 /workspace/coverage/default/11.sram_ctrl_lc_escalation.3624204138
97.46 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.18 /workspace/coverage/default/15.sram_ctrl_executable.571347409
97.48 0.03 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.18 /workspace/coverage/default/15.sram_ctrl_regwen.582201623

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3222725498
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.1249341547
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.1586612883
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.3945255367
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.2570576055
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.4148149614
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.526608950
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.2993615508
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.3992487593
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.2713626802
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.180639215
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.1655572478
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1062827259
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.2627136229
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.2246814176
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.2597295518
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.4176856532
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.3055497604
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3264844291
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.2638454692
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3696360618
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.321078427
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.1808843764
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.3306891518
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.239357685
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1200063969
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.4159332374
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.829286650
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.888508935
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.956555948
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.1098332973
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.3029908286
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.2515873936
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.1852620657
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.621852382
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4145904691
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.1265264046
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.1100451461
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.4144812954
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.4064838822
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.3541201841
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.1084006941
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3322660441
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.514773186
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3883171197
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.1667148350
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.1216243973
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.4033266688
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.2687722753
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.2254593244
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.3821551156
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2935714327
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3474460791
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2463701642
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.2076916616
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.2547495626
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.2586256044
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.1244846078
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.440056028
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.1298947556
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.711254646
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3820173401
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.463669894
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.8079896
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1613072370
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2390593355
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1968986522
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2964418277
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.418025254
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.2987036209
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.2884412485
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.3065536265
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.2844820437
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.3000129263
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.320102929
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.1115108415
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.2904812014
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.1243371117
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.525880758
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2052914093
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.3522738277
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.3640880172
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1277998911
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.3791904747
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.914196274
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.4241168483
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1746612567
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.496944682
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.319040324
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3547943635
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.1381959809
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.1598627350
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.2631577733
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.170967590
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.3849394289
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.596179412
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.482878488
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.2341151820
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.3118711649
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.2768893674
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.3493681015
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.294656450
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2089346854
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.2850097123
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3580042710
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.488548936
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.4200984096
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2276857918
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.1177204621
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3676077545
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.2627215449
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3804270892
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.1960902386
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.2660078877
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.2910965109
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.1755868808
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2903823902
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.570250696
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3253372889
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.3357179124
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.1202613169
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.4112701725
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.1627514814
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1903001400
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2266481613
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3773255248
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2678891591
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.3877974436
/workspace/coverage/default/0.sram_ctrl_alert_test.821116810
/workspace/coverage/default/0.sram_ctrl_bijection.2538505930
/workspace/coverage/default/0.sram_ctrl_executable.2368504757
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3602867141
/workspace/coverage/default/0.sram_ctrl_max_throughput.3969627162
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.3344242650
/workspace/coverage/default/0.sram_ctrl_mem_walk.1618436051
/workspace/coverage/default/0.sram_ctrl_multiple_keys.2791568694
/workspace/coverage/default/0.sram_ctrl_partial_access.4294688679
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.3534474442
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2325388995
/workspace/coverage/default/0.sram_ctrl_regwen.1746448008
/workspace/coverage/default/0.sram_ctrl_smoke.1773485023
/workspace/coverage/default/0.sram_ctrl_stress_all.426356986
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3736598094
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.803872808
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3688177084
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.999034639
/workspace/coverage/default/1.sram_ctrl_alert_test.3532694838
/workspace/coverage/default/1.sram_ctrl_bijection.728334110
/workspace/coverage/default/1.sram_ctrl_executable.2733657635
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3885094128
/workspace/coverage/default/1.sram_ctrl_max_throughput.3634650685
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.186787313
/workspace/coverage/default/1.sram_ctrl_mem_walk.2432665344
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1653863389
/workspace/coverage/default/1.sram_ctrl_partial_access.3710017006
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.1649415020
/workspace/coverage/default/1.sram_ctrl_ram_cfg.467225055
/workspace/coverage/default/1.sram_ctrl_regwen.2103407335
/workspace/coverage/default/1.sram_ctrl_sec_cm.1165988639
/workspace/coverage/default/1.sram_ctrl_smoke.4161443831
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2167368520
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1516894344
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.1833749491
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.3569597660
/workspace/coverage/default/10.sram_ctrl_alert_test.1404221821
/workspace/coverage/default/10.sram_ctrl_bijection.2556824522
/workspace/coverage/default/10.sram_ctrl_executable.4069992017
/workspace/coverage/default/10.sram_ctrl_max_throughput.425103722
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.435395550
/workspace/coverage/default/10.sram_ctrl_mem_walk.3200192446
/workspace/coverage/default/10.sram_ctrl_multiple_keys.3329601751
/workspace/coverage/default/10.sram_ctrl_partial_access.112025429
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.189515078
/workspace/coverage/default/10.sram_ctrl_ram_cfg.2998764007
/workspace/coverage/default/10.sram_ctrl_regwen.2275283296
/workspace/coverage/default/10.sram_ctrl_smoke.4045416926
/workspace/coverage/default/10.sram_ctrl_stress_all.1505468187
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1582728911
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.3980756630
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.2036667901
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.3754427706
/workspace/coverage/default/11.sram_ctrl_alert_test.3796204643
/workspace/coverage/default/11.sram_ctrl_bijection.2842610745
/workspace/coverage/default/11.sram_ctrl_executable.4243719721
/workspace/coverage/default/11.sram_ctrl_max_throughput.412504715
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.2528253872
/workspace/coverage/default/11.sram_ctrl_mem_walk.3470475012
/workspace/coverage/default/11.sram_ctrl_multiple_keys.4267002053
/workspace/coverage/default/11.sram_ctrl_partial_access.2949684764
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.4157098074
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3809856157
/workspace/coverage/default/11.sram_ctrl_regwen.3748577807
/workspace/coverage/default/11.sram_ctrl_smoke.3831431168
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.440319442
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.4002203910
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2290484883
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.4060452574
/workspace/coverage/default/12.sram_ctrl_alert_test.2180627704
/workspace/coverage/default/12.sram_ctrl_bijection.56385199
/workspace/coverage/default/12.sram_ctrl_executable.3288269360
/workspace/coverage/default/12.sram_ctrl_lc_escalation.2186775349
/workspace/coverage/default/12.sram_ctrl_max_throughput.214992589
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2083042653
/workspace/coverage/default/12.sram_ctrl_mem_walk.818298507
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/workspace/coverage/default/43.sram_ctrl_max_throughput.3614112801
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.570379637
/workspace/coverage/default/43.sram_ctrl_mem_walk.3482350026
/workspace/coverage/default/43.sram_ctrl_multiple_keys.2349065606
/workspace/coverage/default/43.sram_ctrl_partial_access.3128740694
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.477812301
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2763411127
/workspace/coverage/default/43.sram_ctrl_regwen.616140457
/workspace/coverage/default/43.sram_ctrl_smoke.336679542
/workspace/coverage/default/43.sram_ctrl_stress_all.1026494118
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.1159166626
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3555010927
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.3985140916
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.517046529
/workspace/coverage/default/44.sram_ctrl_alert_test.4056231526
/workspace/coverage/default/44.sram_ctrl_bijection.4232967117
/workspace/coverage/default/44.sram_ctrl_executable.1140586765
/workspace/coverage/default/44.sram_ctrl_lc_escalation.3095472848
/workspace/coverage/default/44.sram_ctrl_max_throughput.2100259176
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.3488091817
/workspace/coverage/default/44.sram_ctrl_mem_walk.3563978375
/workspace/coverage/default/44.sram_ctrl_multiple_keys.4159725175
/workspace/coverage/default/44.sram_ctrl_partial_access.2713662412
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.2749675343
/workspace/coverage/default/44.sram_ctrl_ram_cfg.2136608710
/workspace/coverage/default/44.sram_ctrl_regwen.633916799
/workspace/coverage/default/44.sram_ctrl_smoke.3097527225
/workspace/coverage/default/44.sram_ctrl_stress_all.3487094670
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.4036892118
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3767322654
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1600733150
/workspace/coverage/default/45.sram_ctrl_alert_test.2201874414
/workspace/coverage/default/45.sram_ctrl_bijection.2735244637
/workspace/coverage/default/45.sram_ctrl_executable.2176849493
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3774287405
/workspace/coverage/default/45.sram_ctrl_max_throughput.3638152492
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1308232763
/workspace/coverage/default/45.sram_ctrl_mem_walk.3897769777
/workspace/coverage/default/45.sram_ctrl_multiple_keys.217620278
/workspace/coverage/default/45.sram_ctrl_partial_access.878463219
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2973169976
/workspace/coverage/default/45.sram_ctrl_ram_cfg.4006002904
/workspace/coverage/default/45.sram_ctrl_regwen.3804004513
/workspace/coverage/default/45.sram_ctrl_smoke.3123096322
/workspace/coverage/default/45.sram_ctrl_stress_all.2004541584
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.935245280
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1027497156
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.3774880792
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.1704326675
/workspace/coverage/default/46.sram_ctrl_alert_test.1857184803
/workspace/coverage/default/46.sram_ctrl_bijection.504852288
/workspace/coverage/default/46.sram_ctrl_executable.1381852360
/workspace/coverage/default/46.sram_ctrl_lc_escalation.943556684
/workspace/coverage/default/46.sram_ctrl_max_throughput.2139403821
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.1641197425
/workspace/coverage/default/46.sram_ctrl_mem_walk.602961817
/workspace/coverage/default/46.sram_ctrl_multiple_keys.3145796742
/workspace/coverage/default/46.sram_ctrl_partial_access.2562840790
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.3247569453
/workspace/coverage/default/46.sram_ctrl_ram_cfg.1324729123
/workspace/coverage/default/46.sram_ctrl_regwen.3186917811
/workspace/coverage/default/46.sram_ctrl_smoke.169574723
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.1423730549
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1686145516
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.491488703
/workspace/coverage/default/47.sram_ctrl_alert_test.1041644992
/workspace/coverage/default/47.sram_ctrl_bijection.1437128044
/workspace/coverage/default/47.sram_ctrl_executable.1765387564
/workspace/coverage/default/47.sram_ctrl_lc_escalation.3352945993
/workspace/coverage/default/47.sram_ctrl_max_throughput.906700616
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.424092596
/workspace/coverage/default/47.sram_ctrl_mem_walk.2941743422
/workspace/coverage/default/47.sram_ctrl_multiple_keys.4230136157
/workspace/coverage/default/47.sram_ctrl_partial_access.4178221012
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1924336273
/workspace/coverage/default/47.sram_ctrl_ram_cfg.2397321423
/workspace/coverage/default/47.sram_ctrl_regwen.711806112
/workspace/coverage/default/47.sram_ctrl_smoke.123925222
/workspace/coverage/default/47.sram_ctrl_stress_all.2668665297
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3979723005
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.3469235469
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4059413024
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.1274713657
/workspace/coverage/default/48.sram_ctrl_alert_test.3150949302
/workspace/coverage/default/48.sram_ctrl_bijection.2087569215
/workspace/coverage/default/48.sram_ctrl_executable.1934192376
/workspace/coverage/default/48.sram_ctrl_lc_escalation.872474746
/workspace/coverage/default/48.sram_ctrl_max_throughput.2459562761
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2185668754
/workspace/coverage/default/48.sram_ctrl_mem_walk.2904218978
/workspace/coverage/default/48.sram_ctrl_multiple_keys.1705792439
/workspace/coverage/default/48.sram_ctrl_partial_access.2281882060
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.2513536966
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1198108846
/workspace/coverage/default/48.sram_ctrl_regwen.4050316976
/workspace/coverage/default/48.sram_ctrl_smoke.291791413
/workspace/coverage/default/48.sram_ctrl_stress_all.807328589
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1456438773
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.675401083
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.1728780833
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1731395844
/workspace/coverage/default/49.sram_ctrl_alert_test.331461744
/workspace/coverage/default/49.sram_ctrl_bijection.2598923402
/workspace/coverage/default/49.sram_ctrl_executable.105937667
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1217664967
/workspace/coverage/default/49.sram_ctrl_max_throughput.920148835
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2894185038
/workspace/coverage/default/49.sram_ctrl_mem_walk.2831525030
/workspace/coverage/default/49.sram_ctrl_multiple_keys.3499899026
/workspace/coverage/default/49.sram_ctrl_partial_access.2696048636
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1100285213
/workspace/coverage/default/49.sram_ctrl_ram_cfg.2043790052
/workspace/coverage/default/49.sram_ctrl_regwen.3649203111
/workspace/coverage/default/49.sram_ctrl_smoke.2896910942
/workspace/coverage/default/49.sram_ctrl_stress_all.2533580552
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.560201455
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.2127361575
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4021072393
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1683666693
/workspace/coverage/default/5.sram_ctrl_alert_test.1351490018
/workspace/coverage/default/5.sram_ctrl_bijection.91092525
/workspace/coverage/default/5.sram_ctrl_executable.2035968817
/workspace/coverage/default/5.sram_ctrl_lc_escalation.2384535599
/workspace/coverage/default/5.sram_ctrl_max_throughput.4043705793
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.2989474478
/workspace/coverage/default/5.sram_ctrl_mem_walk.498497401
/workspace/coverage/default/5.sram_ctrl_multiple_keys.704483692
/workspace/coverage/default/5.sram_ctrl_partial_access.620900763
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.3246260788
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2505429654
/workspace/coverage/default/5.sram_ctrl_regwen.2240719552
/workspace/coverage/default/5.sram_ctrl_smoke.2004959490
/workspace/coverage/default/5.sram_ctrl_stress_all.2861910251
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.245795985
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.100841160
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.984401480
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.172780400
/workspace/coverage/default/6.sram_ctrl_alert_test.1107342854
/workspace/coverage/default/6.sram_ctrl_bijection.1424672648
/workspace/coverage/default/6.sram_ctrl_executable.2922986684
/workspace/coverage/default/6.sram_ctrl_lc_escalation.784713197
/workspace/coverage/default/6.sram_ctrl_max_throughput.3591180908
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3579018612
/workspace/coverage/default/6.sram_ctrl_mem_walk.2497647769
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2265544583
/workspace/coverage/default/6.sram_ctrl_partial_access.2228510175
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.1329356885
/workspace/coverage/default/6.sram_ctrl_ram_cfg.453097042
/workspace/coverage/default/6.sram_ctrl_regwen.973484694
/workspace/coverage/default/6.sram_ctrl_smoke.2314326788
/workspace/coverage/default/6.sram_ctrl_stress_all.2741803705
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3779956387
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.99253991
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3956242537
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.724902750
/workspace/coverage/default/7.sram_ctrl_alert_test.3585165628
/workspace/coverage/default/7.sram_ctrl_bijection.585819768
/workspace/coverage/default/7.sram_ctrl_executable.1114424759
/workspace/coverage/default/7.sram_ctrl_lc_escalation.66476387
/workspace/coverage/default/7.sram_ctrl_max_throughput.3070283384
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.2469794214
/workspace/coverage/default/7.sram_ctrl_mem_walk.4158284086
/workspace/coverage/default/7.sram_ctrl_multiple_keys.1869111698
/workspace/coverage/default/7.sram_ctrl_partial_access.15839939
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.348126472
/workspace/coverage/default/7.sram_ctrl_ram_cfg.539740981
/workspace/coverage/default/7.sram_ctrl_regwen.3289602580
/workspace/coverage/default/7.sram_ctrl_smoke.3347852743
/workspace/coverage/default/7.sram_ctrl_stress_all.4035831079
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.4026684801
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.1275807600
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.1825731009
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2274032168
/workspace/coverage/default/8.sram_ctrl_alert_test.1130732908
/workspace/coverage/default/8.sram_ctrl_bijection.2699091043
/workspace/coverage/default/8.sram_ctrl_executable.1070118116
/workspace/coverage/default/8.sram_ctrl_lc_escalation.1019386923
/workspace/coverage/default/8.sram_ctrl_max_throughput.620164446
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2879085752
/workspace/coverage/default/8.sram_ctrl_mem_walk.3584847391
/workspace/coverage/default/8.sram_ctrl_multiple_keys.1829037716
/workspace/coverage/default/8.sram_ctrl_partial_access.3225208014
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.1048577373
/workspace/coverage/default/8.sram_ctrl_ram_cfg.789279034
/workspace/coverage/default/8.sram_ctrl_regwen.316606880
/workspace/coverage/default/8.sram_ctrl_smoke.1756112960
/workspace/coverage/default/8.sram_ctrl_stress_all.3080035697
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.1896690796
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2470756341
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.354825989
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.944409020
/workspace/coverage/default/9.sram_ctrl_alert_test.3421850388
/workspace/coverage/default/9.sram_ctrl_bijection.3076289550
/workspace/coverage/default/9.sram_ctrl_executable.1125710684
/workspace/coverage/default/9.sram_ctrl_lc_escalation.4026416688
/workspace/coverage/default/9.sram_ctrl_max_throughput.2798557493
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1943009715
/workspace/coverage/default/9.sram_ctrl_mem_walk.1119202067
/workspace/coverage/default/9.sram_ctrl_multiple_keys.3022190091
/workspace/coverage/default/9.sram_ctrl_partial_access.4202179737
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.3732065879
/workspace/coverage/default/9.sram_ctrl_ram_cfg.813688223
/workspace/coverage/default/9.sram_ctrl_regwen.3265974550
/workspace/coverage/default/9.sram_ctrl_smoke.3482548862
/workspace/coverage/default/9.sram_ctrl_stress_all.3395073712
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.371085197
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.2683415852
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3460414289



Total test records in report: 1030
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.715323857 Aug 11 05:38:57 PM PDT 24 Aug 11 05:41:22 PM PDT 24 3221915619 ps
T2 /workspace/coverage/default/31.sram_ctrl_alert_test.1706633862 Aug 11 05:39:42 PM PDT 24 Aug 11 05:39:43 PM PDT 24 15945846 ps
T3 /workspace/coverage/default/26.sram_ctrl_max_throughput.2260232407 Aug 11 05:38:49 PM PDT 24 Aug 11 05:39:14 PM PDT 24 164417872 ps
T4 /workspace/coverage/default/17.sram_ctrl_mem_partial_access.790062823 Aug 11 05:37:52 PM PDT 24 Aug 11 05:37:56 PM PDT 24 1236270256 ps
T5 /workspace/coverage/default/48.sram_ctrl_mem_walk.2904218978 Aug 11 05:43:11 PM PDT 24 Aug 11 05:43:17 PM PDT 24 225966379 ps
T10 /workspace/coverage/default/42.sram_ctrl_bijection.3331457886 Aug 11 05:41:49 PM PDT 24 Aug 11 05:43:07 PM PDT 24 21597947521 ps
T6 /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.3939586485 Aug 11 05:37:37 PM PDT 24 Aug 11 05:40:00 PM PDT 24 1944806702 ps
T11 /workspace/coverage/default/36.sram_ctrl_partial_access.2126781301 Aug 11 05:40:38 PM PDT 24 Aug 11 05:40:48 PM PDT 24 546935918 ps
T12 /workspace/coverage/default/12.sram_ctrl_access_during_key_req.4060452574 Aug 11 05:37:23 PM PDT 24 Aug 11 05:47:12 PM PDT 24 8490542774 ps
T13 /workspace/coverage/default/11.sram_ctrl_max_throughput.412504715 Aug 11 05:37:26 PM PDT 24 Aug 11 05:38:18 PM PDT 24 389011677 ps
T26 /workspace/coverage/default/40.sram_ctrl_executable.292032191 Aug 11 05:41:29 PM PDT 24 Aug 11 06:04:44 PM PDT 24 19875867143 ps
T46 /workspace/coverage/default/35.sram_ctrl_smoke.3797989658 Aug 11 05:40:24 PM PDT 24 Aug 11 05:42:00 PM PDT 24 535356374 ps
T47 /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.1801865151 Aug 11 05:36:48 PM PDT 24 Aug 11 05:41:22 PM PDT 24 42642377395 ps
T31 /workspace/coverage/default/31.sram_ctrl_access_during_key_req.146577870 Aug 11 05:39:43 PM PDT 24 Aug 11 05:53:41 PM PDT 24 13244571120 ps
T143 /workspace/coverage/default/14.sram_ctrl_max_throughput.2295440913 Aug 11 05:37:30 PM PDT 24 Aug 11 05:38:24 PM PDT 24 220099191 ps
T7 /workspace/coverage/default/10.sram_ctrl_lc_escalation.100265067 Aug 11 05:37:28 PM PDT 24 Aug 11 05:37:32 PM PDT 24 423252131 ps
T27 /workspace/coverage/default/11.sram_ctrl_regwen.3748577807 Aug 11 05:37:15 PM PDT 24 Aug 11 05:39:51 PM PDT 24 3956995607 ps
T32 /workspace/coverage/default/22.sram_ctrl_ram_cfg.565622805 Aug 11 05:38:18 PM PDT 24 Aug 11 05:38:18 PM PDT 24 215642928 ps
T20 /workspace/coverage/default/1.sram_ctrl_stress_all.2609854577 Aug 11 05:36:44 PM PDT 24 Aug 11 06:14:36 PM PDT 24 34482105910 ps
T64 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1686145516 Aug 11 05:42:39 PM PDT 24 Aug 11 05:44:04 PM PDT 24 1561639692 ps
T48 /workspace/coverage/default/34.sram_ctrl_access_during_key_req.24766917 Aug 11 05:40:15 PM PDT 24 Aug 11 05:53:58 PM PDT 24 10292423364 ps
T69 /workspace/coverage/default/39.sram_ctrl_smoke.1837739221 Aug 11 05:41:11 PM PDT 24 Aug 11 05:41:20 PM PDT 24 893944536 ps
T70 /workspace/coverage/default/38.sram_ctrl_mem_walk.1018572460 Aug 11 05:41:10 PM PDT 24 Aug 11 05:41:15 PM PDT 24 780066933 ps
T71 /workspace/coverage/default/29.sram_ctrl_partial_access.3889378898 Aug 11 05:39:16 PM PDT 24 Aug 11 05:39:57 PM PDT 24 1795507208 ps
T65 /workspace/coverage/default/13.sram_ctrl_smoke.227959228 Aug 11 05:37:26 PM PDT 24 Aug 11 05:37:37 PM PDT 24 897570190 ps
T33 /workspace/coverage/default/42.sram_ctrl_ram_cfg.1006685783 Aug 11 05:41:56 PM PDT 24 Aug 11 05:41:56 PM PDT 24 88057165 ps
T92 /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.441523586 Aug 11 05:39:18 PM PDT 24 Aug 11 05:45:08 PM PDT 24 20703284041 ps
T16 /workspace/coverage/default/20.sram_ctrl_alert_test.1301979099 Aug 11 05:38:12 PM PDT 24 Aug 11 05:38:12 PM PDT 24 15274618 ps
T8 /workspace/coverage/default/34.sram_ctrl_lc_escalation.1529388022 Aug 11 05:40:15 PM PDT 24 Aug 11 05:40:19 PM PDT 24 380201834 ps
T49 /workspace/coverage/default/34.sram_ctrl_mem_partial_access.2095180000 Aug 11 05:40:24 PM PDT 24 Aug 11 05:40:27 PM PDT 24 204680424 ps
T106 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.2168282413 Aug 11 05:36:52 PM PDT 24 Aug 11 05:39:32 PM PDT 24 1769549788 ps
T28 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3404817104 Aug 11 05:41:32 PM PDT 24 Aug 11 05:41:41 PM PDT 24 279471660 ps
T75 /workspace/coverage/default/42.sram_ctrl_executable.1441790489 Aug 11 05:41:54 PM PDT 24 Aug 11 06:03:39 PM PDT 24 3957611360 ps
T9 /workspace/coverage/default/26.sram_ctrl_stress_all.1947020067 Aug 11 05:38:56 PM PDT 24 Aug 11 06:17:21 PM PDT 24 219357740302 ps
T76 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.2469794214 Aug 11 05:37:14 PM PDT 24 Aug 11 05:37:19 PM PDT 24 153567848 ps
T77 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.587328222 Aug 11 05:38:39 PM PDT 24 Aug 11 05:41:38 PM PDT 24 11646655851 ps
T78 /workspace/coverage/default/23.sram_ctrl_multiple_keys.2408495726 Aug 11 05:38:30 PM PDT 24 Aug 11 05:40:09 PM PDT 24 47023692429 ps
T79 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.1924336273 Aug 11 05:42:46 PM PDT 24 Aug 11 05:51:22 PM PDT 24 19085960212 ps
T22 /workspace/coverage/default/16.sram_ctrl_regwen.382051527 Aug 11 05:37:44 PM PDT 24 Aug 11 06:03:23 PM PDT 24 103055953251 ps
T80 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.667521554 Aug 11 05:41:02 PM PDT 24 Aug 11 05:47:54 PM PDT 24 71350319470 ps
T81 /workspace/coverage/default/4.sram_ctrl_bijection.3615042318 Aug 11 05:36:52 PM PDT 24 Aug 11 05:37:15 PM PDT 24 1032688619 ps
T95 /workspace/coverage/default/37.sram_ctrl_access_during_key_req.1037054219 Aug 11 05:40:47 PM PDT 24 Aug 11 05:42:01 PM PDT 24 560671000 ps
T139 /workspace/coverage/default/45.sram_ctrl_partial_access.878463219 Aug 11 05:42:24 PM PDT 24 Aug 11 05:42:44 PM PDT 24 1134871763 ps
T21 /workspace/coverage/default/46.sram_ctrl_lc_escalation.943556684 Aug 11 05:42:40 PM PDT 24 Aug 11 05:42:43 PM PDT 24 2166057799 ps
T145 /workspace/coverage/default/29.sram_ctrl_max_throughput.1785939211 Aug 11 05:39:18 PM PDT 24 Aug 11 05:39:50 PM PDT 24 366676104 ps
T96 /workspace/coverage/default/3.sram_ctrl_access_during_key_req.3950980975 Aug 11 05:36:49 PM PDT 24 Aug 11 05:49:54 PM PDT 24 9384553046 ps
T24 /workspace/coverage/default/33.sram_ctrl_lc_escalation.3715230436 Aug 11 05:40:00 PM PDT 24 Aug 11 05:40:09 PM PDT 24 724996823 ps
T141 /workspace/coverage/default/26.sram_ctrl_bijection.494258562 Aug 11 05:38:50 PM PDT 24 Aug 11 05:40:20 PM PDT 24 21579101996 ps
T14 /workspace/coverage/default/38.sram_ctrl_alert_test.2082341192 Aug 11 05:41:10 PM PDT 24 Aug 11 05:41:11 PM PDT 24 16055419 ps
T29 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.3082150317 Aug 11 05:38:29 PM PDT 24 Aug 11 05:49:18 PM PDT 24 8087715072 ps
T137 /workspace/coverage/default/48.sram_ctrl_executable.1934192376 Aug 11 05:43:05 PM PDT 24 Aug 11 05:56:54 PM PDT 24 42273270243 ps
T146 /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.4267527769 Aug 11 05:38:36 PM PDT 24 Aug 11 05:38:51 PM PDT 24 82103705 ps
T82 /workspace/coverage/default/21.sram_ctrl_regwen.1132459826 Aug 11 05:38:13 PM PDT 24 Aug 11 05:47:30 PM PDT 24 2406919476 ps
T147 /workspace/coverage/default/47.sram_ctrl_max_throughput.906700616 Aug 11 05:42:48 PM PDT 24 Aug 11 05:44:51 PM PDT 24 248211967 ps
T148 /workspace/coverage/default/10.sram_ctrl_bijection.2556824522 Aug 11 05:37:32 PM PDT 24 Aug 11 05:38:02 PM PDT 24 1387529153 ps
T136 /workspace/coverage/default/11.sram_ctrl_executable.4243719721 Aug 11 05:37:24 PM PDT 24 Aug 11 05:48:54 PM PDT 24 726395782 ps
T83 /workspace/coverage/default/40.sram_ctrl_stress_all.2850736263 Aug 11 05:41:29 PM PDT 24 Aug 11 06:37:52 PM PDT 24 159198947202 ps
T140 /workspace/coverage/default/18.sram_ctrl_regwen.1830413275 Aug 11 05:37:56 PM PDT 24 Aug 11 05:55:06 PM PDT 24 12264573684 ps
T56 /workspace/coverage/default/36.sram_ctrl_mem_partial_access.2794591596 Aug 11 05:40:43 PM PDT 24 Aug 11 05:40:48 PM PDT 24 340809922 ps
T149 /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.4059413024 Aug 11 05:42:46 PM PDT 24 Aug 11 05:43:31 PM PDT 24 110336576 ps
T142 /workspace/coverage/default/12.sram_ctrl_max_throughput.214992589 Aug 11 05:37:24 PM PDT 24 Aug 11 05:37:51 PM PDT 24 93132068 ps
T144 /workspace/coverage/default/44.sram_ctrl_executable.1140586765 Aug 11 05:42:15 PM PDT 24 Aug 11 05:45:35 PM PDT 24 11431558175 ps
T107 /workspace/coverage/default/23.sram_ctrl_stress_pipeline.4230043671 Aug 11 05:38:30 PM PDT 24 Aug 11 05:43:45 PM PDT 24 12937727918 ps
T30 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.245795985 Aug 11 05:37:02 PM PDT 24 Aug 11 05:37:36 PM PDT 24 624432506 ps
T122 /workspace/coverage/default/9.sram_ctrl_stress_all.3395073712 Aug 11 05:37:08 PM PDT 24 Aug 11 06:36:40 PM PDT 24 283882847376 ps
T60 /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.3442088670 Aug 11 05:37:56 PM PDT 24 Aug 11 05:38:03 PM PDT 24 762860574 ps
T116 /workspace/coverage/default/45.sram_ctrl_bijection.2735244637 Aug 11 05:42:25 PM PDT 24 Aug 11 05:43:13 PM PDT 24 12774681838 ps
T57 /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3779956387 Aug 11 05:37:04 PM PDT 24 Aug 11 05:43:41 PM PDT 24 5257239629 ps
T117 /workspace/coverage/default/12.sram_ctrl_regwen.1291848400 Aug 11 05:37:27 PM PDT 24 Aug 11 05:56:25 PM PDT 24 16165017829 ps
T118 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3552115014 Aug 11 05:39:31 PM PDT 24 Aug 11 05:44:46 PM PDT 24 12597739253 ps
T58 /workspace/coverage/default/45.sram_ctrl_mem_walk.3897769777 Aug 11 05:42:33 PM PDT 24 Aug 11 05:42:45 PM PDT 24 1764114239 ps
T54 /workspace/coverage/default/9.sram_ctrl_mem_partial_access.1943009715 Aug 11 05:37:12 PM PDT 24 Aug 11 05:37:16 PM PDT 24 373909580 ps
T119 /workspace/coverage/default/14.sram_ctrl_smoke.3887223322 Aug 11 05:37:31 PM PDT 24 Aug 11 05:37:59 PM PDT 24 200059691 ps
T120 /workspace/coverage/default/30.sram_ctrl_smoke.1543975715 Aug 11 05:39:24 PM PDT 24 Aug 11 05:39:36 PM PDT 24 751486102 ps
T121 /workspace/coverage/default/24.sram_ctrl_access_during_key_req.1901425361 Aug 11 05:38:38 PM PDT 24 Aug 11 05:47:34 PM PDT 24 2256379160 ps
T150 /workspace/coverage/default/16.sram_ctrl_executable.753198539 Aug 11 05:37:43 PM PDT 24 Aug 11 05:46:56 PM PDT 24 15139213247 ps
T151 /workspace/coverage/default/25.sram_ctrl_bijection.367885204 Aug 11 05:38:46 PM PDT 24 Aug 11 05:39:33 PM PDT 24 2264748146 ps
T152 /workspace/coverage/default/33.sram_ctrl_executable.4069840907 Aug 11 05:40:01 PM PDT 24 Aug 11 05:45:26 PM PDT 24 6815490601 ps
T153 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.2683415852 Aug 11 05:37:19 PM PDT 24 Aug 11 05:42:51 PM PDT 24 12909446298 ps
T23 /workspace/coverage/default/17.sram_ctrl_regwen.2645282987 Aug 11 05:37:48 PM PDT 24 Aug 11 05:53:04 PM PDT 24 3831580303 ps
T154 /workspace/coverage/default/13.sram_ctrl_max_throughput.169221462 Aug 11 05:37:25 PM PDT 24 Aug 11 05:37:36 PM PDT 24 73441480 ps
T155 /workspace/coverage/default/29.sram_ctrl_mem_walk.245611827 Aug 11 05:39:25 PM PDT 24 Aug 11 05:39:34 PM PDT 24 138250782 ps
T34 /workspace/coverage/default/20.sram_ctrl_ram_cfg.2897185415 Aug 11 05:38:14 PM PDT 24 Aug 11 05:38:15 PM PDT 24 27580871 ps
T156 /workspace/coverage/default/4.sram_ctrl_partial_access.706270949 Aug 11 05:36:55 PM PDT 24 Aug 11 05:37:28 PM PDT 24 353765292 ps
T157 /workspace/coverage/default/6.sram_ctrl_executable.2922986684 Aug 11 05:37:07 PM PDT 24 Aug 11 05:53:04 PM PDT 24 10673871664 ps
T158 /workspace/coverage/default/12.sram_ctrl_executable.3288269360 Aug 11 05:37:28 PM PDT 24 Aug 11 05:38:33 PM PDT 24 1621422677 ps
T159 /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.2862162094 Aug 11 05:39:00 PM PDT 24 Aug 11 05:44:20 PM PDT 24 55843409507 ps
T160 /workspace/coverage/default/18.sram_ctrl_max_throughput.1124520508 Aug 11 05:37:51 PM PDT 24 Aug 11 05:37:56 PM PDT 24 60783044 ps
T161 /workspace/coverage/default/45.sram_ctrl_stress_pipeline.1027497156 Aug 11 05:42:25 PM PDT 24 Aug 11 05:47:36 PM PDT 24 12947253648 ps
T162 /workspace/coverage/default/40.sram_ctrl_lc_escalation.2233743260 Aug 11 05:41:29 PM PDT 24 Aug 11 05:41:33 PM PDT 24 412993035 ps
T163 /workspace/coverage/default/3.sram_ctrl_lc_escalation.1296712988 Aug 11 05:36:52 PM PDT 24 Aug 11 05:36:56 PM PDT 24 370406887 ps
T164 /workspace/coverage/default/15.sram_ctrl_max_throughput.917808503 Aug 11 05:37:42 PM PDT 24 Aug 11 05:37:48 PM PDT 24 215768882 ps
T165 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1942052858 Aug 11 05:37:23 PM PDT 24 Aug 11 05:37:26 PM PDT 24 357967834 ps
T138 /workspace/coverage/default/19.sram_ctrl_lc_escalation.2052756694 Aug 11 05:38:07 PM PDT 24 Aug 11 05:38:09 PM PDT 24 198580400 ps
T166 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.208578694 Aug 11 05:37:28 PM PDT 24 Aug 11 05:38:06 PM PDT 24 465283893 ps
T167 /workspace/coverage/default/30.sram_ctrl_access_during_key_req.465905917 Aug 11 05:39:29 PM PDT 24 Aug 11 05:48:41 PM PDT 24 8966836727 ps
T168 /workspace/coverage/default/9.sram_ctrl_regwen.3265974550 Aug 11 05:37:10 PM PDT 24 Aug 11 05:55:59 PM PDT 24 13084516100 ps
T169 /workspace/coverage/default/19.sram_ctrl_partial_access.708311861 Aug 11 05:37:56 PM PDT 24 Aug 11 05:38:11 PM PDT 24 1092723476 ps
T170 /workspace/coverage/default/13.sram_ctrl_regwen.3131998465 Aug 11 05:37:23 PM PDT 24 Aug 11 05:46:01 PM PDT 24 11167021665 ps
T171 /workspace/coverage/default/12.sram_ctrl_bijection.56385199 Aug 11 05:37:17 PM PDT 24 Aug 11 05:37:47 PM PDT 24 2570642973 ps
T172 /workspace/coverage/default/40.sram_ctrl_partial_access.1886921452 Aug 11 05:41:24 PM PDT 24 Aug 11 05:43:15 PM PDT 24 424653336 ps
T15 /workspace/coverage/default/46.sram_ctrl_alert_test.1857184803 Aug 11 05:42:47 PM PDT 24 Aug 11 05:42:47 PM PDT 24 40130387 ps
T173 /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.2206131804 Aug 11 05:38:57 PM PDT 24 Aug 11 05:39:03 PM PDT 24 321356854 ps
T174 /workspace/coverage/default/40.sram_ctrl_stress_pipeline.3314309064 Aug 11 05:41:20 PM PDT 24 Aug 11 05:46:06 PM PDT 24 12135570920 ps
T55 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.1907466190 Aug 11 05:39:57 PM PDT 24 Aug 11 05:40:00 PM PDT 24 101457531 ps
T25 /workspace/coverage/default/8.sram_ctrl_stress_all.3080035697 Aug 11 05:37:20 PM PDT 24 Aug 11 06:07:44 PM PDT 24 6423808385 ps
T175 /workspace/coverage/default/41.sram_ctrl_bijection.537145197 Aug 11 05:41:35 PM PDT 24 Aug 11 05:42:12 PM PDT 24 8759388371 ps
T176 /workspace/coverage/default/37.sram_ctrl_executable.2773218045 Aug 11 05:40:47 PM PDT 24 Aug 11 05:41:29 PM PDT 24 692590878 ps
T177 /workspace/coverage/default/38.sram_ctrl_bijection.1667630270 Aug 11 05:40:57 PM PDT 24 Aug 11 05:41:16 PM PDT 24 311896508 ps
T133 /workspace/coverage/default/22.sram_ctrl_executable.2559280922 Aug 11 05:38:17 PM PDT 24 Aug 11 05:57:38 PM PDT 24 50478637875 ps
T178 /workspace/coverage/default/15.sram_ctrl_stress_all.193108296 Aug 11 05:37:39 PM PDT 24 Aug 11 06:05:29 PM PDT 24 63352842323 ps
T50 /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.2730628782 Aug 11 05:38:56 PM PDT 24 Aug 11 05:41:05 PM PDT 24 3655202406 ps
T179 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.2778564408 Aug 11 05:40:14 PM PDT 24 Aug 11 05:42:08 PM PDT 24 278918416 ps
T180 /workspace/coverage/default/1.sram_ctrl_alert_test.3532694838 Aug 11 05:36:49 PM PDT 24 Aug 11 05:36:50 PM PDT 24 39428663 ps
T181 /workspace/coverage/default/45.sram_ctrl_lc_escalation.3774287405 Aug 11 05:42:34 PM PDT 24 Aug 11 05:42:42 PM PDT 24 1026860502 ps
T51 /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.2614855332 Aug 11 05:40:09 PM PDT 24 Aug 11 05:40:18 PM PDT 24 527229164 ps
T182 /workspace/coverage/default/25.sram_ctrl_multiple_keys.478317410 Aug 11 05:38:38 PM PDT 24 Aug 11 06:09:47 PM PDT 24 10381180879 ps
T183 /workspace/coverage/default/23.sram_ctrl_mem_walk.3422869702 Aug 11 05:38:32 PM PDT 24 Aug 11 05:38:42 PM PDT 24 466647337 ps
T59 /workspace/coverage/default/43.sram_ctrl_mem_partial_access.570379637 Aug 11 05:42:09 PM PDT 24 Aug 11 05:42:13 PM PDT 24 367700060 ps
T184 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.2989474478 Aug 11 05:37:03 PM PDT 24 Aug 11 05:37:07 PM PDT 24 101695250 ps
T185 /workspace/coverage/default/37.sram_ctrl_mem_walk.3067130845 Aug 11 05:40:55 PM PDT 24 Aug 11 05:41:01 PM PDT 24 234795075 ps
T186 /workspace/coverage/default/36.sram_ctrl_executable.2110059805 Aug 11 05:40:42 PM PDT 24 Aug 11 05:41:43 PM PDT 24 1061386297 ps
T187 /workspace/coverage/default/34.sram_ctrl_max_throughput.3700060301 Aug 11 05:40:08 PM PDT 24 Aug 11 05:42:23 PM PDT 24 145895108 ps
T188 /workspace/coverage/default/49.sram_ctrl_multiple_keys.3499899026 Aug 11 05:43:07 PM PDT 24 Aug 11 05:50:03 PM PDT 24 13356274649 ps
T189 /workspace/coverage/default/9.sram_ctrl_executable.1125710684 Aug 11 05:37:21 PM PDT 24 Aug 11 05:57:22 PM PDT 24 12490957037 ps
T190 /workspace/coverage/default/41.sram_ctrl_smoke.3350568974 Aug 11 05:41:35 PM PDT 24 Aug 11 05:41:39 PM PDT 24 187113425 ps
T191 /workspace/coverage/default/22.sram_ctrl_max_throughput.2989789646 Aug 11 05:38:19 PM PDT 24 Aug 11 05:40:08 PM PDT 24 585020238 ps
T192 /workspace/coverage/default/9.sram_ctrl_access_during_key_req.944409020 Aug 11 05:37:10 PM PDT 24 Aug 11 05:48:52 PM PDT 24 1629023069 ps
T193 /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.249241531 Aug 11 05:38:12 PM PDT 24 Aug 11 05:48:04 PM PDT 24 133110565899 ps
T194 /workspace/coverage/default/30.sram_ctrl_max_throughput.1514177899 Aug 11 05:39:28 PM PDT 24 Aug 11 05:40:47 PM PDT 24 120179765 ps
T195 /workspace/coverage/default/23.sram_ctrl_ram_cfg.3287347373 Aug 11 05:38:32 PM PDT 24 Aug 11 05:38:33 PM PDT 24 110249178 ps
T196 /workspace/coverage/default/2.sram_ctrl_smoke.1700868163 Aug 11 05:36:45 PM PDT 24 Aug 11 05:37:02 PM PDT 24 1056869259 ps
T197 /workspace/coverage/default/31.sram_ctrl_multiple_keys.72677931 Aug 11 05:39:37 PM PDT 24 Aug 11 05:51:18 PM PDT 24 10342309796 ps
T198 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.1543305971 Aug 11 05:36:57 PM PDT 24 Aug 11 05:37:01 PM PDT 24 221312097 ps
T72 /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.903910879 Aug 11 05:40:37 PM PDT 24 Aug 11 05:47:49 PM PDT 24 1531977054 ps
T199 /workspace/coverage/default/1.sram_ctrl_ram_cfg.467225055 Aug 11 05:36:45 PM PDT 24 Aug 11 05:36:45 PM PDT 24 281552727 ps
T134 /workspace/coverage/default/32.sram_ctrl_executable.2916987169 Aug 11 05:39:55 PM PDT 24 Aug 11 05:49:28 PM PDT 24 37227708470 ps
T200 /workspace/coverage/default/44.sram_ctrl_partial_access.2713662412 Aug 11 05:42:11 PM PDT 24 Aug 11 05:42:32 PM PDT 24 5029575807 ps
T201 /workspace/coverage/default/3.sram_ctrl_ram_cfg.40734884 Aug 11 05:36:50 PM PDT 24 Aug 11 05:36:51 PM PDT 24 30937464 ps
T202 /workspace/coverage/default/21.sram_ctrl_max_throughput.2783229619 Aug 11 05:38:10 PM PDT 24 Aug 11 05:38:41 PM PDT 24 318272299 ps
T203 /workspace/coverage/default/36.sram_ctrl_regwen.2614846344 Aug 11 05:40:40 PM PDT 24 Aug 11 05:45:06 PM PDT 24 16843527998 ps
T204 /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.554215151 Aug 11 05:39:55 PM PDT 24 Aug 11 05:40:07 PM PDT 24 143790358 ps
T73 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.1461102832 Aug 11 05:36:52 PM PDT 24 Aug 11 05:40:18 PM PDT 24 723885994 ps
T205 /workspace/coverage/default/45.sram_ctrl_regwen.3804004513 Aug 11 05:42:31 PM PDT 24 Aug 11 06:06:08 PM PDT 24 52761943495 ps
T206 /workspace/coverage/default/27.sram_ctrl_access_during_key_req.613374932 Aug 11 05:39:06 PM PDT 24 Aug 11 05:44:19 PM PDT 24 4833774901 ps
T207 /workspace/coverage/default/17.sram_ctrl_lc_escalation.1201136698 Aug 11 05:37:50 PM PDT 24 Aug 11 05:37:52 PM PDT 24 293411789 ps
T208 /workspace/coverage/default/23.sram_ctrl_executable.1835510539 Aug 11 05:38:27 PM PDT 24 Aug 11 05:56:13 PM PDT 24 74054838826 ps
T209 /workspace/coverage/default/32.sram_ctrl_partial_access.3133725450 Aug 11 05:39:49 PM PDT 24 Aug 11 05:42:29 PM PDT 24 251093249 ps
T210 /workspace/coverage/default/32.sram_ctrl_smoke.747112552 Aug 11 05:39:43 PM PDT 24 Aug 11 05:40:02 PM PDT 24 4472911499 ps
T211 /workspace/coverage/default/42.sram_ctrl_stress_all.704482971 Aug 11 05:41:57 PM PDT 24 Aug 11 06:17:45 PM PDT 24 105065533597 ps
T212 /workspace/coverage/default/34.sram_ctrl_executable.1348210503 Aug 11 05:40:14 PM PDT 24 Aug 11 05:57:09 PM PDT 24 12736291020 ps
T74 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.887668895 Aug 11 05:39:43 PM PDT 24 Aug 11 05:41:02 PM PDT 24 4814746893 ps
T213 /workspace/coverage/default/18.sram_ctrl_lc_escalation.766620458 Aug 11 05:37:50 PM PDT 24 Aug 11 05:37:59 PM PDT 24 1469504781 ps
T214 /workspace/coverage/default/4.sram_ctrl_multiple_keys.4020619403 Aug 11 05:36:51 PM PDT 24 Aug 11 05:56:42 PM PDT 24 11675122103 ps
T215 /workspace/coverage/default/16.sram_ctrl_bijection.2261576542 Aug 11 05:37:42 PM PDT 24 Aug 11 05:38:36 PM PDT 24 2632192878 ps
T216 /workspace/coverage/default/38.sram_ctrl_partial_access.1697950151 Aug 11 05:41:03 PM PDT 24 Aug 11 05:41:41 PM PDT 24 697251324 ps
T217 /workspace/coverage/default/33.sram_ctrl_smoke.2945001871 Aug 11 05:40:01 PM PDT 24 Aug 11 05:41:09 PM PDT 24 1891998599 ps
T218 /workspace/coverage/default/35.sram_ctrl_stress_all.1135741588 Aug 11 05:40:38 PM PDT 24 Aug 11 05:52:05 PM PDT 24 8823196307 ps
T219 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.3460414289 Aug 11 05:37:09 PM PDT 24 Aug 11 05:37:21 PM PDT 24 76648005 ps
T220 /workspace/coverage/default/9.sram_ctrl_lc_escalation.4026416688 Aug 11 05:37:12 PM PDT 24 Aug 11 05:37:14 PM PDT 24 291421448 ps
T221 /workspace/coverage/default/35.sram_ctrl_mem_partial_access.1786021276 Aug 11 05:40:30 PM PDT 24 Aug 11 05:40:34 PM PDT 24 91424978 ps
T222 /workspace/coverage/default/15.sram_ctrl_access_during_key_req.3265494172 Aug 11 05:37:35 PM PDT 24 Aug 11 05:44:42 PM PDT 24 3953044457 ps
T223 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.3005080657 Aug 11 05:38:18 PM PDT 24 Aug 11 05:43:57 PM PDT 24 26575077884 ps
T224 /workspace/coverage/default/40.sram_ctrl_bijection.3320136599 Aug 11 05:41:24 PM PDT 24 Aug 11 05:42:52 PM PDT 24 5630696242 ps
T225 /workspace/coverage/default/15.sram_ctrl_regwen.582201623 Aug 11 05:37:38 PM PDT 24 Aug 11 05:59:17 PM PDT 24 236144234190 ps
T226 /workspace/coverage/default/18.sram_ctrl_stress_all.820201424 Aug 11 05:37:55 PM PDT 24 Aug 11 06:47:33 PM PDT 24 528354062004 ps
T227 /workspace/coverage/default/18.sram_ctrl_smoke.2582934937 Aug 11 05:37:52 PM PDT 24 Aug 11 05:37:59 PM PDT 24 311559979 ps
T228 /workspace/coverage/default/44.sram_ctrl_bijection.4232967117 Aug 11 05:42:10 PM PDT 24 Aug 11 05:43:11 PM PDT 24 18649435668 ps
T229 /workspace/coverage/default/2.sram_ctrl_multiple_keys.3927758924 Aug 11 05:36:44 PM PDT 24 Aug 11 05:42:43 PM PDT 24 35906653155 ps
T230 /workspace/coverage/default/34.sram_ctrl_smoke.795928539 Aug 11 05:40:07 PM PDT 24 Aug 11 05:42:45 PM PDT 24 269322801 ps
T231 /workspace/coverage/default/6.sram_ctrl_ram_cfg.453097042 Aug 11 05:37:04 PM PDT 24 Aug 11 05:37:05 PM PDT 24 44101872 ps
T232 /workspace/coverage/default/19.sram_ctrl_max_throughput.4055953390 Aug 11 05:38:05 PM PDT 24 Aug 11 05:38:17 PM PDT 24 225224790 ps
T233 /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.2035865456 Aug 11 05:41:28 PM PDT 24 Aug 11 05:45:41 PM PDT 24 25293450943 ps
T234 /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.624215986 Aug 11 05:37:31 PM PDT 24 Aug 11 05:37:33 PM PDT 24 145239231 ps
T235 /workspace/coverage/default/37.sram_ctrl_stress_all.1151192465 Aug 11 05:40:58 PM PDT 24 Aug 11 06:18:59 PM PDT 24 7415840979 ps
T236 /workspace/coverage/default/27.sram_ctrl_mem_walk.3310280747 Aug 11 05:39:07 PM PDT 24 Aug 11 05:39:17 PM PDT 24 364815807 ps
T237 /workspace/coverage/default/28.sram_ctrl_ram_cfg.3933454208 Aug 11 05:39:10 PM PDT 24 Aug 11 05:39:10 PM PDT 24 77756804 ps
T238 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.999034639 Aug 11 05:36:44 PM PDT 24 Aug 11 05:43:55 PM PDT 24 3286339249 ps
T239 /workspace/coverage/default/16.sram_ctrl_max_throughput.3172628942 Aug 11 05:37:39 PM PDT 24 Aug 11 05:37:49 PM PDT 24 133241690 ps
T240 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.1145369751 Aug 11 05:36:53 PM PDT 24 Aug 11 05:41:56 PM PDT 24 37342564020 ps
T241 /workspace/coverage/default/6.sram_ctrl_stress_pipeline.99253991 Aug 11 05:37:09 PM PDT 24 Aug 11 05:42:19 PM PDT 24 14176881237 ps
T242 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1408842903 Aug 11 05:41:49 PM PDT 24 Aug 11 05:45:41 PM PDT 24 2317647469 ps
T243 /workspace/coverage/default/34.sram_ctrl_multiple_keys.4285053519 Aug 11 05:40:07 PM PDT 24 Aug 11 05:50:50 PM PDT 24 22038584355 ps
T244 /workspace/coverage/default/8.sram_ctrl_bijection.2699091043 Aug 11 05:37:11 PM PDT 24 Aug 11 05:37:40 PM PDT 24 3491490549 ps
T245 /workspace/coverage/default/7.sram_ctrl_max_throughput.3070283384 Aug 11 05:37:07 PM PDT 24 Aug 11 05:37:21 PM PDT 24 74019471 ps
T246 /workspace/coverage/default/16.sram_ctrl_smoke.3344297171 Aug 11 05:37:42 PM PDT 24 Aug 11 05:39:19 PM PDT 24 273096206 ps
T247 /workspace/coverage/default/44.sram_ctrl_regwen.633916799 Aug 11 05:42:19 PM PDT 24 Aug 11 05:48:28 PM PDT 24 13831165462 ps
T248 /workspace/coverage/default/6.sram_ctrl_smoke.2314326788 Aug 11 05:36:57 PM PDT 24 Aug 11 05:36:58 PM PDT 24 31299045 ps
T249 /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.80412437 Aug 11 05:37:32 PM PDT 24 Aug 11 05:46:07 PM PDT 24 19493596711 ps
T135 /workspace/coverage/default/6.sram_ctrl_stress_all.2741803705 Aug 11 05:37:05 PM PDT 24 Aug 11 07:01:00 PM PDT 24 200170221492 ps
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