Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.98 99.16 94.27 99.72 100.00 95.95 99.12 97.62


Total tests in report: 1029
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
72.45 72.45 91.86 91.86 72.99 72.99 86.13 86.13 23.81 23.81 82.37 82.37 93.51 93.51 56.49 56.49 /workspace/coverage/default/9.sram_ctrl_stress_all.2908442068
88.29 15.84 96.53 4.66 84.36 11.37 95.60 9.47 71.43 47.62 89.86 7.49 96.17 2.65 84.10 27.61 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3415704387
91.76 3.47 97.54 1.02 85.19 0.83 97.33 1.73 90.48 19.05 91.55 1.69 96.17 0.00 84.10 0.00 /workspace/coverage/default/44.sram_ctrl_mem_walk.3926550216
94.43 2.66 98.73 1.19 87.56 2.37 97.68 0.35 100.00 9.52 94.20 2.66 96.17 0.00 86.65 2.56 /workspace/coverage/default/22.sram_ctrl_stress_all.66031873
95.32 0.90 99.07 0.34 89.57 2.01 98.65 0.97 100.00 0.00 95.65 1.45 96.76 0.59 87.57 0.91 /workspace/coverage/default/1.sram_ctrl_sec_cm.762644011
96.05 0.73 99.07 0.00 89.93 0.36 98.65 0.00 100.00 0.00 95.65 0.00 96.76 0.00 92.32 4.75 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.3725403549
96.41 0.36 99.07 0.00 89.93 0.00 98.65 0.00 100.00 0.00 95.65 0.00 96.90 0.15 94.70 2.38 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3784601640
96.70 0.29 99.07 0.00 90.17 0.24 98.72 0.07 100.00 0.00 95.65 0.00 98.23 1.33 95.06 0.37 /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.3198620969
96.88 0.18 99.07 0.00 90.17 0.00 98.72 0.00 100.00 0.00 95.65 0.00 99.12 0.88 95.43 0.37 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3390061035
97.02 0.15 99.15 0.08 90.17 0.00 99.65 0.94 100.00 0.00 95.65 0.00 99.12 0.00 95.43 0.00 /workspace/coverage/default/23.sram_ctrl_ram_cfg.2033007389
97.13 0.10 99.15 0.00 90.17 0.00 99.65 0.00 100.00 0.00 95.65 0.00 99.12 0.00 96.16 0.73 /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.3073714457
97.21 0.09 99.15 0.00 90.40 0.24 99.65 0.00 100.00 0.00 95.65 0.00 99.12 0.00 96.53 0.37 /workspace/coverage/default/11.sram_ctrl_lc_escalation.171897652
97.30 0.09 99.15 0.00 90.52 0.12 99.65 0.00 100.00 0.00 96.14 0.48 99.12 0.00 96.53 0.00 /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.378223627
97.36 0.06 99.15 0.00 90.88 0.36 99.72 0.07 100.00 0.00 96.14 0.00 99.12 0.00 96.53 0.00 /workspace/coverage/default/20.sram_ctrl_alert_test.650273853
97.41 0.05 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.89 0.37 /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.722303470
97.47 0.05 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.26 0.37 /workspace/coverage/default/9.sram_ctrl_executable.1728834142
97.49 0.03 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.18 /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1980145389
97.52 0.03 99.15 0.00 90.88 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.62 0.18 /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.990185051
97.53 0.02 99.15 0.00 91.00 0.12 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.62 0.00 /workspace/coverage/default/12.sram_ctrl_lc_escalation.2793626896

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.3120364094
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.694379716
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.429374222
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.4034512254
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.2409332410
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1277252363
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.1928724144
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.1163693583
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.603453056
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.29174253
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1046212735
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2670329540
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.3722307429
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.3556620953
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.88975380
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.3932232076
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.1255220
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3800821938
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.4140944138
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.3752149996
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.1957531800
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.1475270777
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.1729147245
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.3942341651
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1456031581
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.4216907636
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.331445793
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.3796405193
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.224156075
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.873584961
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.1274239710
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.2794776779
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2480864267
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.1732922462
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.6925397
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.573012149
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.854304867
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.105688615
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3460288410
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.3641154627
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.372903211
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2185475016
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.4204678726
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.3780267615
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.4164133480
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.3994448051
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.4230788654
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2813694591
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.4215179675
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3703129606
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3866842880
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.1352922488
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.1081510359
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2236494085
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.692368594
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3815959466
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.2374502264
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.949606983
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.516465371
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.3467217816
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.3986939134
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.2794429090
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.631313471
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.3047484778
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.3400653527
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1805399151
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.2164735136
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1799459515
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.3359088996
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.1398014791
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.3895658889
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.3574015818
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.3523649870
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.1546896839
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.1107156700
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.1809452403
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.4294745177
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.928233408
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.3004536756
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.45609977
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.1683481806
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.518620880
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.1943818209
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.1622837166
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.1344987567
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.562347359
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1086596257
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.3134833660
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2458662898
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.3578064630
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.2294990594
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.525063989
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.3700598420
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3526942359
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.1302251141
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.3586429276
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.1352454633
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.2171127946
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.244975940
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.2769468395
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.47002880
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.1115819937
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.3740987108
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.2751438865
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3817893641
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.4038588173
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.1987221982
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.315089590
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.2058768087
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.954899918
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.902628372
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.559957245
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.3765153133
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.4065657656
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.3635636662
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.3498305810
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.3710377326
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2784864510
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.3356346372
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2684618915
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.3361666799
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.1238533816
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.2782670703
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.1966629017
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2826076330
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.3110661957
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.1279028213
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.2538174051
/workspace/coverage/default/0.sram_ctrl_alert_test.1048215819
/workspace/coverage/default/0.sram_ctrl_bijection.1126422151
/workspace/coverage/default/0.sram_ctrl_executable.3596080454
/workspace/coverage/default/0.sram_ctrl_lc_escalation.3987699027
/workspace/coverage/default/0.sram_ctrl_max_throughput.2370815598
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1389052864
/workspace/coverage/default/0.sram_ctrl_mem_walk.2704892738
/workspace/coverage/default/0.sram_ctrl_multiple_keys.280633024
/workspace/coverage/default/0.sram_ctrl_partial_access.604247876
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2616552479
/workspace/coverage/default/0.sram_ctrl_ram_cfg.1922325790
/workspace/coverage/default/0.sram_ctrl_regwen.937036701
/workspace/coverage/default/0.sram_ctrl_sec_cm.460560975
/workspace/coverage/default/0.sram_ctrl_smoke.3944724640
/workspace/coverage/default/0.sram_ctrl_stress_all.2553677976
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.2408394012
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.3224919176
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.3155368730
/workspace/coverage/default/1.sram_ctrl_alert_test.3162688668
/workspace/coverage/default/1.sram_ctrl_bijection.4104287986
/workspace/coverage/default/1.sram_ctrl_executable.3395214315
/workspace/coverage/default/1.sram_ctrl_lc_escalation.4261940346
/workspace/coverage/default/1.sram_ctrl_max_throughput.894702517
/workspace/coverage/default/1.sram_ctrl_mem_walk.1724913547
/workspace/coverage/default/1.sram_ctrl_multiple_keys.1762860000
/workspace/coverage/default/1.sram_ctrl_partial_access.2768661027
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.2267955951
/workspace/coverage/default/1.sram_ctrl_ram_cfg.4172456472
/workspace/coverage/default/1.sram_ctrl_regwen.3516341509
/workspace/coverage/default/1.sram_ctrl_smoke.3098211225
/workspace/coverage/default/1.sram_ctrl_stress_all.1614383412
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.2344176944
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.2104115117
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2143078000
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.199867133
/workspace/coverage/default/10.sram_ctrl_alert_test.1238995512
/workspace/coverage/default/10.sram_ctrl_bijection.636652928
/workspace/coverage/default/10.sram_ctrl_executable.1938568996
/workspace/coverage/default/10.sram_ctrl_lc_escalation.837839263
/workspace/coverage/default/10.sram_ctrl_max_throughput.352337994
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.850423104
/workspace/coverage/default/10.sram_ctrl_mem_walk.1469791875
/workspace/coverage/default/10.sram_ctrl_multiple_keys.2599550261
/workspace/coverage/default/10.sram_ctrl_partial_access.3717894614
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.3091938790
/workspace/coverage/default/10.sram_ctrl_ram_cfg.4058724006
/workspace/coverage/default/10.sram_ctrl_regwen.926920618
/workspace/coverage/default/10.sram_ctrl_smoke.529820951
/workspace/coverage/default/10.sram_ctrl_stress_all.2737664119
/workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.1708123493
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.1004100543
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.345141171
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.2796681809
/workspace/coverage/default/11.sram_ctrl_alert_test.95229263
/workspace/coverage/default/11.sram_ctrl_bijection.3779701424
/workspace/coverage/default/11.sram_ctrl_executable.3577441068
/workspace/coverage/default/11.sram_ctrl_max_throughput.1172753017
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3672768401
/workspace/coverage/default/11.sram_ctrl_mem_walk.2003924740
/workspace/coverage/default/11.sram_ctrl_multiple_keys.572769788
/workspace/coverage/default/11.sram_ctrl_partial_access.1054827104
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.1699284014
/workspace/coverage/default/11.sram_ctrl_ram_cfg.3491250945
/workspace/coverage/default/11.sram_ctrl_regwen.1865323721
/workspace/coverage/default/11.sram_ctrl_smoke.2964129855
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.2440380964
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.516061490
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2810020826
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.229286254
/workspace/coverage/default/12.sram_ctrl_alert_test.405940692
/workspace/coverage/default/12.sram_ctrl_bijection.4012359768
/workspace/coverage/default/12.sram_ctrl_executable.2082135676
/workspace/coverage/default/12.sram_ctrl_max_throughput.3286892104
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.2018541499
/workspace/coverage/default/12.sram_ctrl_mem_walk.2524130878
/workspace/coverage/default/12.sram_ctrl_multiple_keys.2188822425
/workspace/coverage/default/12.sram_ctrl_partial_access.3508321687
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.3161590267
/workspace/coverage/default/12.sram_ctrl_ram_cfg.714536720
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/workspace/coverage/default/43.sram_ctrl_executable.2203800460
/workspace/coverage/default/43.sram_ctrl_lc_escalation.1251784430
/workspace/coverage/default/43.sram_ctrl_max_throughput.4135064534
/workspace/coverage/default/43.sram_ctrl_mem_partial_access.1300953283
/workspace/coverage/default/43.sram_ctrl_mem_walk.170944819
/workspace/coverage/default/43.sram_ctrl_multiple_keys.3775159139
/workspace/coverage/default/43.sram_ctrl_partial_access.1855010873
/workspace/coverage/default/43.sram_ctrl_partial_access_b2b.3154349899
/workspace/coverage/default/43.sram_ctrl_ram_cfg.2357474225
/workspace/coverage/default/43.sram_ctrl_regwen.1241139469
/workspace/coverage/default/43.sram_ctrl_smoke.961035793
/workspace/coverage/default/43.sram_ctrl_stress_all.3545072608
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.2537380391
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.1975831348
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.161225830
/workspace/coverage/default/44.sram_ctrl_alert_test.4116737154
/workspace/coverage/default/44.sram_ctrl_bijection.3445495683
/workspace/coverage/default/44.sram_ctrl_executable.186537215
/workspace/coverage/default/44.sram_ctrl_lc_escalation.481770599
/workspace/coverage/default/44.sram_ctrl_max_throughput.4116390559
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.1150678641
/workspace/coverage/default/44.sram_ctrl_multiple_keys.3903947687
/workspace/coverage/default/44.sram_ctrl_partial_access.1120535822
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3324541899
/workspace/coverage/default/44.sram_ctrl_ram_cfg.1009722680
/workspace/coverage/default/44.sram_ctrl_regwen.1247707335
/workspace/coverage/default/44.sram_ctrl_smoke.4112785395
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2785503097
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.3361033445
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3540730812
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.1229541393
/workspace/coverage/default/45.sram_ctrl_alert_test.4198318056
/workspace/coverage/default/45.sram_ctrl_bijection.3343194931
/workspace/coverage/default/45.sram_ctrl_executable.3335665871
/workspace/coverage/default/45.sram_ctrl_lc_escalation.3768771689
/workspace/coverage/default/45.sram_ctrl_max_throughput.1224721598
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.53071059
/workspace/coverage/default/45.sram_ctrl_mem_walk.445881751
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3781815572
/workspace/coverage/default/45.sram_ctrl_partial_access.2693537222
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.2264768652
/workspace/coverage/default/45.sram_ctrl_ram_cfg.737713236
/workspace/coverage/default/45.sram_ctrl_regwen.2348793588
/workspace/coverage/default/45.sram_ctrl_smoke.1332527033
/workspace/coverage/default/45.sram_ctrl_stress_all.1661210720
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.2506155184
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.1916543860
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1467372400
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.3729463801
/workspace/coverage/default/46.sram_ctrl_alert_test.2710731286
/workspace/coverage/default/46.sram_ctrl_bijection.3457818478
/workspace/coverage/default/46.sram_ctrl_executable.2882746211
/workspace/coverage/default/46.sram_ctrl_lc_escalation.1721774180
/workspace/coverage/default/46.sram_ctrl_max_throughput.3537229935
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3977773758
/workspace/coverage/default/46.sram_ctrl_mem_walk.4107602731
/workspace/coverage/default/46.sram_ctrl_multiple_keys.2837743337
/workspace/coverage/default/46.sram_ctrl_partial_access.799306477
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.908390262
/workspace/coverage/default/46.sram_ctrl_ram_cfg.864597532
/workspace/coverage/default/46.sram_ctrl_regwen.3848529509
/workspace/coverage/default/46.sram_ctrl_smoke.435030717
/workspace/coverage/default/46.sram_ctrl_stress_all.2231725877
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.599806264
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.367231936
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.2808396495
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.1510854481
/workspace/coverage/default/47.sram_ctrl_alert_test.1456758450
/workspace/coverage/default/47.sram_ctrl_bijection.992967199
/workspace/coverage/default/47.sram_ctrl_executable.2060261232
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2137967355
/workspace/coverage/default/47.sram_ctrl_max_throughput.3528007440
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.1063965684
/workspace/coverage/default/47.sram_ctrl_mem_walk.4155138423
/workspace/coverage/default/47.sram_ctrl_multiple_keys.3633208084
/workspace/coverage/default/47.sram_ctrl_partial_access.2820839880
/workspace/coverage/default/47.sram_ctrl_partial_access_b2b.2560811453
/workspace/coverage/default/47.sram_ctrl_ram_cfg.3933659572
/workspace/coverage/default/47.sram_ctrl_regwen.4023122866
/workspace/coverage/default/47.sram_ctrl_smoke.2331513260
/workspace/coverage/default/47.sram_ctrl_stress_all.839158535
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.775708314
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.677371922
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.2469288749
/workspace/coverage/default/48.sram_ctrl_alert_test.3273068403
/workspace/coverage/default/48.sram_ctrl_bijection.2529570072
/workspace/coverage/default/48.sram_ctrl_executable.2775173272
/workspace/coverage/default/48.sram_ctrl_lc_escalation.2481540989
/workspace/coverage/default/48.sram_ctrl_max_throughput.2717454306
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2920172632
/workspace/coverage/default/48.sram_ctrl_mem_walk.229297677
/workspace/coverage/default/48.sram_ctrl_multiple_keys.151256089
/workspace/coverage/default/48.sram_ctrl_partial_access.1485641081
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.683023311
/workspace/coverage/default/48.sram_ctrl_ram_cfg.628670008
/workspace/coverage/default/48.sram_ctrl_regwen.2521981214
/workspace/coverage/default/48.sram_ctrl_smoke.755558446
/workspace/coverage/default/48.sram_ctrl_stress_all.3276772706
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.849971229
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.14289187
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.3004725292
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.2509608577
/workspace/coverage/default/49.sram_ctrl_alert_test.1432901966
/workspace/coverage/default/49.sram_ctrl_bijection.2212058009
/workspace/coverage/default/49.sram_ctrl_executable.3143491582
/workspace/coverage/default/49.sram_ctrl_lc_escalation.1619413871
/workspace/coverage/default/49.sram_ctrl_max_throughput.805726219
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2942396895
/workspace/coverage/default/49.sram_ctrl_mem_walk.1400714091
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1659545489
/workspace/coverage/default/49.sram_ctrl_partial_access.1413750811
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1174859313
/workspace/coverage/default/49.sram_ctrl_ram_cfg.788604239
/workspace/coverage/default/49.sram_ctrl_regwen.1759286600
/workspace/coverage/default/49.sram_ctrl_smoke.2217503624
/workspace/coverage/default/49.sram_ctrl_stress_all.3211759526
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.4124377436
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.1873955266
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.886471957
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.347756425
/workspace/coverage/default/5.sram_ctrl_alert_test.1076415874
/workspace/coverage/default/5.sram_ctrl_bijection.4229094552
/workspace/coverage/default/5.sram_ctrl_executable.2096240880
/workspace/coverage/default/5.sram_ctrl_lc_escalation.3630593936
/workspace/coverage/default/5.sram_ctrl_max_throughput.2970472542
/workspace/coverage/default/5.sram_ctrl_mem_partial_access.3906924948
/workspace/coverage/default/5.sram_ctrl_mem_walk.4010320623
/workspace/coverage/default/5.sram_ctrl_multiple_keys.3961511284
/workspace/coverage/default/5.sram_ctrl_partial_access.927775497
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.1057570361
/workspace/coverage/default/5.sram_ctrl_ram_cfg.2116524451
/workspace/coverage/default/5.sram_ctrl_regwen.3263806487
/workspace/coverage/default/5.sram_ctrl_smoke.2188432947
/workspace/coverage/default/5.sram_ctrl_stress_all.1631284920
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3110714965
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3470297102
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3685950018
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2705913819
/workspace/coverage/default/6.sram_ctrl_alert_test.3197591248
/workspace/coverage/default/6.sram_ctrl_bijection.2892972654
/workspace/coverage/default/6.sram_ctrl_executable.1249039528
/workspace/coverage/default/6.sram_ctrl_lc_escalation.2125175351
/workspace/coverage/default/6.sram_ctrl_max_throughput.3709292664
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.785252271
/workspace/coverage/default/6.sram_ctrl_mem_walk.603169943
/workspace/coverage/default/6.sram_ctrl_multiple_keys.2769685834
/workspace/coverage/default/6.sram_ctrl_partial_access.3820293731
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.3333507751
/workspace/coverage/default/6.sram_ctrl_ram_cfg.2023114563
/workspace/coverage/default/6.sram_ctrl_regwen.405611049
/workspace/coverage/default/6.sram_ctrl_smoke.526843950
/workspace/coverage/default/6.sram_ctrl_stress_all.2553099258
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3679487850
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.4208659310
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4196929741
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1911493348
/workspace/coverage/default/7.sram_ctrl_alert_test.1171072848
/workspace/coverage/default/7.sram_ctrl_bijection.3181711861
/workspace/coverage/default/7.sram_ctrl_executable.1310456310
/workspace/coverage/default/7.sram_ctrl_lc_escalation.2258093736
/workspace/coverage/default/7.sram_ctrl_max_throughput.1648638265
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.752487193
/workspace/coverage/default/7.sram_ctrl_mem_walk.4065754956
/workspace/coverage/default/7.sram_ctrl_multiple_keys.2249390384
/workspace/coverage/default/7.sram_ctrl_partial_access.3493821660
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2616709266
/workspace/coverage/default/7.sram_ctrl_ram_cfg.244672154
/workspace/coverage/default/7.sram_ctrl_regwen.1453887711
/workspace/coverage/default/7.sram_ctrl_smoke.1005586815
/workspace/coverage/default/7.sram_ctrl_stress_all.2529830136
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2249954953
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3596282473
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.3783006253
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.3648181853
/workspace/coverage/default/8.sram_ctrl_alert_test.512612673
/workspace/coverage/default/8.sram_ctrl_bijection.3721090383
/workspace/coverage/default/8.sram_ctrl_executable.2179803323
/workspace/coverage/default/8.sram_ctrl_lc_escalation.3618129427
/workspace/coverage/default/8.sram_ctrl_max_throughput.46048320
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.2739989608
/workspace/coverage/default/8.sram_ctrl_mem_walk.610187108
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3371982405
/workspace/coverage/default/8.sram_ctrl_partial_access.938533539
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2153115345
/workspace/coverage/default/8.sram_ctrl_ram_cfg.588485618
/workspace/coverage/default/8.sram_ctrl_regwen.314615021
/workspace/coverage/default/8.sram_ctrl_smoke.3984959259
/workspace/coverage/default/8.sram_ctrl_stress_all.751560129
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.3669990040
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.516806073
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.440086468
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.1735679147
/workspace/coverage/default/9.sram_ctrl_alert_test.14920272
/workspace/coverage/default/9.sram_ctrl_bijection.3908297928
/workspace/coverage/default/9.sram_ctrl_lc_escalation.422517683
/workspace/coverage/default/9.sram_ctrl_max_throughput.1149810028
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1183041583
/workspace/coverage/default/9.sram_ctrl_mem_walk.1647745536
/workspace/coverage/default/9.sram_ctrl_multiple_keys.1498577059
/workspace/coverage/default/9.sram_ctrl_partial_access.1640551995
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2115650433
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2379034329
/workspace/coverage/default/9.sram_ctrl_regwen.3090900684
/workspace/coverage/default/9.sram_ctrl_smoke.153935855
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.2406930165
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.3805664703
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.2113683121



Total test records in report: 1029
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.1174859313 Aug 12 04:52:57 PM PDT 24 Aug 12 05:02:41 PM PDT 24 85617951030 ps
T2 /workspace/coverage/default/30.sram_ctrl_bijection.3086998250 Aug 12 04:49:34 PM PDT 24 Aug 12 04:50:08 PM PDT 24 1669151571 ps
T3 /workspace/coverage/default/16.sram_ctrl_bijection.3390990360 Aug 12 04:47:58 PM PDT 24 Aug 12 04:49:10 PM PDT 24 1101867461 ps
T4 /workspace/coverage/default/9.sram_ctrl_stress_all.2908442068 Aug 12 04:47:30 PM PDT 24 Aug 12 06:12:31 PM PDT 24 644194710294 ps
T5 /workspace/coverage/default/0.sram_ctrl_regwen.937036701 Aug 12 04:46:55 PM PDT 24 Aug 12 05:06:06 PM PDT 24 13752950524 ps
T9 /workspace/coverage/default/46.sram_ctrl_smoke.435030717 Aug 12 04:52:23 PM PDT 24 Aug 12 04:53:17 PM PDT 24 1916017483 ps
T10 /workspace/coverage/default/9.sram_ctrl_regwen.3090900684 Aug 12 04:47:31 PM PDT 24 Aug 12 04:56:45 PM PDT 24 35924652913 ps
T11 /workspace/coverage/default/22.sram_ctrl_smoke.629440309 Aug 12 04:48:35 PM PDT 24 Aug 12 04:48:43 PM PDT 24 1200988066 ps
T12 /workspace/coverage/default/46.sram_ctrl_alert_test.2710731286 Aug 12 04:52:36 PM PDT 24 Aug 12 04:52:36 PM PDT 24 40205907 ps
T13 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2664941952 Aug 12 04:47:44 PM PDT 24 Aug 12 04:53:52 PM PDT 24 5695779870 ps
T40 /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.2143078000 Aug 12 04:46:59 PM PDT 24 Aug 12 04:47:48 PM PDT 24 309153500 ps
T14 /workspace/coverage/default/33.sram_ctrl_alert_test.2036474888 Aug 12 04:50:12 PM PDT 24 Aug 12 04:50:12 PM PDT 24 48562092 ps
T41 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3784601640 Aug 12 04:48:54 PM PDT 24 Aug 12 04:53:43 PM PDT 24 148175867387 ps
T42 /workspace/coverage/default/25.sram_ctrl_smoke.2304846556 Aug 12 04:48:54 PM PDT 24 Aug 12 04:51:11 PM PDT 24 468020149 ps
T46 /workspace/coverage/default/44.sram_ctrl_mem_walk.3926550216 Aug 12 04:52:10 PM PDT 24 Aug 12 04:52:22 PM PDT 24 4345322234 ps
T57 /workspace/coverage/default/46.sram_ctrl_stress_pipeline.367231936 Aug 12 04:52:29 PM PDT 24 Aug 12 04:58:47 PM PDT 24 15893815503 ps
T58 /workspace/coverage/default/41.sram_ctrl_executable.1913040938 Aug 12 04:51:40 PM PDT 24 Aug 12 05:03:17 PM PDT 24 1489103818 ps
T59 /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.2223202937 Aug 12 04:49:53 PM PDT 24 Aug 12 04:56:14 PM PDT 24 29281030375 ps
T47 /workspace/coverage/default/4.sram_ctrl_mem_partial_access.1844877427 Aug 12 04:47:13 PM PDT 24 Aug 12 04:47:19 PM PDT 24 174119937 ps
T26 /workspace/coverage/default/23.sram_ctrl_ram_cfg.2033007389 Aug 12 04:48:40 PM PDT 24 Aug 12 04:48:41 PM PDT 24 93943987 ps
T48 /workspace/coverage/default/11.sram_ctrl_mem_walk.2003924740 Aug 12 04:47:35 PM PDT 24 Aug 12 04:47:46 PM PDT 24 864435011 ps
T20 /workspace/coverage/default/23.sram_ctrl_regwen.3253789625 Aug 12 04:48:40 PM PDT 24 Aug 12 04:59:52 PM PDT 24 2445633945 ps
T60 /workspace/coverage/default/3.sram_ctrl_smoke.1409517014 Aug 12 04:47:10 PM PDT 24 Aug 12 04:47:40 PM PDT 24 88276072 ps
T61 /workspace/coverage/default/19.sram_ctrl_bijection.1305179675 Aug 12 04:48:15 PM PDT 24 Aug 12 04:48:51 PM PDT 24 701120181 ps
T43 /workspace/coverage/default/16.sram_ctrl_access_during_key_req.3075520448 Aug 12 04:47:57 PM PDT 24 Aug 12 05:07:40 PM PDT 24 5978124125 ps
T67 /workspace/coverage/default/24.sram_ctrl_stress_pipeline.3068641559 Aug 12 04:48:46 PM PDT 24 Aug 12 04:52:03 PM PDT 24 2114185018 ps
T6 /workspace/coverage/default/36.sram_ctrl_lc_escalation.653615604 Aug 12 04:50:36 PM PDT 24 Aug 12 04:50:41 PM PDT 24 499381054 ps
T44 /workspace/coverage/default/1.sram_ctrl_access_during_key_req.3155368730 Aug 12 04:47:00 PM PDT 24 Aug 12 04:59:28 PM PDT 24 8813934722 ps
T142 /workspace/coverage/default/47.sram_ctrl_max_throughput.3528007440 Aug 12 04:52:38 PM PDT 24 Aug 12 04:53:16 PM PDT 24 363233955 ps
T52 /workspace/coverage/default/8.sram_ctrl_mem_partial_access.2739989608 Aug 12 04:47:32 PM PDT 24 Aug 12 04:47:37 PM PDT 24 191953700 ps
T27 /workspace/coverage/default/30.sram_ctrl_ram_cfg.612677716 Aug 12 04:49:35 PM PDT 24 Aug 12 04:49:36 PM PDT 24 228276069 ps
T54 /workspace/coverage/default/32.sram_ctrl_mem_walk.1711624874 Aug 12 04:50:03 PM PDT 24 Aug 12 04:50:13 PM PDT 24 2724896752 ps
T141 /workspace/coverage/default/14.sram_ctrl_bijection.614532377 Aug 12 04:47:45 PM PDT 24 Aug 12 04:48:38 PM PDT 24 6798426812 ps
T23 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3415704387 Aug 12 04:46:53 PM PDT 24 Aug 12 04:48:27 PM PDT 24 3585019795 ps
T81 /workspace/coverage/default/5.sram_ctrl_executable.2096240880 Aug 12 04:47:19 PM PDT 24 Aug 12 05:02:11 PM PDT 24 2842359587 ps
T71 /workspace/coverage/default/7.sram_ctrl_regwen.1453887711 Aug 12 04:47:22 PM PDT 24 Aug 12 05:04:02 PM PDT 24 148618140435 ps
T82 /workspace/coverage/default/12.sram_ctrl_partial_access.3508321687 Aug 12 04:47:36 PM PDT 24 Aug 12 04:48:34 PM PDT 24 183913766 ps
T83 /workspace/coverage/default/49.sram_ctrl_stress_pipeline.1873955266 Aug 12 04:53:01 PM PDT 24 Aug 12 04:56:28 PM PDT 24 4448223786 ps
T75 /workspace/coverage/default/28.sram_ctrl_regwen.3541115474 Aug 12 04:49:26 PM PDT 24 Aug 12 04:50:36 PM PDT 24 3030133470 ps
T15 /workspace/coverage/default/35.sram_ctrl_alert_test.1631419395 Aug 12 04:50:36 PM PDT 24 Aug 12 04:50:36 PM PDT 24 14129805 ps
T84 /workspace/coverage/default/7.sram_ctrl_multiple_keys.2249390384 Aug 12 04:47:21 PM PDT 24 Aug 12 05:06:31 PM PDT 24 43420681877 ps
T85 /workspace/coverage/default/23.sram_ctrl_partial_access.26502832 Aug 12 04:48:40 PM PDT 24 Aug 12 04:48:55 PM PDT 24 1656226982 ps
T7 /workspace/coverage/default/11.sram_ctrl_lc_escalation.171897652 Aug 12 04:47:37 PM PDT 24 Aug 12 04:47:45 PM PDT 24 636039120 ps
T21 /workspace/coverage/default/43.sram_ctrl_regwen.1241139469 Aug 12 04:52:35 PM PDT 24 Aug 12 04:58:38 PM PDT 24 120134088721 ps
T111 /workspace/coverage/default/43.sram_ctrl_stress_pipeline.2537380391 Aug 12 04:51:55 PM PDT 24 Aug 12 04:53:32 PM PDT 24 3685095454 ps
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T112 /workspace/coverage/default/29.sram_ctrl_stress_pipeline.2607596788 Aug 12 04:49:27 PM PDT 24 Aug 12 04:53:24 PM PDT 24 12025817158 ps
T113 /workspace/coverage/default/10.sram_ctrl_stress_pipeline.1004100543 Aug 12 04:47:30 PM PDT 24 Aug 12 04:53:21 PM PDT 24 3650377278 ps
T96 /workspace/coverage/default/5.sram_ctrl_access_during_key_req.347756425 Aug 12 04:47:15 PM PDT 24 Aug 12 04:55:47 PM PDT 24 2000309020 ps
T8 /workspace/coverage/default/8.sram_ctrl_lc_escalation.3618129427 Aug 12 04:47:25 PM PDT 24 Aug 12 04:47:32 PM PDT 24 693871887 ps
T144 /workspace/coverage/default/1.sram_ctrl_executable.3395214315 Aug 12 04:47:00 PM PDT 24 Aug 12 04:55:14 PM PDT 24 4963424156 ps
T19 /workspace/coverage/default/39.sram_ctrl_lc_escalation.4072106245 Aug 12 04:51:10 PM PDT 24 Aug 12 04:51:17 PM PDT 24 1172807894 ps
T145 /workspace/coverage/default/27.sram_ctrl_partial_access.2053541502 Aug 12 04:49:05 PM PDT 24 Aug 12 04:49:07 PM PDT 24 33530753 ps
T140 /workspace/coverage/default/29.sram_ctrl_bijection.3960696839 Aug 12 04:49:26 PM PDT 24 Aug 12 04:49:56 PM PDT 24 1003846261 ps
T97 /workspace/coverage/default/29.sram_ctrl_access_during_key_req.963460161 Aug 12 04:49:27 PM PDT 24 Aug 12 05:09:09 PM PDT 24 9175618003 ps
T24 /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.2822963907 Aug 12 04:48:17 PM PDT 24 Aug 12 04:49:33 PM PDT 24 8622231857 ps
T22 /workspace/coverage/default/20.sram_ctrl_lc_escalation.2474901774 Aug 12 04:48:24 PM PDT 24 Aug 12 04:48:28 PM PDT 24 430620285 ps
T146 /workspace/coverage/default/7.sram_ctrl_max_throughput.1648638265 Aug 12 04:47:20 PM PDT 24 Aug 12 04:47:25 PM PDT 24 168599970 ps
T98 /workspace/coverage/default/1.sram_ctrl_mem_partial_access.3390061035 Aug 12 04:46:57 PM PDT 24 Aug 12 04:47:00 PM PDT 24 114554148 ps
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T148 /workspace/coverage/default/8.sram_ctrl_smoke.3984959259 Aug 12 04:47:25 PM PDT 24 Aug 12 04:47:45 PM PDT 24 998893642 ps
T149 /workspace/coverage/default/46.sram_ctrl_bijection.3457818478 Aug 12 04:52:29 PM PDT 24 Aug 12 04:52:58 PM PDT 24 5714702507 ps
T150 /workspace/coverage/default/44.sram_ctrl_max_throughput.4116390559 Aug 12 04:52:09 PM PDT 24 Aug 12 04:52:14 PM PDT 24 194658359 ps
T151 /workspace/coverage/default/19.sram_ctrl_partial_access.745398138 Aug 12 04:48:17 PM PDT 24 Aug 12 04:50:59 PM PDT 24 2588999527 ps
T152 /workspace/coverage/default/40.sram_ctrl_max_throughput.2536048835 Aug 12 04:51:20 PM PDT 24 Aug 12 04:53:41 PM PDT 24 129533518 ps
T28 /workspace/coverage/default/20.sram_ctrl_ram_cfg.63928656 Aug 12 04:48:24 PM PDT 24 Aug 12 04:48:25 PM PDT 24 27466588 ps
T153 /workspace/coverage/default/38.sram_ctrl_ram_cfg.3622770666 Aug 12 04:51:04 PM PDT 24 Aug 12 04:51:05 PM PDT 24 90827058 ps
T154 /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.4156668918 Aug 12 04:50:16 PM PDT 24 Aug 12 04:51:10 PM PDT 24 116406203 ps
T155 /workspace/coverage/default/24.sram_ctrl_partial_access.2559921091 Aug 12 04:48:47 PM PDT 24 Aug 12 04:49:22 PM PDT 24 2101510702 ps
T136 /workspace/coverage/default/46.sram_ctrl_executable.2882746211 Aug 12 04:52:30 PM PDT 24 Aug 12 05:03:47 PM PDT 24 13554617539 ps
T56 /workspace/coverage/default/1.sram_ctrl_mem_walk.1724913547 Aug 12 04:47:00 PM PDT 24 Aug 12 04:47:10 PM PDT 24 687532008 ps
T25 /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.1870319809 Aug 12 04:50:56 PM PDT 24 Aug 12 04:53:12 PM PDT 24 5543693474 ps
T156 /workspace/coverage/default/26.sram_ctrl_ram_cfg.1166909378 Aug 12 04:49:11 PM PDT 24 Aug 12 04:49:12 PM PDT 24 37653541 ps
T157 /workspace/coverage/default/44.sram_ctrl_bijection.3445495683 Aug 12 04:52:02 PM PDT 24 Aug 12 04:52:23 PM PDT 24 694700444 ps
T99 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.2159502650 Aug 12 04:48:46 PM PDT 24 Aug 12 05:04:48 PM PDT 24 13228844032 ps
T158 /workspace/coverage/default/12.sram_ctrl_lc_escalation.2793626896 Aug 12 04:47:39 PM PDT 24 Aug 12 04:47:44 PM PDT 24 767256947 ps
T159 /workspace/coverage/default/45.sram_ctrl_ram_cfg.737713236 Aug 12 04:52:23 PM PDT 24 Aug 12 04:52:24 PM PDT 24 84134811 ps
T62 /workspace/coverage/default/49.sram_ctrl_mem_partial_access.2942396895 Aug 12 04:53:05 PM PDT 24 Aug 12 04:53:11 PM PDT 24 396702583 ps
T160 /workspace/coverage/default/3.sram_ctrl_bijection.1143855989 Aug 12 04:47:08 PM PDT 24 Aug 12 04:47:46 PM PDT 24 1166975407 ps
T161 /workspace/coverage/default/49.sram_ctrl_bijection.2212058009 Aug 12 04:52:57 PM PDT 24 Aug 12 04:54:07 PM PDT 24 4044125649 ps
T133 /workspace/coverage/default/4.sram_ctrl_executable.1067645006 Aug 12 04:47:13 PM PDT 24 Aug 12 05:06:17 PM PDT 24 16250856021 ps
T162 /workspace/coverage/default/5.sram_ctrl_stress_pipeline.3470297102 Aug 12 04:47:16 PM PDT 24 Aug 12 04:51:45 PM PDT 24 5690444878 ps
T163 /workspace/coverage/default/34.sram_ctrl_smoke.2538785541 Aug 12 04:50:17 PM PDT 24 Aug 12 04:50:35 PM PDT 24 959068162 ps
T164 /workspace/coverage/default/5.sram_ctrl_mem_walk.4010320623 Aug 12 04:47:16 PM PDT 24 Aug 12 04:47:23 PM PDT 24 908286191 ps
T165 /workspace/coverage/default/22.sram_ctrl_executable.3780336388 Aug 12 04:48:41 PM PDT 24 Aug 12 05:00:47 PM PDT 24 1973309412 ps
T166 /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.3525977810 Aug 12 04:47:50 PM PDT 24 Aug 12 04:49:27 PM PDT 24 512790549 ps
T138 /workspace/coverage/default/10.sram_ctrl_regwen.926920618 Aug 12 04:47:32 PM PDT 24 Aug 12 04:50:24 PM PDT 24 24070124376 ps
T167 /workspace/coverage/default/27.sram_ctrl_stress_pipeline.3311279783 Aug 12 04:49:06 PM PDT 24 Aug 12 04:52:00 PM PDT 24 9448403390 ps
T168 /workspace/coverage/default/37.sram_ctrl_max_throughput.1728232153 Aug 12 04:50:50 PM PDT 24 Aug 12 04:50:57 PM PDT 24 166641897 ps
T137 /workspace/coverage/default/6.sram_ctrl_stress_all.2553099258 Aug 12 04:47:23 PM PDT 24 Aug 12 05:17:37 PM PDT 24 30361017910 ps
T169 /workspace/coverage/default/37.sram_ctrl_alert_test.620699736 Aug 12 04:50:59 PM PDT 24 Aug 12 04:50:59 PM PDT 24 40697170 ps
T170 /workspace/coverage/default/29.sram_ctrl_ram_cfg.3243495263 Aug 12 04:49:33 PM PDT 24 Aug 12 04:49:34 PM PDT 24 48040146 ps
T134 /workspace/coverage/default/11.sram_ctrl_executable.3577441068 Aug 12 04:47:38 PM PDT 24 Aug 12 05:14:50 PM PDT 24 63940605031 ps
T171 /workspace/coverage/default/15.sram_ctrl_mem_walk.331675320 Aug 12 04:47:56 PM PDT 24 Aug 12 04:48:02 PM PDT 24 350686055 ps
T172 /workspace/coverage/default/6.sram_ctrl_executable.1249039528 Aug 12 04:47:21 PM PDT 24 Aug 12 04:55:09 PM PDT 24 29902832826 ps
T119 /workspace/coverage/default/22.sram_ctrl_stress_all.66031873 Aug 12 04:48:40 PM PDT 24 Aug 12 05:22:03 PM PDT 24 25139210789 ps
T173 /workspace/coverage/default/8.sram_ctrl_partial_access.938533539 Aug 12 04:47:23 PM PDT 24 Aug 12 04:47:35 PM PDT 24 1056938219 ps
T174 /workspace/coverage/default/1.sram_ctrl_lc_escalation.4261940346 Aug 12 04:47:01 PM PDT 24 Aug 12 04:47:06 PM PDT 24 1288711612 ps
T175 /workspace/coverage/default/44.sram_ctrl_regwen.1247707335 Aug 12 04:52:09 PM PDT 24 Aug 12 05:21:46 PM PDT 24 97256161120 ps
T176 /workspace/coverage/default/32.sram_ctrl_stress_pipeline.1076591417 Aug 12 04:49:46 PM PDT 24 Aug 12 04:54:04 PM PDT 24 2875098813 ps
T177 /workspace/coverage/default/27.sram_ctrl_ram_cfg.2326677132 Aug 12 04:49:16 PM PDT 24 Aug 12 04:49:16 PM PDT 24 28953516 ps
T178 /workspace/coverage/default/10.sram_ctrl_mem_walk.1469791875 Aug 12 04:47:37 PM PDT 24 Aug 12 04:47:48 PM PDT 24 1923338802 ps
T63 /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.2558551022 Aug 12 04:48:41 PM PDT 24 Aug 12 04:51:55 PM PDT 24 2407817683 ps
T179 /workspace/coverage/default/6.sram_ctrl_bijection.2892972654 Aug 12 04:47:17 PM PDT 24 Aug 12 04:48:21 PM PDT 24 3706417278 ps
T180 /workspace/coverage/default/38.sram_ctrl_smoke.3869151762 Aug 12 04:50:56 PM PDT 24 Aug 12 04:51:04 PM PDT 24 1462403610 ps
T64 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.1063965684 Aug 12 04:52:44 PM PDT 24 Aug 12 04:52:47 PM PDT 24 63671319 ps
T181 /workspace/coverage/default/22.sram_ctrl_stress_pipeline.4087095912 Aug 12 04:48:34 PM PDT 24 Aug 12 04:52:07 PM PDT 24 2249511451 ps
T65 /workspace/coverage/default/13.sram_ctrl_mem_partial_access.1608888518 Aug 12 04:47:41 PM PDT 24 Aug 12 04:47:48 PM PDT 24 712877113 ps
T182 /workspace/coverage/default/25.sram_ctrl_alert_test.997579906 Aug 12 04:49:01 PM PDT 24 Aug 12 04:49:01 PM PDT 24 41206109 ps
T183 /workspace/coverage/default/20.sram_ctrl_alert_test.650273853 Aug 12 04:48:25 PM PDT 24 Aug 12 04:48:26 PM PDT 24 17247991 ps
T184 /workspace/coverage/default/25.sram_ctrl_lc_escalation.681058132 Aug 12 04:48:54 PM PDT 24 Aug 12 04:48:57 PM PDT 24 363562529 ps
T185 /workspace/coverage/default/35.sram_ctrl_smoke.501589618 Aug 12 04:50:23 PM PDT 24 Aug 12 04:52:35 PM PDT 24 1179277178 ps
T186 /workspace/coverage/default/38.sram_ctrl_bijection.125743981 Aug 12 04:50:59 PM PDT 24 Aug 12 04:51:34 PM PDT 24 1162604221 ps
T187 /workspace/coverage/default/30.sram_ctrl_mem_partial_access.154116828 Aug 12 04:49:42 PM PDT 24 Aug 12 04:49:45 PM PDT 24 345811667 ps
T188 /workspace/coverage/default/41.sram_ctrl_smoke.1902984119 Aug 12 04:51:36 PM PDT 24 Aug 12 04:51:37 PM PDT 24 138022017 ps
T189 /workspace/coverage/default/7.sram_ctrl_alert_test.1171072848 Aug 12 04:47:23 PM PDT 24 Aug 12 04:47:24 PM PDT 24 23532742 ps
T190 /workspace/coverage/default/36.sram_ctrl_mem_walk.4069979374 Aug 12 04:50:43 PM PDT 24 Aug 12 04:50:49 PM PDT 24 1386488311 ps
T191 /workspace/coverage/default/5.sram_ctrl_partial_access.927775497 Aug 12 04:47:16 PM PDT 24 Aug 12 04:47:22 PM PDT 24 118957735 ps
T192 /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.4141155279 Aug 12 04:49:20 PM PDT 24 Aug 12 04:55:11 PM PDT 24 55233443977 ps
T193 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.1792192669 Aug 12 04:51:42 PM PDT 24 Aug 12 04:52:46 PM PDT 24 125307031 ps
T194 /workspace/coverage/default/9.sram_ctrl_mem_walk.1647745536 Aug 12 04:47:32 PM PDT 24 Aug 12 04:47:38 PM PDT 24 310187422 ps
T66 /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.3110714965 Aug 12 04:47:14 PM PDT 24 Aug 12 04:48:20 PM PDT 24 2924238048 ps
T195 /workspace/coverage/default/15.sram_ctrl_stress_all.975074093 Aug 12 04:47:57 PM PDT 24 Aug 12 05:14:15 PM PDT 24 25844272564 ps
T196 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.2489093936 Aug 12 04:50:56 PM PDT 24 Aug 12 04:55:01 PM PDT 24 6581376952 ps
T120 /workspace/coverage/default/19.sram_ctrl_lc_escalation.3843742393 Aug 12 04:48:17 PM PDT 24 Aug 12 04:48:19 PM PDT 24 152370747 ps
T197 /workspace/coverage/default/20.sram_ctrl_stress_pipeline.2822488036 Aug 12 04:48:19 PM PDT 24 Aug 12 04:53:23 PM PDT 24 13156716489 ps
T198 /workspace/coverage/default/48.sram_ctrl_smoke.755558446 Aug 12 04:52:44 PM PDT 24 Aug 12 04:52:49 PM PDT 24 3746167184 ps
T199 /workspace/coverage/default/2.sram_ctrl_multiple_keys.1764257561 Aug 12 04:47:00 PM PDT 24 Aug 12 05:03:26 PM PDT 24 13222258210 ps
T200 /workspace/coverage/default/6.sram_ctrl_regwen.405611049 Aug 12 04:47:20 PM PDT 24 Aug 12 05:06:16 PM PDT 24 2560112192 ps
T201 /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.269245319 Aug 12 04:51:11 PM PDT 24 Aug 12 04:52:40 PM PDT 24 241088250 ps
T202 /workspace/coverage/default/16.sram_ctrl_partial_access.2799911961 Aug 12 04:47:57 PM PDT 24 Aug 12 04:47:59 PM PDT 24 172330509 ps
T203 /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.3375381161 Aug 12 04:48:40 PM PDT 24 Aug 12 04:53:16 PM PDT 24 18645581511 ps
T204 /workspace/coverage/default/33.sram_ctrl_bijection.1930834468 Aug 12 04:50:02 PM PDT 24 Aug 12 04:51:07 PM PDT 24 1119342690 ps
T205 /workspace/coverage/default/33.sram_ctrl_mem_walk.2450363213 Aug 12 04:50:09 PM PDT 24 Aug 12 04:50:14 PM PDT 24 146628643 ps
T206 /workspace/coverage/default/39.sram_ctrl_multiple_keys.1757893923 Aug 12 04:51:10 PM PDT 24 Aug 12 04:58:42 PM PDT 24 24234204471 ps
T207 /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.3719691582 Aug 12 04:50:18 PM PDT 24 Aug 12 04:57:39 PM PDT 24 33459232855 ps
T208 /workspace/coverage/default/48.sram_ctrl_multiple_keys.151256089 Aug 12 04:52:49 PM PDT 24 Aug 12 04:57:20 PM PDT 24 2443255131 ps
T209 /workspace/coverage/default/39.sram_ctrl_smoke.4212782025 Aug 12 04:51:10 PM PDT 24 Aug 12 04:51:28 PM PDT 24 7443155246 ps
T135 /workspace/coverage/default/13.sram_ctrl_executable.2488001409 Aug 12 04:47:41 PM PDT 24 Aug 12 05:23:28 PM PDT 24 165037245436 ps
T210 /workspace/coverage/default/15.sram_ctrl_regwen.2454549016 Aug 12 04:47:58 PM PDT 24 Aug 12 04:56:54 PM PDT 24 1641399136 ps
T211 /workspace/coverage/default/25.sram_ctrl_stress_pipeline.2835570462 Aug 12 04:48:53 PM PDT 24 Aug 12 04:53:52 PM PDT 24 11540513433 ps
T212 /workspace/coverage/default/5.sram_ctrl_stress_all.1631284920 Aug 12 04:47:14 PM PDT 24 Aug 12 06:25:54 PM PDT 24 119496636148 ps
T213 /workspace/coverage/default/33.sram_ctrl_lc_escalation.165700572 Aug 12 04:50:02 PM PDT 24 Aug 12 04:50:08 PM PDT 24 1232149304 ps
T214 /workspace/coverage/default/23.sram_ctrl_bijection.716369518 Aug 12 04:48:47 PM PDT 24 Aug 12 04:49:24 PM PDT 24 17760652217 ps
T215 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.4223455244 Aug 12 04:48:25 PM PDT 24 Aug 12 04:52:57 PM PDT 24 2118524083 ps
T216 /workspace/coverage/default/27.sram_ctrl_max_throughput.2824265233 Aug 12 04:49:07 PM PDT 24 Aug 12 04:50:40 PM PDT 24 119582460 ps
T16 /workspace/coverage/default/1.sram_ctrl_sec_cm.762644011 Aug 12 04:47:02 PM PDT 24 Aug 12 04:47:06 PM PDT 24 542915239 ps
T31 /workspace/coverage/default/43.sram_ctrl_ram_cfg.2357474225 Aug 12 04:52:02 PM PDT 24 Aug 12 04:52:03 PM PDT 24 51266798 ps
T32 /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.1997878517 Aug 12 04:48:58 PM PDT 24 Aug 12 04:55:35 PM PDT 24 58079878893 ps
T33 /workspace/coverage/default/32.sram_ctrl_mem_partial_access.1190724230 Aug 12 04:50:04 PM PDT 24 Aug 12 04:50:07 PM PDT 24 162929209 ps
T34 /workspace/coverage/default/30.sram_ctrl_smoke.1498432089 Aug 12 04:49:35 PM PDT 24 Aug 12 04:50:33 PM PDT 24 181937995 ps
T35 /workspace/coverage/default/21.sram_ctrl_alert_test.478377460 Aug 12 04:48:32 PM PDT 24 Aug 12 04:48:33 PM PDT 24 26180538 ps
T36 /workspace/coverage/default/36.sram_ctrl_access_during_key_req.303921287 Aug 12 04:50:37 PM PDT 24 Aug 12 05:02:52 PM PDT 24 12808697621 ps
T37 /workspace/coverage/default/7.sram_ctrl_mem_partial_access.752487193 Aug 12 04:47:21 PM PDT 24 Aug 12 04:47:24 PM PDT 24 287633035 ps
T38 /workspace/coverage/default/5.sram_ctrl_bijection.4229094552 Aug 12 04:47:15 PM PDT 24 Aug 12 04:47:45 PM PDT 24 2064251117 ps
T39 /workspace/coverage/default/38.sram_ctrl_alert_test.3125763286 Aug 12 04:51:11 PM PDT 24 Aug 12 04:51:12 PM PDT 24 43764263 ps
T217 /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.1523739799 Aug 12 04:51:34 PM PDT 24 Aug 12 04:57:40 PM PDT 24 21731694974 ps
T218 /workspace/coverage/default/25.sram_ctrl_regwen.1071030861 Aug 12 04:48:52 PM PDT 24 Aug 12 05:01:38 PM PDT 24 55620163336 ps
T219 /workspace/coverage/default/2.sram_ctrl_stress_all.926107700 Aug 12 04:47:06 PM PDT 24 Aug 12 05:17:05 PM PDT 24 27148763401 ps
T220 /workspace/coverage/default/18.sram_ctrl_smoke.3865865245 Aug 12 04:48:10 PM PDT 24 Aug 12 04:48:16 PM PDT 24 190436514 ps
T221 /workspace/coverage/default/9.sram_ctrl_executable.1728834142 Aug 12 04:47:35 PM PDT 24 Aug 12 05:00:47 PM PDT 24 80627327795 ps
T222 /workspace/coverage/default/37.sram_ctrl_lc_escalation.4232126968 Aug 12 04:50:56 PM PDT 24 Aug 12 04:51:06 PM PDT 24 4233029083 ps
T223 /workspace/coverage/default/6.sram_ctrl_lc_escalation.2125175351 Aug 12 04:47:21 PM PDT 24 Aug 12 04:47:31 PM PDT 24 1011742415 ps
T224 /workspace/coverage/default/32.sram_ctrl_partial_access.936974158 Aug 12 04:49:54 PM PDT 24 Aug 12 04:50:00 PM PDT 24 628191209 ps
T225 /workspace/coverage/default/39.sram_ctrl_access_during_key_req.3144321867 Aug 12 04:51:10 PM PDT 24 Aug 12 05:03:21 PM PDT 24 3031596868 ps
T226 /workspace/coverage/default/33.sram_ctrl_mem_partial_access.1785479996 Aug 12 04:50:09 PM PDT 24 Aug 12 04:50:12 PM PDT 24 51662640 ps
T227 /workspace/coverage/default/21.sram_ctrl_ram_cfg.2355207825 Aug 12 04:48:30 PM PDT 24 Aug 12 04:48:31 PM PDT 24 88510635 ps
T228 /workspace/coverage/default/4.sram_ctrl_max_throughput.401401930 Aug 12 04:47:07 PM PDT 24 Aug 12 04:48:27 PM PDT 24 116990751 ps
T229 /workspace/coverage/default/10.sram_ctrl_max_throughput.352337994 Aug 12 04:47:31 PM PDT 24 Aug 12 04:49:38 PM PDT 24 503031742 ps
T230 /workspace/coverage/default/48.sram_ctrl_executable.2775173272 Aug 12 04:52:50 PM PDT 24 Aug 12 05:01:31 PM PDT 24 20748949780 ps
T231 /workspace/coverage/default/48.sram_ctrl_access_during_key_req.2469288749 Aug 12 04:52:52 PM PDT 24 Aug 12 05:05:19 PM PDT 24 14886439053 ps
T232 /workspace/coverage/default/45.sram_ctrl_multiple_keys.3781815572 Aug 12 04:52:13 PM PDT 24 Aug 12 04:54:18 PM PDT 24 3319205301 ps
T233 /workspace/coverage/default/32.sram_ctrl_alert_test.2950715180 Aug 12 04:50:03 PM PDT 24 Aug 12 04:50:04 PM PDT 24 32224227 ps
T234 /workspace/coverage/default/3.sram_ctrl_ram_cfg.1941936458 Aug 12 04:47:06 PM PDT 24 Aug 12 04:47:07 PM PDT 24 31945337 ps
T235 /workspace/coverage/default/10.sram_ctrl_smoke.529820951 Aug 12 04:47:36 PM PDT 24 Aug 12 04:47:55 PM PDT 24 1137224141 ps
T236 /workspace/coverage/default/23.sram_ctrl_mem_walk.2619902805 Aug 12 04:48:46 PM PDT 24 Aug 12 04:48:51 PM PDT 24 99914574 ps
T237 /workspace/coverage/default/33.sram_ctrl_smoke.2679401321 Aug 12 04:50:01 PM PDT 24 Aug 12 04:50:15 PM PDT 24 792633458 ps
T238 /workspace/coverage/default/18.sram_ctrl_mem_partial_access.69941547 Aug 12 04:48:08 PM PDT 24 Aug 12 04:48:13 PM PDT 24 65048661 ps
T239 /workspace/coverage/default/38.sram_ctrl_regwen.3237339536 Aug 12 04:51:05 PM PDT 24 Aug 12 04:51:24 PM PDT 24 257773809 ps
T240 /workspace/coverage/default/29.sram_ctrl_partial_access.189266872 Aug 12 04:49:27 PM PDT 24 Aug 12 04:50:29 PM PDT 24 922711443 ps
T241 /workspace/coverage/default/33.sram_ctrl_access_during_key_req.2924481140 Aug 12 04:50:10 PM PDT 24 Aug 12 05:05:21 PM PDT 24 13141609266 ps
T242 /workspace/coverage/default/17.sram_ctrl_access_during_key_req.2951212738 Aug 12 04:48:01 PM PDT 24 Aug 12 04:57:59 PM PDT 24 6289203240 ps
T243 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.3421086230 Aug 12 04:48:00 PM PDT 24 Aug 12 04:48:03 PM PDT 24 50864445 ps
T244 /workspace/coverage/default/47.sram_ctrl_mem_walk.4155138423 Aug 12 04:52:43 PM PDT 24 Aug 12 04:52:55 PM PDT 24 470491238 ps
T245 /workspace/coverage/default/39.sram_ctrl_ram_cfg.128621782 Aug 12 04:51:12 PM PDT 24 Aug 12 04:51:13 PM PDT 24 53007238 ps
T76 /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.2894315245 Aug 12 04:49:46 PM PDT 24 Aug 12 04:51:45 PM PDT 24 876413079 ps
T246 /workspace/coverage/default/26.sram_ctrl_mem_walk.1947469763 Aug 12 04:49:08 PM PDT 24 Aug 12 04:49:13 PM PDT 24 826321698 ps
T77 /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.3074232340 Aug 12 04:50:21 PM PDT 24 Aug 12 04:50:30 PM PDT 24 279480501 ps
T247 /workspace/coverage/default/44.sram_ctrl_partial_access.1120535822 Aug 12 04:52:07 PM PDT 24 Aug 12 04:52:22 PM PDT 24 743239797 ps
T248 /workspace/coverage/default/42.sram_ctrl_alert_test.3929096056 Aug 12 04:51:54 PM PDT 24 Aug 12 04:51:54 PM PDT 24 17760939 ps
T249 /workspace/coverage/default/37.sram_ctrl_bijection.788630749 Aug 12 04:50:52 PM PDT 24 Aug 12 04:51:12 PM PDT 24 11914885430 ps
T250 /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.3540730812 Aug 12 04:52:09 PM PDT 24 Aug 12 04:53:14 PM PDT 24 347558772 ps
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T279 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.1510854481 Aug 12 04:52:43 PM PDT 24 Aug 12 04:54:44 PM PDT 24 324468212 ps
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T299 /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.4196929741 Aug 12 04:47:15 PM PDT 24 Aug 12 04:47:17 PM PDT 24 53252723 ps
T300 /workspace/coverage/default/26.sram_ctrl_bijection.2752927895 Aug 12 04:49:00 PM PDT 24 Aug 12 04:49:42 PM PDT 24 2451815550 ps
T301 /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.440086468 Aug 12 04:47:24 PM PDT 24 Aug 12 04:48:01 PM PDT 24 485825331 ps
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T304 /workspace/coverage/default/3.sram_ctrl_mem_walk.2868680720 Aug 12 04:47:10 PM PDT 24 Aug 12 04:47:17 PM PDT 24 337031459 ps
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