Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.95 99.16 94.27 99.72 100.00 95.95 99.12 97.44


Total tests in report: 1022
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
72.58 72.58 92.54 92.54 70.26 70.26 86.27 86.27 33.33 33.33 82.61 82.61 93.51 93.51 49.54 49.54 /workspace/coverage/default/40.sram_ctrl_stress_all.3096023796
88.08 15.50 97.46 4.92 81.16 10.90 87.10 0.83 80.95 47.62 90.34 7.73 96.17 2.65 83.36 33.82 /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.3764765254
93.21 5.14 98.73 1.27 85.19 4.03 95.15 8.04 100.00 19.05 93.72 3.38 96.17 0.00 83.55 0.18 /workspace/coverage/default/29.sram_ctrl_mem_walk.2165924989
94.20 0.99 98.73 0.00 86.73 1.54 96.95 1.80 100.00 0.00 94.20 0.48 96.31 0.15 86.47 2.93 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4291742884
95.13 0.93 98.90 0.17 87.56 0.83 97.16 0.21 100.00 0.00 94.93 0.72 96.31 0.00 91.04 4.57 /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.3517016946
95.86 0.73 99.07 0.17 89.34 1.78 98.09 0.94 100.00 0.00 95.65 0.72 96.90 0.59 91.96 0.91 /workspace/coverage/default/4.sram_ctrl_sec_cm.565173734
96.36 0.50 99.07 0.00 90.28 0.95 98.47 0.38 100.00 0.00 95.65 0.00 96.90 0.00 94.15 2.19 /workspace/coverage/default/17.sram_ctrl_stress_all.1268352676
96.56 0.20 99.07 0.00 90.28 0.00 98.54 0.07 100.00 0.00 95.65 0.00 98.23 1.33 94.15 0.00 /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.3616958762
96.74 0.18 99.07 0.00 90.28 0.00 98.54 0.00 100.00 0.00 95.65 0.00 99.12 0.88 94.52 0.37 /workspace/coverage/default/5.sram_ctrl_mem_partial_access.439076893
96.90 0.16 99.07 0.00 90.28 0.00 98.54 0.00 100.00 0.00 95.65 0.00 99.12 0.00 95.61 1.10 /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.2065584756
97.03 0.13 99.15 0.08 90.28 0.00 99.38 0.83 100.00 0.00 95.65 0.00 99.12 0.00 95.61 0.00 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3573363466
97.12 0.09 99.15 0.00 90.28 0.00 99.65 0.28 100.00 0.00 95.65 0.00 99.12 0.00 95.98 0.37 /workspace/coverage/default/5.sram_ctrl_executable.3637385927
97.21 0.09 99.15 0.00 90.52 0.24 99.65 0.00 100.00 0.00 95.65 0.00 99.12 0.00 96.34 0.37 /workspace/coverage/default/23.sram_ctrl_stress_all.1732347513
97.29 0.09 99.15 0.00 90.64 0.12 99.65 0.00 100.00 0.00 96.14 0.48 99.12 0.00 96.34 0.00 /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.147474434
97.35 0.06 99.15 0.00 91.00 0.36 99.72 0.07 100.00 0.00 96.14 0.00 99.12 0.00 96.34 0.00 /workspace/coverage/default/0.sram_ctrl_alert_test.933025237
97.40 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 96.71 0.37 /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.3276313491
97.46 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.07 0.37 /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.2220858227
97.51 0.05 99.15 0.00 91.00 0.00 99.72 0.00 100.00 0.00 96.14 0.00 99.12 0.00 97.44 0.37 /workspace/coverage/default/2.sram_ctrl_stress_all.3112842


Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.1533071992
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.593820834
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.963325552
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.116706714
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.138457528
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.1369404372
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.3752027413
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.3353156826
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.3851992152
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.592291164
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.1627359865
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.2317885984
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.4111473281
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.1878215916
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.180093634
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.1392288343
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.3374573839
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.1794074213
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.1236767799
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.1982600177
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.3281313848
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.2488162994
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.4282365846
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.1182622949
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.4080456596
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.1062478941
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.1504514483
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.1222551501
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.2783737063
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.3532453234
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.2128358839
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.114856757
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.2856799701
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.3254747618
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.4275177187
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.2325128498
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.3887876165
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.1332946250
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.1765876649
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.2347936278
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.3464917184
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.545839001
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.2431305830
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.2901561288
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.2003129329
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.2898341614
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.2415495486
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.3516118673
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.3920792018
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.979959929
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.763108161
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.2592381033
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.4231588674
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.3275525593
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.1683889823
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.1190458675
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.4144781676
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.3996400524
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.773127973
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.1811015357
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.3207261115
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.893500921
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.2456707142
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.721444739
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.1155016433
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.1994195879
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.1400325456
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.1237879391
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.2528021102
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.3220488805
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.2735304135
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.620374627
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.272479151
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.2387542536
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.3916677194
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.99338022
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.3266394375
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.4066565011
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.4100373691
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.722407969
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.2369672877
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.2244101465
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.1773354874
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.758566267
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.14737221
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.4191196645
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.2716510424
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.3760996711
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.1586107023
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.1570940451
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.2627180804
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.232790625
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.793596581
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.174539448
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.194473860
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.4212440404
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.3324237278
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.2977154788
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.2699859464
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.333757757
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.379306585
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.117835543
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.1305129938
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.1404271525
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.889660398
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.4123159498
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.3590213041
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.3657831634
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.3924956060
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.3051559236
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.4277872992
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.3720267740
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.3685342873
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.1827223554
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1728843324
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.703905386
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.4272899781
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.831183685
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.2059138901
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.2311999037
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.2117389167
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.2526974912
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.2421249048
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.788789053
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.2395486753
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.104603184
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.3838577092
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.2429875100
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.1702116437
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.2431925349
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.1983672663
/workspace/coverage/default/0.sram_ctrl_bijection.2262149525
/workspace/coverage/default/0.sram_ctrl_executable.1843107749
/workspace/coverage/default/0.sram_ctrl_lc_escalation.2283567994
/workspace/coverage/default/0.sram_ctrl_max_throughput.1588331277
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.1400293906
/workspace/coverage/default/0.sram_ctrl_mem_walk.3029872526
/workspace/coverage/default/0.sram_ctrl_multiple_keys.1575326264
/workspace/coverage/default/0.sram_ctrl_partial_access.39241754
/workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2917705505
/workspace/coverage/default/0.sram_ctrl_ram_cfg.2646152741
/workspace/coverage/default/0.sram_ctrl_regwen.4112041481
/workspace/coverage/default/0.sram_ctrl_sec_cm.1768952821
/workspace/coverage/default/0.sram_ctrl_smoke.2159407597
/workspace/coverage/default/0.sram_ctrl_stress_all.3777597356
/workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3831088082
/workspace/coverage/default/0.sram_ctrl_stress_pipeline.1130656285
/workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.359593892
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.1578110791
/workspace/coverage/default/1.sram_ctrl_alert_test.4169946686
/workspace/coverage/default/1.sram_ctrl_bijection.2578564215
/workspace/coverage/default/1.sram_ctrl_executable.3548848769
/workspace/coverage/default/1.sram_ctrl_lc_escalation.3780296194
/workspace/coverage/default/1.sram_ctrl_max_throughput.662204853
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.1796466412
/workspace/coverage/default/1.sram_ctrl_mem_walk.246805818
/workspace/coverage/default/1.sram_ctrl_multiple_keys.218449927
/workspace/coverage/default/1.sram_ctrl_partial_access.3799699133
/workspace/coverage/default/1.sram_ctrl_partial_access_b2b.702057515
/workspace/coverage/default/1.sram_ctrl_ram_cfg.2515128863
/workspace/coverage/default/1.sram_ctrl_regwen.4271413321
/workspace/coverage/default/1.sram_ctrl_sec_cm.1862849870
/workspace/coverage/default/1.sram_ctrl_smoke.1110843386
/workspace/coverage/default/1.sram_ctrl_stress_all.2411203928
/workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.302786879
/workspace/coverage/default/1.sram_ctrl_stress_pipeline.1706032995
/workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.4279860342
/workspace/coverage/default/10.sram_ctrl_access_during_key_req.2046768104
/workspace/coverage/default/10.sram_ctrl_alert_test.3098556485
/workspace/coverage/default/10.sram_ctrl_bijection.469762147
/workspace/coverage/default/10.sram_ctrl_executable.2623387704
/workspace/coverage/default/10.sram_ctrl_lc_escalation.277041895
/workspace/coverage/default/10.sram_ctrl_max_throughput.101148770
/workspace/coverage/default/10.sram_ctrl_mem_partial_access.3984739138
/workspace/coverage/default/10.sram_ctrl_mem_walk.3807860825
/workspace/coverage/default/10.sram_ctrl_multiple_keys.702510452
/workspace/coverage/default/10.sram_ctrl_partial_access.1779263488
/workspace/coverage/default/10.sram_ctrl_partial_access_b2b.1729010173
/workspace/coverage/default/10.sram_ctrl_ram_cfg.3171822689
/workspace/coverage/default/10.sram_ctrl_regwen.3720648472
/workspace/coverage/default/10.sram_ctrl_smoke.286445177
/workspace/coverage/default/10.sram_ctrl_stress_all.1968637761
/workspace/coverage/default/10.sram_ctrl_stress_pipeline.2592774668
/workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.1869241297
/workspace/coverage/default/11.sram_ctrl_access_during_key_req.881835574
/workspace/coverage/default/11.sram_ctrl_alert_test.2053840362
/workspace/coverage/default/11.sram_ctrl_bijection.2921178722
/workspace/coverage/default/11.sram_ctrl_executable.1701469929
/workspace/coverage/default/11.sram_ctrl_lc_escalation.3989125282
/workspace/coverage/default/11.sram_ctrl_max_throughput.3530165406
/workspace/coverage/default/11.sram_ctrl_mem_partial_access.3922139918
/workspace/coverage/default/11.sram_ctrl_mem_walk.3307188181
/workspace/coverage/default/11.sram_ctrl_multiple_keys.3910569724
/workspace/coverage/default/11.sram_ctrl_partial_access.2071347420
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3940968826
/workspace/coverage/default/11.sram_ctrl_ram_cfg.1566236026
/workspace/coverage/default/11.sram_ctrl_regwen.2077852669
/workspace/coverage/default/11.sram_ctrl_smoke.3484647803
/workspace/coverage/default/11.sram_ctrl_stress_all.2826223825
/workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.1184729473
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.239038839
/workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.2107092683
/workspace/coverage/default/12.sram_ctrl_access_during_key_req.3583344407
/workspace/coverage/default/12.sram_ctrl_alert_test.2304502110
/workspace/coverage/default/12.sram_ctrl_bijection.4276537881
/workspace/coverage/default/12.sram_ctrl_executable.2967486980
/workspace/coverage/default/12.sram_ctrl_lc_escalation.3931571245
/workspace/coverage/default/12.sram_ctrl_max_throughput.3989410339
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.1376966596
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/workspace/coverage/default/43.sram_ctrl_ram_cfg.3040291491
/workspace/coverage/default/43.sram_ctrl_regwen.4262638369
/workspace/coverage/default/43.sram_ctrl_smoke.4156431207
/workspace/coverage/default/43.sram_ctrl_stress_all.1927265272
/workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3954668776
/workspace/coverage/default/43.sram_ctrl_stress_pipeline.3190670399
/workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.4156061096
/workspace/coverage/default/44.sram_ctrl_access_during_key_req.2534485645
/workspace/coverage/default/44.sram_ctrl_alert_test.1361514990
/workspace/coverage/default/44.sram_ctrl_bijection.1885158049
/workspace/coverage/default/44.sram_ctrl_executable.1221950693
/workspace/coverage/default/44.sram_ctrl_lc_escalation.1526175684
/workspace/coverage/default/44.sram_ctrl_max_throughput.4081995346
/workspace/coverage/default/44.sram_ctrl_mem_partial_access.4193881665
/workspace/coverage/default/44.sram_ctrl_mem_walk.1812843156
/workspace/coverage/default/44.sram_ctrl_multiple_keys.792844547
/workspace/coverage/default/44.sram_ctrl_partial_access.2078175265
/workspace/coverage/default/44.sram_ctrl_partial_access_b2b.3719988202
/workspace/coverage/default/44.sram_ctrl_ram_cfg.3112824651
/workspace/coverage/default/44.sram_ctrl_regwen.942073452
/workspace/coverage/default/44.sram_ctrl_smoke.1524365479
/workspace/coverage/default/44.sram_ctrl_stress_all.327647703
/workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2217335458
/workspace/coverage/default/44.sram_ctrl_stress_pipeline.604956090
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.854317783
/workspace/coverage/default/45.sram_ctrl_access_during_key_req.4183631289
/workspace/coverage/default/45.sram_ctrl_alert_test.2440774599
/workspace/coverage/default/45.sram_ctrl_bijection.3303670264
/workspace/coverage/default/45.sram_ctrl_executable.574296010
/workspace/coverage/default/45.sram_ctrl_lc_escalation.2998426798
/workspace/coverage/default/45.sram_ctrl_max_throughput.2454926997
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.1056721936
/workspace/coverage/default/45.sram_ctrl_mem_walk.1099344606
/workspace/coverage/default/45.sram_ctrl_multiple_keys.3908045048
/workspace/coverage/default/45.sram_ctrl_partial_access.2818624553
/workspace/coverage/default/45.sram_ctrl_partial_access_b2b.3701111324
/workspace/coverage/default/45.sram_ctrl_ram_cfg.2187746915
/workspace/coverage/default/45.sram_ctrl_regwen.1893645805
/workspace/coverage/default/45.sram_ctrl_smoke.4232329468
/workspace/coverage/default/45.sram_ctrl_stress_all.3157688920
/workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.884821847
/workspace/coverage/default/45.sram_ctrl_stress_pipeline.2010688999
/workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.1692528283
/workspace/coverage/default/46.sram_ctrl_access_during_key_req.2537809025
/workspace/coverage/default/46.sram_ctrl_alert_test.960423435
/workspace/coverage/default/46.sram_ctrl_bijection.626727392
/workspace/coverage/default/46.sram_ctrl_executable.1205704014
/workspace/coverage/default/46.sram_ctrl_lc_escalation.649679152
/workspace/coverage/default/46.sram_ctrl_max_throughput.487518106
/workspace/coverage/default/46.sram_ctrl_mem_partial_access.3297604962
/workspace/coverage/default/46.sram_ctrl_mem_walk.3747800035
/workspace/coverage/default/46.sram_ctrl_multiple_keys.798940541
/workspace/coverage/default/46.sram_ctrl_partial_access.3605815902
/workspace/coverage/default/46.sram_ctrl_partial_access_b2b.4117311858
/workspace/coverage/default/46.sram_ctrl_ram_cfg.223663645
/workspace/coverage/default/46.sram_ctrl_regwen.410310006
/workspace/coverage/default/46.sram_ctrl_smoke.4255976524
/workspace/coverage/default/46.sram_ctrl_stress_all.47888714
/workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.4291996414
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.3352487534
/workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1346489046
/workspace/coverage/default/47.sram_ctrl_access_during_key_req.9496914
/workspace/coverage/default/47.sram_ctrl_alert_test.490596915
/workspace/coverage/default/47.sram_ctrl_bijection.3785395207
/workspace/coverage/default/47.sram_ctrl_executable.480306205
/workspace/coverage/default/47.sram_ctrl_lc_escalation.2416566984
/workspace/coverage/default/47.sram_ctrl_max_throughput.39069383
/workspace/coverage/default/47.sram_ctrl_mem_partial_access.3827138051
/workspace/coverage/default/47.sram_ctrl_mem_walk.1367175989
/workspace/coverage/default/47.sram_ctrl_multiple_keys.2310839055
/workspace/coverage/default/47.sram_ctrl_partial_access.2202553667
/workspace/coverage/default/47.sram_ctrl_ram_cfg.194075563
/workspace/coverage/default/47.sram_ctrl_regwen.1256197714
/workspace/coverage/default/47.sram_ctrl_smoke.4026483382
/workspace/coverage/default/47.sram_ctrl_stress_all.2210631235
/workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.3933958478
/workspace/coverage/default/47.sram_ctrl_stress_pipeline.365744838
/workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.684028223
/workspace/coverage/default/48.sram_ctrl_access_during_key_req.198286453
/workspace/coverage/default/48.sram_ctrl_alert_test.31697515
/workspace/coverage/default/48.sram_ctrl_bijection.1491102672
/workspace/coverage/default/48.sram_ctrl_executable.3590103696
/workspace/coverage/default/48.sram_ctrl_lc_escalation.105054646
/workspace/coverage/default/48.sram_ctrl_max_throughput.1770624006
/workspace/coverage/default/48.sram_ctrl_mem_partial_access.2321596207
/workspace/coverage/default/48.sram_ctrl_mem_walk.2731903238
/workspace/coverage/default/48.sram_ctrl_multiple_keys.4143663038
/workspace/coverage/default/48.sram_ctrl_partial_access.2021240663
/workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3494869277
/workspace/coverage/default/48.sram_ctrl_ram_cfg.1651226209
/workspace/coverage/default/48.sram_ctrl_regwen.3260383706
/workspace/coverage/default/48.sram_ctrl_smoke.3095091179
/workspace/coverage/default/48.sram_ctrl_stress_all.247380403
/workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.1252147729
/workspace/coverage/default/48.sram_ctrl_stress_pipeline.20478407
/workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.2806636570
/workspace/coverage/default/49.sram_ctrl_access_during_key_req.1199317228
/workspace/coverage/default/49.sram_ctrl_alert_test.2312401143
/workspace/coverage/default/49.sram_ctrl_bijection.1984339540
/workspace/coverage/default/49.sram_ctrl_executable.123407099
/workspace/coverage/default/49.sram_ctrl_lc_escalation.221770816
/workspace/coverage/default/49.sram_ctrl_max_throughput.2893104863
/workspace/coverage/default/49.sram_ctrl_mem_partial_access.2155007878
/workspace/coverage/default/49.sram_ctrl_mem_walk.624602641
/workspace/coverage/default/49.sram_ctrl_multiple_keys.1667047699
/workspace/coverage/default/49.sram_ctrl_partial_access.79213414
/workspace/coverage/default/49.sram_ctrl_partial_access_b2b.753292937
/workspace/coverage/default/49.sram_ctrl_ram_cfg.3606539107
/workspace/coverage/default/49.sram_ctrl_regwen.2428812494
/workspace/coverage/default/49.sram_ctrl_smoke.2619144963
/workspace/coverage/default/49.sram_ctrl_stress_all.3707723321
/workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1778141423
/workspace/coverage/default/49.sram_ctrl_stress_pipeline.325105733
/workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.4006086034
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.1248122299
/workspace/coverage/default/5.sram_ctrl_alert_test.2548630240
/workspace/coverage/default/5.sram_ctrl_bijection.2354320211
/workspace/coverage/default/5.sram_ctrl_lc_escalation.1282895302
/workspace/coverage/default/5.sram_ctrl_max_throughput.662826251
/workspace/coverage/default/5.sram_ctrl_mem_walk.1138649906
/workspace/coverage/default/5.sram_ctrl_multiple_keys.396614241
/workspace/coverage/default/5.sram_ctrl_partial_access.1225226977
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.788558624
/workspace/coverage/default/5.sram_ctrl_ram_cfg.3893071588
/workspace/coverage/default/5.sram_ctrl_regwen.2825714559
/workspace/coverage/default/5.sram_ctrl_smoke.1446379252
/workspace/coverage/default/5.sram_ctrl_stress_all.3385219075
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.326193334
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.3503104864
/workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.3622711996
/workspace/coverage/default/6.sram_ctrl_access_during_key_req.2721758765
/workspace/coverage/default/6.sram_ctrl_alert_test.2028442820
/workspace/coverage/default/6.sram_ctrl_bijection.3970994236
/workspace/coverage/default/6.sram_ctrl_executable.4014863129
/workspace/coverage/default/6.sram_ctrl_lc_escalation.642744951
/workspace/coverage/default/6.sram_ctrl_max_throughput.744488232
/workspace/coverage/default/6.sram_ctrl_mem_partial_access.3371201744
/workspace/coverage/default/6.sram_ctrl_mem_walk.4045658054
/workspace/coverage/default/6.sram_ctrl_multiple_keys.1964799769
/workspace/coverage/default/6.sram_ctrl_partial_access.3258376463
/workspace/coverage/default/6.sram_ctrl_partial_access_b2b.572372938
/workspace/coverage/default/6.sram_ctrl_ram_cfg.1329979951
/workspace/coverage/default/6.sram_ctrl_regwen.3960135693
/workspace/coverage/default/6.sram_ctrl_smoke.2746614316
/workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.3198119848
/workspace/coverage/default/6.sram_ctrl_stress_pipeline.638814114
/workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.3104192413
/workspace/coverage/default/7.sram_ctrl_access_during_key_req.1025220998
/workspace/coverage/default/7.sram_ctrl_alert_test.1871774069
/workspace/coverage/default/7.sram_ctrl_bijection.4179274266
/workspace/coverage/default/7.sram_ctrl_executable.3279272457
/workspace/coverage/default/7.sram_ctrl_lc_escalation.1778611739
/workspace/coverage/default/7.sram_ctrl_max_throughput.1634523517
/workspace/coverage/default/7.sram_ctrl_mem_partial_access.1430611495
/workspace/coverage/default/7.sram_ctrl_mem_walk.1137810733
/workspace/coverage/default/7.sram_ctrl_multiple_keys.3131113649
/workspace/coverage/default/7.sram_ctrl_partial_access.2143063038
/workspace/coverage/default/7.sram_ctrl_partial_access_b2b.2153282665
/workspace/coverage/default/7.sram_ctrl_ram_cfg.3480965380
/workspace/coverage/default/7.sram_ctrl_regwen.1514043626
/workspace/coverage/default/7.sram_ctrl_smoke.1243527786
/workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.2380964211
/workspace/coverage/default/7.sram_ctrl_stress_pipeline.3791795852
/workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.446785044
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.2812244804
/workspace/coverage/default/8.sram_ctrl_alert_test.3799557712
/workspace/coverage/default/8.sram_ctrl_bijection.4137242515
/workspace/coverage/default/8.sram_ctrl_executable.3756181290
/workspace/coverage/default/8.sram_ctrl_lc_escalation.2665896967
/workspace/coverage/default/8.sram_ctrl_max_throughput.4109997334
/workspace/coverage/default/8.sram_ctrl_mem_partial_access.3502934022
/workspace/coverage/default/8.sram_ctrl_mem_walk.3526084535
/workspace/coverage/default/8.sram_ctrl_multiple_keys.3099072989
/workspace/coverage/default/8.sram_ctrl_partial_access.3750650245
/workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2476333904
/workspace/coverage/default/8.sram_ctrl_ram_cfg.907461583
/workspace/coverage/default/8.sram_ctrl_regwen.386451816
/workspace/coverage/default/8.sram_ctrl_smoke.3792197211
/workspace/coverage/default/8.sram_ctrl_stress_all.713816109
/workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.2542544079
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.2350779181
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.184597152
/workspace/coverage/default/9.sram_ctrl_access_during_key_req.2549159679
/workspace/coverage/default/9.sram_ctrl_alert_test.567966372
/workspace/coverage/default/9.sram_ctrl_bijection.2399655058
/workspace/coverage/default/9.sram_ctrl_executable.1684663145
/workspace/coverage/default/9.sram_ctrl_lc_escalation.3250373215
/workspace/coverage/default/9.sram_ctrl_max_throughput.3354223432
/workspace/coverage/default/9.sram_ctrl_mem_partial_access.1652584463
/workspace/coverage/default/9.sram_ctrl_mem_walk.3622537767
/workspace/coverage/default/9.sram_ctrl_multiple_keys.259001540
/workspace/coverage/default/9.sram_ctrl_partial_access.2613032283
/workspace/coverage/default/9.sram_ctrl_partial_access_b2b.2763320237
/workspace/coverage/default/9.sram_ctrl_ram_cfg.2069120827
/workspace/coverage/default/9.sram_ctrl_regwen.1162291670
/workspace/coverage/default/9.sram_ctrl_smoke.600349017
/workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.894763611
/workspace/coverage/default/9.sram_ctrl_stress_pipeline.4087327487
/workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.360009970




Total test records in report: 1022
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspace/coverage/default/21.sram_ctrl_ram_cfg.667212443 Aug 13 04:34:34 PM PDT 24 Aug 13 04:34:35 PM PDT 24 49966180 ps
T2 /workspace/coverage/default/18.sram_ctrl_smoke.24471369 Aug 13 04:34:22 PM PDT 24 Aug 13 04:34:26 PM PDT 24 757298138 ps
T3 /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.349539154 Aug 13 04:35:12 PM PDT 24 Aug 13 04:35:49 PM PDT 24 469680420 ps
T4 /workspace/coverage/default/40.sram_ctrl_stress_all.3096023796 Aug 13 04:35:17 PM PDT 24 Aug 13 04:56:28 PM PDT 24 8259428911 ps
T5 /workspace/coverage/default/25.sram_ctrl_mem_partial_access.3585325397 Aug 13 04:34:49 PM PDT 24 Aug 13 04:34:55 PM PDT 24 651096817 ps
T6 /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.4291742884 Aug 13 04:35:40 PM PDT 24 Aug 13 04:40:23 PM PDT 24 10477417628 ps
T9 /workspace/coverage/default/1.sram_ctrl_stress_pipeline.1706032995 Aug 13 04:33:39 PM PDT 24 Aug 13 04:35:57 PM PDT 24 1452286109 ps
T10 /workspace/coverage/default/49.sram_ctrl_executable.123407099 Aug 13 04:35:49 PM PDT 24 Aug 13 04:49:04 PM PDT 24 2313172453 ps
T11 /workspace/coverage/default/21.sram_ctrl_partial_access.3293696709 Aug 13 04:34:36 PM PDT 24 Aug 13 04:34:56 PM PDT 24 3938793203 ps
T12 /workspace/coverage/default/25.sram_ctrl_alert_test.2044988751 Aug 13 04:34:40 PM PDT 24 Aug 13 04:34:41 PM PDT 24 12964098 ps
T22 /workspace/coverage/default/42.sram_ctrl_stress_pipeline.1307921919 Aug 13 04:35:20 PM PDT 24 Aug 13 04:38:56 PM PDT 24 8855300645 ps
T13 /workspace/coverage/default/0.sram_ctrl_alert_test.933025237 Aug 13 04:33:38 PM PDT 24 Aug 13 04:33:39 PM PDT 24 17751616 ps
T39 /workspace/coverage/default/18.sram_ctrl_max_throughput.1069865916 Aug 13 04:34:20 PM PDT 24 Aug 13 04:34:52 PM PDT 24 209887873 ps
T40 /workspace/coverage/default/12.sram_ctrl_smoke.4215806947 Aug 13 04:33:58 PM PDT 24 Aug 13 04:35:35 PM PDT 24 3450359609 ps
T7 /workspace/coverage/default/23.sram_ctrl_stress_all.1732347513 Aug 13 04:34:45 PM PDT 24 Aug 13 05:10:32 PM PDT 24 256008549238 ps
T42 /workspace/coverage/default/8.sram_ctrl_access_during_key_req.2812244804 Aug 13 04:34:10 PM PDT 24 Aug 13 04:49:41 PM PDT 24 5999098524 ps
T14 /workspace/coverage/default/43.sram_ctrl_alert_test.976944386 Aug 13 04:35:27 PM PDT 24 Aug 13 04:35:28 PM PDT 24 19811626 ps
T18 /workspace/coverage/default/2.sram_ctrl_bijection.988611611 Aug 13 04:33:41 PM PDT 24 Aug 13 04:34:18 PM PDT 24 1785840798 ps
T156 /workspace/coverage/default/47.sram_ctrl_max_throughput.39069383 Aug 13 04:35:37 PM PDT 24 Aug 13 04:36:11 PM PDT 24 855080086 ps
T41 /workspace/coverage/default/29.sram_ctrl_mem_walk.2165924989 Aug 13 04:34:50 PM PDT 24 Aug 13 04:34:58 PM PDT 24 2748984796 ps
T64 /workspace/coverage/default/17.sram_ctrl_stress_pipeline.2079415451 Aug 13 04:34:19 PM PDT 24 Aug 13 04:37:45 PM PDT 24 3971751900 ps
T65 /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.2917705505 Aug 13 04:33:37 PM PDT 24 Aug 13 04:42:04 PM PDT 24 73281940869 ps
T26 /workspace/coverage/default/46.sram_ctrl_ram_cfg.223663645 Aug 13 04:35:38 PM PDT 24 Aug 13 04:35:39 PM PDT 24 29359061 ps
T63 /workspace/coverage/default/1.sram_ctrl_bijection.2578564215 Aug 13 04:33:39 PM PDT 24 Aug 13 04:34:55 PM PDT 24 3697163419 ps
T150 /workspace/coverage/default/41.sram_ctrl_bijection.3920192515 Aug 13 04:35:18 PM PDT 24 Aug 13 04:36:13 PM PDT 24 1647636016 ps
T19 /workspace/coverage/default/17.sram_ctrl_stress_all.1268352676 Aug 13 04:34:16 PM PDT 24 Aug 13 05:46:34 PM PDT 24 232186448018 ps
T149 /workspace/coverage/default/8.sram_ctrl_multiple_keys.3099072989 Aug 13 04:34:04 PM PDT 24 Aug 13 04:47:54 PM PDT 24 5916139151 ps
T155 /workspace/coverage/default/33.sram_ctrl_partial_access.2422353700 Aug 13 04:34:54 PM PDT 24 Aug 13 04:35:06 PM PDT 24 601930463 ps
T151 /workspace/coverage/default/4.sram_ctrl_bijection.673956667 Aug 13 04:33:51 PM PDT 24 Aug 13 04:34:40 PM PDT 24 2914681638 ps
T27 /workspace/coverage/default/34.sram_ctrl_ram_cfg.2210926801 Aug 13 04:35:00 PM PDT 24 Aug 13 04:35:01 PM PDT 24 25488209 ps
T157 /workspace/coverage/default/13.sram_ctrl_ram_cfg.3573363466 Aug 13 04:34:12 PM PDT 24 Aug 13 04:34:13 PM PDT 24 364547887 ps
T152 /workspace/coverage/default/31.sram_ctrl_max_throughput.1323456709 Aug 13 04:34:58 PM PDT 24 Aug 13 04:36:38 PM PDT 24 532932103 ps
T158 /workspace/coverage/default/15.sram_ctrl_ram_cfg.3690704798 Aug 13 04:34:17 PM PDT 24 Aug 13 04:34:18 PM PDT 24 30001539 ps
T93 /workspace/coverage/default/8.sram_ctrl_stress_pipeline.2350779181 Aug 13 04:34:12 PM PDT 24 Aug 13 04:36:13 PM PDT 24 4944392378 ps
T23 /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.3954668776 Aug 13 04:35:43 PM PDT 24 Aug 13 04:40:06 PM PDT 24 9139295521 ps
T74 /workspace/coverage/default/38.sram_ctrl_multiple_keys.3748980817 Aug 13 04:35:12 PM PDT 24 Aug 13 04:41:28 PM PDT 24 15626672135 ps
T75 /workspace/coverage/default/42.sram_ctrl_ram_cfg.2486474931 Aug 13 04:35:32 PM PDT 24 Aug 13 04:35:33 PM PDT 24 75431775 ps
T76 /workspace/coverage/default/43.sram_ctrl_partial_access.67847719 Aug 13 04:35:23 PM PDT 24 Aug 13 04:35:31 PM PDT 24 724851500 ps
T77 /workspace/coverage/default/40.sram_ctrl_smoke.2009455051 Aug 13 04:35:21 PM PDT 24 Aug 13 04:35:57 PM PDT 24 1429933823 ps
T45 /workspace/coverage/default/42.sram_ctrl_regwen.4200944727 Aug 13 04:35:24 PM PDT 24 Aug 13 04:51:58 PM PDT 24 55752691037 ps
T78 /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.3204359276 Aug 13 04:35:15 PM PDT 24 Aug 13 04:37:34 PM PDT 24 573567227 ps
T79 /workspace/coverage/default/9.sram_ctrl_bijection.2399655058 Aug 13 04:34:09 PM PDT 24 Aug 13 04:35:32 PM PDT 24 17187173305 ps
T80 /workspace/coverage/default/14.sram_ctrl_executable.3735052896 Aug 13 04:34:21 PM PDT 24 Aug 13 04:39:13 PM PDT 24 1785878840 ps
T81 /workspace/coverage/default/21.sram_ctrl_smoke.1952860613 Aug 13 04:34:55 PM PDT 24 Aug 13 04:35:11 PM PDT 24 1373425753 ps
T54 /workspace/coverage/default/10.sram_ctrl_mem_walk.3807860825 Aug 13 04:34:16 PM PDT 24 Aug 13 04:34:27 PM PDT 24 3398482826 ps
T115 /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.3940968826 Aug 13 04:34:22 PM PDT 24 Aug 13 04:39:56 PM PDT 24 58258546561 ps
T153 /workspace/coverage/default/9.sram_ctrl_partial_access.2613032283 Aug 13 04:34:09 PM PDT 24 Aug 13 04:34:29 PM PDT 24 1036912306 ps
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T175 /workspace/coverage/default/22.sram_ctrl_max_throughput.761735133 Aug 13 04:34:27 PM PDT 24 Aug 13 04:36:21 PM PDT 24 464323161 ps
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T177 /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.360009970 Aug 13 04:34:04 PM PDT 24 Aug 13 04:34:11 PM PDT 24 66912220 ps
T178 /workspace/coverage/default/8.sram_ctrl_partial_access.3750650245 Aug 13 04:34:05 PM PDT 24 Aug 13 04:34:19 PM PDT 24 87152781 ps
T44 /workspace/coverage/default/20.sram_ctrl_access_during_key_req.1652108557 Aug 13 04:34:41 PM PDT 24 Aug 13 04:51:16 PM PDT 24 7836432986 ps
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T103 /workspace/coverage/default/22.sram_ctrl_mem_partial_access.3131175117 Aug 13 04:34:33 PM PDT 24 Aug 13 04:34:37 PM PDT 24 65203733 ps
T179 /workspace/coverage/default/21.sram_ctrl_multiple_keys.2692891105 Aug 13 04:34:34 PM PDT 24 Aug 13 04:53:23 PM PDT 24 7715902499 ps
T180 /workspace/coverage/default/15.sram_ctrl_lc_escalation.54332630 Aug 13 04:34:23 PM PDT 24 Aug 13 04:34:27 PM PDT 24 1038736673 ps
T181 /workspace/coverage/default/10.sram_ctrl_multiple_keys.702510452 Aug 13 04:34:22 PM PDT 24 Aug 13 04:39:54 PM PDT 24 1317496612 ps
T182 /workspace/coverage/default/36.sram_ctrl_executable.1510304267 Aug 13 04:35:02 PM PDT 24 Aug 13 04:59:21 PM PDT 24 37119142146 ps
T104 /workspace/coverage/default/10.sram_ctrl_access_during_key_req.2046768104 Aug 13 04:34:09 PM PDT 24 Aug 13 04:34:46 PM PDT 24 211906011 ps
T183 /workspace/coverage/default/3.sram_ctrl_stress_pipeline.3072991718 Aug 13 04:33:35 PM PDT 24 Aug 13 04:36:54 PM PDT 24 8716172218 ps
T184 /workspace/coverage/default/30.sram_ctrl_alert_test.3564755545 Aug 13 04:34:53 PM PDT 24 Aug 13 04:34:54 PM PDT 24 11140440 ps
T56 /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.1041013705 Aug 13 04:34:48 PM PDT 24 Aug 13 04:45:54 PM PDT 24 33453410285 ps
T185 /workspace/coverage/default/26.sram_ctrl_executable.3634798849 Aug 13 04:34:27 PM PDT 24 Aug 13 04:49:43 PM PDT 24 10544657421 ps
T146 /workspace/coverage/default/38.sram_ctrl_stress_all.1470449242 Aug 13 04:35:11 PM PDT 24 Aug 13 05:56:35 PM PDT 24 289173246304 ps
T186 /workspace/coverage/default/7.sram_ctrl_stress_pipeline.3791795852 Aug 13 04:34:05 PM PDT 24 Aug 13 04:37:32 PM PDT 24 4284742698 ps
T51 /workspace/coverage/default/47.sram_ctrl_mem_partial_access.3827138051 Aug 13 04:35:44 PM PDT 24 Aug 13 04:35:51 PM PDT 24 175358806 ps
T187 /workspace/coverage/default/4.sram_ctrl_access_during_key_req.4178495087 Aug 13 04:33:50 PM PDT 24 Aug 13 04:50:07 PM PDT 24 3035868141 ps
T188 /workspace/coverage/default/21.sram_ctrl_mem_walk.735257047 Aug 13 04:35:03 PM PDT 24 Aug 13 04:35:14 PM PDT 24 662463997 ps
T21 /workspace/coverage/default/37.sram_ctrl_regwen.893599135 Aug 13 04:35:07 PM PDT 24 Aug 13 04:49:25 PM PDT 24 28168195288 ps
T189 /workspace/coverage/default/17.sram_ctrl_regwen.1065104147 Aug 13 04:34:23 PM PDT 24 Aug 13 04:54:44 PM PDT 24 58532455934 ps
T190 /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.3052846672 Aug 13 04:34:48 PM PDT 24 Aug 13 04:38:35 PM PDT 24 9432478070 ps
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T192 /workspace/coverage/default/47.sram_ctrl_mem_walk.1367175989 Aug 13 04:35:39 PM PDT 24 Aug 13 04:35:45 PM PDT 24 319651609 ps
T193 /workspace/coverage/default/35.sram_ctrl_ram_cfg.2058861704 Aug 13 04:35:06 PM PDT 24 Aug 13 04:35:07 PM PDT 24 165734000 ps
T194 /workspace/coverage/default/49.sram_ctrl_access_during_key_req.1199317228 Aug 13 04:35:54 PM PDT 24 Aug 13 04:52:46 PM PDT 24 9627269835 ps
T195 /workspace/coverage/default/25.sram_ctrl_access_during_key_req.762870416 Aug 13 04:34:31 PM PDT 24 Aug 13 04:43:52 PM PDT 24 11812913667 ps
T57 /workspace/coverage/default/38.sram_ctrl_mem_partial_access.1316711315 Aug 13 04:35:11 PM PDT 24 Aug 13 04:35:17 PM PDT 24 102287509 ps
T196 /workspace/coverage/default/1.sram_ctrl_partial_access.3799699133 Aug 13 04:33:33 PM PDT 24 Aug 13 04:33:51 PM PDT 24 3478327154 ps
T197 /workspace/coverage/default/20.sram_ctrl_multiple_keys.3750831878 Aug 13 04:34:26 PM PDT 24 Aug 13 04:39:36 PM PDT 24 8275440562 ps
T198 /workspace/coverage/default/23.sram_ctrl_regwen.528084214 Aug 13 04:34:41 PM PDT 24 Aug 13 04:51:46 PM PDT 24 15227420496 ps
T199 /workspace/coverage/default/48.sram_ctrl_stress_all.247380403 Aug 13 04:35:44 PM PDT 24 Aug 13 04:54:00 PM PDT 24 28411366708 ps
T70 /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.3014972032 Aug 13 04:34:57 PM PDT 24 Aug 13 04:35:27 PM PDT 24 4447460608 ps
T200 /workspace/coverage/default/0.sram_ctrl_stress_pipeline.1130656285 Aug 13 04:33:42 PM PDT 24 Aug 13 04:37:22 PM PDT 24 6606263473 ps
T201 /workspace/coverage/default/0.sram_ctrl_max_throughput.1588331277 Aug 13 04:33:41 PM PDT 24 Aug 13 04:34:41 PM PDT 24 741335661 ps
T202 /workspace/coverage/default/16.sram_ctrl_mem_partial_access.822973487 Aug 13 04:34:25 PM PDT 24 Aug 13 04:34:30 PM PDT 24 158570482 ps
T203 /workspace/coverage/default/20.sram_ctrl_stress_all.1343814347 Aug 13 04:34:22 PM PDT 24 Aug 13 05:11:08 PM PDT 24 529842705281 ps
T204 /workspace/coverage/default/47.sram_ctrl_partial_access.2202553667 Aug 13 04:35:36 PM PDT 24 Aug 13 04:35:40 PM PDT 24 329500850 ps
T205 /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.1566925791 Aug 13 04:34:11 PM PDT 24 Aug 13 04:37:17 PM PDT 24 16253138358 ps
T144 /workspace/coverage/default/6.sram_ctrl_executable.4014863129 Aug 13 04:34:04 PM PDT 24 Aug 13 04:53:28 PM PDT 24 63882049264 ps
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T207 /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.3728953433 Aug 13 04:34:44 PM PDT 24 Aug 13 04:43:30 PM PDT 24 22773286619 ps
T208 /workspace/coverage/default/29.sram_ctrl_stress_all.976499046 Aug 13 04:34:52 PM PDT 24 Aug 13 05:32:27 PM PDT 24 10716127943 ps
T129 /workspace/coverage/default/7.sram_ctrl_lc_escalation.1778611739 Aug 13 04:33:51 PM PDT 24 Aug 13 04:33:57 PM PDT 24 469583257 ps
T209 /workspace/coverage/default/43.sram_ctrl_multiple_keys.3894782981 Aug 13 04:35:20 PM PDT 24 Aug 13 04:57:15 PM PDT 24 4666786069 ps
T210 /workspace/coverage/default/23.sram_ctrl_access_during_key_req.4294630479 Aug 13 04:34:48 PM PDT 24 Aug 13 04:46:49 PM PDT 24 5891023950 ps
T211 /workspace/coverage/default/15.sram_ctrl_max_throughput.3511880813 Aug 13 04:34:33 PM PDT 24 Aug 13 04:35:47 PM PDT 24 458130368 ps
T212 /workspace/coverage/default/9.sram_ctrl_smoke.600349017 Aug 13 04:33:59 PM PDT 24 Aug 13 04:34:09 PM PDT 24 93992793 ps
T213 /workspace/coverage/default/9.sram_ctrl_lc_escalation.3250373215 Aug 13 04:33:57 PM PDT 24 Aug 13 04:34:04 PM PDT 24 427272507 ps
T58 /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.3324463504 Aug 13 04:34:31 PM PDT 24 Aug 13 04:36:08 PM PDT 24 2885927749 ps
T214 /workspace/coverage/default/10.sram_ctrl_partial_access.1779263488 Aug 13 04:34:16 PM PDT 24 Aug 13 04:34:26 PM PDT 24 1193911578 ps
T215 /workspace/coverage/default/5.sram_ctrl_alert_test.2548630240 Aug 13 04:33:46 PM PDT 24 Aug 13 04:33:46 PM PDT 24 30172820 ps
T216 /workspace/coverage/default/33.sram_ctrl_lc_escalation.2668761531 Aug 13 04:34:56 PM PDT 24 Aug 13 04:35:03 PM PDT 24 1673987427 ps
T217 /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2574513077 Aug 13 04:34:20 PM PDT 24 Aug 13 04:40:53 PM PDT 24 85189387169 ps
T218 /workspace/coverage/default/5.sram_ctrl_max_throughput.662826251 Aug 13 04:34:00 PM PDT 24 Aug 13 04:35:41 PM PDT 24 128311707 ps
T219 /workspace/coverage/default/43.sram_ctrl_access_during_key_req.2760738020 Aug 13 04:35:33 PM PDT 24 Aug 13 04:48:42 PM PDT 24 2500951754 ps
T220 /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.1017795220 Aug 13 04:34:18 PM PDT 24 Aug 13 04:34:21 PM PDT 24 57221342 ps
T221 /workspace/coverage/default/14.sram_ctrl_multiple_keys.2709222446 Aug 13 04:34:28 PM PDT 24 Aug 13 04:48:03 PM PDT 24 6606700848 ps
T222 /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.1346489046 Aug 13 04:35:52 PM PDT 24 Aug 13 04:36:23 PM PDT 24 433968815 ps
T223 /workspace/coverage/default/4.sram_ctrl_stress_pipeline.1763230201 Aug 13 04:33:44 PM PDT 24 Aug 13 04:36:57 PM PDT 24 7808924269 ps
T59 /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.1132538335 Aug 13 04:34:49 PM PDT 24 Aug 13 04:35:45 PM PDT 24 4409389495 ps
T224 /workspace/coverage/default/23.sram_ctrl_partial_access.1636133235 Aug 13 04:34:35 PM PDT 24 Aug 13 04:34:40 PM PDT 24 102517598 ps
T225 /workspace/coverage/default/2.sram_ctrl_regwen.3944763439 Aug 13 04:33:40 PM PDT 24 Aug 13 05:01:02 PM PDT 24 12938383602 ps
T226 /workspace/coverage/default/1.sram_ctrl_lc_escalation.3780296194 Aug 13 04:33:42 PM PDT 24 Aug 13 04:33:48 PM PDT 24 2730006223 ps
T227 /workspace/coverage/default/3.sram_ctrl_bijection.3418261546 Aug 13 04:33:50 PM PDT 24 Aug 13 04:34:30 PM PDT 24 8726323379 ps
T145 /workspace/coverage/default/3.sram_ctrl_executable.2246712614 Aug 13 04:33:52 PM PDT 24 Aug 13 04:56:43 PM PDT 24 15543127832 ps
T228 /workspace/coverage/default/46.sram_ctrl_mem_partial_access.3297604962 Aug 13 04:35:35 PM PDT 24 Aug 13 04:35:40 PM PDT 24 121773956 ps
T71 /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.2217335458 Aug 13 04:35:27 PM PDT 24 Aug 13 04:43:23 PM PDT 24 13804071295 ps
T229 /workspace/coverage/default/44.sram_ctrl_access_during_key_req.2534485645 Aug 13 04:35:41 PM PDT 24 Aug 13 04:36:58 PM PDT 24 915399900 ps
T230 /workspace/coverage/default/47.sram_ctrl_access_during_key_req.9496914 Aug 13 04:35:48 PM PDT 24 Aug 13 04:52:03 PM PDT 24 17734661030 ps
T231 /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.1178965156 Aug 13 04:34:05 PM PDT 24 Aug 13 04:35:52 PM PDT 24 154317461 ps
T232 /workspace/coverage/default/18.sram_ctrl_lc_escalation.3522841103 Aug 13 04:34:21 PM PDT 24 Aug 13 04:34:26 PM PDT 24 466832437 ps
T233 /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.2476333904 Aug 13 04:33:55 PM PDT 24 Aug 13 04:38:34 PM PDT 24 24346738350 ps
T234 /workspace/coverage/default/15.sram_ctrl_regwen.930475280 Aug 13 04:34:26 PM PDT 24 Aug 13 05:03:03 PM PDT 24 14378300632 ps
T235 /workspace/coverage/default/34.sram_ctrl_bijection.3358051119 Aug 13 04:35:03 PM PDT 24 Aug 13 04:35:42 PM PDT 24 2510031686 ps
T236 /workspace/coverage/default/38.sram_ctrl_access_during_key_req.666303076 Aug 13 04:35:09 PM PDT 24 Aug 13 04:47:30 PM PDT 24 19796165301 ps
T237 /workspace/coverage/default/22.sram_ctrl_ram_cfg.4104102870 Aug 13 04:34:38 PM PDT 24 Aug 13 04:34:39 PM PDT 24 29052415 ps
T238 /workspace/coverage/default/6.sram_ctrl_mem_walk.4045658054 Aug 13 04:33:47 PM PDT 24 Aug 13 04:33:57 PM PDT 24 954569112 ps
T72 /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.3831088082 Aug 13 04:33:43 PM PDT 24 Aug 13 04:36:19 PM PDT 24 371584620 ps
T239 /workspace/coverage/default/12.sram_ctrl_stress_all.1497086367 Aug 13 04:34:29 PM PDT 24 Aug 13 05:12:38 PM PDT 24 85959949384 ps
T73 /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.3697155099 Aug 13 04:33:40 PM PDT 24 Aug 13 04:42:27 PM PDT 24 3806816040 ps
T240 /workspace/coverage/default/9.sram_ctrl_stress_pipeline.4087327487 Aug 13 04:34:07 PM PDT 24 Aug 13 04:39:17 PM PDT 24 12917034020 ps
T241 /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.2295981298 Aug 13 04:35:20 PM PDT 24 Aug 13 04:37:39 PM PDT 24 643697151 ps
T242 /workspace/coverage/default/19.sram_ctrl_bijection.1896862633 Aug 13 04:34:37 PM PDT 24 Aug 13 04:35:17 PM PDT 24 635229419 ps
T243 /workspace/coverage/default/27.sram_ctrl_smoke.3428120695 Aug 13 04:34:31 PM PDT 24 Aug 13 04:36:28 PM PDT 24 3346238824 ps
T244 /workspace/coverage/default/44.sram_ctrl_alert_test.1361514990 Aug 13 04:35:30 PM PDT 24 Aug 13 04:35:31 PM PDT 24 43615748 ps
T245 /workspace/coverage/default/19.sram_ctrl_mem_partial_access.2612713341 Aug 13 04:34:31 PM PDT 24 Aug 13 04:34:36 PM PDT 24 165428809 ps
T246 /workspace/coverage/default/42.sram_ctrl_multiple_keys.3537876911 Aug 13 04:35:31 PM PDT 24 Aug 13 04:42:22 PM PDT 24 20162236834 ps
T247 /workspace/coverage/default/42.sram_ctrl_bijection.3556578004 Aug 13 04:35:26 PM PDT 24 Aug 13 04:36:12 PM PDT 24 2479924381 ps
T248 /workspace/coverage/default/17.sram_ctrl_partial_access.877365722 Aug 13 04:34:16 PM PDT 24 Aug 13 04:36:28 PM PDT 24 5769850268 ps
T249 /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.3384411372 Aug 13 04:35:01 PM PDT 24 Aug 13 04:38:11 PM PDT 24 3277586743 ps
T250 /workspace/coverage/default/20.sram_ctrl_alert_test.3542548019 Aug 13 04:34:25 PM PDT 24 Aug 13 04:34:26 PM PDT 24 11719908 ps
T251 /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.946401823 Aug 13 04:34:41 PM PDT 24 Aug 13 04:34:52 PM PDT 24 1156835865 ps
T252 /workspace/coverage/default/41.sram_ctrl_regwen.114090857 Aug 13 04:35:19 PM PDT 24 Aug 13 04:50:49 PM PDT 24 5371242134 ps
T253 /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.894763611 Aug 13 04:33:48 PM PDT 24 Aug 13 04:34:14 PM PDT 24 4515447838 ps
T254 /workspace/coverage/default/17.sram_ctrl_max_throughput.2209029657 Aug 13 04:34:21 PM PDT 24 Aug 13 04:34:22 PM PDT 24 139234525 ps
T255 /workspace/coverage/default/33.sram_ctrl_ram_cfg.3227141620 Aug 13 04:35:03 PM PDT 24 Aug 13 04:35:04 PM PDT 24 29445278 ps
T256 /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.595231060 Aug 13 04:35:15 PM PDT 24 Aug 13 04:39:24 PM PDT 24 36976059531 ps
T257 /workspace/coverage/default/31.sram_ctrl_ram_cfg.2686398364 Aug 13 04:34:50 PM PDT 24 Aug 13 04:34:51 PM PDT 24 81371244 ps
T15 /workspace/coverage/default/4.sram_ctrl_sec_cm.565173734 Aug 13 04:33:48 PM PDT 24 Aug 13 04:33:50 PM PDT 24 202262665 ps
T30 /workspace/coverage/default/10.sram_ctrl_bijection.469762147 Aug 13 04:34:00 PM PDT 24 Aug 13 04:34:18 PM PDT 24 1798871442 ps
T31 /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.1781860043 Aug 13 04:33:55 PM PDT 24 Aug 13 04:34:30 PM PDT 24 111609831 ps
T32 /workspace/coverage/default/49.sram_ctrl_bijection.1984339540 Aug 13 04:35:56 PM PDT 24 Aug 13 04:37:18 PM PDT 24 3685999032 ps
T33 /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.2373602613 Aug 13 04:33:38 PM PDT 24 Aug 13 04:38:37 PM PDT 24 44971415320 ps
T34 /workspace/coverage/default/13.sram_ctrl_stress_pipeline.2992433232 Aug 13 04:34:13 PM PDT 24 Aug 13 04:37:33 PM PDT 24 2037892326 ps
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