Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

2 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64
tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_prim_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_sram_ctrl_regs_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	13837884	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

59394601

1

T1

22066

T2

22234

T3

175082

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	36501235	1			T1	11977		T2	12253		T3	96374
values[0x0]	16973207	1			T1	5839		T2	5887		T3	46730
values[0x1]	19758043	1			T1	6399		T2	6336		T3	49652

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	6893981	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

66338504

1

T1

23108

T2

23349

T3

184000

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	294397	1			T1	76		T2	104		T3	668
valid_sources[0x01]	258647	1			T1	104		T2	85		T3	448
valid_sources[0x02]	273032	1			T1	107		T2	95		T3	1536
valid_sources[0x03]	263025	1			T1	97		T2	95		T3	750
valid_sources[0x04]	269109	1			T1	102		T2	101		T3	136
valid_sources[0x05]	257767	1			T1	90		T2	85		T3	35
valid_sources[0x06]	294285	1			T1	92		T2	96		T3	195
valid_sources[0x07]	285420	1			T1	93		T2	104		T3	4679
valid_sources[0x08]	277019	1			T1	88		T2	87		T3	235
valid_sources[0x09]	279609	1			T1	83		T2	110		T3	175
valid_sources[0x0a]	298532	1			T1	87		T2	92		T3	643
valid_sources[0x0b]	269982	1			T1	87		T2	100		T9	20
valid_sources[0x0c]	256977	1			T1	83		T2	104		T9	17
valid_sources[0x0d]	288558	1			T1	101		T2	108		T3	1407
valid_sources[0x0e]	258817	1			T1	100		T2	104		T3	708
valid_sources[0x0f]	297526	1			T1	94		T2	107		T3	156
valid_sources[0x10]	284398	1			T1	103		T2	71		T3	601
valid_sources[0x11]	287274	1			T1	100		T2	84		T3	181
valid_sources[0x12]	266850	1			T1	110		T2	87		T3	463
valid_sources[0x13]	284701	1			T1	89		T2	93		T3	1180
valid_sources[0x14]	295047	1			T1	110		T2	96		T3	504
valid_sources[0x15]	279001	1			T1	76		T2	91		T3	361
valid_sources[0x16]	352354	1			T1	104		T2	77		T3	95
valid_sources[0x17]	286507	1			T1	98		T2	103		T3	1193
valid_sources[0x18]	276781	1			T1	102		T2	94		T3	820
valid_sources[0x19]	267343	1			T1	90		T2	74		T3	158
valid_sources[0x1a]	271472	1			T1	98		T2	94		T3	215
valid_sources[0x1b]	256523	1			T1	110		T2	110		T3	689
valid_sources[0x1c]	281369	1			T1	90		T2	99		T3	123
valid_sources[0x1d]	311488	1			T1	95		T2	99		T3	2
valid_sources[0x1e]	299047	1			T1	117		T2	87		T3	465
valid_sources[0x1f]	258667	1			T1	80		T2	110		T3	500
valid_sources[0x20]	258409	1			T1	82		T2	96		T3	606
valid_sources[0x21]	268475	1			T1	95		T2	96		T3	111
valid_sources[0x22]	272617	1			T1	95		T2	83		T3	55
valid_sources[0x23]	263279	1			T1	77		T2	89		T3	609
valid_sources[0x24]	259593	1			T1	96		T2	84		T3	109
valid_sources[0x25]	259918	1			T1	93		T2	114		T3	947
valid_sources[0x26]	256134	1			T1	97		T2	105		T3	228
valid_sources[0x27]	295358	1			T1	105		T2	116		T3	93
valid_sources[0x28]	276889	1			T1	111		T2	108		T3	62
valid_sources[0x29]	363446	1			T1	107		T2	93		T3	218
valid_sources[0x2a]	288763	1			T1	98		T2	83		T3	1138
valid_sources[0x2b]	278339	1			T1	93		T2	92		T3	413
valid_sources[0x2c]	267658	1			T1	89		T2	102		T3	2168
valid_sources[0x2d]	345362	1			T1	107		T2	96		T3	352
valid_sources[0x2e]	264785	1			T1	92		T2	81		T3	31
valid_sources[0x2f]	306770	1			T1	92		T2	89		T3	692
valid_sources[0x30]	266423	1			T1	106		T2	87		T3	350
valid_sources[0x31]	276253	1			T1	95		T2	101		T3	34
valid_sources[0x32]	266445	1			T1	81		T2	110		T3	583
valid_sources[0x33]	259272	1			T1	103		T2	105		T3	1018
valid_sources[0x34]	289484	1			T1	111		T2	77		T3	501
valid_sources[0x35]	253912	1			T1	106		T2	98		T3	387
valid_sources[0x36]	308622	1			T1	92		T2	91		T3	124
valid_sources[0x37]	261394	1			T1	84		T2	80		T3	627
valid_sources[0x38]	310614	1			T1	93		T2	108		T3	673
valid_sources[0x39]	272727	1			T1	93		T2	86		T3	333
valid_sources[0x3a]	260797	1			T1	80		T2	85		T3	1270
valid_sources[0x3b]	292393	1			T1	107		T2	96		T3	301
valid_sources[0x3c]	265336	1			T1	92		T2	98		T3	121
valid_sources[0x3d]	293089	1			T1	97		T2	111		T3	479
valid_sources[0x3e]	270044	1			T1	73		T2	87		T3	733
valid_sources[0x3f]	261511	1			T1	85		T2	96		T3	387
valid_sources[0x40]	267310	1			T1	80		T2	88		T3	211
valid_sources[0x41]	264061	1			T1	81		T2	81		T3	535
valid_sources[0x42]	317436	1			T1	104		T2	89		T3	1197
valid_sources[0x43]	309108	1			T1	97		T2	78		T3	427
valid_sources[0x44]	254321	1			T1	76		T2	104		T3	342
valid_sources[0x45]	256165	1			T1	98		T2	107		T3	595
valid_sources[0x46]	265141	1			T1	91		T2	75		T3	366
valid_sources[0x47]	286396	1			T1	121		T2	91		T3	5
valid_sources[0x48]	279260	1			T1	106		T2	88		T3	549
valid_sources[0x49]	296201	1			T1	87		T2	109		T3	967
valid_sources[0x4a]	287159	1			T1	85		T2	107		T9	10
valid_sources[0x4b]	264625	1			T1	85		T2	84		T3	543
valid_sources[0x4c]	280066	1			T1	86		T2	89		T3	323
valid_sources[0x4d]	276850	1			T1	102		T2	107		T3	322
valid_sources[0x4e]	317341	1			T1	79		T2	92		T3	875
valid_sources[0x4f]	288101	1			T1	97		T2	117		T3	371
valid_sources[0x50]	259005	1			T1	80		T2	117		T3	579
valid_sources[0x51]	305975	1			T1	103		T2	116		T3	612
valid_sources[0x52]	257165	1			T1	107		T2	109		T3	33
valid_sources[0x53]	316317	1			T1	112		T2	93		T3	299
valid_sources[0x54]	320420	1			T1	95		T2	101		T3	134
valid_sources[0x55]	328827	1			T1	83		T2	89		T3	978
valid_sources[0x56]	275046	1			T1	106		T2	100		T3	739
valid_sources[0x57]	263955	1			T1	93		T2	90		T3	444
valid_sources[0x58]	267833	1			T1	100		T2	93		T3	208
valid_sources[0x59]	298644	1			T1	103		T2	98		T3	10493
valid_sources[0x5a]	287414	1			T1	90		T2	104		T3	361
valid_sources[0x5b]	303758	1			T1	105		T2	75		T3	14
valid_sources[0x5c]	290357	1			T1	106		T2	107		T3	18358
valid_sources[0x5d]	286209	1			T1	98		T2	103		T3	1654
valid_sources[0x5e]	327631	1			T1	80		T2	104		T3	411
valid_sources[0x5f]	274229	1			T1	97		T2	97		T3	746
valid_sources[0x60]	279952	1			T1	113		T2	106		T3	105
valid_sources[0x61]	284214	1			T1	107		T2	83		T3	663
valid_sources[0x62]	295110	1			T1	91		T2	95		T3	855
valid_sources[0x63]	282801	1			T1	89		T2	105		T3	334
valid_sources[0x64]	267086	1			T1	82		T2	87		T3	338
valid_sources[0x65]	275074	1			T1	79		T2	78		T3	527
valid_sources[0x66]	277097	1			T1	95		T2	119		T3	6137
valid_sources[0x67]	266241	1			T1	78		T2	103		T3	457
valid_sources[0x68]	267887	1			T1	84		T2	82		T3	118
valid_sources[0x69]	276862	1			T1	91		T2	87		T3	897
valid_sources[0x6a]	271095	1			T1	87		T2	109		T3	454
valid_sources[0x6b]	287534	1			T1	96		T2	80		T3	203
valid_sources[0x6c]	262484	1			T1	105		T2	92		T3	67
valid_sources[0x6d]	284359	1			T1	98		T2	78		T3	1136
valid_sources[0x6e]	274508	1			T1	81		T2	82		T3	85
valid_sources[0x6f]	274193	1			T1	96		T2	97		T3	835
valid_sources[0x70]	287915	1			T1	100		T2	99		T3	231
valid_sources[0x71]	269312	1			T1	97		T2	101		T3	544
valid_sources[0x72]	259200	1			T1	112		T2	92		T3	802
valid_sources[0x73]	312548	1			T1	105		T2	80		T3	454
valid_sources[0x74]	302519	1			T1	91		T2	102		T3	991
valid_sources[0x75]	280126	1			T1	111		T2	94		T3	329
valid_sources[0x76]	276341	1			T1	117		T2	119		T3	848
valid_sources[0x77]	346790	1			T1	84		T2	104		T3	242
valid_sources[0x78]	284942	1			T1	88		T2	95		T3	553
valid_sources[0x79]	259513	1			T1	125		T2	108		T3	260
valid_sources[0x7a]	285077	1			T1	81		T2	98		T3	201
valid_sources[0x7b]	326274	1			T1	90		T2	101		T3	573
valid_sources[0x7c]	338636	1			T1	98		T2	84		T3	108
valid_sources[0x7d]	255887	1			T1	93		T2	88		T3	346
valid_sources[0x7e]	286196	1			T1	91		T2	83		T3	1108
valid_sources[0x7f]	269579	1			T1	101		T2	106		T3	500
valid_sources[0x80]	264929	1			T1	99		T2	99		T3	257

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

29591174

1

T1

10915

T2

11140

T3

87519

values[0x0]

all_enables

biggest_size

14895281

1

T1

5485

T2

5555

T3

44099

values[0x1]

all_enables

biggest_size

14908146

1

T1

5666

T2

5539

T3

43464

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	37008	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

135131

1

T2

2

T3

12

T9

1

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	50265	1			T13	10		T8	80		T19	1204
values[0x0]	58854	1			T1	6		T2	2		T3	18
values[0x1]	63020	1			T1	2		T2	2		T3	18

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	28131	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

144008

1

T2

2

T3

13

T9

1

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	841	1			T21	33		T27	178		T37	13
valid_sources[0x01]	445	1			T19	1		T21	14		T14	1
valid_sources[0x02]	476	1			T8	2		T21	13		T37	5
valid_sources[0x03]	512	1			T19	21		T21	14		T55	2
valid_sources[0x04]	492	1			T2	3		T19	4		T21	11
valid_sources[0x05]	556	1			T21	18		T55	1		T46	7
valid_sources[0x06]	515	1			T3	1		T19	1		T21	23
valid_sources[0x07]	565	1			T19	3		T21	24		T27	1
valid_sources[0x08]	777	1			T19	29		T20	1		T21	24
valid_sources[0x09]	476	1			T19	8		T21	14		T55	2
valid_sources[0x0a]	522	1			T19	12		T21	21		T37	9
valid_sources[0x0b]	711	1			T3	1		T19	2		T21	12
valid_sources[0x0c]	530	1			T19	7		T21	24		T37	7
valid_sources[0x0d]	766	1			T19	39		T21	21		T27	3
valid_sources[0x0e]	784	1			T19	68		T21	17		T37	4
valid_sources[0x0f]	696	1			T19	10		T20	1		T21	21
valid_sources[0x10]	543	1			T8	3		T19	11		T21	21
valid_sources[0x11]	770	1			T19	46		T21	29		T27	2
valid_sources[0x12]	697	1			T8	2		T19	6		T33	5
valid_sources[0x13]	473	1			T19	15		T21	16		T35	1
valid_sources[0x14]	899	1			T19	32		T21	21		T139	1
valid_sources[0x15]	567	1			T21	16		T55	1		T136	1
valid_sources[0x16]	988	1			T8	4		T19	18		T21	23
valid_sources[0x17]	540	1			T8	2		T19	6		T21	19
valid_sources[0x18]	704	1			T3	2		T19	17		T21	15
valid_sources[0x19]	628	1			T8	1		T19	38		T21	19
valid_sources[0x1a]	569	1			T19	6		T21	22		T27	1
valid_sources[0x1b]	785	1			T19	1		T21	21		T27	4
valid_sources[0x1c]	677	1			T19	135		T21	13		T140	1
valid_sources[0x1d]	484	1			T19	5		T21	17		T55	3
valid_sources[0x1e]	698	1			T3	1		T19	42		T21	16
valid_sources[0x1f]	539	1			T19	1		T21	24		T36	1
valid_sources[0x20]	556	1			T19	28		T21	12		T37	6
valid_sources[0x21]	829	1			T19	11		T21	20		T27	98
valid_sources[0x22]	730	1			T3	1		T19	21		T21	14
valid_sources[0x23]	679	1			T8	1		T19	36		T21	24
valid_sources[0x24]	632	1			T19	7		T21	14		T55	3
valid_sources[0x25]	503	1			T19	2		T20	1		T21	27
valid_sources[0x26]	733	1			T8	1		T19	1		T21	20
valid_sources[0x27]	495	1			T19	20		T21	18		T37	8
valid_sources[0x28]	507	1			T8	4		T21	27		T14	1
valid_sources[0x29]	617	1			T13	6		T19	39		T21	11
valid_sources[0x2a]	666	1			T19	6		T21	22		T37	8
valid_sources[0x2b]	908	1			T8	1		T19	43		T20	1
valid_sources[0x2c]	749	1			T19	52		T20	1		T21	23
valid_sources[0x2d]	521	1			T19	14		T21	17		T55	1
valid_sources[0x2e]	700	1			T19	62		T21	15		T27	5
valid_sources[0x2f]	915	1			T19	35		T21	18		T37	5
valid_sources[0x30]	464	1			T19	37		T21	20		T55	1
valid_sources[0x31]	778	1			T8	2		T19	44		T21	17
valid_sources[0x32]	1064	1			T3	2		T21	14		T37	13
valid_sources[0x33]	521	1			T19	35		T21	27		T55	1
valid_sources[0x34]	661	1			T19	19		T21	25		T27	1
valid_sources[0x35]	915	1			T19	23		T21	15		T55	3
valid_sources[0x36]	555	1			T2	1		T19	32		T21	14
valid_sources[0x37]	539	1			T3	1		T19	37		T21	14
valid_sources[0x38]	1021	1			T19	3		T21	14		T55	1
valid_sources[0x39]	704	1			T3	1		T19	6		T21	24
valid_sources[0x3a]	1070	1			T21	16		T55	3		T22	2
valid_sources[0x3b]	1161	1			T8	1		T19	47		T21	39
valid_sources[0x3c]	857	1			T19	57		T21	15		T27	1
valid_sources[0x3d]	819	1			T19	14		T21	24		T22	1
valid_sources[0x3e]	694	1			T3	1		T19	4		T21	25
valid_sources[0x3f]	984	1			T19	24		T21	24		T37	6
valid_sources[0x40]	1004	1			T19	75		T21	18		T27	99
valid_sources[0x41]	1124	1			T21	19		T55	1		T37	7
valid_sources[0x42]	569	1			T19	28		T21	15		T55	2
valid_sources[0x43]	1030	1			T19	5		T21	22		T27	81
valid_sources[0x44]	595	1			T19	64		T21	18		T55	2
valid_sources[0x45]	568	1			T19	1		T21	14		T27	1
valid_sources[0x46]	621	1			T19	49		T20	1		T21	21
valid_sources[0x47]	572	1			T8	2		T19	4		T21	26
valid_sources[0x48]	558	1			T19	76		T21	23		T27	1
valid_sources[0x49]	786	1			T8	1		T19	41		T21	8
valid_sources[0x4a]	617	1			T25	1		T19	1		T21	27
valid_sources[0x4b]	735	1			T19	17		T21	14		T27	2
valid_sources[0x4c]	520	1			T21	20		T55	1		T22	1
valid_sources[0x4d]	519	1			T19	8		T21	17		T55	1
valid_sources[0x4e]	769	1			T19	2		T21	31		T45	1
valid_sources[0x4f]	1099	1			T19	17		T21	14		T27	4
valid_sources[0x50]	682	1			T19	15		T21	24		T37	3
valid_sources[0x51]	636	1			T19	3		T21	11		T27	1
valid_sources[0x52]	536	1			T19	5		T21	18		T55	1
valid_sources[0x53]	553	1			T1	2		T3	1		T19	3
valid_sources[0x54]	525	1			T19	40		T21	22		T55	1
valid_sources[0x55]	609	1			T19	15		T21	18		T27	2
valid_sources[0x56]	424	1			T19	1		T21	2		T27	2
valid_sources[0x57]	587	1			T19	20		T21	14		T27	48
valid_sources[0x58]	860	1			T13	8		T19	13		T21	15
valid_sources[0x59]	495	1			T8	1		T19	3		T21	8
valid_sources[0x5a]	563	1			T19	72		T21	29		T27	4
valid_sources[0x5b]	627	1			T21	16		T41	3		T37	6
valid_sources[0x5c]	522	1			T19	12		T21	19		T37	11
valid_sources[0x5d]	643	1			T19	17		T21	15		T139	2
valid_sources[0x5e]	567	1			T13	6		T19	19		T21	13
valid_sources[0x5f]	884	1			T19	20		T21	17		T22	1
valid_sources[0x60]	660	1			T8	1		T19	8		T21	28
valid_sources[0x61]	642	1			T19	34		T21	24		T37	10
valid_sources[0x62]	582	1			T19	15		T21	13		T55	1
valid_sources[0x63]	608	1			T19	60		T21	11		T27	63
valid_sources[0x64]	531	1			T21	28		T37	5		T47	25
valid_sources[0x65]	434	1			T25	3		T19	1		T21	11
valid_sources[0x66]	655	1			T1	6		T3	1		T19	17
valid_sources[0x67]	639	1			T19	1		T21	17		T55	3
valid_sources[0x68]	484	1			T13	8		T19	3		T21	18
valid_sources[0x69]	677	1			T3	1		T19	21		T21	22
valid_sources[0x6a]	626	1			T3	1		T21	23		T37	6
valid_sources[0x6b]	500	1			T3	1		T19	51		T21	16
valid_sources[0x6c]	569	1			T19	13		T21	17		T55	2
valid_sources[0x6d]	742	1			T19	11		T21	14		T55	1
valid_sources[0x6e]	543	1			T21	18		T27	20		T55	3
valid_sources[0x6f]	746	1			T19	78		T21	11		T27	2
valid_sources[0x70]	767	1			T21	25		T27	75		T55	2
valid_sources[0x71]	586	1			T19	2		T21	25		T55	1
valid_sources[0x72]	618	1			T21	12		T27	5		T22	1
valid_sources[0x73]	933	1			T3	1		T19	60		T21	23
valid_sources[0x74]	593	1			T19	14		T21	20		T27	114
valid_sources[0x75]	671	1			T19	1		T20	2		T21	9
valid_sources[0x76]	446	1			T19	18		T21	29		T27	2
valid_sources[0x77]	575	1			T19	1		T21	21		T14	1
valid_sources[0x78]	951	1			T21	21		T55	1		T37	12
valid_sources[0x79]	756	1			T19	4		T21	26		T27	180
valid_sources[0x7a]	507	1			T19	17		T21	31		T55	1
valid_sources[0x7b]	977	1			T21	17		T27	287		T55	1
valid_sources[0x7c]	548	1			T25	1		T19	4		T21	24
valid_sources[0x7d]	585	1			T19	1		T21	21		T55	2
valid_sources[0x7e]	701	1			T19	1		T21	19		T55	1
valid_sources[0x7f]	719	1			T8	1		T19	26		T21	25
valid_sources[0x80]	485	1			T19	37		T21	16		T139	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

37419

1

T13

6

T19

1074

T21

1183

values[0x0]

all_enables

biggest_size

50166

1

T2

1

T3

9

T11

2

values[0x1]

all_enables

biggest_size

47546

1

T2

1

T3

3

T9

1