Group : dv_base_reg_pkg::dv_base_lockable_field_cov::regwen_val_when_new_value_written_cg
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Group Instance : lockable_field_cov_of_sram_ctrl_regs_reg_block.readback.en
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.readback.en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 2 0 0.00


Variables for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.readback.en
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 2 0 0.00 100 1 1 2



Group Instance : lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.init
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.init

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.init
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.renew_scr_key
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.renew_scr_key

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.ctrl.renew_scr_key
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2



Group Instance : lockable_field_cov_of_sram_ctrl_regs_reg_block.exec.en
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.exec.en

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00


Variables for Group Instance lockable_field_cov_of_sram_ctrl_regs_reg_block.exec.en
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_regwen 2 0 2 100.00 100 1 1 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_regwen

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1161 1 T25 2 T17 1 T24 1
auto[1] 199 1 T16 1 T17 1 T24 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 1133 1 T25 2 T24 2 T26 5
auto[1] 227 1 T16 1 T17 2 T148 1


Summary for Variable cp_regwen

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 0 2 100.00


Automatically Generated Bins for cp_regwen

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
auto[0] 396 1 T61 2 T56 9 T76 5
auto[1] 671 1 T149 64 T56 8 T76 12

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