Group : tb.dut.u_sysrst_ctrl_cov_if::sysrst_ctrl_combo_precondition_det_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tb.dut.u_sysrst_ctrl_cov_if::sysrst_ctrl_combo_precondition_det_cg
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 83.33 1 100 1 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_sysrst_ctrl_cov_0/sysrst_ctrl_cov_if.sv

4 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
sysrst_ctrl_combo_precondition_det_cg1 66.67 1 100 1 64 64
sysrst_ctrl_combo_precondition_det_cg3 66.67 1 100 1 64 64
sysrst_ctrl_combo_precondition_det_cg0 100.00 1 100 1 64 64
sysrst_ctrl_combo_precondition_det_cg2 100.00 1 100 1 64 64




Group Instance : sysrst_ctrl_combo_precondition_det_cg1
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
66.67 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_combo_precondition_det_cg1

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 1 2 66.67


Variables for Group Instance sysrst_ctrl_combo_precondition_det_cg1
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_precondition_timer 3 1 2 66.67 100 1 1 0



Group Instance : sysrst_ctrl_combo_precondition_det_cg3
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
66.67 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_combo_precondition_det_cg3

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 1 2 66.67


Variables for Group Instance sysrst_ctrl_combo_precondition_det_cg3
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_precondition_timer 3 1 2 66.67 100 1 1 0



Group Instance : sysrst_ctrl_combo_precondition_det_cg0
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_combo_precondition_det_cg0

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance sysrst_ctrl_combo_precondition_det_cg0
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_precondition_timer 3 0 3 100.00 100 1 1 0



Group Instance : sysrst_ctrl_combo_precondition_det_cg2
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance sysrst_ctrl_combo_precondition_det_cg2

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 3 0 3 100.00


Variables for Group Instance sysrst_ctrl_combo_precondition_det_cg2
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_precondition_timer 3 0 3 100.00 100 1 1 0


Summary for Variable cp_precondition_timer

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 1 2 66.67


User Defined Bins for cp_precondition_timer

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
mid_range 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
max_range 17 1 T40 6 T369 2 T257 9
min_range 344 1 T32 1 T16 9 T91 1


Summary for Variable cp_precondition_timer

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 1 2 66.67


User Defined Bins for cp_precondition_timer

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
mid_range 0 1 1


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
max_range 2 1 T120 1 T125 1 - -
min_range 359 1 T40 6 T32 1 T16 9


Summary for Variable cp_precondition_timer

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_precondition_timer

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
max_range 1 1 T108 1 - - - -
mid_range 4 1 T370 4 - - - -
min_range 356 1 T40 6 T32 1 T16 9


Summary for Variable cp_precondition_timer

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_precondition_timer

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
max_range 26 1 T19 4 T371 1 T357 5
mid_range 7 1 T350 7 - - - -
min_range 328 1 T40 6 T32 1 T16 9

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