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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.55 99.29 96.26 100.00 95.51 98.68 99.34 93.79


Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T213 /workspace/coverage/default/15.sysrst_ctrl_in_out_inverted.1551369168 Oct 11 12:33:23 PM PDT 23 Oct 11 12:33:26 PM PDT 23 2500402451 ps
T214 /workspace/coverage/default/34.sysrst_ctrl_stress_all.2284362303 Oct 11 12:34:58 PM PDT 23 Oct 11 12:35:17 PM PDT 23 7375477712 ps
T215 /workspace/coverage/default/43.sysrst_ctrl_smoke.2094186007 Oct 11 12:33:48 PM PDT 23 Oct 11 12:33:51 PM PDT 23 2119921687 ps
T216 /workspace/coverage/default/22.sysrst_ctrl_stress_all_with_rand_reset.2652082301 Oct 11 12:33:18 PM PDT 23 Oct 11 12:34:47 PM PDT 23 35737890764 ps
T110 /workspace/coverage/default/32.sysrst_ctrl_combo_detect_with_pre_cond.511462221 Oct 11 12:33:56 PM PDT 23 Oct 11 12:34:31 PM PDT 23 62212754504 ps
T467 /workspace/coverage/default/8.sysrst_ctrl_alert_test.3296875874 Oct 11 12:32:57 PM PDT 23 Oct 11 12:33:03 PM PDT 23 2010927882 ps
T331 /workspace/coverage/default/97.sysrst_ctrl_combo_detect_with_pre_cond.2930787665 Oct 11 12:34:10 PM PDT 23 Oct 11 12:35:06 PM PDT 23 83345315262 ps
T468 /workspace/coverage/default/98.sysrst_ctrl_combo_detect_with_pre_cond.1433298363 Oct 11 12:34:21 PM PDT 23 Oct 11 12:35:47 PM PDT 23 31997860649 ps
T333 /workspace/coverage/default/37.sysrst_ctrl_combo_detect_with_pre_cond.1698610615 Oct 11 12:34:07 PM PDT 23 Oct 11 12:34:55 PM PDT 23 72312189584 ps
T469 /workspace/coverage/default/24.sysrst_ctrl_pin_override_test.4029861041 Oct 11 12:33:22 PM PDT 23 Oct 11 12:33:29 PM PDT 23 2508573587 ps
T279 /workspace/coverage/default/26.sysrst_ctrl_combo_detect.3483200923 Oct 11 12:33:13 PM PDT 23 Oct 11 12:37:05 PM PDT 23 116534192028 ps
T281 /workspace/coverage/default/72.sysrst_ctrl_combo_detect_with_pre_cond.4095097662 Oct 11 12:34:17 PM PDT 23 Oct 11 12:34:28 PM PDT 23 26003654821 ps
T111 /workspace/coverage/default/44.sysrst_ctrl_combo_detect.370403094 Oct 11 12:34:13 PM PDT 23 Oct 11 12:36:01 PM PDT 23 121331123922 ps
T119 /workspace/coverage/default/15.sysrst_ctrl_combo_detect.3426152777 Oct 11 12:33:11 PM PDT 23 Oct 11 12:37:25 PM PDT 23 93951399446 ps
T120 /workspace/coverage/default/66.sysrst_ctrl_combo_detect_with_pre_cond.4118560825 Oct 11 12:34:05 PM PDT 23 Oct 11 12:34:24 PM PDT 23 25594238912 ps
T121 /workspace/coverage/default/33.sysrst_ctrl_edge_detect.3324556219 Oct 11 12:34:07 PM PDT 23 Oct 11 12:34:16 PM PDT 23 2486581211 ps
T60 /workspace/coverage/default/19.sysrst_ctrl_edge_detect.2114367552 Oct 11 12:33:41 PM PDT 23 Oct 11 12:33:44 PM PDT 23 3016758404 ps
T122 /workspace/coverage/default/40.sysrst_ctrl_smoke.4017961848 Oct 11 12:34:30 PM PDT 23 Oct 11 12:34:36 PM PDT 23 2115692126 ps
T123 /workspace/coverage/default/11.sysrst_ctrl_stress_all.3088119656 Oct 11 12:33:25 PM PDT 23 Oct 11 12:34:07 PM PDT 23 15584369924 ps
T124 /workspace/coverage/default/15.sysrst_ctrl_ec_pwr_on_rst.2703785303 Oct 11 12:33:14 PM PDT 23 Oct 11 12:33:21 PM PDT 23 2467536416 ps
T125 /workspace/coverage/default/80.sysrst_ctrl_combo_detect_with_pre_cond.2311077463 Oct 11 12:34:08 PM PDT 23 Oct 11 12:34:57 PM PDT 23 77347272978 ps
T126 /workspace/coverage/default/40.sysrst_ctrl_ultra_low_pwr.2461800724 Oct 11 12:34:01 PM PDT 23 Oct 11 12:34:05 PM PDT 23 4942916603 ps
T237 /workspace/coverage/default/31.sysrst_ctrl_smoke.949851527 Oct 11 12:34:03 PM PDT 23 Oct 11 12:34:06 PM PDT 23 2130294933 ps
T59 /workspace/coverage/default/30.sysrst_ctrl_stress_all.2517668689 Oct 11 12:33:35 PM PDT 23 Oct 11 12:33:50 PM PDT 23 11649671724 ps
T470 /workspace/coverage/default/17.sysrst_ctrl_alert_test.2334364705 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:21 PM PDT 23 2058753405 ps
T471 /workspace/coverage/default/33.sysrst_ctrl_auto_blk_key_output.3206773201 Oct 11 12:33:52 PM PDT 23 Oct 11 12:33:56 PM PDT 23 3444782191 ps
T472 /workspace/coverage/default/10.sysrst_ctrl_alert_test.3969874269 Oct 11 12:33:35 PM PDT 23 Oct 11 12:33:41 PM PDT 23 2011929821 ps
T473 /workspace/coverage/default/49.sysrst_ctrl_ultra_low_pwr.4041599572 Oct 11 12:34:50 PM PDT 23 Oct 11 12:34:56 PM PDT 23 3173696596 ps
T474 /workspace/coverage/default/13.sysrst_ctrl_ec_pwr_on_rst.189283775 Oct 11 12:33:30 PM PDT 23 Oct 11 12:33:40 PM PDT 23 3210120521 ps
T342 /workspace/coverage/default/95.sysrst_ctrl_combo_detect_with_pre_cond.1175748999 Oct 11 12:34:45 PM PDT 23 Oct 11 12:35:24 PM PDT 23 55492051454 ps
T50 /workspace/coverage/default/31.sysrst_ctrl_edge_detect.2376653104 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:28 PM PDT 23 3218036547 ps
T267 /workspace/coverage/default/32.sysrst_ctrl_pin_access_test.3427158470 Oct 11 12:33:47 PM PDT 23 Oct 11 12:33:53 PM PDT 23 2016022356 ps
T268 /workspace/coverage/default/4.sysrst_ctrl_sec_cm.2649189902 Oct 11 12:33:17 PM PDT 23 Oct 11 12:33:45 PM PDT 23 42124125265 ps
T186 /workspace/coverage/default/10.sysrst_ctrl_stress_all.501259718 Oct 11 12:33:40 PM PDT 23 Oct 11 12:33:45 PM PDT 23 13326618758 ps
T269 /workspace/coverage/default/0.sysrst_ctrl_alert_test.3106241377 Oct 11 12:32:32 PM PDT 23 Oct 11 12:32:36 PM PDT 23 2015738765 ps
T270 /workspace/coverage/default/27.sysrst_ctrl_combo_detect.2595390950 Oct 11 12:33:39 PM PDT 23 Oct 11 12:40:23 PM PDT 23 156752357536 ps
T271 /workspace/coverage/default/34.sysrst_ctrl_alert_test.99762011 Oct 11 12:34:13 PM PDT 23 Oct 11 12:34:16 PM PDT 23 2021574826 ps
T272 /workspace/coverage/default/0.sysrst_ctrl_pin_override_test.2075849042 Oct 11 12:32:43 PM PDT 23 Oct 11 12:32:45 PM PDT 23 2542481578 ps
T273 /workspace/coverage/default/36.sysrst_ctrl_pin_override_test.900318011 Oct 11 12:33:50 PM PDT 23 Oct 11 12:33:54 PM PDT 23 2518350427 ps
T56 /workspace/coverage/default/5.sysrst_ctrl_stress_all.3100226076 Oct 11 12:32:56 PM PDT 23 Oct 11 12:34:09 PM PDT 23 126437335856 ps
T51 /workspace/coverage/default/35.sysrst_ctrl_stress_all_with_rand_reset.2027002292 Oct 11 12:34:06 PM PDT 23 Oct 11 12:34:57 PM PDT 23 27214949525 ps
T238 /workspace/coverage/default/45.sysrst_ctrl_in_out_inverted.2911459189 Oct 11 12:34:23 PM PDT 23 Oct 11 12:34:31 PM PDT 23 2472656632 ps
T245 /workspace/coverage/default/20.sysrst_ctrl_alert_test.1817906747 Oct 11 12:33:30 PM PDT 23 Oct 11 12:33:33 PM PDT 23 2028167414 ps
T246 /workspace/coverage/default/4.sysrst_ctrl_alert_test.3375854503 Oct 11 12:33:10 PM PDT 23 Oct 11 12:33:12 PM PDT 23 2019951496 ps
T354 /workspace/coverage/default/53.sysrst_ctrl_combo_detect_with_pre_cond.720374508 Oct 11 12:34:21 PM PDT 23 Oct 11 12:38:31 PM PDT 23 96296655440 ps
T475 /workspace/coverage/default/36.sysrst_ctrl_ec_pwr_on_rst.2416367533 Oct 11 12:34:08 PM PDT 23 Oct 11 12:42:02 PM PDT 23 175315929229 ps
T140 /workspace/coverage/default/48.sysrst_ctrl_stress_all_with_rand_reset.2943669498 Oct 11 12:34:07 PM PDT 23 Oct 11 12:34:37 PM PDT 23 44103717338 ps
T241 /workspace/coverage/default/5.sysrst_ctrl_edge_detect.3821774697 Oct 11 12:33:11 PM PDT 23 Oct 11 12:33:17 PM PDT 23 2523154286 ps
T476 /workspace/coverage/default/15.sysrst_ctrl_smoke.3836739648 Oct 11 12:33:41 PM PDT 23 Oct 11 12:33:47 PM PDT 23 2113421196 ps
T477 /workspace/coverage/default/49.sysrst_ctrl_auto_blk_key_output.2882101787 Oct 11 12:34:06 PM PDT 23 Oct 11 12:38:40 PM PDT 23 233724855678 ps
T478 /workspace/coverage/default/92.sysrst_ctrl_combo_detect_with_pre_cond.3903915857 Oct 11 12:34:36 PM PDT 23 Oct 11 12:35:52 PM PDT 23 26579878030 ps
T479 /workspace/coverage/default/29.sysrst_ctrl_smoke.3918844915 Oct 11 12:34:01 PM PDT 23 Oct 11 12:34:07 PM PDT 23 2113071941 ps
T141 /workspace/coverage/default/22.sysrst_ctrl_stress_all.3537362425 Oct 11 12:33:08 PM PDT 23 Oct 11 12:33:15 PM PDT 23 9670461565 ps
T52 /workspace/coverage/default/0.sysrst_ctrl_edge_detect.2659371304 Oct 11 12:32:32 PM PDT 23 Oct 11 12:32:36 PM PDT 23 3955548730 ps
T240 /workspace/coverage/default/41.sysrst_ctrl_in_out_inverted.1456094037 Oct 11 12:34:18 PM PDT 23 Oct 11 12:34:26 PM PDT 23 2465725606 ps
T247 /workspace/coverage/default/24.sysrst_ctrl_auto_blk_key_output.322100415 Oct 11 12:33:35 PM PDT 23 Oct 11 12:33:40 PM PDT 23 3618684833 ps
T248 /workspace/coverage/default/31.sysrst_ctrl_combo_detect_with_pre_cond.1919923294 Oct 11 12:33:29 PM PDT 23 Oct 11 12:35:49 PM PDT 23 52706957253 ps
T249 /workspace/coverage/default/23.sysrst_ctrl_smoke.4234813066 Oct 11 12:33:46 PM PDT 23 Oct 11 12:33:53 PM PDT 23 2109515125 ps
T250 /workspace/coverage/default/2.sysrst_ctrl_combo_detect.2708362215 Oct 11 12:32:28 PM PDT 23 Oct 11 12:35:34 PM PDT 23 75260906688 ps
T263 /workspace/coverage/default/19.sysrst_ctrl_combo_detect.2814904827 Oct 11 12:33:23 PM PDT 23 Oct 11 12:34:42 PM PDT 23 118016028132 ps
T264 /workspace/coverage/default/23.sysrst_ctrl_alert_test.508382200 Oct 11 12:33:07 PM PDT 23 Oct 11 12:33:10 PM PDT 23 2022281128 ps
T265 /workspace/coverage/default/26.sysrst_ctrl_pin_override_test.2135911246 Oct 11 12:33:39 PM PDT 23 Oct 11 12:33:42 PM PDT 23 2532242791 ps
T266 /workspace/coverage/default/0.sysrst_ctrl_ec_pwr_on_rst.2350944261 Oct 11 12:32:24 PM PDT 23 Oct 11 12:32:29 PM PDT 23 2778823252 ps
T480 /workspace/coverage/default/4.sysrst_ctrl_smoke.3634629746 Oct 11 12:33:18 PM PDT 23 Oct 11 12:33:21 PM PDT 23 2134794994 ps
T188 /workspace/coverage/default/35.sysrst_ctrl_edge_detect.753343558 Oct 11 12:33:41 PM PDT 23 Oct 11 12:33:43 PM PDT 23 4706874453 ps
T217 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.976932229 Oct 11 12:32:17 PM PDT 23 Oct 11 12:32:22 PM PDT 23 2526609006 ps
T142 /workspace/coverage/default/43.sysrst_ctrl_stress_all_with_rand_reset.815144301 Oct 11 12:34:17 PM PDT 23 Oct 11 12:35:55 PM PDT 23 77952336179 ps
T218 /workspace/coverage/default/35.sysrst_ctrl_pin_access_test.3230194849 Oct 11 12:34:26 PM PDT 23 Oct 11 12:34:33 PM PDT 23 2153572419 ps
T481 /workspace/coverage/default/3.sysrst_ctrl_stress_all.108792469 Oct 11 12:32:22 PM PDT 23 Oct 11 12:32:37 PM PDT 23 10902540448 ps
T346 /workspace/coverage/default/36.sysrst_ctrl_combo_detect_with_pre_cond.2666416066 Oct 11 12:34:00 PM PDT 23 Oct 11 12:34:39 PM PDT 23 79436135772 ps
T482 /workspace/coverage/default/28.sysrst_ctrl_smoke.1415013941 Oct 11 12:33:53 PM PDT 23 Oct 11 12:33:56 PM PDT 23 2134186559 ps
T483 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1881610727 Oct 11 12:33:18 PM PDT 23 Oct 11 12:33:20 PM PDT 23 2563671167 ps
T484 /workspace/coverage/default/44.sysrst_ctrl_in_out_inverted.907639360 Oct 11 12:34:23 PM PDT 23 Oct 11 12:34:30 PM PDT 23 2466851799 ps
T205 /workspace/coverage/default/6.sysrst_ctrl_edge_detect.790147962 Oct 11 12:33:08 PM PDT 23 Oct 11 12:33:17 PM PDT 23 2775433008 ps
T485 /workspace/coverage/default/8.sysrst_ctrl_smoke.921288176 Oct 11 12:32:43 PM PDT 23 Oct 11 12:32:44 PM PDT 23 2186329051 ps
T168 /workspace/coverage/default/25.sysrst_ctrl_edge_detect.2070117525 Oct 11 12:33:23 PM PDT 23 Oct 11 12:33:27 PM PDT 23 2847992127 ps
T95 /workspace/coverage/default/11.sysrst_ctrl_edge_detect.2603362767 Oct 11 12:32:53 PM PDT 23 Oct 11 12:32:58 PM PDT 23 2600537699 ps
T220 /workspace/coverage/default/5.sysrst_ctrl_combo_detect.2511838129 Oct 11 12:33:48 PM PDT 23 Oct 11 12:35:23 PM PDT 23 111425030902 ps
T221 /workspace/coverage/default/55.sysrst_ctrl_combo_detect_with_pre_cond.3849366091 Oct 11 12:34:55 PM PDT 23 Oct 11 12:36:28 PM PDT 23 33749282234 ps
T222 /workspace/coverage/default/73.sysrst_ctrl_combo_detect_with_pre_cond.1062267228 Oct 11 12:34:10 PM PDT 23 Oct 11 12:36:10 PM PDT 23 97047883363 ps
T219 /workspace/coverage/default/15.sysrst_ctrl_edge_detect.1271655063 Oct 11 12:33:17 PM PDT 23 Oct 11 12:33:24 PM PDT 23 4626519184 ps
T206 /workspace/coverage/default/36.sysrst_ctrl_stress_all_with_rand_reset.702029729 Oct 11 12:33:58 PM PDT 23 Oct 11 12:35:25 PM PDT 23 127130112592 ps
T169 /workspace/coverage/default/21.sysrst_ctrl_stress_all_with_rand_reset.3532018382 Oct 11 12:33:37 PM PDT 23 Oct 11 12:34:51 PM PDT 23 26682324944 ps
T223 /workspace/coverage/default/75.sysrst_ctrl_combo_detect_with_pre_cond.1465052609 Oct 11 12:34:07 PM PDT 23 Oct 11 12:35:38 PM PDT 23 34041074598 ps
T486 /workspace/coverage/default/6.sysrst_ctrl_flash_wr_prot_out.3551511266 Oct 11 12:33:14 PM PDT 23 Oct 11 12:33:15 PM PDT 23 2704875610 ps
T203 /workspace/coverage/default/48.sysrst_ctrl_edge_detect.1154385516 Oct 11 12:34:07 PM PDT 23 Oct 11 12:34:11 PM PDT 23 2950416756 ps
T487 /workspace/coverage/default/17.sysrst_ctrl_stress_all.3514095224 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:39 PM PDT 23 7058580462 ps
T488 /workspace/coverage/default/46.sysrst_ctrl_in_out_inverted.2814788633 Oct 11 12:34:06 PM PDT 23 Oct 11 12:34:13 PM PDT 23 2465729191 ps
T489 /workspace/coverage/default/17.sysrst_ctrl_auto_blk_key_output.1012856034 Oct 11 12:34:01 PM PDT 23 Oct 11 12:46:37 PM PDT 23 300858269615 ps
T112 /workspace/coverage/default/46.sysrst_ctrl_combo_detect.1146269616 Oct 11 12:33:56 PM PDT 23 Oct 11 12:34:29 PM PDT 23 45656296000 ps
T490 /workspace/coverage/default/48.sysrst_ctrl_ec_pwr_on_rst.2836308508 Oct 11 12:34:05 PM PDT 23 Oct 11 12:34:18 PM PDT 23 4248920751 ps
T491 /workspace/coverage/default/24.sysrst_ctrl_stress_all.3175762285 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:31 PM PDT 23 11287882354 ps
T492 /workspace/coverage/default/49.sysrst_ctrl_flash_wr_prot_out.2102854532 Oct 11 12:34:10 PM PDT 23 Oct 11 12:34:19 PM PDT 23 2614606323 ps
T84 /workspace/coverage/default/1.sysrst_ctrl_feature_disable.4035432768 Oct 11 12:32:46 PM PDT 23 Oct 11 12:33:02 PM PDT 23 30710341171 ps
T493 /workspace/coverage/default/52.sysrst_ctrl_combo_detect_with_pre_cond.979914140 Oct 11 12:34:39 PM PDT 23 Oct 11 12:35:13 PM PDT 23 24592786736 ps
T494 /workspace/coverage/default/36.sysrst_ctrl_auto_blk_key_output.2152476457 Oct 11 12:34:21 PM PDT 23 Oct 11 12:34:24 PM PDT 23 3701980202 ps
T495 /workspace/coverage/default/1.sysrst_ctrl_ec_pwr_on_rst.315959462 Oct 11 12:32:29 PM PDT 23 Oct 11 12:32:31 PM PDT 23 2653249456 ps
T496 /workspace/coverage/default/57.sysrst_ctrl_combo_detect_with_pre_cond.118754021 Oct 11 12:33:51 PM PDT 23 Oct 11 12:34:05 PM PDT 23 27744642100 ps
T497 /workspace/coverage/default/40.sysrst_ctrl_flash_wr_prot_out.1195973110 Oct 11 12:34:09 PM PDT 23 Oct 11 12:34:11 PM PDT 23 2624000568 ps
T498 /workspace/coverage/default/14.sysrst_ctrl_flash_wr_prot_out.2306214930 Oct 11 12:33:09 PM PDT 23 Oct 11 12:33:17 PM PDT 23 2608064203 ps
T499 /workspace/coverage/default/6.sysrst_ctrl_alert_test.261320825 Oct 11 12:33:29 PM PDT 23 Oct 11 12:33:32 PM PDT 23 2021843494 ps
T500 /workspace/coverage/default/25.sysrst_ctrl_alert_test.3712739592 Oct 11 12:33:33 PM PDT 23 Oct 11 12:33:35 PM PDT 23 2098795100 ps
T204 /workspace/coverage/default/27.sysrst_ctrl_stress_all_with_rand_reset.2868975637 Oct 11 12:33:38 PM PDT 23 Oct 11 12:34:43 PM PDT 23 103190129445 ps
T501 /workspace/coverage/default/25.sysrst_ctrl_pin_access_test.1681426552 Oct 11 12:33:25 PM PDT 23 Oct 11 12:33:29 PM PDT 23 2044684720 ps
T502 /workspace/coverage/default/38.sysrst_ctrl_flash_wr_prot_out.3011928981 Oct 11 12:34:21 PM PDT 23 Oct 11 12:34:26 PM PDT 23 2618956873 ps
T503 /workspace/coverage/default/7.sysrst_ctrl_flash_wr_prot_out.1780902503 Oct 11 12:33:45 PM PDT 23 Oct 11 12:33:48 PM PDT 23 2639426267 ps
T355 /workspace/coverage/default/61.sysrst_ctrl_combo_detect_with_pre_cond.2096415748 Oct 11 12:34:06 PM PDT 23 Oct 11 12:37:35 PM PDT 23 82350073631 ps
T504 /workspace/coverage/default/15.sysrst_ctrl_stress_all_with_rand_reset.3215997882 Oct 11 12:33:16 PM PDT 23 Oct 11 12:33:30 PM PDT 23 23248840155 ps
T505 /workspace/coverage/default/13.sysrst_ctrl_smoke.473915643 Oct 11 12:33:36 PM PDT 23 Oct 11 12:33:43 PM PDT 23 2108058459 ps
T506 /workspace/coverage/default/43.sysrst_ctrl_alert_test.2932199641 Oct 11 12:34:07 PM PDT 23 Oct 11 12:34:09 PM PDT 23 2071197439 ps
T280 /workspace/coverage/default/8.sysrst_ctrl_combo_detect.2609240318 Oct 11 12:33:15 PM PDT 23 Oct 11 12:34:51 PM PDT 23 155743405828 ps
T507 /workspace/coverage/default/18.sysrst_ctrl_ultra_low_pwr.4122973440 Oct 11 12:32:52 PM PDT 23 Oct 11 12:32:53 PM PDT 23 4844788862 ps
T282 /workspace/coverage/default/38.sysrst_ctrl_combo_detect.3095064832 Oct 11 12:34:24 PM PDT 23 Oct 11 12:35:09 PM PDT 23 73775727091 ps
T86 /workspace/coverage/default/19.sysrst_ctrl_combo_detect_with_pre_cond.2905510857 Oct 11 12:33:25 PM PDT 23 Oct 11 12:34:29 PM PDT 23 44373327093 ps
T508 /workspace/coverage/default/11.sysrst_ctrl_alert_test.602801142 Oct 11 12:33:38 PM PDT 23 Oct 11 12:33:41 PM PDT 23 2060250784 ps
T509 /workspace/coverage/default/47.sysrst_ctrl_combo_detect_with_pre_cond.138975558 Oct 11 12:34:24 PM PDT 23 Oct 11 12:34:57 PM PDT 23 52841559641 ps
T510 /workspace/coverage/default/34.sysrst_ctrl_ec_pwr_on_rst.2827051297 Oct 11 12:34:39 PM PDT 23 Oct 11 12:34:51 PM PDT 23 3996647708 ps
T511 /workspace/coverage/default/40.sysrst_ctrl_ec_pwr_on_rst.136665349 Oct 11 12:34:03 PM PDT 23 Oct 11 12:34:13 PM PDT 23 3430774298 ps
T143 /workspace/coverage/default/30.sysrst_ctrl_stress_all_with_rand_reset.3410941595 Oct 11 12:33:24 PM PDT 23 Oct 11 12:34:25 PM PDT 23 24734098697 ps
T512 /workspace/coverage/default/48.sysrst_ctrl_pin_override_test.3589484671 Oct 11 12:34:17 PM PDT 23 Oct 11 12:34:25 PM PDT 23 2512488419 ps
T513 /workspace/coverage/default/48.sysrst_ctrl_ultra_low_pwr.2149018527 Oct 11 12:34:25 PM PDT 23 Oct 11 12:34:29 PM PDT 23 2770175375 ps
T514 /workspace/coverage/default/48.sysrst_ctrl_pin_access_test.514989853 Oct 11 12:34:48 PM PDT 23 Oct 11 12:34:53 PM PDT 23 2040030037 ps
T515 /workspace/coverage/default/20.sysrst_ctrl_pin_access_test.2711687070 Oct 11 12:33:29 PM PDT 23 Oct 11 12:33:32 PM PDT 23 2155193621 ps
T516 /workspace/coverage/default/14.sysrst_ctrl_pin_access_test.2033029340 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:22 PM PDT 23 2214854830 ps
T517 /workspace/coverage/default/4.sysrst_ctrl_ec_pwr_on_rst.3232126858 Oct 11 12:33:18 PM PDT 23 Oct 11 12:33:25 PM PDT 23 3931391246 ps
T518 /workspace/coverage/default/21.sysrst_ctrl_ec_pwr_on_rst.1207845667 Oct 11 12:33:11 PM PDT 23 Oct 11 12:33:13 PM PDT 23 2935346388 ps
T165 /workspace/coverage/default/26.sysrst_ctrl_edge_detect.2428820758 Oct 11 12:33:23 PM PDT 23 Oct 11 12:33:25 PM PDT 23 3090031063 ps
T183 /workspace/coverage/default/10.sysrst_ctrl_in_out_inverted.3981861828 Oct 11 12:33:46 PM PDT 23 Oct 11 12:33:48 PM PDT 23 2477081048 ps
T184 /workspace/coverage/default/20.sysrst_ctrl_auto_blk_key_output.2940204582 Oct 11 12:33:23 PM PDT 23 Oct 11 12:33:27 PM PDT 23 3568800851 ps
T87 /workspace/coverage/default/7.sysrst_ctrl_auto_blk_key_output.2500702359 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:27 PM PDT 23 3724248930 ps
T127 /workspace/coverage/default/82.sysrst_ctrl_combo_detect_with_pre_cond.2175661412 Oct 11 12:34:37 PM PDT 23 Oct 11 12:35:21 PM PDT 23 29588308253 ps
T128 /workspace/coverage/default/5.sysrst_ctrl_smoke.667751691 Oct 11 12:33:07 PM PDT 23 Oct 11 12:33:16 PM PDT 23 2113773895 ps
T129 /workspace/coverage/default/24.sysrst_ctrl_alert_test.127975171 Oct 11 12:33:34 PM PDT 23 Oct 11 12:33:38 PM PDT 23 2022863398 ps
T130 /workspace/coverage/default/18.sysrst_ctrl_smoke.1780136218 Oct 11 12:33:27 PM PDT 23 Oct 11 12:33:35 PM PDT 23 2113321714 ps
T131 /workspace/coverage/default/14.sysrst_ctrl_smoke.2424335392 Oct 11 12:33:17 PM PDT 23 Oct 11 12:33:19 PM PDT 23 2156306562 ps
T132 /workspace/coverage/default/10.sysrst_ctrl_stress_all_with_rand_reset.1349963487 Oct 11 12:33:07 PM PDT 23 Oct 11 12:33:29 PM PDT 23 32908271793 ps
T133 /workspace/coverage/default/13.sysrst_ctrl_pin_override_test.2209344209 Oct 11 12:33:16 PM PDT 23 Oct 11 12:33:23 PM PDT 23 2512432452 ps
T113 /workspace/coverage/default/35.sysrst_ctrl_combo_detect.2031914393 Oct 11 12:34:16 PM PDT 23 Oct 11 12:34:41 PM PDT 23 40002761588 ps
T134 /workspace/coverage/default/47.sysrst_ctrl_flash_wr_prot_out.3396654603 Oct 11 12:34:18 PM PDT 23 Oct 11 12:34:20 PM PDT 23 2669040582 ps
T519 /workspace/coverage/default/28.sysrst_ctrl_flash_wr_prot_out.3670135203 Oct 11 12:33:51 PM PDT 23 Oct 11 12:33:54 PM PDT 23 2626398949 ps
T520 /workspace/coverage/default/11.sysrst_ctrl_flash_wr_prot_out.1682029697 Oct 11 12:33:33 PM PDT 23 Oct 11 12:33:42 PM PDT 23 2615098904 ps
T521 /workspace/coverage/default/43.sysrst_ctrl_in_out_inverted.1879760028 Oct 11 12:33:50 PM PDT 23 Oct 11 12:33:53 PM PDT 23 2480757498 ps
T522 /workspace/coverage/default/9.sysrst_ctrl_stress_all_with_rand_reset.1241059847 Oct 11 12:33:19 PM PDT 23 Oct 11 12:34:45 PM PDT 23 33695366452 ps
T523 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst.1211505781 Oct 11 12:32:29 PM PDT 23 Oct 11 12:32:36 PM PDT 23 2240264345 ps
T524 /workspace/coverage/default/26.sysrst_ctrl_alert_test.2593089813 Oct 11 12:33:21 PM PDT 23 Oct 11 12:33:28 PM PDT 23 2012577242 ps
T525 /workspace/coverage/default/23.sysrst_ctrl_in_out_inverted.1654939197 Oct 11 12:33:23 PM PDT 23 Oct 11 12:33:30 PM PDT 23 2578037945 ps
T350 /workspace/coverage/default/39.sysrst_ctrl_combo_detect_with_pre_cond.1016900500 Oct 11 12:34:07 PM PDT 23 Oct 11 12:38:52 PM PDT 23 107331841338 ps
T526 /workspace/coverage/default/4.sysrst_ctrl_pin_override_test.3998439270 Oct 11 12:33:26 PM PDT 23 Oct 11 12:33:36 PM PDT 23 2513685633 ps
T527 /workspace/coverage/default/18.sysrst_ctrl_auto_blk_key_output.1952383693 Oct 11 12:33:30 PM PDT 23 Oct 11 12:33:34 PM PDT 23 3929272645 ps
T373 /workspace/coverage/default/28.sysrst_ctrl_stress_all.787903413 Oct 11 12:33:45 PM PDT 23 Oct 11 12:33:59 PM PDT 23 18729540357 ps
T528 /workspace/coverage/default/9.sysrst_ctrl_stress_all.3102461541 Oct 11 12:33:40 PM PDT 23 Oct 11 12:34:18 PM PDT 23 14926042505 ps
T529 /workspace/coverage/default/31.sysrst_ctrl_alert_test.2693309767 Oct 11 12:33:28 PM PDT 23 Oct 11 12:33:34 PM PDT 23 2012179802 ps
T96 /workspace/coverage/default/41.sysrst_ctrl_ultra_low_pwr.3247752846 Oct 11 12:34:51 PM PDT 23 Oct 11 12:34:57 PM PDT 23 6150952196 ps
T296 /workspace/coverage/default/3.sysrst_ctrl_sec_cm.2799789224 Oct 11 12:33:22 PM PDT 23 Oct 11 12:35:06 PM PDT 23 42009244200 ps
T530 /workspace/coverage/default/32.sysrst_ctrl_in_out_inverted.4161422838 Oct 11 12:33:32 PM PDT 23 Oct 11 12:33:39 PM PDT 23 2476138190 ps
T531 /workspace/coverage/default/12.sysrst_ctrl_flash_wr_prot_out.3985799794 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:32 PM PDT 23 2609622425 ps
T532 /workspace/coverage/default/46.sysrst_ctrl_pin_access_test.641079419 Oct 11 12:34:05 PM PDT 23 Oct 11 12:34:13 PM PDT 23 2179503534 ps
T533 /workspace/coverage/default/31.sysrst_ctrl_pin_override_test.4231266123 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:26 PM PDT 23 2588973089 ps
T534 /workspace/coverage/default/13.sysrst_ctrl_in_out_inverted.2844967807 Oct 11 12:33:18 PM PDT 23 Oct 11 12:33:23 PM PDT 23 2489318663 ps
T208 /workspace/coverage/default/28.sysrst_ctrl_edge_detect.569364908 Oct 11 12:33:27 PM PDT 23 Oct 11 12:33:37 PM PDT 23 4629435784 ps
T290 /workspace/coverage/default/4.sysrst_ctrl_combo_detect.3029130585 Oct 11 12:33:29 PM PDT 23 Oct 11 12:33:53 PM PDT 23 91363956050 ps
T535 /workspace/coverage/default/21.sysrst_ctrl_auto_blk_key_output.258221800 Oct 11 12:33:35 PM PDT 23 Oct 11 12:33:43 PM PDT 23 3260026471 ps
T170 /workspace/coverage/default/46.sysrst_ctrl_edge_detect.3434192565 Oct 11 12:34:33 PM PDT 23 Oct 11 12:34:36 PM PDT 23 2909424902 ps
T536 /workspace/coverage/default/9.sysrst_ctrl_auto_blk_key_output.2944299583 Oct 11 12:32:54 PM PDT 23 Oct 11 12:33:06 PM PDT 23 3382436615 ps
T537 /workspace/coverage/default/11.sysrst_ctrl_stress_all_with_rand_reset.744546897 Oct 11 12:33:48 PM PDT 23 Oct 11 12:34:35 PM PDT 23 17266391299 ps
T209 /workspace/coverage/default/18.sysrst_ctrl_stress_all_with_rand_reset.2788870850 Oct 11 12:32:50 PM PDT 23 Oct 11 12:33:55 PM PDT 23 25671751139 ps
T538 /workspace/coverage/default/33.sysrst_ctrl_pin_override_test.4001976556 Oct 11 12:33:44 PM PDT 23 Oct 11 12:33:49 PM PDT 23 2517906312 ps
T539 /workspace/coverage/default/18.sysrst_ctrl_alert_test.3413874727 Oct 11 12:33:35 PM PDT 23 Oct 11 12:33:37 PM PDT 23 2044066767 ps
T540 /workspace/coverage/default/39.sysrst_ctrl_pin_access_test.1239849572 Oct 11 12:34:05 PM PDT 23 Oct 11 12:34:09 PM PDT 23 2102990491 ps
T541 /workspace/coverage/default/16.sysrst_ctrl_auto_blk_key_output.1655007543 Oct 11 12:33:28 PM PDT 23 Oct 11 12:33:38 PM PDT 23 3417323479 ps
T340 /workspace/coverage/default/15.sysrst_ctrl_combo_detect_with_pre_cond.298750031 Oct 11 12:33:08 PM PDT 23 Oct 11 12:34:22 PM PDT 23 116985717788 ps
T542 /workspace/coverage/default/36.sysrst_ctrl_smoke.2293329122 Oct 11 12:34:11 PM PDT 23 Oct 11 12:34:18 PM PDT 23 2108594018 ps
T543 /workspace/coverage/default/42.sysrst_ctrl_in_out_inverted.998991085 Oct 11 12:34:39 PM PDT 23 Oct 11 12:34:44 PM PDT 23 2471566419 ps
T283 /workspace/coverage/default/43.sysrst_ctrl_combo_detect.2626295195 Oct 11 12:34:14 PM PDT 23 Oct 11 12:35:50 PM PDT 23 142355547250 ps
T544 /workspace/coverage/default/34.sysrst_ctrl_flash_wr_prot_out.3682605666 Oct 11 12:34:05 PM PDT 23 Oct 11 12:34:13 PM PDT 23 2609282305 ps
T545 /workspace/coverage/default/4.sysrst_ctrl_combo_detect_with_pre_cond.3756504670 Oct 11 12:32:50 PM PDT 23 Oct 11 12:34:02 PM PDT 23 30475348168 ps
T187 /workspace/coverage/default/14.sysrst_ctrl_edge_detect.2796995266 Oct 11 12:33:10 PM PDT 23 Oct 11 12:33:18 PM PDT 23 2927123957 ps
T546 /workspace/coverage/default/5.sysrst_ctrl_auto_blk_key_output.4012316924 Oct 11 12:32:59 PM PDT 23 Oct 11 12:33:03 PM PDT 23 3572219085 ps
T547 /workspace/coverage/default/5.sysrst_ctrl_in_out_inverted.3263558065 Oct 11 12:33:23 PM PDT 23 Oct 11 12:33:35 PM PDT 23 2468317441 ps
T548 /workspace/coverage/default/22.sysrst_ctrl_auto_blk_key_output.3650408617 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:31 PM PDT 23 3141654351 ps
T549 /workspace/coverage/default/18.sysrst_ctrl_pin_access_test.746850851 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:22 PM PDT 23 2088381779 ps
T550 /workspace/coverage/default/15.sysrst_ctrl_flash_wr_prot_out.378125423 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:21 PM PDT 23 2642230356 ps
T551 /workspace/coverage/default/37.sysrst_ctrl_stress_all.1810574539 Oct 11 12:34:01 PM PDT 23 Oct 11 12:34:05 PM PDT 23 7378561761 ps
T552 /workspace/coverage/default/8.sysrst_ctrl_flash_wr_prot_out.2444810615 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:27 PM PDT 23 2633091698 ps
T553 /workspace/coverage/default/31.sysrst_ctrl_flash_wr_prot_out.1338181475 Oct 11 12:33:27 PM PDT 23 Oct 11 12:33:35 PM PDT 23 2609351027 ps
T554 /workspace/coverage/default/47.sysrst_ctrl_pin_override_test.2685664475 Oct 11 12:34:23 PM PDT 23 Oct 11 12:34:25 PM PDT 23 2528834859 ps
T555 /workspace/coverage/default/29.sysrst_ctrl_ec_pwr_on_rst.571976470 Oct 11 12:33:46 PM PDT 23 Oct 11 12:33:47 PM PDT 23 3982241845 ps
T556 /workspace/coverage/default/19.sysrst_ctrl_pin_override_test.4191461537 Oct 11 12:33:33 PM PDT 23 Oct 11 12:33:37 PM PDT 23 2518320857 ps
T557 /workspace/coverage/default/6.sysrst_ctrl_smoke.1012324565 Oct 11 12:33:31 PM PDT 23 Oct 11 12:33:33 PM PDT 23 2129969081 ps
T558 /workspace/coverage/default/49.sysrst_ctrl_ec_pwr_on_rst.1171948260 Oct 11 12:35:00 PM PDT 23 Oct 11 12:35:08 PM PDT 23 3018547946 ps
T559 /workspace/coverage/default/0.sysrst_ctrl_pin_access_test.1861707736 Oct 11 12:32:19 PM PDT 23 Oct 11 12:32:23 PM PDT 23 2020852953 ps
T176 /workspace/coverage/default/47.sysrst_ctrl_stress_all_with_rand_reset.1171915283 Oct 11 12:34:59 PM PDT 23 Oct 11 12:35:29 PM PDT 23 40090943289 ps
T210 /workspace/coverage/default/33.sysrst_ctrl_stress_all_with_rand_reset.4020784592 Oct 11 12:33:59 PM PDT 23 Oct 11 12:40:09 PM PDT 23 1517337469020 ps
T560 /workspace/coverage/default/14.sysrst_ctrl_alert_test.1111987127 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:26 PM PDT 23 2078392815 ps
T166 /workspace/coverage/default/46.sysrst_ctrl_stress_all_with_rand_reset.1359473480 Oct 11 12:34:13 PM PDT 23 Oct 11 12:38:23 PM PDT 23 103196185944 ps
T284 /workspace/coverage/default/31.sysrst_ctrl_stress_all_with_rand_reset.3155708768 Oct 11 12:33:25 PM PDT 23 Oct 11 12:34:16 PM PDT 23 93135967663 ps
T364 /workspace/coverage/default/2.sysrst_ctrl_stress_all.1704724765 Oct 11 12:33:01 PM PDT 23 Oct 11 12:36:42 PM PDT 23 100399481309 ps
T97 /workspace/coverage/default/45.sysrst_ctrl_stress_all_with_rand_reset.2412795318 Oct 11 12:34:16 PM PDT 23 Oct 11 12:36:23 PM PDT 23 100990995575 ps
T152 /workspace/coverage/default/14.sysrst_ctrl_stress_all_with_rand_reset.2058745306 Oct 11 12:33:18 PM PDT 23 Oct 11 12:34:10 PM PDT 23 41624393155 ps
T153 /workspace/coverage/default/9.sysrst_ctrl_pin_access_test.346252779 Oct 11 12:32:57 PM PDT 23 Oct 11 12:33:03 PM PDT 23 2036094441 ps
T154 /workspace/coverage/default/31.sysrst_ctrl_stress_all.1865601758 Oct 11 12:33:40 PM PDT 23 Oct 11 12:33:55 PM PDT 23 11442843596 ps
T155 /workspace/coverage/default/0.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.3943415525 Oct 11 12:32:40 PM PDT 23 Oct 11 12:32:42 PM PDT 23 2296840861 ps
T156 /workspace/coverage/default/45.sysrst_ctrl_smoke.2528333770 Oct 11 12:34:13 PM PDT 23 Oct 11 12:34:15 PM PDT 23 2134473057 ps
T157 /workspace/coverage/default/22.sysrst_ctrl_combo_detect.1307154168 Oct 11 12:33:51 PM PDT 23 Oct 11 12:41:22 PM PDT 23 159388611508 ps
T274 /workspace/coverage/default/13.sysrst_ctrl_combo_detect_with_pre_cond.3347623116 Oct 11 12:33:24 PM PDT 23 Oct 11 12:34:45 PM PDT 23 31579832615 ps
T225 /workspace/coverage/default/13.sysrst_ctrl_edge_detect.2121244096 Oct 11 12:33:50 PM PDT 23 Oct 11 12:33:56 PM PDT 23 3619050867 ps
T561 /workspace/coverage/default/87.sysrst_ctrl_combo_detect_with_pre_cond.159743372 Oct 11 12:34:24 PM PDT 23 Oct 11 12:34:52 PM PDT 23 21838189028 ps
T93 /workspace/coverage/default/12.sysrst_ctrl_ultra_low_pwr.1070830745 Oct 11 12:33:13 PM PDT 23 Oct 11 12:33:23 PM PDT 23 145118493088 ps
T562 /workspace/coverage/default/35.sysrst_ctrl_in_out_inverted.2672907025 Oct 11 12:35:06 PM PDT 23 Oct 11 12:35:09 PM PDT 23 2482278821 ps
T88 /workspace/coverage/default/9.sysrst_ctrl_edge_detect.3301464580 Oct 11 12:33:30 PM PDT 23 Oct 11 12:33:36 PM PDT 23 2585487303 ps
T114 /workspace/coverage/default/47.sysrst_ctrl_combo_detect.1011914420 Oct 11 12:34:35 PM PDT 23 Oct 11 12:36:35 PM PDT 23 44234000808 ps
T195 /workspace/coverage/default/8.sysrst_ctrl_auto_blk_key_output.2873653327 Oct 11 12:33:12 PM PDT 23 Oct 11 12:33:23 PM PDT 23 3737518797 ps
T196 /workspace/coverage/default/51.sysrst_ctrl_combo_detect_with_pre_cond.4095709096 Oct 11 12:34:24 PM PDT 23 Oct 11 12:35:37 PM PDT 23 27078011619 ps
T197 /workspace/coverage/default/14.sysrst_ctrl_pin_override_test.1285837142 Oct 11 12:33:23 PM PDT 23 Oct 11 12:33:31 PM PDT 23 2511546739 ps
T198 /workspace/coverage/default/30.sysrst_ctrl_pin_override_test.4043301151 Oct 11 12:33:38 PM PDT 23 Oct 11 12:33:41 PM PDT 23 2548264139 ps
T199 /workspace/coverage/default/64.sysrst_ctrl_combo_detect_with_pre_cond.2787612599 Oct 11 12:33:55 PM PDT 23 Oct 11 12:37:42 PM PDT 23 86879117417 ps
T200 /workspace/coverage/default/42.sysrst_ctrl_edge_detect.2458666592 Oct 11 12:34:11 PM PDT 23 Oct 11 12:34:22 PM PDT 23 4228365423 ps
T201 /workspace/coverage/default/36.sysrst_ctrl_alert_test.2864259560 Oct 11 12:34:07 PM PDT 23 Oct 11 12:34:11 PM PDT 23 2018003832 ps
T202 /workspace/coverage/default/48.sysrst_ctrl_auto_blk_key_output.763966678 Oct 11 12:34:22 PM PDT 23 Oct 11 12:34:59 PM PDT 23 148537782819 ps
T115 /workspace/coverage/default/23.sysrst_ctrl_combo_detect.4146875712 Oct 11 12:33:27 PM PDT 23 Oct 11 12:34:21 PM PDT 23 76018945172 ps
T563 /workspace/coverage/default/19.sysrst_ctrl_pin_access_test.4080053680 Oct 11 12:33:15 PM PDT 23 Oct 11 12:33:21 PM PDT 23 2060413902 ps
T564 /workspace/coverage/default/15.sysrst_ctrl_ultra_low_pwr.792414429 Oct 11 12:33:14 PM PDT 23 Oct 11 12:33:21 PM PDT 23 17133842338 ps
T565 /workspace/coverage/default/48.sysrst_ctrl_stress_all.2973242456 Oct 11 12:33:56 PM PDT 23 Oct 11 12:34:03 PM PDT 23 11263133233 ps
T334 /workspace/coverage/default/20.sysrst_ctrl_combo_detect.2003281753 Oct 11 12:33:42 PM PDT 23 Oct 11 12:37:44 PM PDT 23 106489991204 ps
T566 /workspace/coverage/default/24.sysrst_ctrl_flash_wr_prot_out.2096489103 Oct 11 12:33:07 PM PDT 23 Oct 11 12:33:15 PM PDT 23 2613406513 ps
T567 /workspace/coverage/default/40.sysrst_ctrl_auto_blk_key_output.609957562 Oct 11 12:34:05 PM PDT 23 Oct 11 12:34:08 PM PDT 23 3748033156 ps
T337 /workspace/coverage/default/59.sysrst_ctrl_combo_detect_with_pre_cond.3666029171 Oct 11 12:34:15 PM PDT 23 Oct 11 12:38:40 PM PDT 23 98765015914 ps
T568 /workspace/coverage/default/49.sysrst_ctrl_in_out_inverted.1723386048 Oct 11 12:34:43 PM PDT 23 Oct 11 12:34:51 PM PDT 23 2453107272 ps
T569 /workspace/coverage/default/22.sysrst_ctrl_alert_test.2170258353 Oct 11 12:33:33 PM PDT 23 Oct 11 12:33:35 PM PDT 23 2058262343 ps
T570 /workspace/coverage/default/32.sysrst_ctrl_ultra_low_pwr.3186153809 Oct 11 12:33:33 PM PDT 23 Oct 11 12:33:41 PM PDT 23 6343546403 ps
T571 /workspace/coverage/default/18.sysrst_ctrl_in_out_inverted.1978236302 Oct 11 12:33:31 PM PDT 23 Oct 11 12:33:33 PM PDT 23 2472691801 ps
T572 /workspace/coverage/default/26.sysrst_ctrl_smoke.1644631672 Oct 11 12:33:27 PM PDT 23 Oct 11 12:33:34 PM PDT 23 2112737865 ps
T573 /workspace/coverage/default/30.sysrst_ctrl_alert_test.4276255674 Oct 11 12:33:50 PM PDT 23 Oct 11 12:33:52 PM PDT 23 2041978158 ps
T574 /workspace/coverage/default/47.sysrst_ctrl_in_out_inverted.339969691 Oct 11 12:34:10 PM PDT 23 Oct 11 12:34:14 PM PDT 23 2484270465 ps
T371 /workspace/coverage/default/69.sysrst_ctrl_combo_detect_with_pre_cond.1976400921 Oct 11 12:33:56 PM PDT 23 Oct 11 12:36:06 PM PDT 23 175174808366 ps
T575 /workspace/coverage/default/46.sysrst_ctrl_pin_override_test.4268825086 Oct 11 12:34:29 PM PDT 23 Oct 11 12:34:34 PM PDT 23 2520542057 ps
T576 /workspace/coverage/default/30.sysrst_ctrl_pin_access_test.1276174772 Oct 11 12:33:33 PM PDT 23 Oct 11 12:33:40 PM PDT 23 2061465154 ps
T577 /workspace/coverage/default/49.sysrst_ctrl_combo_detect.1399677609 Oct 11 12:34:43 PM PDT 23 Oct 11 12:38:00 PM PDT 23 178920227801 ps
T353 /workspace/coverage/default/50.sysrst_ctrl_combo_detect_with_pre_cond.3870958108 Oct 11 12:34:25 PM PDT 23 Oct 11 12:36:04 PM PDT 23 152482808828 ps
T94 /workspace/coverage/default/16.sysrst_ctrl_stress_all_with_rand_reset.1641253290 Oct 11 12:33:34 PM PDT 23 Oct 11 12:34:10 PM PDT 23 179032124439 ps
T81 /workspace/coverage/default/29.sysrst_ctrl_combo_detect.659058745 Oct 11 12:33:24 PM PDT 23 Oct 11 12:39:15 PM PDT 23 140479095603 ps
T578 /workspace/coverage/default/12.sysrst_ctrl_combo_detect_with_pre_cond.3613422416 Oct 11 12:32:50 PM PDT 23 Oct 11 12:33:40 PM PDT 23 79508276722 ps
T579 /workspace/coverage/default/42.sysrst_ctrl_auto_blk_key_output.893216681 Oct 11 12:33:50 PM PDT 23 Oct 11 12:34:01 PM PDT 23 4062671194 ps
T580 /workspace/coverage/default/14.sysrst_ctrl_in_out_inverted.1970789627 Oct 11 12:33:21 PM PDT 23 Oct 11 12:33:26 PM PDT 23 2470824574 ps
T116 /workspace/coverage/default/43.sysrst_ctrl_stress_all.880321846 Oct 11 12:34:06 PM PDT 23 Oct 11 12:35:48 PM PDT 23 159242051597 ps
T581 /workspace/coverage/default/42.sysrst_ctrl_smoke.1582741003 Oct 11 12:34:19 PM PDT 23 Oct 11 12:34:20 PM PDT 23 2189275181 ps
T582 /workspace/coverage/default/10.sysrst_ctrl_smoke.262941046 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:25 PM PDT 23 2110263453 ps
T583 /workspace/coverage/default/34.sysrst_ctrl_pin_access_test.955074817 Oct 11 12:34:32 PM PDT 23 Oct 11 12:34:34 PM PDT 23 2274901656 ps
T368 /workspace/coverage/default/30.sysrst_ctrl_combo_detect.3063048908 Oct 11 12:33:18 PM PDT 23 Oct 11 12:34:17 PM PDT 23 89912186843 ps
T584 /workspace/coverage/default/1.sysrst_ctrl_flash_wr_prot_out.2265458789 Oct 11 12:33:04 PM PDT 23 Oct 11 12:33:09 PM PDT 23 2617120430 ps
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