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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.55 99.29 96.26 100.00 95.51 98.68 99.34 93.79


Total test records in report: 914
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html

T167 /workspace/coverage/default/29.sysrst_ctrl_stress_all_with_rand_reset.3263373661 Oct 11 12:33:28 PM PDT 23 Oct 11 12:34:09 PM PDT 23 61794024244 ps
T585 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst.3897081368 Oct 11 12:32:57 PM PDT 23 Oct 11 12:33:04 PM PDT 23 2386348424 ps
T92 /workspace/coverage/default/28.sysrst_ctrl_combo_detect_with_pre_cond.4066275454 Oct 11 12:33:20 PM PDT 23 Oct 11 12:34:55 PM PDT 23 74412177531 ps
T586 /workspace/coverage/default/29.sysrst_ctrl_in_out_inverted.3462021224 Oct 11 12:33:26 PM PDT 23 Oct 11 12:33:35 PM PDT 23 2451593591 ps
T587 /workspace/coverage/default/38.sysrst_ctrl_auto_blk_key_output.3584680646 Oct 11 12:34:22 PM PDT 23 Oct 11 12:34:24 PM PDT 23 3686152389 ps
T588 /workspace/coverage/default/24.sysrst_ctrl_pin_access_test.3260445132 Oct 11 12:34:02 PM PDT 23 Oct 11 12:34:09 PM PDT 23 2216289776 ps
T589 /workspace/coverage/default/6.sysrst_ctrl_ultra_low_pwr.3516789909 Oct 11 12:33:21 PM PDT 23 Oct 11 12:33:31 PM PDT 23 9843361102 ps
T590 /workspace/coverage/default/3.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.1568339901 Oct 11 12:32:31 PM PDT 23 Oct 11 12:32:39 PM PDT 23 2539567482 ps
T591 /workspace/coverage/default/20.sysrst_ctrl_pin_override_test.4176994476 Oct 11 12:33:14 PM PDT 23 Oct 11 12:33:17 PM PDT 23 2533786407 ps
T592 /workspace/coverage/default/39.sysrst_ctrl_pin_override_test.3279418613 Oct 11 12:34:59 PM PDT 23 Oct 11 12:35:02 PM PDT 23 2533378023 ps
T211 /workspace/coverage/default/44.sysrst_ctrl_edge_detect.3662114689 Oct 11 12:34:14 PM PDT 23 Oct 11 12:34:23 PM PDT 23 4247501826 ps
T593 /workspace/coverage/default/4.sysrst_ctrl_stress_all.2748410190 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:37 PM PDT 23 6479133576 ps
T594 /workspace/coverage/default/3.sysrst_ctrl_smoke.2357193100 Oct 11 12:32:41 PM PDT 23 Oct 11 12:32:44 PM PDT 23 2139942478 ps
T226 /workspace/coverage/default/39.sysrst_ctrl_edge_detect.1922484595 Oct 11 12:34:34 PM PDT 23 Oct 11 12:34:42 PM PDT 23 4385239025 ps
T177 /workspace/coverage/default/29.sysrst_ctrl_edge_detect.515432031 Oct 11 12:33:30 PM PDT 23 Oct 11 12:33:38 PM PDT 23 2776787081 ps
T595 /workspace/coverage/default/2.sysrst_ctrl_auto_blk_key_output.3024171323 Oct 11 12:32:20 PM PDT 23 Oct 11 12:32:31 PM PDT 23 3905184470 ps
T596 /workspace/coverage/default/4.sysrst_ctrl_flash_wr_prot_out.3372574312 Oct 11 12:32:56 PM PDT 23 Oct 11 12:32:59 PM PDT 23 2625414742 ps
T597 /workspace/coverage/default/39.sysrst_ctrl_ec_pwr_on_rst.982338335 Oct 11 12:34:14 PM PDT 23 Oct 11 12:34:26 PM PDT 23 4018590697 ps
T98 /workspace/coverage/default/35.sysrst_ctrl_ultra_low_pwr.772756010 Oct 11 12:33:39 PM PDT 23 Oct 11 12:36:29 PM PDT 23 1146668172052 ps
T598 /workspace/coverage/default/11.sysrst_ctrl_combo_detect_with_pre_cond.2350898161 Oct 11 12:33:19 PM PDT 23 Oct 11 12:34:31 PM PDT 23 26084446839 ps
T347 /workspace/coverage/default/94.sysrst_ctrl_combo_detect_with_pre_cond.2358258995 Oct 11 12:34:17 PM PDT 23 Oct 11 12:37:49 PM PDT 23 203629996045 ps
T599 /workspace/coverage/default/22.sysrst_ctrl_ultra_low_pwr.2810535168 Oct 11 12:33:18 PM PDT 23 Oct 11 12:33:24 PM PDT 23 3603477851 ps
T600 /workspace/coverage/default/42.sysrst_ctrl_combo_detect.193730715 Oct 11 12:33:48 PM PDT 23 Oct 11 12:34:47 PM PDT 23 104425545167 ps
T332 /workspace/coverage/default/40.sysrst_ctrl_combo_detect.3091263147 Oct 11 12:34:24 PM PDT 23 Oct 11 12:37:22 PM PDT 23 150478646218 ps
T601 /workspace/coverage/default/40.sysrst_ctrl_alert_test.1655470157 Oct 11 12:34:27 PM PDT 23 Oct 11 12:34:30 PM PDT 23 2035568475 ps
T602 /workspace/coverage/default/40.sysrst_ctrl_in_out_inverted.1312700627 Oct 11 12:34:17 PM PDT 23 Oct 11 12:34:24 PM PDT 23 2449046336 ps
T361 /workspace/coverage/default/9.sysrst_ctrl_combo_detect.1014210626 Oct 11 12:33:28 PM PDT 23 Oct 11 12:34:21 PM PDT 23 99353309668 ps
T291 /workspace/coverage/default/33.sysrst_ctrl_combo_detect.3130659440 Oct 11 12:34:06 PM PDT 23 Oct 11 12:37:04 PM PDT 23 73611540163 ps
T85 /workspace/coverage/default/0.sysrst_ctrl_feature_disable.2782153986 Oct 11 12:32:21 PM PDT 23 Oct 11 12:33:15 PM PDT 23 39782929547 ps
T161 /workspace/coverage/default/25.sysrst_ctrl_ultra_low_pwr.3894803934 Oct 11 12:33:33 PM PDT 23 Oct 11 12:36:02 PM PDT 23 1286208807347 ps
T603 /workspace/coverage/default/33.sysrst_ctrl_smoke.1103516166 Oct 11 12:33:52 PM PDT 23 Oct 11 12:33:58 PM PDT 23 2110985820 ps
T604 /workspace/coverage/default/40.sysrst_ctrl_pin_override_test.611808812 Oct 11 12:34:14 PM PDT 23 Oct 11 12:34:17 PM PDT 23 2522800729 ps
T605 /workspace/coverage/default/41.sysrst_ctrl_stress_all.14597671 Oct 11 12:34:13 PM PDT 23 Oct 11 12:34:23 PM PDT 23 12063751165 ps
T297 /workspace/coverage/default/0.sysrst_ctrl_sec_cm.75195990 Oct 11 12:32:49 PM PDT 23 Oct 11 12:33:44 PM PDT 23 22012033376 ps
T606 /workspace/coverage/default/5.sysrst_ctrl_stress_all_with_rand_reset.1959902622 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:56 PM PDT 23 29342034073 ps
T607 /workspace/coverage/default/23.sysrst_ctrl_stress_all.1861643014 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:35 PM PDT 23 9750617704 ps
T608 /workspace/coverage/default/20.sysrst_ctrl_ultra_low_pwr.3307975652 Oct 11 12:33:21 PM PDT 23 Oct 11 12:33:25 PM PDT 23 8972119220 ps
T609 /workspace/coverage/default/47.sysrst_ctrl_edge_detect.4258061845 Oct 11 12:34:22 PM PDT 23 Oct 11 12:34:24 PM PDT 23 2487729719 ps
T610 /workspace/coverage/default/44.sysrst_ctrl_ec_pwr_on_rst.3478516178 Oct 11 12:34:27 PM PDT 23 Oct 11 12:34:34 PM PDT 23 4667889357 ps
T611 /workspace/coverage/default/49.sysrst_ctrl_stress_all.2068923334 Oct 11 12:34:27 PM PDT 23 Oct 11 12:34:36 PM PDT 23 12123442611 ps
T612 /workspace/coverage/default/27.sysrst_ctrl_flash_wr_prot_out.498969804 Oct 11 12:33:22 PM PDT 23 Oct 11 12:33:24 PM PDT 23 2681499353 ps
T613 /workspace/coverage/default/6.sysrst_ctrl_pin_override_test.4129351456 Oct 11 12:33:06 PM PDT 23 Oct 11 12:33:09 PM PDT 23 2533870401 ps
T614 /workspace/coverage/default/25.sysrst_ctrl_in_out_inverted.646715547 Oct 11 12:33:14 PM PDT 23 Oct 11 12:33:22 PM PDT 23 2463907220 ps
T178 /workspace/coverage/default/6.sysrst_ctrl_stress_all_with_rand_reset.4202468728 Oct 11 12:33:24 PM PDT 23 Oct 11 12:35:04 PM PDT 23 40400281131 ps
T224 /workspace/coverage/default/22.sysrst_ctrl_pin_override_test.1429568145 Oct 11 12:33:26 PM PDT 23 Oct 11 12:33:31 PM PDT 23 2523508517 ps
T615 /workspace/coverage/default/12.sysrst_ctrl_smoke.1482160095 Oct 11 12:33:09 PM PDT 23 Oct 11 12:33:13 PM PDT 23 2114077576 ps
T348 /workspace/coverage/default/10.sysrst_ctrl_combo_detect_with_pre_cond.967393184 Oct 11 12:33:41 PM PDT 23 Oct 11 12:34:42 PM PDT 23 89798773113 ps
T158 /workspace/coverage/default/26.sysrst_ctrl_ultra_low_pwr.1021943533 Oct 11 12:33:40 PM PDT 23 Oct 11 12:33:43 PM PDT 23 5887493868 ps
T351 /workspace/coverage/default/5.sysrst_ctrl_combo_detect_with_pre_cond.1549239421 Oct 11 12:33:18 PM PDT 23 Oct 11 12:35:01 PM PDT 23 82167500344 ps
T616 /workspace/coverage/default/9.sysrst_ctrl_in_out_inverted.1360218094 Oct 11 12:33:03 PM PDT 23 Oct 11 12:33:09 PM PDT 23 2486554570 ps
T617 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst.144505104 Oct 11 12:32:47 PM PDT 23 Oct 11 12:32:48 PM PDT 23 2267134322 ps
T618 /workspace/coverage/default/42.sysrst_ctrl_flash_wr_prot_out.4128769926 Oct 11 12:34:19 PM PDT 23 Oct 11 12:34:23 PM PDT 23 2620924331 ps
T349 /workspace/coverage/default/38.sysrst_ctrl_combo_detect_with_pre_cond.4208530429 Oct 11 12:34:13 PM PDT 23 Oct 11 12:35:33 PM PDT 23 31369462665 ps
T285 /workspace/coverage/default/31.sysrst_ctrl_combo_detect.3117154721 Oct 11 12:33:50 PM PDT 23 Oct 11 12:34:36 PM PDT 23 33180242872 ps
T619 /workspace/coverage/default/17.sysrst_ctrl_ec_pwr_on_rst.3962153858 Oct 11 12:33:30 PM PDT 23 Oct 11 12:33:37 PM PDT 23 2514925716 ps
T359 /workspace/coverage/default/23.sysrst_ctrl_combo_detect_with_pre_cond.1920031109 Oct 11 12:33:25 PM PDT 23 Oct 11 12:33:58 PM PDT 23 26860298844 ps
T227 /workspace/coverage/default/4.sysrst_ctrl_edge_detect.3674106645 Oct 11 12:33:04 PM PDT 23 Oct 11 12:33:10 PM PDT 23 3041521579 ps
T620 /workspace/coverage/default/96.sysrst_ctrl_combo_detect_with_pre_cond.324253321 Oct 11 12:34:48 PM PDT 23 Oct 11 12:35:49 PM PDT 23 25334081499 ps
T621 /workspace/coverage/default/10.sysrst_ctrl_pin_override_test.740094600 Oct 11 12:33:10 PM PDT 23 Oct 11 12:33:13 PM PDT 23 2537477064 ps
T622 /workspace/coverage/default/49.sysrst_ctrl_smoke.1106797119 Oct 11 12:34:24 PM PDT 23 Oct 11 12:34:30 PM PDT 23 2112928700 ps
T352 /workspace/coverage/default/29.sysrst_ctrl_combo_detect_with_pre_cond.3899765233 Oct 11 12:33:28 PM PDT 23 Oct 11 12:37:46 PM PDT 23 95814154464 ps
T336 /workspace/coverage/default/18.sysrst_ctrl_combo_detect.1419551398 Oct 11 12:33:16 PM PDT 23 Oct 11 12:38:44 PM PDT 23 135013029686 ps
T623 /workspace/coverage/default/23.sysrst_ctrl_pin_access_test.2113307442 Oct 11 12:33:09 PM PDT 23 Oct 11 12:33:16 PM PDT 23 2191615720 ps
T624 /workspace/coverage/default/8.sysrst_ctrl_pin_override_test.3716378378 Oct 11 12:33:14 PM PDT 23 Oct 11 12:33:18 PM PDT 23 2510730759 ps
T625 /workspace/coverage/default/1.sysrst_ctrl_in_out_inverted.129913378 Oct 11 12:32:32 PM PDT 23 Oct 11 12:32:35 PM PDT 23 2476028268 ps
T626 /workspace/coverage/default/18.sysrst_ctrl_combo_detect_with_pre_cond.2591370399 Oct 11 12:33:06 PM PDT 23 Oct 11 12:34:19 PM PDT 23 54706722666 ps
T627 /workspace/coverage/default/26.sysrst_ctrl_stress_all.1641574871 Oct 11 12:33:34 PM PDT 23 Oct 11 12:33:45 PM PDT 23 7511271386 ps
T628 /workspace/coverage/default/47.sysrst_ctrl_alert_test.2220222749 Oct 11 12:34:46 PM PDT 23 Oct 11 12:34:49 PM PDT 23 2025553218 ps
T162 /workspace/coverage/default/43.sysrst_ctrl_ultra_low_pwr.1495942292 Oct 11 12:34:09 PM PDT 23 Oct 11 12:34:10 PM PDT 23 4766719658 ps
T145 /workspace/coverage/default/21.sysrst_ctrl_stress_all.3863457597 Oct 11 12:33:18 PM PDT 23 Oct 11 12:33:29 PM PDT 23 16910962231 ps
T629 /workspace/coverage/default/46.sysrst_ctrl_smoke.913888843 Oct 11 12:34:11 PM PDT 23 Oct 11 12:34:17 PM PDT 23 2110480539 ps
T630 /workspace/coverage/default/19.sysrst_ctrl_in_out_inverted.4019725307 Oct 11 12:33:09 PM PDT 23 Oct 11 12:33:16 PM PDT 23 2456942776 ps
T631 /workspace/coverage/default/2.sysrst_ctrl_alert_test.382505394 Oct 11 12:32:49 PM PDT 23 Oct 11 12:32:56 PM PDT 23 2011093299 ps
T632 /workspace/coverage/default/2.sysrst_ctrl_pin_access_test.1779922231 Oct 11 12:32:25 PM PDT 23 Oct 11 12:32:28 PM PDT 23 2059533215 ps
T633 /workspace/coverage/default/20.sysrst_ctrl_flash_wr_prot_out.997295079 Oct 11 12:33:33 PM PDT 23 Oct 11 12:33:41 PM PDT 23 2612349180 ps
T634 /workspace/coverage/default/13.sysrst_ctrl_auto_blk_key_output.217599929 Oct 11 12:33:25 PM PDT 23 Oct 11 12:33:36 PM PDT 23 3123498679 ps
T635 /workspace/coverage/default/6.sysrst_ctrl_pin_access_test.768741542 Oct 11 12:33:30 PM PDT 23 Oct 11 12:33:32 PM PDT 23 2238286074 ps
T636 /workspace/coverage/default/6.sysrst_ctrl_auto_blk_key_output.1947807046 Oct 11 12:33:15 PM PDT 23 Oct 11 12:33:20 PM PDT 23 3344537445 ps
T637 /workspace/coverage/default/17.sysrst_ctrl_stress_all_with_rand_reset.2462552857 Oct 11 12:34:05 PM PDT 23 Oct 11 12:35:36 PM PDT 23 36401448609 ps
T638 /workspace/coverage/default/24.sysrst_ctrl_ec_pwr_on_rst.1307266873 Oct 11 12:33:42 PM PDT 23 Oct 11 12:33:47 PM PDT 23 4800286052 ps
T639 /workspace/coverage/default/24.sysrst_ctrl_stress_all_with_rand_reset.3888182318 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:58 PM PDT 23 27767243297 ps
T179 /workspace/coverage/default/12.sysrst_ctrl_edge_detect.3490794491 Oct 11 12:33:28 PM PDT 23 Oct 11 12:33:31 PM PDT 23 3128393388 ps
T640 /workspace/coverage/default/35.sysrst_ctrl_flash_wr_prot_out.4058829263 Oct 11 12:34:14 PM PDT 23 Oct 11 12:34:21 PM PDT 23 2611161237 ps
T641 /workspace/coverage/default/23.sysrst_ctrl_pin_override_test.3719453452 Oct 11 12:33:36 PM PDT 23 Oct 11 12:33:40 PM PDT 23 2520556970 ps
T642 /workspace/coverage/default/13.sysrst_ctrl_pin_access_test.1341174004 Oct 11 12:33:16 PM PDT 23 Oct 11 12:33:22 PM PDT 23 2165723683 ps
T643 /workspace/coverage/default/49.sysrst_ctrl_edge_detect.3271360315 Oct 11 12:34:52 PM PDT 23 Oct 11 12:34:58 PM PDT 23 3216577899 ps
T644 /workspace/coverage/default/3.sysrst_ctrl_pin_access_test.187767775 Oct 11 12:32:50 PM PDT 23 Oct 11 12:32:54 PM PDT 23 2195335005 ps
T645 /workspace/coverage/default/21.sysrst_ctrl_alert_test.2760400993 Oct 11 12:33:15 PM PDT 23 Oct 11 12:33:19 PM PDT 23 2016144174 ps
T163 /workspace/coverage/default/6.sysrst_ctrl_stress_all.3688456414 Oct 11 12:33:11 PM PDT 23 Oct 11 12:33:32 PM PDT 23 17016441969 ps
T363 /workspace/coverage/default/44.sysrst_ctrl_stress_all.1908193904 Oct 11 12:33:53 PM PDT 23 Oct 11 12:35:03 PM PDT 23 53358655098 ps
T646 /workspace/coverage/default/14.sysrst_ctrl_stress_all.1300706840 Oct 11 12:33:01 PM PDT 23 Oct 11 12:33:10 PM PDT 23 12204551771 ps
T647 /workspace/coverage/default/1.sysrst_ctrl_ultra_low_pwr.3957714906 Oct 11 12:32:21 PM PDT 23 Oct 11 12:33:28 PM PDT 23 360444740727 ps
T365 /workspace/coverage/default/0.sysrst_ctrl_combo_detect.3925775703 Oct 11 12:32:34 PM PDT 23 Oct 11 12:35:30 PM PDT 23 129782353636 ps
T648 /workspace/coverage/default/83.sysrst_ctrl_combo_detect_with_pre_cond.3081722620 Oct 11 12:34:12 PM PDT 23 Oct 11 12:34:32 PM PDT 23 27348675214 ps
T649 /workspace/coverage/default/29.sysrst_ctrl_pin_override_test.1518703971 Oct 11 12:33:35 PM PDT 23 Oct 11 12:33:44 PM PDT 23 2508494340 ps
T650 /workspace/coverage/default/27.sysrst_ctrl_ec_pwr_on_rst.755560560 Oct 11 12:33:16 PM PDT 23 Oct 11 01:03:04 PM PDT 23 743854050959 ps
T651 /workspace/coverage/default/5.sysrst_ctrl_ultra_low_pwr.1955863608 Oct 11 12:33:06 PM PDT 23 Oct 11 12:33:33 PM PDT 23 1646699699562 ps
T652 /workspace/coverage/default/22.sysrst_ctrl_edge_detect.3788446811 Oct 11 12:33:32 PM PDT 23 Oct 11 12:33:46 PM PDT 23 4966189361 ps
T653 /workspace/coverage/default/7.sysrst_ctrl_alert_test.1404816621 Oct 11 12:33:02 PM PDT 23 Oct 11 12:33:05 PM PDT 23 2027591958 ps
T654 /workspace/coverage/default/58.sysrst_ctrl_combo_detect_with_pre_cond.3867733268 Oct 11 12:34:09 PM PDT 23 Oct 11 12:35:39 PM PDT 23 72142797880 ps
T655 /workspace/coverage/default/22.sysrst_ctrl_smoke.597408172 Oct 11 12:33:39 PM PDT 23 Oct 11 12:33:42 PM PDT 23 2125318365 ps
T656 /workspace/coverage/default/30.sysrst_ctrl_flash_wr_prot_out.979477820 Oct 11 12:33:57 PM PDT 23 Oct 11 12:34:06 PM PDT 23 2614796306 ps
T362 /workspace/coverage/default/11.sysrst_ctrl_combo_detect.378195427 Oct 11 12:33:23 PM PDT 23 Oct 11 12:40:39 PM PDT 23 178650157643 ps
T657 /workspace/coverage/default/65.sysrst_ctrl_combo_detect_with_pre_cond.4027087945 Oct 11 12:34:07 PM PDT 23 Oct 11 12:35:41 PM PDT 23 36932105188 ps
T658 /workspace/coverage/default/30.sysrst_ctrl_smoke.552816974 Oct 11 12:33:29 PM PDT 23 Oct 11 12:33:35 PM PDT 23 2110878526 ps
T659 /workspace/coverage/default/6.sysrst_ctrl_ec_pwr_on_rst.4070524290 Oct 11 12:33:21 PM PDT 23 Oct 11 12:33:24 PM PDT 23 2930803391 ps
T660 /workspace/coverage/default/31.sysrst_ctrl_in_out_inverted.3037142017 Oct 11 12:33:50 PM PDT 23 Oct 11 12:33:54 PM PDT 23 2463928723 ps
T236 /workspace/coverage/default/38.sysrst_ctrl_edge_detect.1312350286 Oct 11 12:34:12 PM PDT 23 Oct 11 12:34:17 PM PDT 23 3420832356 ps
T338 /workspace/coverage/default/25.sysrst_ctrl_combo_detect.3642639891 Oct 11 12:33:24 PM PDT 23 Oct 11 12:34:06 PM PDT 23 144341343923 ps
T661 /workspace/coverage/default/2.sysrst_ctrl_flash_wr_prot_out.2210658078 Oct 11 12:32:15 PM PDT 23 Oct 11 12:32:18 PM PDT 23 2632210748 ps
T662 /workspace/coverage/default/9.sysrst_ctrl_flash_wr_prot_out.3504053352 Oct 11 12:32:49 PM PDT 23 Oct 11 12:32:56 PM PDT 23 2610688252 ps
T663 /workspace/coverage/default/41.sysrst_ctrl_pin_access_test.723377271 Oct 11 12:34:14 PM PDT 23 Oct 11 12:34:17 PM PDT 23 2261086912 ps
T664 /workspace/coverage/default/33.sysrst_ctrl_in_out_inverted.1889383945 Oct 11 12:33:25 PM PDT 23 Oct 11 12:33:28 PM PDT 23 2592290052 ps
T159 /workspace/coverage/default/36.sysrst_ctrl_ultra_low_pwr.1307743355 Oct 11 12:34:05 PM PDT 23 Oct 11 12:34:10 PM PDT 23 3462308474 ps
T117 /workspace/coverage/default/1.sysrst_ctrl_stress_all_with_rand_reset.1537152376 Oct 11 12:33:09 PM PDT 23 Oct 11 12:34:37 PM PDT 23 143368757093 ps
T665 /workspace/coverage/default/27.sysrst_ctrl_smoke.294526548 Oct 11 12:33:29 PM PDT 23 Oct 11 12:33:33 PM PDT 23 2117373141 ps
T666 /workspace/coverage/default/41.sysrst_ctrl_combo_detect_with_pre_cond.3127353985 Oct 11 12:35:33 PM PDT 23 Oct 11 12:36:50 PM PDT 23 27584424222 ps
T667 /workspace/coverage/default/28.sysrst_ctrl_auto_blk_key_output.928556974 Oct 11 12:33:22 PM PDT 23 Oct 11 12:33:33 PM PDT 23 3474124150 ps
T89 /workspace/coverage/default/12.sysrst_ctrl_stress_all_with_rand_reset.1041890154 Oct 11 12:33:19 PM PDT 23 Oct 11 12:33:56 PM PDT 23 615464496204 ps
T668 /workspace/coverage/default/20.sysrst_ctrl_smoke.541887524 Oct 11 12:33:24 PM PDT 23 Oct 11 12:33:31 PM PDT 23 2109118249 ps
T669 /workspace/coverage/default/49.sysrst_ctrl_alert_test.3054614423 Oct 11 12:34:35 PM PDT 23 Oct 11 12:34:39 PM PDT 23 2017887892 ps
T670 /workspace/coverage/default/27.sysrst_ctrl_pin_override_test.1929863300 Oct 11 12:33:41 PM PDT 23 Oct 11 12:33:45 PM PDT 23 2516107027 ps
T671 /workspace/coverage/default/8.sysrst_ctrl_ec_pwr_on_rst.2364623570 Oct 11 12:33:40 PM PDT 23 Oct 11 12:33:45 PM PDT 23 3226936697 ps
T672 /workspace/coverage/default/1.sysrst_ctrl_alert_test.216294978 Oct 11 12:32:52 PM PDT 23 Oct 11 12:32:58 PM PDT 23 2011921198 ps
T673 /workspace/coverage/default/32.sysrst_ctrl_flash_wr_prot_out.1021311257 Oct 11 12:33:22 PM PDT 23 Oct 11 12:33:25 PM PDT 23 2637630567 ps
T674 /workspace/coverage/default/16.sysrst_ctrl_pin_access_test.2270000209 Oct 11 12:33:12 PM PDT 23 Oct 11 12:33:14 PM PDT 23 2286358229 ps
T675 /workspace/coverage/default/18.sysrst_ctrl_stress_all.1074118348 Oct 11 12:33:07 PM PDT 23 Oct 11 12:33:43 PM PDT 23 14734447423 ps
T676 /workspace/coverage/default/22.sysrst_ctrl_pin_access_test.3333889186 Oct 11 12:33:15 PM PDT 23 Oct 11 12:33:17 PM PDT 23 2127547883 ps
T677 /workspace/coverage/default/21.sysrst_ctrl_flash_wr_prot_out.2740064671 Oct 11 12:33:02 PM PDT 23 Oct 11 12:33:08 PM PDT 23 2614438888 ps
T678 /workspace/coverage/default/38.sysrst_ctrl_ec_pwr_on_rst.2067913211 Oct 11 12:34:15 PM PDT 23 Oct 11 12:34:22 PM PDT 23 4193834646 ps
T679 /workspace/coverage/default/35.sysrst_ctrl_ec_pwr_on_rst.1828958886 Oct 11 12:34:09 PM PDT 23 Oct 11 12:34:13 PM PDT 23 3934680027 ps
T680 /workspace/coverage/default/1.sysrst_ctrl_edge_detect.1117602529 Oct 11 12:32:44 PM PDT 23 Oct 11 12:32:49 PM PDT 23 2568391470 ps
T681 /workspace/coverage/default/18.sysrst_ctrl_flash_wr_prot_out.546880151 Oct 11 12:33:00 PM PDT 23 Oct 11 12:33:07 PM PDT 23 2610602363 ps
T682 /workspace/coverage/default/32.sysrst_ctrl_auto_blk_key_output.2498531903 Oct 11 12:33:50 PM PDT 23 Oct 11 12:34:36 PM PDT 23 324011820966 ps
T683 /workspace/coverage/default/39.sysrst_ctrl_in_out_inverted.2498014771 Oct 11 12:34:58 PM PDT 23 Oct 11 12:35:01 PM PDT 23 2495677049 ps
T345 /workspace/coverage/default/16.sysrst_ctrl_combo_detect_with_pre_cond.3205333666 Oct 11 12:33:11 PM PDT 23 Oct 11 12:33:42 PM PDT 23 75805300226 ps
T684 /workspace/coverage/default/49.sysrst_ctrl_pin_override_test.3292809310 Oct 11 12:34:52 PM PDT 23 Oct 11 12:34:59 PM PDT 23 2512864742 ps
T685 /workspace/coverage/default/39.sysrst_ctrl_ultra_low_pwr.3897831659 Oct 11 12:34:04 PM PDT 23 Oct 11 12:34:06 PM PDT 23 5385087133 ps
T369 /workspace/coverage/default/20.sysrst_ctrl_combo_detect_with_pre_cond.4135730276 Oct 11 12:33:28 PM PDT 23 Oct 11 12:38:22 PM PDT 23 106270388923 ps
T686 /workspace/coverage/default/37.sysrst_ctrl_flash_wr_prot_out.2693130494 Oct 11 12:34:04 PM PDT 23 Oct 11 12:34:06 PM PDT 23 2660649749 ps
T82 /workspace/coverage/default/21.sysrst_ctrl_combo_detect_with_pre_cond.2526369253 Oct 11 12:33:27 PM PDT 23 Oct 11 12:34:14 PM PDT 23 70898560009 ps
T687 /workspace/coverage/default/3.sysrst_ctrl_ultra_low_pwr.890451909 Oct 11 12:32:48 PM PDT 23 Oct 11 12:32:51 PM PDT 23 2831799180 ps
T242 /workspace/coverage/default/43.sysrst_ctrl_edge_detect.3236895794 Oct 11 12:34:04 PM PDT 23 Oct 11 12:34:08 PM PDT 23 5963550664 ps
T688 /workspace/coverage/default/46.sysrst_ctrl_alert_test.2576461834 Oct 11 12:34:53 PM PDT 23 Oct 11 12:34:55 PM PDT 23 2035073155 ps
T689 /workspace/coverage/default/35.sysrst_ctrl_alert_test.377577174 Oct 11 12:34:25 PM PDT 23 Oct 11 12:34:28 PM PDT 23 2029609839 ps
T118 /workspace/coverage/default/3.sysrst_ctrl_combo_detect.2762079866 Oct 11 12:32:35 PM PDT 23 Oct 11 12:33:21 PM PDT 23 81555688418 ps
T690 /workspace/coverage/default/33.sysrst_ctrl_stress_all.1219622598 Oct 11 12:34:23 PM PDT 23 Oct 11 12:34:32 PM PDT 23 12117203172 ps
T308 /workspace/coverage/default/2.sysrst_ctrl_sec_cm.480514265 Oct 11 12:32:26 PM PDT 23 Oct 11 12:32:56 PM PDT 23 42102652955 ps
T691 /workspace/coverage/default/46.sysrst_ctrl_combo_detect_with_pre_cond.2312992543 Oct 11 12:33:52 PM PDT 23 Oct 11 12:35:58 PM PDT 23 51826615396 ps
T692 /workspace/coverage/default/8.sysrst_ctrl_combo_detect_with_pre_cond.435989586 Oct 11 12:33:08 PM PDT 23 Oct 11 12:34:05 PM PDT 23 23581239671 ps
T693 /workspace/coverage/default/33.sysrst_ctrl_ultra_low_pwr.3893796666 Oct 11 12:34:15 PM PDT 23 Oct 11 12:34:17 PM PDT 23 14505892904 ps
T694 /workspace/coverage/default/11.sysrst_ctrl_pin_override_test.1178435726 Oct 11 12:33:23 PM PDT 23 Oct 11 12:33:27 PM PDT 23 2517896783 ps
T695 /workspace/coverage/default/44.sysrst_ctrl_smoke.2296763956 Oct 11 12:34:06 PM PDT 23 Oct 11 12:34:09 PM PDT 23 2131382481 ps
T696 /workspace/coverage/default/28.sysrst_ctrl_stress_all_with_rand_reset.196229701 Oct 11 12:33:44 PM PDT 23 Oct 11 12:33:59 PM PDT 23 25497621224 ps
T697 /workspace/coverage/default/17.sysrst_ctrl_in_out_inverted.1641671907 Oct 11 12:33:15 PM PDT 23 Oct 11 12:33:22 PM PDT 23 2466289825 ps
T698 /workspace/coverage/default/42.sysrst_ctrl_alert_test.549435111 Oct 11 12:33:58 PM PDT 23 Oct 11 12:34:02 PM PDT 23 2020872713 ps
T699 /workspace/coverage/default/12.sysrst_ctrl_pin_override_test.3537024585 Oct 11 12:32:58 PM PDT 23 Oct 11 12:33:02 PM PDT 23 2511743919 ps
T180 /workspace/coverage/default/4.sysrst_ctrl_stress_all_with_rand_reset.2109957321 Oct 11 12:33:25 PM PDT 23 Oct 11 12:34:34 PM PDT 23 105570930238 ps
T375 /workspace/coverage/default/13.sysrst_ctrl_stress_all_with_rand_reset.33269491 Oct 11 12:33:29 PM PDT 23 Oct 11 12:34:32 PM PDT 23 28627672573 ps
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T701 /workspace/coverage/default/45.sysrst_ctrl_pin_access_test.4215631846 Oct 11 12:34:21 PM PDT 23 Oct 11 12:34:27 PM PDT 23 2163114627 ps
T292 /workspace/coverage/default/37.sysrst_ctrl_combo_detect.1170632511 Oct 11 12:33:51 PM PDT 23 Oct 11 12:37:31 PM PDT 23 85517823443 ps
T702 /workspace/coverage/default/32.sysrst_ctrl_pin_override_test.1324716854 Oct 11 12:33:25 PM PDT 23 Oct 11 12:33:30 PM PDT 23 2539885242 ps
T703 /workspace/coverage/default/14.sysrst_ctrl_ultra_low_pwr.3963583423 Oct 11 12:33:34 PM PDT 23 Oct 11 12:33:42 PM PDT 23 5630355921 ps
T704 /workspace/coverage/default/0.sysrst_ctrl_in_out_inverted.778864103 Oct 11 12:32:28 PM PDT 23 Oct 11 12:32:33 PM PDT 23 2462947799 ps
T705 /workspace/coverage/default/34.sysrst_ctrl_ultra_low_pwr.3888577748 Oct 11 12:34:15 PM PDT 23 Oct 11 12:34:20 PM PDT 23 4870910603 ps
T706 /workspace/coverage/default/47.sysrst_ctrl_stress_all.2893470875 Oct 11 12:34:10 PM PDT 23 Oct 11 12:34:35 PM PDT 23 9256484777 ps
T707 /workspace/coverage/default/36.sysrst_ctrl_flash_wr_prot_out.4084983993 Oct 11 12:34:13 PM PDT 23 Oct 11 12:34:20 PM PDT 23 2608112016 ps
T708 /workspace/coverage/default/10.sysrst_ctrl_combo_detect.3612780192 Oct 11 12:33:29 PM PDT 23 Oct 11 12:35:25 PM PDT 23 43398212806 ps
T709 /workspace/coverage/default/21.sysrst_ctrl_smoke.2187492037 Oct 11 12:33:31 PM PDT 23 Oct 11 12:33:33 PM PDT 23 2131591601 ps
T710 /workspace/coverage/default/35.sysrst_ctrl_auto_blk_key_output.448499572 Oct 11 12:33:58 PM PDT 23 Oct 11 12:34:08 PM PDT 23 3100881061 ps
T711 /workspace/coverage/default/23.sysrst_ctrl_ultra_low_pwr.1989862460 Oct 11 12:33:36 PM PDT 23 Oct 11 12:33:42 PM PDT 23 3704864178 ps
T712 /workspace/coverage/default/47.sysrst_ctrl_ec_pwr_on_rst.3730685528 Oct 11 12:34:09 PM PDT 23 Oct 11 12:34:12 PM PDT 23 3173458882 ps
T713 /workspace/coverage/default/29.sysrst_ctrl_flash_wr_prot_out.2990513590 Oct 11 12:33:44 PM PDT 23 Oct 11 12:33:47 PM PDT 23 2631630373 ps
T714 /workspace/coverage/default/48.sysrst_ctrl_alert_test.3429883209 Oct 11 12:34:12 PM PDT 23 Oct 11 12:34:13 PM PDT 23 2044881769 ps
T293 /workspace/coverage/default/7.sysrst_ctrl_combo_detect.2450406379 Oct 11 12:33:34 PM PDT 23 Oct 11 12:35:58 PM PDT 23 56099302030 ps
T715 /workspace/coverage/default/77.sysrst_ctrl_combo_detect_with_pre_cond.4188120421 Oct 11 12:34:21 PM PDT 23 Oct 11 12:36:40 PM PDT 23 57870423680 ps
T716 /workspace/coverage/default/15.sysrst_ctrl_pin_access_test.2331596189 Oct 11 12:33:03 PM PDT 23 Oct 11 12:33:07 PM PDT 23 2257735451 ps
T717 /workspace/coverage/default/7.sysrst_ctrl_ec_pwr_on_rst.2473016121 Oct 11 12:33:29 PM PDT 23 Oct 11 12:33:32 PM PDT 23 3464983399 ps
T718 /workspace/coverage/default/44.sysrst_ctrl_pin_access_test.2863352768 Oct 11 12:34:57 PM PDT 23 Oct 11 12:35:00 PM PDT 23 2273764939 ps
T719 /workspace/coverage/default/22.sysrst_ctrl_in_out_inverted.1261236190 Oct 11 12:33:20 PM PDT 23 Oct 11 12:33:25 PM PDT 23 2493500095 ps
T720 /workspace/coverage/default/46.sysrst_ctrl_flash_wr_prot_out.2235030946 Oct 11 12:34:06 PM PDT 23 Oct 11 12:34:14 PM PDT 23 2612475736 ps
T721 /workspace/coverage/default/37.sysrst_ctrl_in_out_inverted.2213644781 Oct 11 12:34:09 PM PDT 23 Oct 11 12:34:17 PM PDT 23 2469248091 ps
T722 /workspace/coverage/default/12.sysrst_ctrl_pin_access_test.3638375239 Oct 11 12:32:57 PM PDT 23 Oct 11 12:33:01 PM PDT 23 2101432664 ps
T723 /workspace/coverage/default/89.sysrst_ctrl_combo_detect_with_pre_cond.2397810811 Oct 11 12:34:48 PM PDT 23 Oct 11 12:36:27 PM PDT 23 38109167381 ps
T370 /workspace/coverage/default/91.sysrst_ctrl_combo_detect_with_pre_cond.2868663184 Oct 11 12:34:12 PM PDT 23 Oct 11 12:37:39 PM PDT 23 75789178002 ps
T724 /workspace/coverage/default/27.sysrst_ctrl_alert_test.810284674 Oct 11 12:33:43 PM PDT 23 Oct 11 12:33:49 PM PDT 23 2010452492 ps
T725 /workspace/coverage/default/24.sysrst_ctrl_edge_detect.1133105866 Oct 11 12:33:35 PM PDT 23 Oct 11 12:33:42 PM PDT 23 2836826467 ps
T726 /workspace/coverage/default/28.sysrst_ctrl_pin_access_test.2436802565 Oct 11 12:33:32 PM PDT 23 Oct 11 12:33:34 PM PDT 23 2072437316 ps
T727 /workspace/coverage/default/24.sysrst_ctrl_combo_detect.1992628510 Oct 11 12:33:34 PM PDT 23 Oct 11 12:34:28 PM PDT 23 86027525688 ps
T728 /workspace/coverage/default/32.sysrst_ctrl_smoke.1122833449 Oct 11 12:33:49 PM PDT 23 Oct 11 12:33:56 PM PDT 23 2112299670 ps
T729 /workspace/coverage/default/1.sysrst_ctrl_auto_blk_key_output.3325178388 Oct 11 12:32:49 PM PDT 23 Oct 11 12:32:56 PM PDT 23 3776981302 ps
T730 /workspace/coverage/default/70.sysrst_ctrl_combo_detect_with_pre_cond.2326589888 Oct 11 12:34:08 PM PDT 23 Oct 11 12:36:31 PM PDT 23 111265770036 ps
T146 /workspace/coverage/default/27.sysrst_ctrl_ultra_low_pwr.417350455 Oct 11 12:33:32 PM PDT 23 Oct 11 12:33:34 PM PDT 23 7121675545 ps
T181 /workspace/coverage/default/10.sysrst_ctrl_edge_detect.3752259455 Oct 11 12:34:07 PM PDT 23 Oct 11 12:34:22 PM PDT 23 5587455609 ps
T731 /workspace/coverage/default/13.sysrst_ctrl_flash_wr_prot_out.425575435 Oct 11 12:33:41 PM PDT 23 Oct 11 12:33:44 PM PDT 23 2633901614 ps
T732 /workspace/coverage/default/10.sysrst_ctrl_flash_wr_prot_out.1813891757 Oct 11 12:33:13 PM PDT 23 Oct 11 12:33:21 PM PDT 23 2611001268 ps
T733 /workspace/coverage/default/25.sysrst_ctrl_smoke.692338927 Oct 11 12:33:30 PM PDT 23 Oct 11 12:33:36 PM PDT 23 2109061729 ps
T734 /workspace/coverage/default/22.sysrst_ctrl_ec_pwr_on_rst.697494322 Oct 11 12:33:42 PM PDT 23 Oct 11 12:33:56 PM PDT 23 4718934934 ps
T335 /workspace/coverage/default/48.sysrst_ctrl_combo_detect.736622178 Oct 11 12:34:06 PM PDT 23 Oct 11 12:38:41 PM PDT 23 114628349911 ps
T735 /workspace/coverage/default/29.sysrst_ctrl_ultra_low_pwr.2845530359 Oct 11 12:33:21 PM PDT 23 Oct 11 12:33:28 PM PDT 23 3281985996 ps
T736 /workspace/coverage/default/32.sysrst_ctrl_combo_detect.4080013479 Oct 11 12:33:24 PM PDT 23 Oct 11 12:36:03 PM PDT 23 122680910653 ps
T737 /workspace/coverage/default/8.sysrst_ctrl_stress_all.3663526406 Oct 11 12:33:13 PM PDT 23 Oct 11 12:33:40 PM PDT 23 9153884535 ps
T147 /workspace/coverage/default/10.sysrst_ctrl_ultra_low_pwr.3914968494 Oct 11 12:33:39 PM PDT 23 Oct 11 12:33:42 PM PDT 23 5873766899 ps
T738 /workspace/coverage/default/24.sysrst_ctrl_smoke.3761046387 Oct 11 12:33:20 PM PDT 23 Oct 11 12:33:24 PM PDT 23 2115852382 ps
T739 /workspace/coverage/default/16.sysrst_ctrl_stress_all.4169800262 Oct 11 12:33:17 PM PDT 23 Oct 11 12:33:31 PM PDT 23 9707948746 ps
T740 /workspace/coverage/default/48.sysrst_ctrl_flash_wr_prot_out.3347751100 Oct 11 12:34:31 PM PDT 23 Oct 11 12:34:33 PM PDT 23 2621431433 ps
T741 /workspace/coverage/default/38.sysrst_ctrl_pin_access_test.3027773869 Oct 11 12:34:42 PM PDT 23 Oct 11 12:34:44 PM PDT 23 2218305719 ps
T742 /workspace/coverage/default/41.sysrst_ctrl_alert_test.2996595452 Oct 11 12:34:42 PM PDT 23 Oct 11 12:34:44 PM PDT 23 2036909325 ps
T743 /workspace/coverage/default/45.sysrst_ctrl_flash_wr_prot_out.70856077 Oct 11 12:34:58 PM PDT 23 Oct 11 12:35:11 PM PDT 23 2612314449 ps
T744 /workspace/coverage/default/26.sysrst_ctrl_auto_blk_key_output.964995637 Oct 11 12:33:38 PM PDT 23 Oct 11 12:33:44 PM PDT 23 2958185210 ps
T745 /workspace/coverage/default/48.sysrst_ctrl_smoke.300056347 Oct 11 12:34:09 PM PDT 23 Oct 11 12:34:11 PM PDT 23 2139107400 ps
T746 /workspace/coverage/default/6.sysrst_ctrl_combo_detect_with_pre_cond.3688784682 Oct 11 12:33:18 PM PDT 23 Oct 11 12:33:38 PM PDT 23 31460074863 ps
T747 /workspace/coverage/default/44.sysrst_ctrl_pin_override_test.4291905644 Oct 11 12:34:05 PM PDT 23 Oct 11 12:34:10 PM PDT 23 2520899901 ps
T748 /workspace/coverage/default/41.sysrst_ctrl_edge_detect.1902121819 Oct 11 12:34:56 PM PDT 23 Oct 11 12:35:03 PM PDT 23 2865420733 ps
T749 /workspace/coverage/default/44.sysrst_ctrl_flash_wr_prot_out.239932128 Oct 11 12:34:22 PM PDT 23 Oct 11 12:34:26 PM PDT 23 2619017713 ps
T289 /workspace/coverage/default/22.sysrst_ctrl_combo_detect_with_pre_cond.3063219162 Oct 11 12:33:31 PM PDT 23 Oct 11 12:34:23 PM PDT 23 77150212644 ps
T750 /workspace/coverage/default/2.sysrst_ctrl_combo_detect_ec_rst.2134462730 Oct 11 12:33:15 PM PDT 23 Oct 11 12:33:18 PM PDT 23 2232723975 ps
T751 /workspace/coverage/default/26.sysrst_ctrl_stress_all_with_rand_reset.3477974194 Oct 11 12:33:24 PM PDT 23 Oct 11 12:38:48 PM PDT 23 688594233330 ps
T752 /workspace/coverage/default/1.sysrst_ctrl_combo_detect_ec_rst_with_pre_cond.2404838824 Oct 11 12:32:29 PM PDT 23 Oct 11 12:32:33 PM PDT 23 2299625731 ps
T753 /workspace/coverage/default/30.sysrst_ctrl_ultra_low_pwr.598738799 Oct 11 12:34:03 PM PDT 23 Oct 11 12:34:10 PM PDT 23 3714653470 ps
T754 /workspace/coverage/default/9.sysrst_ctrl_alert_test.244720569 Oct 11 12:33:29 PM PDT 23 Oct 11 12:33:32 PM PDT 23 2036020512 ps
T755 /workspace/coverage/default/41.sysrst_ctrl_combo_detect.721193555 Oct 11 12:34:29 PM PDT 23 Oct 11 12:35:41 PM PDT 23 26417885024 ps
T756 /workspace/coverage/default/40.sysrst_ctrl_stress_all_with_rand_reset.313776035 Oct 11 12:34:49 PM PDT 23 Oct 11 12:36:11 PM PDT 23 32483451034 ps
T757 /workspace/coverage/default/7.sysrst_ctrl_combo_detect_with_pre_cond.988009292 Oct 11 12:33:16 PM PDT 23 Oct 11 12:37:23 PM PDT 23 95315211331 ps
T758 /workspace/coverage/default/2.sysrst_ctrl_pin_override_test.1759270560 Oct 11 12:32:28 PM PDT 23 Oct 11 12:32:29 PM PDT 23 2828058533 ps
T759 /workspace/coverage/default/8.sysrst_ctrl_in_out_inverted.2173000707 Oct 11 12:33:01 PM PDT 23 Oct 11 12:33:04 PM PDT 23 2474055179 ps
T760 /workspace/coverage/default/7.sysrst_ctrl_smoke.2936265317 Oct 11 12:33:27 PM PDT 23 Oct 11 12:33:34 PM PDT 23 2108177590 ps
T185 /workspace/coverage/default/37.sysrst_ctrl_stress_all_with_rand_reset.3329520895 Oct 11 12:33:57 PM PDT 23 Oct 11 12:34:40 PM PDT 23 36928026101 ps
T761 /workspace/coverage/default/12.sysrst_ctrl_alert_test.4249713737 Oct 11 12:33:20 PM PDT 23 Oct 11 12:33:23 PM PDT 23 2037139912 ps
T762 /workspace/coverage/default/7.sysrst_ctrl_edge_detect.2375826160 Oct 11 12:33:55 PM PDT 23 Oct 11 12:33:59 PM PDT 23 2490590688 ps
T339 /workspace/coverage/default/14.sysrst_ctrl_combo_detect.3259090642 Oct 11 12:33:12 PM PDT 23 Oct 11 12:38:02 PM PDT 23 118363978483 ps
T763 /workspace/coverage/default/0.sysrst_ctrl_stress_all.3243339713 Oct 11 12:32:29 PM PDT 23 Oct 11 12:32:39 PM PDT 23 6634195797 ps
T764 /workspace/coverage/default/39.sysrst_ctrl_smoke.2979877239 Oct 11 12:34:41 PM PDT 23 Oct 11 12:34:48 PM PDT 23 2113752031 ps
T765 /workspace/coverage/default/27.sysrst_ctrl_auto_blk_key_output.2102932114 Oct 11 12:33:16 PM PDT 23 Oct 11 12:46:44 PM PDT 23 309391160838 ps
T194 /workspace/coverage/default/34.sysrst_ctrl_edge_detect.1426413433 Oct 11 12:34:17 PM PDT 23 Oct 11 12:34:24 PM PDT 23 2601793865 ps
T766 /workspace/coverage/default/9.sysrst_ctrl_ultra_low_pwr.3783374953 Oct 11 12:33:21 PM PDT 23 Oct 11 12:33:27 PM PDT 23 4953683740 ps
T767 /workspace/coverage/default/38.sysrst_ctrl_alert_test.4177224703 Oct 11 12:34:24 PM PDT 23 Oct 11 12:34:26 PM PDT 23 2077903044 ps
T768 /workspace/coverage/default/21.sysrst_ctrl_ultra_low_pwr.3667968113 Oct 11 12:33:56 PM PDT 23 Oct 11 12:34:01 PM PDT 23 6239394666 ps
T769 /workspace/coverage/default/0.sysrst_ctrl_flash_wr_prot_out.2430410108 Oct 11 12:32:30 PM PDT 23 Oct 11 12:32:38 PM PDT 23 2611964653 ps
T309 /workspace/coverage/default/1.sysrst_ctrl_sec_cm.3972749298 Oct 11 12:33:01 PM PDT 23 Oct 11 12:33:32 PM PDT 23 42094824152 ps
T770 /workspace/coverage/default/19.sysrst_ctrl_smoke.3356849343 Oct 11 12:33:01 PM PDT 23 Oct 11 12:33:08 PM PDT 23 2167652106 ps
T148 /workspace/coverage/default/20.sysrst_ctrl_stress_all_with_rand_reset.2901273415 Oct 11 12:33:22 PM PDT 23 Oct 11 12:34:34 PM PDT 23 29669287973 ps
T771 /workspace/coverage/default/31.sysrst_ctrl_auto_blk_key_output.11889728 Oct 11 12:33:18 PM PDT 23 Oct 11 12:33:22 PM PDT 23 3292080023 ps
T772 /workspace/coverage/default/43.sysrst_ctrl_ec_pwr_on_rst.2277096633 Oct 11 12:33:47 PM PDT 23 Oct 11 12:33:50 PM PDT 23 3601414526 ps
T773 /workspace/coverage/default/3.sysrst_ctrl_in_out_inverted.917541715 Oct 11 12:32:50 PM PDT 23 Oct 11 12:32:55 PM PDT 23 2465006261 ps
T774 /workspace/coverage/default/45.sysrst_ctrl_ec_pwr_on_rst.1695258998 Oct 11 12:34:52 PM PDT 23 Oct 11 12:34:56 PM PDT 23 4151099791 ps
T775 /workspace/coverage/default/11.sysrst_ctrl_auto_blk_key_output.2617238377 Oct 11 12:33:35 PM PDT 23 Oct 11 12:33:45 PM PDT 23 3328561046 ps
T776 /workspace/coverage/default/32.sysrst_ctrl_alert_test.2239375116 Oct 11 12:33:49 PM PDT 23 Oct 11 12:33:55 PM PDT 23 2011859216 ps
T777 /workspace/coverage/default/26.sysrst_ctrl_pin_access_test.1587354074 Oct 11 12:33:55 PM PDT 23 Oct 11 12:33:57 PM PDT 23 2193468447 ps
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